Product Description
Product Specification
PE4244
SPDT UltraCMOS™ RF Switch
Features
The PE4244 UltraCMOS™ RF Switch is designed to cover a
broad range of applications from DC to 3.0 GHz. This switch
integrates on-board CMOS control logic with a low voltage
CMOS compatible control input. Using a +3-volt nominal power
supply voltage, a 1 dB compression point of +27 dBm can be
achieved. The PE4244 also exhibits excellent isolation of 39 dB
at 1.0 GHz and is offered in a small 8-lead MSOP package.
The PE4244 UltraCMOS™ RF Switch is manufactured in
Peregrine’s patented Ultra Thin Silicon (UTSi®) CMOS
process, offering the performance of GaAs with the economy
and integration of conventional CMOS.
Figure 1. Functional Diagram
RFC
RF1 RF2
CMOS
Control
Driver
• Single +3.0-volt Power Supply
• Low Insertion loss: 0.60 dB up to
2.0 GHz
• High isolation of 39 dB at 1.0 GHz,
29 dB at 2.0 GHz
• Typical 1 dB compression of +27 dBm
• Single-pin CMOS logic control
• Packaged in 8-lead MSOP
Figure 2. Package Type
8-lead MSOP
CTRL
Table 1. Electrical Specifications @ +25 °C, VDD = 3 V (ZS = ZL = 50 )
Parameter Conditions Minimum Typical Maximum Units
Operation Frequency1 DC 3000 MHz
Insertion Loss
Isolation – RFC to RF1/RF2
Isolation – RF1 to RF2
Return Loss
‘ON’ Switching Time CTRL to 0.1 dB final value, 2 GHz 200 ns
‘OFF’ Switching Time CTRL to 25 dB isolation, 2 GHz 90 ns
2
Video Feedthrough
Input 1 dB Compression 2000 MHz 26 27 dBm
Input IP3 2000 MHz, 14dBm 43 45 dBm
Notes: 1. Device linearity will begin to degrade below 10 MHz.
2. The DC transient at the output of any port of the switch when the control v oltage is switched from Low to High or High to Low in a 50
test set-up, measured with 1ns risetime pulses and 500 MHz bandwidth.
15 mVpp
1000 MHz
2000 MHz
1000 MHz
2000 MHz
1000 MHz
2000 MHz
1000 MHz
2000 MHz
37
27
34
26
19
22
0.60
0.60
39
29
36
28
20
25
0.75
0.75
dB
dB
dB
dB
dB
dB
dB
dB
Document No. 70-0103-03 www.psemi.com ©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 7
Product Specification
Figure 3. Pin Configuration (Top View) Table 3. Absolute Maximum Ratings
PE4244
V
DD
CTRL
GND
RFC
1
2
4244
3
4
8
RF1
7
GND
6
GND
5
RF2
Table 2. Pin Descriptions
Pin
No.
1 VDD Nominal 3 V supply connection. A by-
2 CTRL CMOS logic level:
3 GND Ground connection. Traces should be
4 RFC Common RF port for switch (Note 1)
5 RF2 RF2 port (Note 1)
6 GND Ground Connection. Traces should be
7 GND Ground Connection. Traces should be
Pin
Name
Description
pass capacitor (100 pF) to the ground
plane should be placed as close as pos-
High = RFC to RF1 signal path
physically short and connected to
physically short and connected to
physically short and connected to
Symbol Parameter/Conditions Min Max Units
VDD Power supply voltage -0.3 4.0 V
Volt age on any input -0.3 VDD+ V
V
I
T
Storage temperature range -65 150 °C
ST
T
Operating temperature -40 85 °C
OP
P
Input power (50) 30 dBm
IN
V
ESD voltage (Human Body 1500 V
ESD
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage.
Functional operation should be restricted to the
limits in the DC Electrical Specifications table.
Exposure to absolute maximum ratings for
extended periods may affect device reliability.
Table 4. DC Electrical Specifications
Parameter Min Typ Max Units
VDD Power Supply Voltage 2.7 3.0 3.3 V
Power Supply Current
I
DD
= 3V, V
V
DD
Control Voltage High 0.7xV
Control Voltage Low 0.3xV
CNTL
= 3V
250 500 nA
V
DD
V
DD
Electrostatic Discharge (ESD) Precautions
8 RF1 RF1 port (Note 1)
When handling this UltraCMOS™ device, observe
the same precautions that you would use with
Note 1: All RF pins must be DC blocked with an external
seri es capacitor or held at 0 V
.
DC
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the specified rating.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Table 5. Control Logic Truth Table
Control Voltage Signal Path
CTRL = CMOS High RFC to RF1
CTRL = CMOS Low RFC to RF2
©2005 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0103-03 UltraCMOS™ RFIC Solutions
Page 2 of 7
PE4244
Product Specification
Evaluation Kit
The SPDT Switch Evaluation Kit boar d was
designed to ease customer evaluation of the
PE4244 SPDT switch. The RF common port is
connected through a 50 transmission line t o the
top left SMA connector, J1. Port 1 and Port 2 are
connected through 50 transmission lin es t o t he top
two SMA connectors on the right side of the board,
J3 and J4. A through transmissio n li ne connects
SMA connectors J6 and J8. This t r ansmission line
can be used to estimate the loss of the PCB over the
environmental cond it ions being evaluated.
The board is constructed of a t wo metal layer FR4
material with a total thickness of 0. 031”. The bottom
layer provides ground for the RF transmission lines.
The transmission lines were designed using a
coplanar waveguide with ground plane model using
a trace width of 0.030”, trace gaps of 0. 007”,
dielectric thickness of 0. 028”, metal thickness of
0.0014” and
J2 provides a means for controlling DC a nd digital
inputs to the device. Starting from t he lower left pin,
the second pin to the right (J2-3) is connected to the
device CTRL input. The f ourt h pin t o t he ri ght (J2-7)
is connected to the device V
capacitor (100 pF) is provide d on bot h CTRL and
V
traces. It is the responsibi lit y of the customer to
DD
determine proper supply decoupling for their design
application. Removing these components from the
evaluation board has not been shown to degrade RF
performance.
of 4.4.
r
input. A decoupling
DD
Figure 4. Evaluation Board Layout
Peregrine specification 101/0037
Figure 5. Evaluation Board Schematic
Peregrine specification 101/0147
Document No. 70-0103-03 www.psemi.com ©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 3 of 7
Typical Performance Data @ -40 °C to 85 °C (Unless otherwise noted)
PE4244
Product Specification
Figure 6. Insertion Loss – RFC to RF1
0
-0.3
-0.6
-0.9
Insert ion Loss (dB)
-1.2
-1.5
0 500 1 000 1500 2000 2500 3000
-40°C
25°C85°C
Frequency (MHz)
Figure 7. Input 1 dB Compression Point & IIP3
60
50
40
IIP3 ( dBm)
30
20
0 500 1000 1500 2000 2500 3000
Frequency (MHz)
60
1dB Compression Point (dBm)
50
40
30
20
0
-0.3
-0.6
-0.9
Insertion Loss (dB)
-1.2
-1.5
0 500 1000 1500 2000 2500 3000
-40°C
25°C85°C
Frequency (MHz)
Figure 9. Isolation – RFC to RF1
0
-20
-40
-60
Isolation (dB)
-80
-100
0 500 1000 1500 2000 2500 3000
Frequency (MHz)
Figure 8. Insertion Loss – RFC to RF2
©2005 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0103-03 UltraCMOS™ RFIC Solutions
Page 4 of 7
PE4244
Product Specification
Typical Performance Data @ -40 °C to 85 °C (Unless otherwise noted)
Figure 10. Isolation – RFC to RF2
0
-20
-40
-60
Isolation (dB)
-80
-100
0 500 1 000 1500 2000 2500 3000
Frequency (MHz)
Figure 11. Isolation – RF1 to RF2, RF2 to RF1
0
-25
-50
Isolation (dB)
-75
-100
0 500 1 000 1500 2000 2500 3000
Frequency (MHz)
Figure 13. Return Loss – RF1, RF2 Figure 12. Return Loss – RFC to RF1, RF2
0
-10
-20
Return Loss ( dB)
-30
-40
0 500 1 000 1500 2000 2500 3000
Frequency (MHz)
RF1
RF2
0
-10
-20
Return Loss (dB)
-30
-40
0 500 1 000 1500 2000 2500 3000
Frequency (MHz)
RF1
RF2
Document No. 70-0103-03 www.psemi.com ©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 5 of 7
Figure 14. Package Drawing
8-lead MSOP
TOP VIEW
PE4244
Product Specification
0.65BSC
2.45±0.10
0.51±0.13
0.51±0.13
2X
8
1
234
2.95±0.10
.525BSC
567
3.00±0.10
- B -
.25 A B C
- C -
0.86±0.08
2.95±0.10
1.10 MAX
- A -
0.10 A
+0.07
0.33
-0.08
0.08 A B C
3.00±0.10
FRONT VIEW
0.10±0.05
3.00±0.10
4.90±0.15
SIDE VIEW
Table 6. Ordering Information
Order Code Part Marking Description Package Shipping Method
4244-01 4244 PE4244-08MSOP-50A 8-lead MSOP 50 units / Tube
4244-02 4244 PE4244-08MSOP-2000C 8-lead MSOP 2000 units / T&R
4244-00 PE4244-EK PE4244-08MSOP-EK Evaluation Kit 1 / Box
4244-51 4244 PE4244G-08MSOP-50A Green 8-lead MSOP 50 units / Tube
4244-52 4244 PE4244G-08MSOP-2000C Green 8-lead MSOP 2000 units / T&R
©2005 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0103-03 UltraCMOS™ RFIC Solutions
Page 6 of 7
PE4244
Product Specification
Sales Offices
The Americas
Peregrine Semiconductor Corp.
9450 Carroll Park Drive
San Diego, CA 92121
Tel 858-731-9400
Fax 858-731-9499
Europe
Peregrine Semiconductor Europe
Commercial Products:
Bâtiment Maine
13-15 rue des Quatre Vents
F- 92380 Garches, France
Tel: +33-1-47-41-91-73
Fax : +33-1-47-41-91-73
Space and Defense Products:
180 Rue Jean de Guiramand
13852 Aix-En-Provence cedex 3, France
Tel: +33(0) 4 4239 3361
Fax: +33(0) 4 4239 7227
North Asia Pacific
Peregrine Semiconductor K.K.
5A-5, 5F Imperial Tower
1-1-1 Uchisaiwaicho, Chiyoda-ku
Tokyo 100-0011 Japan
Tel: +81-3-3502-5211
Fax: +81-3-3502-5213
South Asia Pacific
Peregrine Semiconductor
28G, Times Square,
No. 500 Zhangyang Road,
Shanghai, 200122, P.R. China
Tel: +86-21-5836-8276
Fax: +86-21-5836-7652
For a list of representatives in your area, please refer to our Web site at: www.psemi.com
Data Sheet Identification
Advance Information
The product is in a formative or design stage. The data
sheet contains design target specifications for product
development. Specifications and features may change in
any manner without notice.
Preliminary Specification
The data sheet contains preliminary data. Additional data
may be added at a later date. Peregrine reserves the right
to change specifications at any time without notice in order
to supply the best possible product.
Product Specification
The data sheet contains final data. In the event Peregrine
decides to change the specifications, Peregrine will notify
customers of the intended changes by issuing a DCN
(Document Change Notice).
The information in this data sheet is believed to be reliable.
However, Peregrine assumes no liability for the use of this
information. Use shall be entirely at the user’s own risk.
No patent rights or licenses to any circuits described in this
data sheet are implied or granted to any third party.
Peregrine’s products are not designed or intended for use in
devices or systems intended for surgical implant, or in other
applications intended to support or sustain life, or in any
application in which the failure of the Peregrine product could
create a situation in which personal injury or death might occur.
Peregrine assumes no liability for damages, including
consequential or incidental damages, arising out of the use of
its products in such applications.
The Peregrine name, logo, and UTSi are registered trademarks
and UltraCMOS is a trademark of Peregrine Semiconductor
Corp.
Document No. 70-0103-03 www.psemi.com ©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 7 of 7
Loading...