Pegatron VA70HW, Aspire V3-772 Schematic

5

4

3

2

1

VA70HW BLOCK DIAGRAM

HDMI

PAGE 38

eDP Panel

D D

C C

B B

PAGE 37

CRT

Head Phone
(Combo Jack)

MIC

TPM

K/B

Click T/P

FAN

PAGE 39

PAGE 58

PAGE 43

PAGE 48

PAGE 48

PAGE 49

DDIC

eDP x 2

NVIDIA N14E

Azalia Codec
RTK/ALC3225

EC
IT8528E

SPI ROM
4MB (BIOS/EC)

SPI ROM
2MB (ME)

dGPU

PAGE 41 42

PAGE 30

PAGE 28

PAGE 70~79

PAGE 30

SATA HDD

SATA HDD

SATA ODD

PCIE X 16

VGA

Azalia

LPC

HSPI

SPI

PAGE 60

PAGE 60

PAGE 60

CPU

Haswell

FDI x 2

PCH

Lynx Point

SATA

PAGE 3-10

DMI x 4

PAGE 13-19

PCIE *1

PCIE *1

PCIE *1

SATA 3.0

DDR3L 1333/1600 MHz
channel A

DDR3L 1333/1600 MHz
channel B

USB2.0

USB2.0

USB2.0

USB2.0

USB3.0

USB2.0

USB3.0

PCIE *1

USB2.0

DDR-III
SO-DIMM*2

DDR-III
SO-DIMM*2

Camera

USB PORT9

USB PORT2

USB20 PORT1
USB30 PORT2

USB20 PORT0
USB30 PORT1

MiniCard
WLAN/WMAX

BT combo

Giga LAN
BCM57780

Card Reader
RTS5209

mSATA/SSD

PAGE 16

PAGE 17

PAGE 58

PAGE 61

PAGE 55

PAGE 33

PAGE 40

PAGE 40

PAGE 53

RJ45

PAGE 34

SD Socket

五五五五五五五五五五五五

PAGE 40

POWER

CPU VCORE

SYSTEM, +3V, +5V

+VCCP & +VCCP_VT

DDR & VTT

2.5V & 1.5VS &1.1VS

SMART CHARGER

POWER DETECT

LOAD SWITCH

POWER PROTECT

Power Rails

Sleep State

S0 ON

S3 OFFON ONON

PCIe Port

PCIE_P1

PCIE_P2

PCIE_P3

PCIE_P4

PCIE_P5

PCIE_P6

USB20 PORT

USB P00

USB P01

USB P02

USB P03

USB P04

USB P05

USB P08

USB P09

USB P10

USB P11

USB P12

USB P13

PAGE 80

PAGE 81

PAGE 82

PAGE 83

PAGE 84

PAGE 88

PAGE 90

PAGE 91

PAGE 92

RTC VA VSUS

ON ON

CARDREADER

mSATA

Mini CARD (WLAN)

LAN

External MB

External MB

External DB

WiFi

Camera

External DB

BT

PCIE/mSATA

VGA POWER

GPU VCORE

+1.05VS_VGA

+3VS_VGA

+12VS_VGA

LOAD SWITCH

POWER PROTECT

ON

PAGE 80

PAGE 91

PAGE 92

VS

OFFS4 ON ONON

OFFON ONONS5/ AC

OFFS5/ DC ON OFFON

SATA PORT

SATA P0 HDD 1

SATA P1

ODD

IO BOARD PWR BOARD

USB PORT3

A A

USB PORT9

5

4

HP_OUT

MIC IN

POWER Button

POWER LED

LID SW

3

2

SATA P2

SATA P3

SATA P4

mSATA

SATA P5

HDD 2

BLOCK DIAGRAM

BLOCK DIAGRAM

BLOCK DIAGRAM

Title :

Title :

Title :

Wing_Cheng

Wing_Cheng

Wing_Cheng

Engineer:

Engineer:

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Engineer:

VA70_HW

VA70_HW

VA70_HW

1

Rev

Rev

Rev

1.0

1.0

1 96Monday, February 04, 2013

1 96Monday, February 04, 2013

1 96Monday, February 04, 2013

1.0

5

4

3

2

1

+VCCIOA_OUT

U0301A

D D

C C

B B

DMI_TXN022
DMI_TXN122
DMI_TXN222
DMI_TXN322

DMI_TXP022
DMI_TXP122
DMI_TXP222
DMI_TXP322

DMI_RXN022
DMI_RXN122
DMI_RXN222
DMI_RXN322

DMI_RXP022
DMI_RXP122
DMI_RXP222
DMI_RXP322

FDI_CSYNC22
FDI_INT22

D21
C21
B21
A21

D20
C20
B20
A20

D18
C17
B17
A17

D17
C18
B18
A18

H29

J29

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3

DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3

FDI_CSYNC
DISP_INT

Haswell rPGA EDS

DMI FDI

PEG_RCOMP

PEG_RXN_10
PEG_RXN_11
PEG_RXN_12
PEG_RXN_13
PEG_RXN_14
PEG_RXN_15

PEG

PEG_RXP_10
PEG_RXP_11
PEG_RXP_12
PEG_RXP_13
PEG_RXP_14
PEG_RXP_15

PEG_TXN_10
PEG_TXN_11
PEG_TXN_12
PEG_TXN_13
PEG_TXN_14
PEG_TXN_15

PEG_TXP_10
PEG_TXP_11
PEG_TXP_12
PEG_TXP_13
PEG_TXP_14
PEG_TXP_15

PEG_RXN_0
PEG_RXN_1
PEG_RXN_2
PEG_RXN_3
PEG_RXN_4
PEG_RXN_5
PEG_RXN_6
PEG_RXN_7
PEG_RXN_8
PEG_RXN_9

PEG_RXP_0
PEG_RXP_1
PEG_RXP_2
PEG_RXP_3
PEG_RXP_4
PEG_RXP_5
PEG_RXP_6
PEG_RXP_7
PEG_RXP_8
PEG_RXP_9

PEG_TXN_0
PEG_TXN_1
PEG_TXN_2
PEG_TXN_3
PEG_TXN_4
PEG_TXN_5
PEG_TXN_6
PEG_TXN_7
PEG_TXN_8
PEG_TXN_9

PEG_TXP_0
PEG_TXP_1
PEG_TXP_2
PEG_TXP_3
PEG_TXP_4
PEG_TXP_5
PEG_TXP_6
PEG_TXP_7
PEG_TXP_8
PEG_TXP_9

E23
M29
K28
M31
L30
M33
L32
M35
L34
E29
D28
E31
D30
E35
D34
E33
E32
L29
L28
L31
K30
L33
K32
L35
K34
F29
E28
F31
E30
F35
E34
F33
D32
H35
H34
J33
H32
J31
G30
C33
B32
B31
A30
B29
A28
B27
A26
B25
A24
J35
G34
H33
G32
H31
H30
B33
A32
C31
B30
C29
B28
C27
B26
C25
B24

PEG_COMP

PEG_RXN15
PEG_RXN14
PEG_RXN13
PEG_RXN12
PEG_RXN11
PEG_RXN10
PEG_RXN9
PEG_RXN8
PEG_RXN7
PEG_RXN6
PEG_RXN5
PEG_RXN4
PEG_RXN3
PEG_RXN2
PEG_RXN1
PEG_RXN0
PEG_RXP15
PEG_RXP14
PEG_RXP13
PEG_RXP12
PEG_RXP11
PEG_RXP10
PEG_RXP9
PEG_RXP8
PEG_RXP7
PEG_RXP6
PEG_RXP5
PEG_RXP4
PEG_RXP3
PEG_RXP2
PEG_RXP1
PEG_RXP0
PEG_TXN0_C
PEG_TXN1_C
PEG_TXN2_C
PEG_TXN3_C
PEG_TXN4_C
PEG_TXN5_C
PEG_TXN6_C
PEG_TXN7_C
PEG_TXN8_C
PEG_TXN9_C
PEG_TXN10_C
PEG_TXN11_C
PEG_TXN12_C
PEG_TXN13_C
PEG_TXN14_C
PEG_TXN15_C
PEG_TXP0_C
PEG_TXP1_C
PEG_TXP2_C
PEG_TXP3_C
PEG_TXP4_C
PEG_TXP5_C
PEG_TXP6_C
PEG_TXP7_C
PEG_TXP8_C
PEG_TXP9_C
PEG_TXP10_C
PEG_TXP11_C
PEG_TXP12_C
PEG_TXP13_C
PEG_TXP14_C
PEG_TXP15_C

CX0301 0.22UF/10V /EGL
CX0302 0.22UF/10V /EGL
CX0303 0.22UF/10V /EGL
CX0304 0.22UF/10V /EGL
CX0305 0.22UF/10V /EGL
CX0306 0.22UF/10V /EGL
CX0307 0.22UF/10V /EGL
CX0308 0.22UF/10V /EGL
CX0309 0.22UF/10V /DGPU
CX0310 0.22UF/10V /DGPU
CX0311 0.22UF/10V /DGPU
CX0312 0.22UF/10V /DGPU
CX0313 0.22UF/10V /DGPU
CX0314 0.22UF/10V /DGPU
CX0315 0.22UF/10V /DGPU
CX0316 0.22UF/10V /DGPU
CX0317 0.22UF/10V /EGL
CX0318 0.22UF/10V /EGL
CX0319 0.22UF/10V /EGL
CX0320 0.22UF/10V /EGL
CX0321 0.22UF/10V /EGL
CX0322 0.22UF/10V /EGL
CX0323 0.22UF/10V /EGL
CX0324 0.22UF/10V /EGL
CX0325 0.22UF/10V /DGPU
CX0326 0.22UF/10V /DGPU
CX0327 0.22UF/10V /DGPU
CX0328 0.22UF/10V /DGPU
CX0329 0.22UF/10V /DGPU
CX0330 0.22UF/10V /DGPU
CX0331 0.22UF/10V /DGPU
CX0332 0.22UF/10V /DGPU

1 2

R0301 24.9Ohm1%

R1.2 2012/12/19
CX0301~CX0308, CX0317~CX0324 options are changed to /EGL

12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12

PEG_RXN[15:0] 70

PEG_RXP[15:0] 70

+VCCIOA_OUT

+VCCIOA_OUT 4,6

PEG Compensation

Enable PCIE Lane Reversal
Need to PD CFG[2]

PEG_TXN15 70
PEG_TXN14 70
PEG_TXN13 70
PEG_TXN12 70
PEG_TXN11 70
PEG_TXN10 70
PEG_TXN9 70
PEG_TXN8 70
PEG_TXN7 70
PEG_TXN6 70
PEG_TXN5 70
PEG_TXN4 70
PEG_TXN3 70
PEG_TXN2 70
PEG_TXN1 70
PEG_TXN0 70
PEG_TXP15 70
PEG_TXP14 70
PEG_TXP13 70
PEG_TXP12 70
PEG_TXP11 70
PEG_TXP10 70
PEG_TXP9 70
PEG_TXP8 70
PEG_TXP7 70
PEG_TXP6 70
PEG_TXP5 70
PEG_TXP4 70
PEG_TXP3 70
PEG_TXP2 70
PEG_TXP1 70
PEG_TXP0 70

SOCKET_947P

12V012BSM001

A A

5

4

If Support PCIE Gen3, change AC Cap to 0.22uF

3

Title :

Title :

Title :

Engineer:

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

B

B

B

Date: Sheet of

Date: Sheet of

Date: Sheet of

2

VA70_HW

VA70_HW

VA70_HW

Engineer:

CPU(1)_DMI,PEG,FDI,CLK,MISC

CPU(1)_DMI,PEG,FDI,CLK,MISC

CPU(1)_DMI,PEG,FDI,CLK,MISC

Wing_Cheng

Wing_Cheng

Wing_Cheng

3 96Friday, January 18, 2013

3 96Friday, January 18, 2013

3 96Friday, January 18, 2013

1

Rev

Rev

Rev

1.0

1.0

1.0

5

+VCCIO_OUT

+1.05VS

H_PECI25

D D

R1.2 2012/11/26
reserved for 2014 processor

CLK_DP_N21
CLK_DP_P21

C C

C0404

0.1UF/10V

+VCCIO_OUT

SP0406 R0603
SP0407 R0603

R1.2 2012/11/08
cost dwon 0ohm

+VCCIO_OUT

12

Stuff R0408

@

Intel MOW WW14: stuff
H_CPUPWRGD PD 10Kohm

1 2
1 2

1KOhm

CLK_DP_SSC _P_R

CLK_DP_SSC _N_R

12

R0440
100KOhm

@

H_PECI

R1.1

12

@

R04171KOh m

CLK_DP_N_R
CLK_DP_P_R

R0418

12

@

@

1 2

R0419 10KOhm

1 2

R0420 10KOhm

@

12

R040462Ohm

H_THRMTR IP#25,47

H_CPUPW RGD25
PM_DRAM_PW RGD22
PCH_PLTRS T_CPU#25

CLK_DP_SSC _N21

CLK_DP_SSC _P21

+VCCIO_OUT

H_PM_SYNC22

R1.0 PU/PD for JTAG signals

+1.05VS

VCCST
XDP_TMS
XDP_TDI_R
XDP_PREQ#

XDP_TCK
XDP_TRST#

B B

1 2

R0401 51Ohm@

1 2

R0402 51Ohm@

1 2

R0406 51Ohm

@

1 2

R0407 51Ohm

1 2

R0405 51Ohm

4

1

T0419

1

T0420

H_PROCHOT#

CLK_EXP_N21
CLK_EXP_P21

SSC CLOCK TERMINATION
Stuff R0445 & R0446 only when SSC clock not used

1 2

R0430 0Ohm@

R0403 56Ohm

12

R040810KOhm

SP0408 R0 402
SP0409 R0 402

SP0405 R0402
SP0404 R0402

HDMI_TXN2_PCH39
HDMI_TXP2_PCH39
HDMI_TXN1_PCH39
HDMI_TXP1_PCH39
HDMI_TXN0_PCH39
HDMI_TXP0_PCH39
HDMI_CLKN_PC H39
HDMI_CLKP_PCH39

DDI Port B: N/A
DDI Port C: HDMI
DDI Port D: DP to VGA

DDI signals Mapping, check 497750

12
12

SP0401R0402

12

SP0402R0402

12

SP0403R0402

1 2
1 2

1 2

SP0410 R0 603

1 2

SP0411 R0 603

1 2
1 2

TP_SKTOCC# _R

TP_CATERR# _R

H_PROCHOT# _D
H_THRMTR IP#_R

H_PM_SYNC_R

H_CPUPW RGD_R
VDDPWRGOOD_ R

R1.2 2012/11/08
cost dwon 0ohm

CLK_DP_SSC _N_R
CLK_DP_SSC _P_R

CLK_EXP_N_R
CLK_EXP_P_R

U0301B

AP32

SKTOCC#

AN32

CATERR#

AR27

PECI

AK31

FC1

AM30

PROCHOT#

AM35

THERMTRIP#

AT28

PM_SYNC

AL34

PWRGOOD

AC10

SM_DRAMPWROK

AT26

PLTRSTIN#

G28

DPLL_REF_CLKN

H28

DPLL_REF_CLKP

F27

SSC_DPLL_REF_CLKN

E27

SSC_DPLL_REF_CLKP

D26

BCLKN

E26

BCLKP

SOCKET_947P

12V012BSM001

T28
U28
T30
U30
U29
V29
U31
V31

T34
U34
U35
V35
U32
T32
U33
V33

P29
R29
N28
P28
P31
R31
N30
P30

SOCKET_947P

12V012BSM001

U0301H

DDIB_TXBN_0
DDIB_TXBP_0
DDIB_TXBN_1
DDIB_TXBP_1
DDIB_TXBN_2
DDIB_TXBP_2
DDIB_TXBN_3
DDIB_TXBP_3

DDIC_TXCN_0
DDIC_TXCP_0
DDIC_TXCN_1
DDIC_TXCP_1
DDIC_TXCN_2
DDIC_TXCP_2
DDIC_TXCN_3
DDIC_TXCP_3

DDID_TXDN_0
DDID_TXDP_0
DDID_TXDN_1
DDID_TXDP_1
DDID_TXDN_2
DDID_TXDP_2
DDID_TXDN_3
DDID_TXDP_3

Haswell rPGA EDS

MISC

PWR

CLOCKTHERMAL

Haswell rPGA EDS

DDI

3

eDP

SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2

DDR3

SM_DRAMRST#

JTAG

BPM_N_0
BPM_N_1
BPM_N_2
BPM_N_3
BPM_N_4
BPM_N_5
BPM_N_6
BPM_N_7

EDP_AUXN
EDP_AUXP

EDP_HPD

EDP_RCOMP

EDP_DISP_UTIL

EDP_TXN_0
EDP_TXP_0
EDP_TXN_1
EDP_TXP_1

FDI_TXN_0
FDI_TXP_0
FDI_TXN_1
FDI_TXP_1

PRDY#
PREQ#

TMS

TRST#

TDO

DBR#

2

+VCCIO_OUT

+1.35V_VCCDDQ

AP3

SM_RCOMP_0

AR3

SM_RCOMP_1

AP2

SM_RCOMP_2

AN3

AR29
AT29
AM34

TCK

AN33
AM33
AM31

XDP_TDI_R

TDI

AL33

XDP_TDO_R

AP33

H_DBR#_R

AR30
AN31
AN29
AP31
AP30
AN28
AP29
AP28

M27
N27
P27
E24
R27

P35
R35
N34
P34
P33
R33
N32
P32

R0411 100Ohm1%
R0412 75Ohm1%
R0413 100Ohm1%

XDP_PRDY#
XDP_PREQ#
XDP_TCK
XDP_TMS
XDP_TRST#

DP_COMP

R0410 2 4.9Ohm1%

R1.2 2012/10/29
option changed from /non_FDI

R1.2 2012/12/06
remove R0436~R0439 for GDDR5

R0432 0Ohm
R0433 0Ohm
R0434 0Ohm
R0435 0Ohm

12
12
12

XDP_BPM0
XDP_BPM1
XDP_BPM2
XDP_BPM3
XDP_BPM4
XDP_BPM5
XDP_BPM6
XDP_BPM7

EDP_AUXN 37

EDP_AUXP 37

EDP_HPD# 37

1 2

EDP_DISP_UTIL 37

EDP_TXN0 37
EDP_TXP0 37
EDP_TXN1 37
EDP_TXP1 37

12
12
12
12

R1.2 2012/10/29
option changed from /FDI

+VCCIOA_OUT

1
1
1
1
1
1
1
1

1
1
1
1
1
1
1
1

CPUDRAMRST# 5

T0403
T0404
T0405
T0406
T0407
T0408
T0409
T0410

T0411
T0412
T0413
T0414
T0415
T0416
T0417
T0418

FDI_TXN0 22
FDI_TXP0 22
FDI_TXN1 22
FDI_TXP1 22

+3VSUS

+3V

+1.05VS

+VCCIOA_OUT

1

+VCCIO_OUT 6,37,47,63

+1.35V_VCCDDQ 6

+3VSUS 22,23,27,28 ,30,33,43,61,81,92

+3V 37,43,63,65,91

+1.05VS 25,26,27,47 ,63,80,82

+VCCIOA_OUT 3,6

R1.2 2012/11/27
design gude and check list use 5%
Intel CRB 1%

PM_DRAM_PW RGD

Intel MOW WW14:

A A

change R0449, R0450 va lue

5

+1.35V_VCCDDQ

12

R04230Ohm

R1.1

Power good for +1.35V_VCCDDQ (delay > 15ns)
Processor may be damaged if VIH exceeds the maximum voltage for extended periods.
SM_DRAMPWROK VIH MAX = 1.0V ; VIH MIN=0.45*VDDQ

12

12

R0421

1.8KOhm

1%

0.87 Volt

R0424

9.09KOHM

R0422

3.3KOHM

1%

+3VSUS

@

U0401

A

5

VCC

Y

Vcc=1.65~5.5

@

C0403

0.22UF/10V

B

GND

12

12

@

+3VSUS

12

R0425

1

2

34

10KOhm

@

Q0402

3

PMBS3904

C

B

1

E
2

C0402

@

0.22UF/10V

@

4

+1.35V_VCCDDQ

R0426

1 2

12

17.4KOhm

12

@

R0427
47KOhm

1%

@

VR_HOT#80

Intel Comments

3

1 2

R0431 0Ohm@

H_PROCHOT#

C0401

47PF/50V

@

3

Q0401

2N7002

D

1

THRO_CPU

G

S

2

THRO_CPU 30

2

Title :

Title :

Title :

CPU(1)_DMI,PEG,FDI,CLK,MISC

CPU(1)_DMI,PEG,FDI,CLK,MISC

CPU(1)_DMI,PEG,FDI,CLK,MISC

Engineer:

Engineer:

VA70_HW

VA70_HW

VA70_HW

Engineer:

PEGATRON COMPUT ER INC

PEGATRON COMPUT ER INC

PEGATRON COMPUT ER INC

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Wing_Cheng

Wing_Cheng

Wing_Cheng

4 96Friday, January 18, 2013

4 96Friday, January 18, 2013

4 96Friday, January 18, 2013

1

Rev

Rev

Rev

1.0

1.0

1.0

1 2

5

4

3

2

1

+1.35V

D D

C C

DIMM_VREF_CA18

DRAMRST_CNTRL_PCH

DIMM0_VREF_DQ16,18

R1.2 2012/11/28
cost dwon 0ohm

DRAMRST_CNTRL_PCH DDR_CA_VREF

B B

DRAMRST_CNTRL_PCH

DIMM1_VREF_DQ17,18

CPU driven VREF path is stuffed by default
CRB 0.7

M_A_DQ[63:0]16

R1.2 2012/11/08

2N7002

cost dwon 0ohm

Q0506

12

3

D

SP0501
R0603

1

G

S

2

@

12

SP0502

34

Q0502B

R0603

D

@

5

S

G

UM6K1NG1DTN

UM6K1NG1DTN

G

12

S

2

@

Q0502A

D

6 1

SP0503
R0603

R1.2 2012/11/28
cost dwon 0ohm

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

DDR_WR_VREF01
DDR_WR_VREF02

R05151KOhm

12

1%

1%

@

AR15
AT14
AM14
AN14
AT15
AR14
AN15
AM15

AM9
AN9
AM8
AN8
AR9
AT9
AR8
AT8

AJ9

AK9

AJ6

AK6

AJ10

AK10

AJ7
AK7
AF4
AF5
AF1
AF2
AG4
AG5
AG1
AG2

J1
J2
J5
H5
H2
H1
J4
H4
F2
F1
D2
D3
D1
F3
C3
B3
B5
E6
A5
D6
D5
E5
B6
A6

E12
D12

B11

A11

E11
D11

B12

A12
AM3

F16

F13

R05101KOhm

R05091KOhm

12

12

1%

@

@

SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63
SM_VREF
SA_DIMM_VREFDQ
SB_DIMM_VREFDQ

Haswell rPGA EDS

U0301C

AC7

RSVD_AC7

U4

SA_CK_N_0

V4

SA_CK_P_0

AD9

SA_CKE_0

U3

SA_CK_N_1

V3

SA_CK_P_1

AC9

SA_CKE_1

U2

SA_CK_N_2

V2

SA_CK_P_2

AD8

SA_CKE_2

U1

SA_CK_N_3

V1

SA_CK_P_3

AC8

SA_CKE_3

M7

SA_CS_N_0

L9

SA_CS_N_1

M9

SA_CS_N_2

M10

SA_CS_N_3

M8

SA_ODT_0

L7

SA_ODT_1

L8

SA_ODT_2

L10

SA_ODT_3

V5

SA_BS_0

U5

SA_BS_1

AD1

SA_BS_2

V10

VSS1

U6

SA_RAS#

U7

SA_WE#

U8

SA_CAS#

V8
AC6
V9
U9
AC5
AC4
AD6
AC3
AD5
AC2
V6
AC1
AD4
V7
AD3
AD2

AP15
AP8
AJ8
AF3
J3
E2
C5
C11
AP14
AP9
AK8
AG3
H3
E3
C6
C12

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8

SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14
SA_MA_15

SA_DQS_N_0
SA_DQS_N_1
SA_DQS_N_2
SA_DQS_N_3
SA_DQS_N_4
SA_DQS_N_5
SA_DQS_N_6
SA_DQS_N_7
SA_DQS_P_0
SA_DQS_P_1
SA_DQS_P_2
SA_DQS_P_3
SA_DQS_P_4
SA_DQS_P_5
SA_DQS_P_6
SA_DQS_P_7

SOCKET_947P

12V012BSM001

R1.0 S3 circuit:- DRAM_RST# to memory should be high during S3

R1.0 0209
Change R0508 to 1K ohm
R0508 close to DIMM

DDR3_DRAMRST#16,17 CPUDRAMRST# 4

DRAMRST_CNTRL_PCH21

+1.35V 6,16,18,63,83

M_B_DQ[63:0]17

M_A_DIM0_CLK_DDR#0 16
M_A_DIM0_CLK_DDR0 16
M_A_DIM0_CKE0 16
M_A_DIM0_CLK_DDR#1 16
M_A_DIM0_CLK_DDR1 16
M_A_DIM0_CKE1 16
M_A_DIM0_CLK_DDR#2 16
M_A_DIM0_CLK_DDR2 16
M_A_DIM0_CKE2 16
M_A_DIM0_CLK_DDR#3 16
M_A_DIM0_CLK_DDR3 16
M_A_DIM0_CKE3 16

M_A_DIM0_CS#0 16
M_A_DIM0_CS#1 16
M_A_DIM0_CS#2 16
M_A_DIM0_CS#3 16
M_A_DIM0_ODT0 16
M_A_DIM0_ODT1 16
M_A_DIM0_ODT2 16
M_A_DIM0_ODT3 16

M_A_BS0 16
M_A_BS1 16
M_A_BS2 16

M_A_RAS# 16

M_A_WE# 16

M_A_CAS# 16

M_A_A[15:0] 16

M_A_DQS#[7:0] 16

M_A_DQS[7:0] 16

+1.35V

1 2

R0508 1KOhm

R0520,R0521 must be grounded.
CRB 0.7

12

S

2

G

1

12

Haswell rPGA EDS

1 2

R0506 4.99KOhm

@

AR18

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

R0507
1KOhm

@

1 2

0614-change Q0501 from UM6K1N to 2N7002

CPUDRAMRST#_R

SB_DQ_0

AT18

SB_DQ_1

AM17

SB_DQ_2

AM18

SB_DQ_3

AR17

SB_DQ_4

AT17

SB_DQ_5

AN17

SB_DQ_6

AN18

SB_DQ_7

AT12

SB_DQ_8

AR12

SB_DQ_9

AN12

SB_DQ_10

AM11

SB_DQ_11

AT11

SB_DQ_12

AR11

SB_DQ_13

AM12

SB_DQ_14

AN11

SB_DQ_15

AR5

SB_DQ_16

AR6

SB_DQ_17

AM5

SB_DQ_18

AM6

SB_DQ_19

AT5

SB_DQ_20

AT6

SB_DQ_21

AN5

SB_DQ_22

AN6

SB_DQ_23

AJ4

SB_DQ_24

AK4

SB_DQ_25

AJ1

SB_DQ_26

AJ2

SB_DQ_27

AM1

SB_DQ_28

AN1

SB_DQ_29

AK2

SB_DQ_30

AK1

SB_DQ_31

L2

SB_DQ_32

M2

SB_DQ_33

L4

SB_DQ_34

M4

SB_DQ_35

L1

SB_DQ_36

M1

SB_DQ_37

L5

SB_DQ_38

M5

SB_DQ_39

G7

SB_DQ_40

J8

SB_DQ_41

G8

SB_DQ_42

G9

SB_DQ_43

J7

SB_DQ_44

J9

SB_DQ_45

G10

SB_DQ_46

J10

SB_DQ_47

A8

SB_DQ_48

B8

SB_DQ_49

A9

SB_DQ_50

B9

SB_DQ_51

D8

SB_DQ_52

E8

SB_DQ_53

D9

SB_DQ_54

E9

SB_DQ_55

E15

SB_DQ_56

D15

SB_DQ_57

A15

SB_DQ_58

B15

SB_DQ_59

E14

SB_DQ_60

D14

SB_DQ_61

A14

SB_DQ_62

B14

SB_DQ_63

R0501 0Ohm

Q0501

@

2N7002

D

3

C0501

@

0.047UF/16V

U0301D

AG8

RSVD1

Y4

SB_CKN0

AA4

SB_CK0

AF10

SB_CKE_0

Y3

SB_CKN1

AA3

SB_CK1

AG10

SB_CKE_1

Y2

SB_CKN2

AA2

SB_CK2

AG9

SB_CKE_2

Y1

SB_CKN3

AA1

SB_CK3

AF9

SB_CKE_3

P4

SB_CS_N_0

R2

SB_CS_N_1

P3

SB_CS_N_2

P1

SB_CS_N_3

R4

SB_ODT_0

R3

SB_ODT_1

R1

SB_ODT_2

P2

SB_ODT_3

R7

SB_BS_0

P8

SB_BS_1

AA9

SB_BS_2

R10

VSS2

R6

SB_RAS#

P6

SB_WE#

P7

SB_CAS#

R8
Y5
Y10
AA5
Y7
AA6
Y6
AA7
Y8
AA10
R9
Y9
AF7
P9
AA8
AG7

AP18
AP11
AP5
AJ3
L3
H9
C8
C14
AP17
AP12
AP6
AK3
M3
H8
C9
C15

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8

SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14
SB_MA_15

SB_DQS_N_0
SB_DQS_N_1
SB_DQS_N_2
SB_DQS_N_3
SB_DQS_N_4
SB_DQS_N_5
SB_DQS_N_6
SB_DQS_N_7
SB_DQS_P_0
SB_DQS_P_1
SB_DQS_P_2
SB_DQS_P_3
SB_DQS_P_4
SB_DQS_P_5
SB_DQS_P_6
SB_DQS_P_7

SOCKET_947P

12V012BSM001

1%

M_B_DIM0_CLK_DDR#0 17
M_B_DIM0_CLK_DDR0 17
M_B_DIM0_CKE0 17
M_B_DIM0_CLK_DDR#1 17
M_B_DIM0_CLK_DDR1 17
M_B_DIM0_CKE1 17
M_B_DIM0_CLK_DDR#2 17
M_B_DIM0_CLK_DDR2 17
M_B_DIM0_CKE2 17
M_B_DIM0_CLK_DDR#3 17
M_B_DIM0_CLK_DDR3 17
M_B_DIM0_CKE3 17

M_B_DIM0_CS#0 17
M_B_DIM0_CS#1 17
M_B_DIM0_CS#2 17
M_B_DIM0_CS#3 17

M_B_DIM0_ODT0 17
M_B_DIM0_ODT1 17
M_B_DIM0_ODT2 17
M_B_DIM0_ODT3 17

M_B_BS0 17
M_B_BS1 17
M_B_BS2 17

M_B_RAS# 17

M_B_WE# 17

M_B_CAS# 17

M_B_A[15:0] 17

M_B_DQS#[7:0] 17

M_B_DQS[7:0] 17

Reserve S3 power reduction schematic

If don't support S3 power reduction

A A

5

1. Unmount R0450, R0452, U0404, R0453, Q0403, C0404, R0455, R0454, C0405

2. Change R0449 to 200ohm from 1kohm, change R0409 to 130ohm from 0ohm - Design Guide 1.0 page 106

3. Unmount Q0501, C0501, R0506, R0504, R0507

4. Mount R0501, change r0508 to 0ohm from 1kohm

5 Unmount Q0701, R0703, R0705, Q0702

6. Mount R0702 and short JP0701

7. Unmount R2232, R2231, Q2203

4

3

Title :

Title :

Title :

CPU(2)_DDR3

CPU(2)_DDR3

CPU(2)_DDR3

Wing_Cheng

Wing_Cheng

Engineer:

Engineer:

VA70_HW

VA70_HW

VA70_HW

Engineer:

1

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Wing_Cheng

5 96Friday, January 18, 2013

5 96Friday, January 18, 2013

5 96Friday, January 18, 2013

Rev

Rev

Rev

1.0

1.0

1.0

5

Decoupling guide from Intel (SPEC)

VDDQ 22uF * 11 pcs (stuff)
10uF * 10 pcs (stuff)
330uF * 2 pcs (stuff)

Decoupling guide from Intel ( SPEC)

+VCORE 10uF * 11pcs (stuff)
22uF * 19pcs (stuff)

D D

470uF * 4pcs (stuff)

PS_S3CNTRL_1.5V22

Default: no sup port
S3 power reduct ion

C C

+VCORE

12

12

C0654

C0647

22UF/6.3V

22UF/6.3V

vx_c0805_h57_small

12

C0630
22UF/6.3V

vx_c0805_h57_small

12

C0638
22UF/6.3V

vx_c0805_h57_small

vx_c0805_h57_small

12

C0641
22UF/6.3V

vx_c0805_h57_small

12

C0628
22UF/6.3V

vx_c0805_h57_small

B B

vx_c0805_h57_small

vx_c0805_h57_small

vx_c0805_h57_small

Decoupling guide from Intel (EE)

VDDQ 22uF * 2pcs (stuff)
10uF * 2pcs (stuff)
330uF * 1pcs (stuff)

Decoupling guide from Intel ( EE)

+VCORE 10uF * 11 pcs (stuff)
22uF * 19 pcs (stuff)
470uF * 5 pcs (stuff)

1 2

@

R0608 0Ohm

@

+1.35V

VR_SVID_DATA80

12

12

C0652
22UF/6.3V

vx_c0805_h57_small

12

C0640
22UF/6.3V

vx_c0805_h57_small

12

C0632
22UF/6.3V

vx_c0805_h57_small

C0650
22UF/6.3V

vx_c0805_h57_small

12

C0636
22UF/6.3V

vx_c0805_h57_small

12

C0629
22UF/6.3V

vx_c0805_h57_small

12

C0648
22UF/6.3V

vx_c0805_h57_small

12

C0634
22UF/6.3V

vx_c0805_h57_small

12

C0631
22UF/6.3V

vx_c0805_h57_small

12

C0623470PF/50V

12

C0653
22UF/6.3V

12

C0639
22UF/6.3V

12

C0635
22UF/6.3V

PS_S3CNTRL_1.5V_R

PS_S3CNTRL_1.5V_R

@

SIR472DP-T1-GE3

5 4

5
6
7
8

Q0601

4.2A

3MM_OPEN_5MIL

1MM_OPEN_M1M2

12

vx_c0805_h57_small

12

vx_c0805_h57_small

12

vx_c0805_h57_small

4

G

D

3

S

2
1

JP0601

2

112

JP0602

2

112

Placement note:

1. R0602 close to CPU

2. R0603 close to CPU

3. R0605 close to VR

4. R0608 close to CPU

5. R0607 close to VR

6. R0611 close to CPU

+VCCIO_OUT +VCCIO_OUT

R0610
130Ohm

1%

R1.2 2012/11/08

1 2

cost dwon 0ohm

SP0602 R0 402

12

C0649

C0651

22UF/6.3V

22UF/6.3V

vx_c0805_h57_small

vx_c0805_h57_small

12

C0637

C0607

22UF/6.3V

22UF/6.3V

vx_c0805_h57_small

vx_c0805_h57_small

12

C0609

C0633

22UF/6.3V

22UF/6.3V

vx_c0805_h57_small

vx_c0805_h57_small

12

+

1 2

12

C0645
22UF/6.3V

vx_c0805_h57_small

12

C0627
22UF/6.3V

vx_c0805_h57_small

12

C0610
22UF/6.3V

CE0602
560UF/2.5V

@

12

C0644
22UF/6.3V

12

C0608
22UF/6.3V

3

12

12

+

C0604

CE0601

22UF/6.3V

560UF/2.5V

vx_c0805_h57_small

vx_c0805_h57_small

12

@

C0603
10UF/10V

vx_c0805_h57_small

vx_c0805_h57_small

R0609
130Ohm

1%

1 2

VR_SVID_CLK80

Power team sugg estion

12

C0616
22UF/6.3V

vx_c0805_h57_small

12

12

C0605
22UF/6.3V

vx_c0805_h57_small

12

@

C0622
10UF/10V

vx_c0805_h57_small

If XDP not implemented, then Route Processor PWR_DEBUG as a test point.
This Test point must be clearly labeled(shark bay schematic check list 497750)

12

@

C0614
22UF/6.3V

vx_c0805_h57_small

vx_c0805_h57_small

12

12

@

C0642
10UF/10V

vx_c0805_h57_small

Unstuff R0622

Intel MOW WW09: renamed
VCCIO2PCH to RSVD

+VCCIO_OUT

R0613

54.9Ohm

R1.2 2012/11/08

1%

cost dwon 0ohm

1 2

VR_SVID_ALERT#80

1 2

SP0603 R0 402

12

12

@

@

C0625

C0626

22UF/6.3V

22UF/6.3V

vx_c0805_h57_small

12

@

@

C0643

C0646

10UF/10V

10UF/10V

vx_c0805_h57_small

vx_c0805_h57_small

R1.2 2012/11/16
follow Intel CRB
Place as close to CPU as possible
R1.2 2012/11/26
follow design guide

+VCCIO_OUT

12

@

@

C0606

C0618

22UF/6.3V

22UF/6.3V

vx_c0805_h57_small

vx_c0805_h57_small

12

12

@

@

C0615

C0613

10UF/10V

10UF/10V

vx_c0805_h57_small

vx_c0805_h57_small

+VCCIO_OUT(1---1.05V) output from CPU

+VCCIOA_OUT

+VCCIO2PCH

R0611
75Ohm

+VCCIO_OUT

R0603 0Ohm
R0604 0Ohm@
R0605 0Ohm

12

C0657

22UF/6.3V

@

1%

R1.1

12

12

12

@

C0619
22UF/6.3V

vx_c0805_h57_small

vx_c0805_h57_small

12

12

@

C0601
10UF/10V

vx_c0805_h57_small

VCCSENSE80

1 2
1 2
1 2

C0655

12

4.7UF/6.3V
C0611

0.01UF/50V

@

12

@

@

C0620

C0621

22UF/6.3V

22UF/6.3V

vx_c0805_h57_small

12

@

@

C0602

C0617

10UF/10V

10UF/10V

vx_c0805_h57_small

R0601

100Ohm

1%

SP0601 R0 402

+VCCIO_OUT_R
+VCCIO2PCH_R
+VCCIOA_OUT_R

12

12

R0612 43Ohm

T0606

T0602
T0603
T0605
T0604

12

@

C0624
22UF/6.3V

+VCORE

+VCORE

R1.2 2012/11/08
cost dwon 0ohm

1 2

1 2

C0612

0.01UF/50V

1

1
1
1
1

+1.35V_VCCDDQ

VCC_SENSE_R

T0601

H_CPU_SVIDALRT#

H_CPU_SVIDCLK
H_CPU_SVIDDAT

PWR_DEBUG

+VCORE

+1.35V_VCCDDQ

+1.35V

+VCORE

+VCCIO_OUT

+VCCIO2PCH

+VCCIOA_OUT

U0301E

K27

RSVD23

L27

RSVD22

T27

RSVD21

V27

RSVD20

AB11

VDDQ13

AB2

VDDQ12

AB5

VDDQ11

AB8

VDDQ10

AE11

VDDQ9

AE2

VDDQ8

AE5

VDDQ7

AE8

VDDQ6

AH11

VDDQ14

K11

VDDQ15

N11

VDDQ5

N8

VDDQ16

T11

VDDQ4

T2

VDDQ17

T5

VDDQ3

T8

VDDQ18

W11

VDDQ2

W2

VDDQ19

W5

VDDQ1

W8

VDDQ20

N26

RSVD19

K26

VCC103

AL27

RSVD18

AK27

RSVD24

AL35

VCC_SENSE

E17

RSVD27

AN35

VCCIO_OUT

A23

RSVD25

F22

VCOMP_OUT

W32

RSVD30

AL16

RSVD29

J27

1

RSVD26

AL13

RSVD28

AM28

VIDALERT#

AM29

VIDSCLK

AL28

VIDSOUT

AP35

VSS3

H27

PWR_DEBUG

AP34

VSS4

AT35

RSVD_TP4

AR35

RSVD_TP3

AR32

RSVD_TP2

AL26

RSVD_TP1

AT34

VSS5

AL22

VSS6

AT33

VSS7

AM21

VSS8

AM25

VSS9

AM22

VSS10

AM20

VSS11

AM24

VSS12

AL19

VSS13

AM23

VSS14

AT32

VSS15

Y25

VCC11

Y26

VCC10

Y27

VCC9

Y28

VCC8

Y29

VCC7

Y30

VCC6

Y31

VCC5

Y32

VCC4

Y33

VCC3

Y34

VCC2

Y35

VCC1

SOCKET_947P

12V012BSM001

2

+1.35V_VCCDDQ 4

+1.35V 5,16,18,63,83

+VCORE 9,63,80

+VCCIO_OUT 4,37,47,63

+VCCIO2PCH 27

+VCCIOA_OUT 3,4

Haswell rPGA EDS

VCC100

VCC99
VCC98
VCC97
VCC96
VCC95
VCC94
VCC93
VCC92
VCC91
VCC90
VCC89
VCC88
VCC87
VCC86
VCC85
VCC84
VCC83
VCC82
VCC81
VCC80
VCC79
VCC78
VCC77
VCC76
VCC75
VCC74
VCC73
VCC72
VCC71
VCC70
VCC69
VCC68
VCC67
VCC66
VCC65
VCC64
VCC63
VCC62
VCC61
VCC60
VCC59
VCC58
VCC57
VCC56
VCC55
VCC54
VCC53
VCC52
VCC51
VCC50
VCC49

VCC48
VCC102
VCC101

VCC47

VCC46

VCC45

VCC44

VCC43

VCC42

VCC41

VCC40

VCC39

VCC38

VCC37

VCC36

VCC35

VCC34

VCC33

VCC32

VCC31

VCC30

VCC29

VCC28

VCC27

VCC26

VCC25

VCC24

VCC23

VCC22

VCC21

VCC20

VCC19

VCC18

VCC17

VCC16

VCC15

VCC14

VCC13

VCC12

AA26
AA28
AA34
AA30
AA32
AB26
AB29
AB25
AB27
AB28
AB30
AB31
AB33
AB34
AB32
AC26
AB35
AC28
AD25
AC30
AD28
AC32
AD31
AC34
AD34
AD26
AD27
AD29
AD30
AD32
AD33
AD35
AE26
AE32
AE28
AE30
AG28
AG34
AE34
AF25
AF26
AF27
AF28
AF29
AF30
AF31
AF32
AF33
AF34
AF35
AG26
AH26
AH29
AG30
AG32
AH32
AH35
AH25
AH27
AH28
AH30
AH31
AH33
AH34
AJ25
AJ26
AJ27
AJ28
AJ29
AJ30
AJ31
AJ32
AJ33
AJ34
AJ35
G25
H25
J25
K25
L25
M25
N25
P25
R25
T25

U25
U26
V25
V26

W26
W27

+VCORE

1

Cap of 470UF or more place at power schematic

A A

Title :

Title :

Title :

CPU(4)_PWR

CPU(4)_PWR

CPU(4)_PWR

Wing_Cheng

Wing_Cheng

Wing_Cheng

Engineer:

Engineer:

VA70_HW

VA70_HW

VA70_HW

Engineer:

Rev

Rev

Rev

1.0

1.0

1.0

6 96Friday, January 18, 2013

6 96Friday, January 18, 2013

6 96Friday, January 18, 2013

1

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Nam e

Size Project Nam e

Size Project Nam e

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

5

4

3

2

5

D D

C C

4

3

2

1

B B

A A

Title :

Title :

Title :

CPU(4)_PWR

CPU(4)_PWR

CPU(4)_PWR

Wing_Cheng

Wing_Cheng

Engineer:

Engineer:

VA70_HW

VA70_HW

VA70_HW

Engineer:

1

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Wing_Cheng

7 96Friday, January 18, 2013

7 96Friday, January 18, 2013

7 96Friday, January 18, 2013

Rev

Rev

Rev

1.0

1.0

1.0

5

Haswell rPGA EDS

U0301F

A10

VSS16

A13

VSS127

A16

VSS238

A19

VSS268

A22

VSS279

A25

VSS290

A27

VSS301

A29

D D

C C

B B

A A

A31
A33

AA11
AA25
AA27
AA31
AA29

AB1
AB10
AA33
AA35

AB3
AC25
AC27

AB4

AB6

AB7

AB9
AC11
AD11
AC29
AC31
AC33
AC35

AD7

AE1
AE10
AE25
AE29

AE3
AE27
AE35

AE4

AE6

AE7

AE9
AF11

AF6

AF8
AG11
AG25
AE31
AG31
AE33

AG6
AH1

AH10

AH2
AG27
AG29

AH3
AG33
AG35

AH4

AH5

AH6

AH7

AH8

AH9

AJ11

AJ5
AK11
AK25
AK26
AK28
AK29
AK30
AK32

E19

A3

A4
A7

VSS312
VSS323
VSS17
VSS28
VSS39
VSS50
VSS61
VSS72
VSS83
VSS94
VSS105
VSS116
VSS128
VSS139
VSS150
VSS161
VSS172
VSS183
VSS194
VSS205
VSS216
VSS227
VSS239
VSS250
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
VSS286
VSS287
VSS288
VSS289
VSS291
VSS292
VSS293
VSS294
VSS295
VSS296
VSS297
VSS298
VSS299
VSS300
VSS302
VSS303
VSS304
VSS305
VSS306
VSS307
VSS308
VSS309
VSS310
VSS311
VSS313

SOCKET_947P

12V012BSM001

5

VSS314
VSS315
VSS316
VSS317
VSS318
VSS319
VSS320
VSS321
VSS322
VSS324
VSS325
VSS326
VSS327
VSS328
VSS329
VSS330
VSS331
VSS332
VSS333

VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82

AK34
AK5
AL1
AL10
AL11
AL12
AL14
AL15
AL17
AL18
AL2
AL20
AL21
AL23
E22
AL3
AL4
AL5
AL6
AL7
AL8
AL9
AM10
AM13
AM16
AM19
E25
AM32
AM4
AM7
AN10
AN13
AN16
AN19
AN2
AN21
AN24
AN27
AN30
AN34
AN4
AN7
AP1
AP10
AP13
AP16
AP19
AP4
AP7
W25
AR10
AR13
AR16
AR19
AR2
AR22
AR25
AR28
AR31
AR34
AR4
AR7
AT10
AT13
AT16
AT19
AT21
AT24
AT27
AT3
AT30
AT4
AT7
B10
B13
B16
B19
B2
B22

4

B34

B4
B7

C1
C10
C13
C16
C19

C2
C22
C24
C26
C28
C30
C32
C34

C4

C7
D10
D13
D16
D19
D22
D25
D27
D29
D31
D33
D35

D4

D7

E1

E10
E13
E16

E4

E7

F10
F11
F12
F14
F15
F17
F18
F20
F21
F23
F24
F26
F28
F30
F32
F34

F4
F6
F7
F8
F9

G1
G11

G2
G27
G29

G3
G31
G33
G35

G4

G5
H10
H26

H6

H7

J11
J26
J28

J30
J32
J34

J6
K1

SOCKET_947P

12V012BSM001

4

U0301G

VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS173

3

Haswell rPGA EDS

3

VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257

VSS_SENSE

RSVD31

K10
K2
K29
K3
K31
K33
K35
K4
K5
K7
K8
K9
L11
L26
L6
M11
M26
M28
M30
M32
M34
M6
N1
N10
N2
N29
N3
N31
N33
N35
N4
N5
N6
N7
N9
P11
P26
P5
R11
R26
R28
R30
R32
R34
R5
T1
T10
T29
T3
T31
T33
T35
T4
T6
T7
T9
U11
U27
V11
V28
V30
V32
V34
W1
W10
W3
W35
W4
W6
W7
W9
Y11
H11
AL24
F19
T26
AK35
AK33

2

Placement note:

1. SP0801 close to CPU

SP0801 R0 402

VSS_SENSE_R

T0801

1

2

R1.2 2012/11/08
cost dwon 0ohm

1 2

1 2

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Projec t Name

Size Projec t Name

Size Projec t Name

B

B

B

Date: Sheet of

Date: Sheet of

Date: Sheet of

R0802
100Ohm

1%

VSSSENSE 80

VA70_HW

VA70_HW

VA70_HW

Engineer:

Engineer:

Engineer:

Title :

Title :

Title :

1

CPU(3)_CFG,RSVD,GND

CPU(3)_CFG,RSVD,GND

CPU(3)_CFG,RSVD,GND

Wing_Cheng

Wing_Cheng

Wing_Cheng

8 96Friday, January 18, 2013

8 96Friday, January 18, 2013

8 96Friday, January 18, 2013

1

Rev

Rev

Rev

1.0

1.0

1.0

5

4

3

2

1

CFG strapping information:

CFG[1:0]: Reserved configuration lane.

D D

C C

B B

CFG[2]: PCIE Static Numbering Lane Reversal- CFG[2] is for the 16x

- 1: (Default) Normal Operation, Lane # definition matches sockect pin map definition

- 0: Lane Numbers Reversed 15 -> 0, 14 -> 1, ...

CFG[4]: eDP enable

-1 = Disabled

-0 = Enabled

CFG[6:5]: PCI Express Port Bifurcation Straps

-00 = 1 x8, 2 x4 PCI Express*

-01 = reserved

-10 = 2 x8 PCI Express*

-11 = 1 x16 PCI Express*

CFG[19:7]: Reserved configuration lane.

CFG2

R0903 1KOhm

CFG4

R0905 1KOhm

CFG5

R0904 1KOhm@

CFG6

R0906 1KOhm@

CFG7

R0907 1KOhm@

CFG9

R0909 1KOhm

The CFG signals have a default value of '1'

1 2

1%

1 2

1%

1 2

1%

1 2

1%

1 2

1%

1 2

1%

@

R0901 49.9Ohm1%

R0902 49.9Ohm1%

+VCORE

U0301I

AT1

RSVD_TP17

AT2

RSVD_TP16

AD10

RSVD2

A34

RSVD_TP15

A35

RSVD_TP14

W29

RSVD_TP18

W28

RSVD_TP19

12

H_CPU_RSVDG26

12

H_CPU_RSVDW34

T0905
T0906
T0907
T0908
T0910
T0911
T0912
T0914
T0913
T0915
T0917
T0916
T0918
T0919
T0920
T0921

G26

TESTLO1

W33

RSVD3

AL30

RSVD4

AL29

RSVD5

F25

VCC104

C35

RSVD_TP13

B35

RSVD_TP12

AL25

RSVD_TP20

W30

RSVD_TP21

W31

RSVD_TP22

W34

AT20
AR20
AP20
AP22
AT22
AN22
AT25
AN23
AR24
AT23
AN20
AP24
AP26
AN25
AN26
AP25

TESTLO2

CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15

SOCKET_947P

12V012BSM001

1

CFG0

1

CFG1

1

CFG2

1

CFG3

1

CFG4

1

CFG5

1

CFG6

1

CFG7

1

CFG8

1

CFG9

1

CFG10

1

CFG11

1

CFG12

1

CFG13

1

CFG14

1

CFG15

+VCORE

Haswell rPGA EDS

RSVD_TP11
RSVD_TP10

RSVD_TP9
RSVD_TP8

CFG_RCOMP

CFG_16
CFG_18
CFG_17
CFG_19

RSVD6

RSVD7
RSVD8

RSVD9
RSVD10
RSVD11

RSVD12

RSVD13
RSVD14

RSVD15

RSVD_TP7

RSVD_TP6
RSVD_TP5

RSVD16
RSVD17

VSS258
VSS259

+VCORE 6,63,80

C23
B23
D24
D23

AT31
AR21
AR23
AP21
AP23

AR33
G6

FC2

AM27
AM26
F5
AM2
K6

E18

U10
P10

B1

NC

A2
AR1

E21
E20

AP27
AR26

AL31
AL32

R1.2 2012/11/26
reserved for 2014 processor

PM_PWROK 22,30,92

12

R0910

4.7KOhm

@
1%

R1.2 2012/11/28
channged from 2.2k/5%

12

R0911

2.2KOhm

1%
@

T0922
T0923
T0925
T0924

1 2

R090849.9Ohm 1%

CFG_RCOMP

1

CFG16

1

CFG17

1

CFG18

1

CFG19

FC_G6

FC signals are signals that are available for compatibility with other processors. A test point
may be placed on the board for these lands. Refer to the appropriate platform design guide
for implementation details.(haswell EDS 487246)

A A

Title :

Title :

Title :

CPU(3)_CFG,RSVD,GND

CPU(3)_CFG,RSVD,GND

CPU(3)_CFG,RSVD,GND

Wing_Cheng

Wing_Cheng

1

Wing_Cheng

9 96Friday, January 18, 2013

9 96Friday, January 18, 2013

9 96Friday, January 18, 2013

Rev

Rev

Rev

1.0

1.0

1.0

Engineer:

Engineer:

VA70_HW

VA70_HW

VA70_HW

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

5

D D

C C

4

3

2

1

B B

A A

Title :

Title :

Title :

NB(3)_****

NB(3)_****

NB(3)_****

Wing_Cheng

Wing_Cheng

Engineer:

Engineer:

VA70_HW

VA70_HW

VA70_HW

Engineer:

1

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Wing_Cheng

10 96Friday , January 18, 2013

10 96Friday , January 18, 2013

10 96Friday , January 18, 2013

Rev

Rev

Rev

1.0

1.0

1.0

5

R1.2 2012/11/20

1 2
3 4

M_A_WE #
M_A_RAS #
M_A_CAS #

M_A_BS2
M_A_BS1
M_A_BS0

1 2
3 4

10KOhm
10KOhm

10KOhm
10KOhm

/DGPU
/DGPU

Part ref. changed

98

M_A_A0

97

M_A_A1

96

M_A_A2

95

M_A_A3

92

M_A_A4

91

M_A_A5

90

M_A_A6

86

M_A_A7

89

M_A_A8

85

M_A_A9

107

M_A_A10

84

M_A_A11

83

M_A_A12

119

M_A_A13

80

M_A_A14

78

M_A_A15

102
104
101
103

121
114

120
116

113
110
115

79
108
109

74

73

201

RN1601A

197

RN1601B

188

M_A_DQS 7

186

M_A_DQS #7

171

M_A_DQS 6M_A_DQS 2

169

M_A_DQS #6

154

M_A_DQS 5

152

M_A_DQS #5

137

M_A_DQS 4

135

M_A_DQS #4

64

M_A_DQS 3

62

M_A_DQS #3

47

M_A_DQS 2

45

M_A_DQS #2

29

M_A_DQS 1

27

M_A_DQS #1

12

M_A_DQS 0

10

M_A_DQS #0

187
170
153
136

63

46

28

11

202
200

R1.2 2012/11/20
Part ref. changed

98

M_A_A0

97

M_A_A1

96

M_A_A2

95

M_A_A3

92

M_A_A4

91

M_A_A5

90

M_A_A6

86

M_A_A7

89

M_A_A8

85

M_A_A9

107

M_A_A10

84

M_A_A11

83

M_A_A12

119

M_A_A13

80

M_A_A14

78

M_A_A15

102
104
101
103

121
114

120
116

113
110
115

79
108
109

74

73

201

RN1602A

197

RN1602B

188

M_A_DQS 7

186

M_A_DQS #7

171

M_A_DQS 6

169

M_A_DQS #6

154

M_A_DQS 5

152

M_A_DQS #5

137

M_A_DQS 4

135

M_A_DQS #4

64

M_A_DQS 3

62

M_A_DQS #3

47

M_A_DQS 2

45

M_A_DQS #2

29

M_A_DQS 1

27

M_A_DQS #1

12

M_A_DQS 0

10

M_A_DQS #0

187
170
153
136

63

46

28

11

202
200

H:4mm

CON1601 A

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

CK1
CK1#
CK0
CK0#

S1#
S0#

ODT1
ODT0

WE#
RAS#
CAS#

BA2
BA1
BA0

CKE1
CKE0

SA1
SA0

DQS7
DQS#7
DQS6
DQS#6
DQS5
DQS#5
DQS4
DQS#4
DQS3
DQS#3
DQS2
DQS#2
DQS1
DQS#1
DQS0
DQS#0

DM7
DM6
DM5
DM4
DM3
DM2
DM1
DM0

SCL
SDA

DDR3_D IMM_204P

12V02G IRM001

H:8mm

CON1602 A

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

CK1
CK1#
CK0
CK0#

S1#
S0#

ODT1
ODT0

WE#
RAS#
CAS#

BA2
BA1
BA0

CKE1
CKE0

SA1
SA0

DQS7
DQS#7
DQS6
DQS#6
DQS5
DQS#5

DDR3_D IMM_204P

DQS4

12V02G BRM001

DQS#4
DQS3
DQS#3
DQS2
DQS#2
DQS1
DQS#1
DQS0
DQS#0

DM7
DM6
DM5
DM4
DM3
DM2
DM1
DM0

SCL
SDA

/DGPU

5

M_A_DQ0

DQ0

7

M_A_DQ4

DQ1

15

M_A_DQ3

DQ2

17

M_A_DQ2

DQ3

4

M_A_DQ7

0

DQ4

6

M_A_DQ6

DQ5

16

M_A_DQ1

DQ6

18

M_A_DQ5

DQ7

21

M_A_DQ1 1

DQ8

23

M_A_DQ9

DQ9

33

M_A_DQ1 5

DQ10

35

M_A_DQ1 4

DQ11

22

M_A_DQ1 0

DQ12

24

M_A_DQ8

1

DQ13

34

M_A_DQ1 2

DQ14

36

M_A_DQ1 3

DQ15

39

M_A_DQ2 0

DQ16

41

M_A_DQ1 7

DQ17

51

M_A_DQ1 8

DQ18

53

M_A_DQ2 3

DQ19

40

M_A_DQ1 6

2

DQ20

42

M_A_DQ2 1

DQ21

50

M_A_DQ1 9

DQ22

52

M_A_DQ2 2

DQ23

57

M_A_DQ2 4

DQ24

59

M_A_DQ2 8

DQ25

67

M_A_DQ2 7

DQ26

69

M_A_DQ3 1

DQ27

56

M_A_DQ2 5

3

DQ28

58

M_A_DQ2 9

DQ29

68

M_A_DQ3 0

DQ30

70

M_A_DQ2 6

DQ31

129

M_A_DQ3 7

DQ32

131

M_A_DQ3 2

DQ33

141

M_A_DQ3 5

DQ34

143

M_A_DQ3 4

DQ35

130

M_A_DQ3 8

DQ36

132

M_A_DQ3 3

DQ37

140

M_A_DQ3 6

4

DQ38

142

M_A_DQ3 9

DQ39

147

M_A_DQ4 4

DQ40

149

M_A_DQ4 2

DQ41

157

M_A_DQ4 7

DQ42

159

M_A_DQ4 5

DQ43

146

M_A_DQ4 0

DQ44

148

M_A_DQ4 1

DQ45

158

M_A_DQ4 3

5

DQ46

160

M_A_DQ4 6

DQ47

163

M_A_DQ5 2

DQ48

165

M_A_DQ5 3

DQ49

175

M_A_DQ5 5

DQ50

177

M_A_DQ5 4

DQ51

164

M_A_DQ5 1

DQ52

166

M_A_DQ4 9

DQ53

174

M_A_DQ4 8

6

DQ54

176

M_A_DQ5 0

DQ55

181

M_A_DQ5 8

DQ56

183

M_A_DQ6 1

DQ57

191

M_A_DQ6 3

DQ58

193

M_A_DQ5 7

DQ59

180

M_A_DQ6 0

DQ60

182

M_A_DQ5 6

DQ61

192

M_A_DQ6 2

7

DQ62

194

M_A_DQ5 9

DQ63

30

RESET#

5

M_A_DQ0

DQ0

7

M_A_DQ4

DQ1

15

M_A_DQ3

DQ2

17

M_A_DQ2

DQ3

4

M_A_DQ7

DQ4

6

M_A_DQ6

DQ5

16

M_A_DQ1

DQ6

18

M_A_DQ5

0

DQ7

21

M_A_DQ1 1

DQ8

23

M_A_DQ9

DQ9

33

M_A_DQ1 5

DQ10

35

M_A_DQ1 4

DQ11

22

M_A_DQ1 0

DQ12

24

M_A_DQ8

DQ13

34

M_A_DQ1 2

DQ14

36

M_A_DQ1 3

1

DQ15

39

M_A_DQ2 0

DQ16

41

M_A_DQ1 7

DQ17

51

M_A_DQ1 8

DQ18

53

M_A_DQ2 3

DQ19

40

M_A_DQ1 6

DQ20

42

M_A_DQ2 1

DQ21

50

M_A_DQ1 9

DQ22

52

M_A_DQ2 2

2

DQ23

57

M_A_DQ2 4

DQ24

59

M_A_DQ2 8

DQ25

67

M_A_DQ2 7

DQ26

69

M_A_DQ3 1

DQ27

56

M_A_DQ2 5

DQ28

58

M_A_DQ2 9

DQ29

68

M_A_DQ3 0

DQ30

70

M_A_DQ2 6

3

DQ31

129

M_A_DQ3 7

DQ32

131

M_A_DQ3 2

DQ33

141

M_A_DQ3 5

DQ34

143

M_A_DQ3 4

DQ35

130

M_A_DQ3 8

DQ36

132

M_A_DQ3 3

DQ37

140

M_A_DQ3 6

DQ38

142

M_A_DQ3 9

4

DQ39

147

M_A_DQ4 4

DQ40

149

M_A_DQ4 2

DQ41

157

M_A_DQ4 7

DQ42

159

M_A_DQ4 5

DQ43

146

M_A_DQ4 0

DQ44

148

M_A_DQ4 1

DQ45

158

M_A_DQ4 3

DQ46

160

M_A_DQ4 6

5

DQ47

163

M_A_DQ5 2

DQ48

165

M_A_DQ5 3

DQ49

175

M_A_DQ5 5

DQ50

177

M_A_DQ5 4

DQ51

164

M_A_DQ5 1

DQ52

166

M_A_DQ4 9

DQ53

174

M_A_DQ4 8

DQ54

176

M_A_DQ5 0

6

DQ55

181

M_A_DQ5 8

DQ56

183

M_A_DQ6 1

DQ57

191

M_A_DQ6 3

DQ58

193

M_A_DQ5 7

DQ59

180

M_A_DQ6 0

DQ60

182

M_A_DQ5 6

DQ61

192

M_A_DQ6 2

DQ62

194

M_A_DQ5 9

7

DQ63

30

DDR3_D RAMRST#SMB_CLK _S

RESET#

R1601

150Ohm

150Ohm

D D

C C

B B

A A

C1621

10PF/50 V

@

M_A_DIM0 _CLK_D DR#0

@

M_A_DIM0 _CLK_D DR1

12

12

R1602

C1622

10PF/50 V

@

M_A_DIM0 _CLK_D DR#1

@

150Ohm

150Ohm

M_A_DQS [7:0]5

M_A_DQS #[7:0]5

12

R1604

@

12

R1603

@

M_A_DIM0 _CLK_D DR2

12

C1624

10PF/50 V

M_A_DIM0 _CLK_D DR#2

@

M_A_DIM0 _CLK_D DR3

12

C1623

10PF/50 V

M_A_DIM0 _CLK_D DR#3

@

SMBus Slave Address: A2H

M_A_DQS 0
M_A_DQS 1

M_A_DQS 3
M_A_DQS 4
M_A_DQS 5
M_A_DQS 6
M_A_DQS 7
M_A_DQS #0
M_A_DQS #1
M_A_DQS #2
M_A_DQS #3
M_A_DQS #4
M_A_DQS #5
M_A_DQS #6
M_A_DQS #7

M_A_DIM0 _CLK_D DR15

M_A_DIM0 _CLK_D DR#15

M_A_DIM0 _CLK_D DR05

M_A_DIM0 _CLK_D DR#05

M_A_DIM0 _CS#15
M_A_DIM0 _CS#05

M_A_DIM0 _ODT15
M_A_DIM0 _ODT05

M_A_DIM0 _CKE15
M_A_DIM0 _CKE05

SMBus Slave Address: A0H

DM should connect to GND directly
Design Guide 0.9 p86 (436735)

SMB_CLK _S1 7,28,48,5 3,55
SMB_DAT _S17 ,28,48,53 ,55

M_A_DIM0 _CLK_D DR35

M_A_DIM0 _CLK_D DR#35

M_A_DIM0 _CLK_D DR25

M_A_DIM0 _CLK_D DR#25

M_A_DIM0 _CS#35
M_A_DIM0 _CS#25

M_A_DIM0 _ODT35
M_A_DIM0 _ODT25

M_A_DIM0 _CKE35
M_A_DIM0 _CKE25

DM should connect to GND directly
Design Guide 0.9 p86 (436735)

M_A_A[15 :0]5

M_A_WE #5
M_A_RAS #5
M_A_CAS #5

M_A_BS25
M_A_BS15
M_A_BS05

SMB_DAT _S

+3VS

M_A_DIM0 _CLK_D DR0

12

12

ok

ok

ok

ok

ok

ok

ok

ok

4

M_A_DQ[6 3:0] 5

DDR3_D RAMRST# 5,17

JP1601

112

3MM_OPEN_5 MIL

JP1602

2

112

2MM_OPEN_5 MIL

+1.35V_D DR3

12

C1601

0.1UF/10V

Layout Note: Place th ese caps near SO DIM M 0

1

PM_EXTT S#0_DI M_A

T1601

Reserve

+V_VREF _CA_D IMM0

12

C1609

2.2UF/6.3V

@

+V_VREF _DQ_D IMM0

12

C1607

2.2UF/6.3V

@

+1.35V_D DR3

12

12

C1616

C1612

0.1UF/10V

0.1UF/10V

/DGPU

T1602

Reserve

+V_VREF _CA_D IMM0

+V_VREF _DQ_D IMM0

1

PM_EXTT S#0_DI M_A

12

C1619

2.2UF/6.3V

@

12

C1611

2.2UF/6.3V

@

/DGPU

12

C1618

0.1UF/10V

/DGPU

12

C1613

0.1UF/10V

/DGPU

Layout Note: Place th ese caps near SO DIM M 0

+1.35V_D DR3+1.35V

2

12

C1602

0.1UF/10V

12

C1608

0.1UF/10V

12

C1610

0.1UF/10V

R1.2 2012/11/20
Part ref. changed

75

99
105
111
117
123

13

19

25

31

37

43

48

54

60

65

71
127
133
138
144
150
155
161
167
172
178
184
189
195

198
125

77
122

126

+1.35V

+0.675VS

+3VS

+1.35V_D DR3

R1.2 2012/11/20
Part ref. changed

CON1601 B

75

VDD1
VDD381VDD4
VDD587VDD6
VDD793VDD8

99

VDD9

105

VDD11

111

VDD13

117

VDD15

123

VDD17

2

VSS1

8

VSS3

13

VSS5

19

VSS7

25

VSS9

31

VSS11

37

VSS13

43

VSS15

48

VSS17

54

VSS19

60

VSS21

65

VSS23

71

VSS25

127

VSS27

133

VSS29

138

VSS31

144

VSS33

150

VSS35

155

VSS37

161

VSS39

167

VSS41

172

VSS43

178

VSS45

184

VSS47

189

VSS49

195

VSS51

198

EVENT#

125

TEST

77

NC1

122

NC2

126

VREFCA

1

VREFDQ

CON1602 B

DDR3_D IMM_204P

12V02G IRM001

VDD1

VDD2
VDD381VDD4
VDD587VDD6
VDD793VDD8

VDD10

VDD9
VDD11

VDD12

VDD13

VDD14

VDD15

VDD16

VDD17

VDD18

2

VSS2

VSS1

8

VSS4

VSS3

VSS6

VSS5

VSS8

VSS7
VSS9

VSS10
VSS12

VSS11

VSS14

VSS13

VSS16

VSS15

VSS18

VSS17

VSS20

VSS19

VSS22

VSS21

VSS24

VSS23

VSS26

VSS25

VSS28

VSS27

VSS30

VSS29

VSS32

VSS31

VSS34

VSS33

VSS36

VSS35

VSS38

VSS37

VSS40

VSS39

VSS42

VSS41

VSS44

VSS43

VSS46

VSS45

VSS48

VSS47

VSS50

VSS49

VSS52

VSS51

GND1

EVENT#

GND2

TEST

NP_NC1

NC1

NP_NC2

NC2

VTT1
VTT2

VREFCA

1

VDDSPD

VREFDQ

DDR3_D IMM_204P

12V02G BRM001
/DGPU

3

+1.35V 5,6,18 ,63,83

+0.675VS 17 ,63,83

+3VS 17,20,21 ,22,23,25 ,26,27,2 8,30,33,3 7,38,39,4 0,41,43 ,47,48,49 ,53,55,6 0,63,65,6 6,91,92

+1.35V_D DR3 1 7

C1606

0.1UF/10V

12

/DGPU

+0.675VS

C1617

0.1UF/10V

12

+3VS

C1603

0.1UF/10V

/DGPU

12

C1615

2.2UF/6.3V

@

+3VS

12

+1.35V_D DR3

12

C1614

0.1UF/10V

12

C1605

2.2UF/6.3V

@

+1.35V_D DR3

C1604

0.1UF/10V

Reference schematic have 2.2 uf cap.

VDD10
VDD12
VDD14
VDD16
VDD18

VSS10
VSS12
VSS14
VSS16
VSS18
VSS20
VSS22
VSS24
VSS26
VSS28
VSS30
VSS32
VSS34
VSS36
VSS38
VSS40
VSS42
VSS44
VSS46
VSS48
VSS50
VSS52

NP_NC1
NP_NC2

VDDSPD

76

VDD2

82
88
94
100
106
112
118
124

3

VSS2

9

VSS4

14

VSS6

20

VSS8

26
32
38
44
49
55
61
66
72
128
134
139
145
151
156
162
168
173
179
185
190
196

207

GND1

208

GND2

205
206

203

VTT1

204

VTT2

199

12

76
82
88
94
100
106
112
118
124

3
9
14
20
26
32
38
44
49
55
61
66
72
128
134
139
145
151
156
162
168
173
179
185
190
196

207
208

205
206

203

+0.675VS

204

199

12

C1620

0.1UF/10V

/DGPU

+1.35V_D DR3

12

+

1BV090 000003

@

CE1603
220UF/6.3 V

2

+1.35V_D DR3

Layout Note: Place th ese caps near SO DIM M 0

12

12

C1626
10UF/10V

C1625
10UF/10V

12

C1628
10UF/10V

Layout Note: Place th ese caps near SO DIM M 0

12

12

C1636
10UF/10V

/DGPU

12

C1635

C1638

10UF/10V

10UF/10V

/DGPU

/DGPU

1

+0.675VS

12

C1633
10UF/10V

@

12

C1643
10UF/10V

@

C1627

C1631

10UF/10V

10UF/10V

@

@

12

12

C1637

C1641

10UF/10V

10UF/10V

@

@

12

12

12

12

C1632
1UF/6.3V

+0.675VS+1.35V_D DR3

12

12

C1639

C1642

1UF/6.3V

1UF/6.3V

/DGPU

/DGPU

C1629
1UF/6.3V

12

12

C1634

C1630

1UF/6.3V

1UF/6.3V

@

@

12

12

C1640

C1644

1UF/6.3V

1UF/6.3V

@

@

Title :

Title :

Title :

DDR3(1)_SO-DIMM0

DDR3(1)_SO-DIMM0

DDR3(1)_SO-DIMM0

Engineer:

Wing_Cheng

Engineer:

Wing_Cheng

Engineer:

BG1-CSC -HW R&D D ept.5

BG1-CSC -HW R&D D ept.5

BG1-CSC -HW R&D D ept.5

Size P roject Name

Size P roject Name

Size P roject Name

D

D

D

VA70_HW

VA70_HW

VA70_HW

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

1

Wing_Cheng

16 96Friday, January 18, 20 13

16 96Friday, January 18, 20 13

16 96Friday, January 18, 20 13

Rev

Rev

Rev

1.0

1.0

1.0

5

H:4MM

CON1701 A

98

M_B_A0

97

M_B_WE #5
M_B_RAS #5
M_B_CAS #5

M_B_BS25
M_B_BS15
M_B_BS05

M_B_WE #
M_B_RAS #
M_B_CAS #

M_B_BS2
M_B_BS1
M_B_BS0

1 2

10KOhm

3 4

10KOhm

1 2

10KOhm

3 4

10KOhm

/DGPU

M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

M_B_DQS 7
M_B_DQS #7
M_B_DQS 6
M_B_DQS #6
M_B_DQS 5
M_B_DQS #5
M_B_DQS 4
M_B_DQS #4
M_B_DQS 3
M_B_DQS #3
M_B_DQS 2
M_B_DQS #2
M_B_DQS 1
M_B_DQS #1
M_B_DQS 0
M_B_DQS #0

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

M_B_DQS 7
M_B_DQS #7
M_B_DQS 6
M_B_DQS #6
M_B_DQS 5
M_B_DQS #5
M_B_DQS 4
M_B_DQS #4
M_B_DQS 3
M_B_DQS #3
M_B_DQS 2
M_B_DQS #2
M_B_DQS 1
M_B_DQS #1
M_B_DQS 0
M_B_DQS #0

RN1701A
RN1701B

RN1702A
RN1702B

96
95
92
91
90
86
89
85

107

84
83

119

80
78

102
104
101
103

121
114

120
116

113
110
115

79
108
109

74

73

201
197

188
186
171
169
154
152
137
135

64

62

47

45

29

27

12

10

187
170
153
136

63

46

28

11

202
200

DDR3_D IMM_204P

12V02G ISM001

H:8MM

CON1702 A

98
97
96
95
92
91
90
86
89
85

107

84
83

119

80
78

102
104
101
103

121
114

120
116

113
110
115

79

108
109

74
73

201
197

188
186
171
169
154
152
137
135

64
62
47
45
29
27
12
10

187
170
153
136

63
46
28
11

202
200

DDR3_D IMM_204P

12V02G ISM000

/DGPU

1202-000R000

(12V02GIRM001)

M_B_DIM0 _CLK_D DR0

12

12

R1701

@

R1702

@

M_B_DQS [7:0]5

M_B_DQS #[7:0]5

R1703

150Ohm

R1704

150Ohm

C1737

@

12

12

C1738

@

12

12

@

@

12

12

@

@

SMBus Slave Address: A6H

10PF/50 V

M_B_DIM0 _CLK_D DR#0

M_B_DIM0 _CLK_D DR1

10PF/50 V

M_B_DIM0 _CLK_D DR#1

SMBus Slave Address: A4H

M_B_DQS 0
M_B_DQS 1
M_B_DQS 2
M_B_DQS 3
M_B_DQS 4
M_B_DQS 5
M_B_DQS 6
M_B_DQS 7
M_B_DQS #0
M_B_DQS #1
M_B_DQS #2
M_B_DQS #3
M_B_DQS #4
M_B_DQS #5
M_B_DQS #6
M_B_DQS #7

SMB_CLK _S1 6,28,48,5 3,55
SMB_DAT _S16 ,28,48,53 ,55

M_B_DIM0 _CLK_D DR2

C1739

10PF/50 V

M_B_DIM0 _CLK_D DR#2

M_B_DIM0 _CLK_D DR3

C1740

10PF/50 V

M_B_DIM0 _CLK_D DR#3

M_B_DIM0 _CLK_D DR15
M_B_DIM0 _CLK_D DR#15
M_B_DIM0 _CLK_D DR05
M_B_DIM0 _CLK_D DR#05

M_B_DIM0 _CS#15
M_B_DIM0 _CS#05

M_B_DIM0 _ODT15
M_B_DIM0 _ODT05

M_B_DIM0 _CKE15
M_B_DIM0 _CKE05

+3VS

DM should connect to GND directly
Design Guide 0.9 p86 (436735)

M_B_DIM0 _CLK_D DR35

M_B_DIM0 _CLK_D DR#35

M_B_DIM0 _CLK_D DR25

M_B_DIM0 _CLK_D DR#25

M_B_DIM0 _CS#35
M_B_DIM0 _CS#25

M_B_DIM0 _ODT35
M_B_DIM0 _ODT25

M_B_DIM0 _CKE35
M_B_DIM0 _CKE25

+3VS

DM should connect to GND directly
Design Guide 0.9 p86 (436735)

SMB_CLK _S
SMB_DAT _S

5

150Ohm

D D

150Ohm

C C

B B

A A

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

CK1
CK1#
CK0
CK0#

S1#
S0#

ODT1
ODT0

WE#
RAS#
CAS#

BA2
BA1
BA0

CKE1
CKE0

SA1
SA0

DQS7
DQS#7
DQS6
DQS#6
DQS5
DQS#5
DQS4
DQS#4
DQS3
DQS#3
DQS2
DQS#2
DQS1
DQS#1
DQS0
DQS#0

DM7
DM6
DM5
DM4
DM3
DM2
DM1
DM0

SCL
SDA

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

CK1
CK1#
CK0
CK0#

S1#
S0#

ODT1
ODT0

WE#
RAS#
CAS#

BA2
BA1
BA0

CKE1
CKE0

SA1
SA0

DQS7
DQS#7
DQS6
DQS#6
DQS5
DQS#5
DQS4
DQS#4
DQS3
DQS#3
DQS2
DQS#2
DQS1
DQS#1
DQS0
DQS#0

DM7
DM6
DM5
DM4
DM3
DM2
DM1
DM0

SCL
SDA

5

M_B_DQ1

DQ0

7

M_B_DQ5

DQ1

15

M_B_DQ4

DQ2

17

M_B_DQ7

DQ3

4

M_B_DQ3

DQ4

6

M_B_DQ0

DQ5

16

M_B_DQ2

0

DQ6

18

M_B_DQ6

DQ7

21

M_B_DQ1 4

DQ8

23

M_B_DQ1 0

DQ9

33

M_B_DQ1 5

DQ10

35

M_B_DQ1 2

DQ11

22

M_B_DQ9

DQ12

24

M_B_DQ8

DQ13

34

M_B_DQ1 1

1

DQ14

36

M_B_DQ1 3

DQ15

39

M_B_DQ1 6

DQ16

41

M_B_DQ1 7

DQ17

51

M_B_DQ2 2

DQ18

53

M_B_DQ1 9

DQ19

40

M_B_DQ2 1

DQ20

42

M_B_DQ2 0

DQ21

50

M_B_DQ1 8

2

DQ22

52

M_B_DQ2 3

DQ23

57

M_B_DQ2 7

DQ24

59

M_B_DQ2 5

DQ25

67

M_B_DQ3 1

DQ26

69

M_B_DQ2 8

DQ27

56

M_B_DQ2 6

DQ28

58

M_B_DQ2 4

DQ29

68

M_B_DQ2 9

3

DQ30

70

M_B_DQ3 0

DQ31

129

M_B_DQ3 3

DQ32

131

M_B_DQ3 2

DQ33

141

M_B_DQ3 8

DQ34

143

M_B_DQ3 4

DQ35

130

M_B_DQ3 6

DQ36

132

M_B_DQ3 7

DQ37

140

M_B_DQ3 5

4

DQ38

142

M_B_DQ3 9

DQ39

147

M_B_DQ4 1

DQ40

149

M_B_DQ4 0

DQ41

157

M_B_DQ4 7

DQ42

159

M_B_DQ4 6

DQ43

146

M_B_DQ4 5

DQ44

148

M_B_DQ4 4

5

DQ45

158

M_B_DQ4 2

DQ46

160

M_B_DQ4 3

DQ47

163

M_B_DQ5 3

DQ48

165

M_B_DQ5 2

DQ49

175

M_B_DQ5 0

DQ50

177

M_B_DQ4 9

DQ51

164

M_B_DQ4 8

DQ52

166

M_B_DQ5 4

DQ53

174

M_B_DQ5 1

6

DQ54

176

M_B_DQ5 5

DQ55

181

M_B_DQ5 9

DQ56

183

M_B_DQ6 3

DQ57

191

M_B_DQ6 1

DQ58

193

M_B_DQ6 0

DQ59

180

M_B_DQ5 8

DQ60

182

M_B_DQ5 7

DQ61

192

M_B_DQ6 2

7

DQ62

194

M_B_DQ5 6

DQ63

30

5
7
15
17
4
6
16
18
21

M_B_DQ1 4

23

M_B_DQ1 0

33

M_B_DQ1 5

35

M_B_DQ1 2

22

M_B_DQ9

24

M_B_DQ8

34

M_B_DQ1 1

36

M_B_DQ1 3

39
41
51
53
40
42
50
52
57

M_B_DQ2 7

59

M_B_DQ2 5

67

M_B_DQ3 1

69

M_B_DQ2 8

56

M_B_DQ2 6

58

M_B_DQ2 4

68

M_B_DQ2 9

70

M_B_DQ3 0

129
131
141
143
130
132
140
142
147

M_B_DQ4 1

149

M_B_DQ4 0

157

M_B_DQ4 7

159

M_B_DQ4 6

146

M_B_DQ4 5

148

M_B_DQ4 4

158

M_B_DQ4 2

160

M_B_DQ4 3

163
165
175
177
164
166
174
176
181

M_B_DQ5 9

183

M_B_DQ6 3

191

M_B_DQ6 1

193

M_B_DQ6 0

180

M_B_DQ5 8

182

M_B_DQ5 7

192

M_B_DQ6 2

194

M_B_DQ5 6

30

DDR3_D RAMRST#

M_B_DQ1
M_B_DQ5
M_B_DQ4
M_B_DQ7
M_B_DQ3
M_B_DQ0
M_B_DQ2
M_B_DQ6

M_B_DQ1 6
M_B_DQ1 7
M_B_DQ2 2
M_B_DQ1 9
M_B_DQ2 1
M_B_DQ2 0
M_B_DQ1 8
M_B_DQ2 3

M_B_DQ3 3
M_B_DQ3 2
M_B_DQ3 8
M_B_DQ3 4
M_B_DQ3 6
M_B_DQ3 7
M_B_DQ3 5
M_B_DQ3 9

M_B_DQ5 3
M_B_DQ5 2
M_B_DQ5 0
M_B_DQ4 9
M_B_DQ4 8
M_B_DQ5 4
M_B_DQ5 1
M_B_DQ5 5

DDR3_D RAMRST# 5,16

RESET#

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5

0

DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13

1

DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21

2

DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29

3

DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37

4

DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44

5

DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53

6

DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61

7

DQ62
DQ63

RESET#

4

M_B_DQ[6 3:0] 5M_B_A[15 :0]5

ok

ok

ok

ok

ok

ok

ok

ok

4

+1.35V_D DR3

12

12

C1702

C1701

0.1UF/10V

0.1UF/10V

Layout Note: Place th ese caps near SO DIM M 1

1

PM_EXTT S#0_DI M_B

T1701

Reserve

+V_VREF _CA_D IMM1

12

12

C1724

2.2UF/6.3V

@

+V_VREF _DQ_D IMM1

12

12

C1722

2.2UF/6.3V

@

+1.35V_D DR3

12

12

C1730

C1735

0.1UF/10V

0.1UF/10V

/DGPU

Layout Note: Place th ese caps near SO DIM M 1

/DGPU

T1702

Reserve

+V_VREF _CA_D IMM1

+V_VREF _DQ_D IMM1

1

PM_EXTT S#0_DI M_B

12

C1732

2.2UF/6.3V

@

12

C1733

2.2UF/6.3V

@

12

/DGPU

12

/DGPU

C1723

0.1UF/10V

C1725

0.1UF/10V

C1729

0.1UF/10V

C1727

0.1UF/10V

CON1701 B

75

VDD1
VDD381VDD4
VDD587VDD6
VDD793VDD8

99

VDD9

105

VDD11

111

VDD13

117

VDD15

123

VDD17

2

VSS1

8

VSS3

13

VSS5

19

VSS7

25

VSS9

31

VSS11

37

VSS13

43

VSS15

48

VSS17

54

VSS19

60

VSS21

65

VSS23

71

VSS25

127

VSS27

133

VSS29

138

VSS31

144

VSS33

150

VSS35

155

VSS37

161

VSS39

167

VSS41

172

VSS43

178

VSS45

184

VSS47

189

VSS49

195

VSS51

198

EVENT#

125

TEST

77

NC1

122

NC2

126

VREFCA

1

VREFDQ

DDR3_D IMM_204P

12V02G ISM001

CON1702 B

75

VDD1
VDD381VDD4
VDD587VDD6
VDD793VDD8

99

VDD9

105

VDD11

111

VDD13

117

VDD15

123

VDD17

2

VSS1

8

VSS3

13

VSS5

19

VSS7

25

VSS9

31

VSS11

37

VSS13

43

VSS15

48

VSS17

54

VSS19

60

VSS21

65

VSS23

71

VSS25

127

VSS27

133

VSS29

138

VSS31

144

VSS33

150

VSS35

155

VSS37

161

VSS39

167

VSS41

172

VSS43

178

VSS45

184

VSS47

189

VSS49

195

VSS51

198

EVENT#

125

TEST

77

NC1

122

NC2

126

VREFCA

1

VREFDQ

DDR3_D IMM_204P

12V02G ISM000

/DGPU

NP_NC1
NP_NC2

VDDSPD

NP_NC1
NP_NC2

VDDSPD

3

+1.35V

+1.35V 5,6,16 ,18,63,83

+0.675VS

+0.675VS 16 ,63,83

+3VS

+3VS 16,20,21 ,22,23,25 ,26,27,2 8,30,33,3 7,38,39,4 0,41,43 ,47,48,49 ,53,55,6 0,63,65,6 6,91,92

+1.35V_D DR3

+1.35V_D DR3 1 6

@

Layout Note: Place th ese caps near SO DIM M 1

12

12

C1741

C1742

10UF/10V

10UF/10V

Layout Note: Place th ese caps near SO DIM M 1

12

12

C1705
10UF/10V

/DGPU

/DGPU

C1710
10UF/10V

12

/DGPU

12

+0.675VS

12

+0.675VS

/DGPU

3

C1703

0.1UF/10V

12

C1715

0.1UF/10V

C1728

0.1UF/10V

12

C1736

0.1UF/10V

+1.35V_D DR3

12

+1.35V_D DR3

12

/DGPU

C1704

0.1UF/10V

+3VS

12

C1720

0.1UF/10V

+3VS

12

C1714

2.2UF/6.3V

@

C1734

2.2UF/6.3V

@

12

+

CE1703
220UF/6.3 V

1BV090 000003

76

VDD2

82
88
94
100

VDD10

106

VDD12

112

VDD14

118

VDD16

124

VDD18

3

VSS2

9

VSS4

14

VSS6

20

VSS8

26

VSS10

32

VSS12

38

VSS14

44

VSS16

49

VSS18

55

VSS20

61

VSS22

66

VSS24

72

VSS26

128

VSS28

134

VSS30

139

VSS32

145

VSS34

151

VSS36

156

VSS38

162

VSS40

168

VSS42

173

VSS44

179

VSS46

185

VSS48

190

VSS50

196

VSS52

207

GND1

208

GND2

205
206

203

VTT1

204

VTT2

199

76

VDD2

82
88
94
100

VDD10

106

VDD12

112

VDD14

118

VDD16

124

VDD18

3

VSS2

9

VSS4

14

VSS6

20

VSS8

26

VSS10

32

VSS12

38

VSS14

44

VSS16

49

VSS18

55

VSS20

61

VSS22

66

VSS24

72

VSS26

128

VSS28

134

VSS30

139

VSS32

145

VSS34

151

VSS36

156

VSS38

162

VSS40

168

VSS42

173

VSS44

179

VSS46

185

VSS48

190

VSS50

196

VSS52

207

GND1

208

GND2

205
206

203

VTT1

204

VTT2

199

C1744
10UF/10V

2

+0.675VS+1.35V_DDR 3+1.35V _DDR3

12

C1745
10UF/10V

@

12

C1711
10UF/10V

/DGPU

C1749

C1750

10UF/10V

10UF/10V

@

@

12

12

C1712

C1713

10UF/10V

10UF/10V

@

@

2

12

12

12

12

C1746
1UF/6.3V

+0.675VS+1.35V_DDR3

12

C1726
10UF/10V

@

12

C1716
1UF/6.3V

/DGPU

C1743
1UF/6.3V

12

12

C1747

C1748

1UF/6.3V

1UF/6.3V

@

@

12

/DGPU

C1717
1UF/6.3V

12

12

C1719

C1718

1UF/6.3V

1UF/6.3V

@

@

1

Title :

Title :

Title :

DDR3(2)_SO-DIMM1

DDR3(2)_SO-DIMM1

DDR3(2)_SO-DIMM1

Engineer:

Wing_Cheng

Engineer:

Wing_Cheng

Engineer:

BG1-CSC -HW R&D D ept.5

BG1-CSC -HW R&D D ept.5

BG1-CSC -HW R&D D ept.5

Size P roject Name

Size P roject Name

Size P roject Name

D

D

D

VA70_HW

VA70_HW

VA70_HW

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

Wing_Cheng

17 96Friday, January 18, 20 13

17 96Friday, January 18, 20 13

17 96Friday, January 18, 20 13

Rev

Rev

Rev

1.0

1.0

1.0

5

DDR3L Vref

D D

M3: CPU driven VREF path is stuffed be default.
M1: VREF_DQ driven by a Voltage Divider Network during Processor power-off

4

3

+V_VREF_DQ_DIMM0

2

+1.35V_DDR3

+V_VREF_CA_DIMM0

+V_VREF_DQ_DIMM0

+V_VREF_CA_DIMM1

+V_VREF_DQ_DIMM1

1

+1.35V_DDR3 16,17

+V_VREF_CA_DIMM0 16

+V_VREF_DQ_DIMM0 5,16

+V_VREF_CA_DIMM1 17

+V_VREF_DQ_DIMM1 5,17

M3

DIMM0_VREF_DQ5,16

DIMM1_VREF_DQ5,17

+1.35V

R1.2 2012/11/08

C C

12

C1803

0.1UF/16V

cost dwon 0ohm
R1.2 2012/12/04

R1804

change short pin size

1KOhm

1 2

1 2

SP1805 R0402

nb_r0402_short_25mil

12

R1805
1KOhm

@

12

12

C1802

0.1UF/16V

R1803
0Ohm

+1.35V

1 2

12

R1816
1KOhm

R1815
1KOhm

SP1804 R0402

nb_r0402_short_25mil

+V_VREF_DQ_DIMM1

R1.2 2012/11/08
cost dwon 0ohm

R1.2 2012/12/04
change short pin size

1 2

12

12

C1804

0.022UF/16V

R1807

24.9Ohm

1%

12

12

C1805

0.022UF/16V

R1808

24.9Ohm

1%

CHKLST, 497750

M1

Intel 0203
M3+M1: Default Recommendation

B B

M3

DIMM_VREF_CA5

+1.35V

R1810
1KOhm

1 2

12

12

A A

C1801

0.1UF/16V

R1811
1KOhm

R1.2 2012/11/08
cost dwon 0ohm

R1.2 2012/12/04
change short pin size

1 2

SP1803 R0402

nb_r0402_short_25mil

CHKLST, 497750

12

12

C1806

0.022UF/16V

R1809

24.9Ohm

1%

1 2

SP1802 R0402

nb_r0402_short_25mil

1 2

SP1801 R0402

nb_r0402_short_25mil

M1

5

4

+V_VREF_CA_DIMM0

+V_VREF_CA_DIMM1

Title :

Title :

Title :

DDR3(3)_CA/DQ Voltage

DDR3(3)_CA/DQ Voltage

Engineer:

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

VA70_HW

VA70_HW

VA70_HW

Engineer:

DDR3(3)_CA/DQ Voltage

Wing_Cheng

Wing_Cheng

Wing_Cheng

18 96Friday, January 18, 2013

18 96Friday, January 18, 2013

18 96Friday, January 18, 2013

1

Rev

Rev

Rev

1.0

1.0

1.0

5

D D

C C

4

3

2

1

B B

A A

R1.4--2

Title :

Title :

Title :

VID Controller

VID Controller

VID Controller

Wing_Cheng

Wing_Cheng

Engineer:

Engineer:

VA70_HW

VA70_HW

VA70_HW

Engineer:

1

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Wing_Cheng

19 96Friday , January 18, 2013

19 96Friday , January 18, 2013

19 96Friday , January 18, 2013

Rev

Rev

Rev

1.0

1.0

1.0

5

4

3

2

1

GND

C2005

1UF/6.3V

C2004

1UF/6.3V

+RTCBAT

12

J2001
BATT_HOLDER_2P

12V20GBSM000

1

1

2

2

GNDGND

JRST2002

Open
(Default)

R1.2 2012/11/06

工工工工工工

R2001 1KOhm

1

JRST2001

1

2

SGL_JUMP

@

2

JRST2002

SGL_JUMP

@

T2011

1

T2010

1

12

+RTC_BAT

R1.0 0110

增增增增增增增增增增增增增增增增增增增增

Shunt

12

R2028330KOhm 1%

@

+VCC_RTC+3VA

D2001

1

2

1V/0.2A

T2012

1

3

12

GND

Connector Type 1217-001L000

TPM Settings

Clear ME RTC
Registers

Keep ME RTC
Registers

GND

JRST2001

Shunt

Open
(Default)

C2003
1UF/6.3V

T2005

1

T2007

1

T2006

1

ACZ_SDIN0_AUD41

R1.2 2012/12/03
Add R2031

PCH_FLASH_DESCRIPTOR30

ACZ_SDOUT_AUD41

C2001

12

RTC_X1_C

15PF/50V

12

C2002 15PF/50V

R2020 330KOhm1%

SB_SPKR41

2

3

07V080000003

1 2

R2011

R2012

R2015

1 2

R2031 10KOhm

1 2

R2013

+VCC_RTC

ACZ_BCLK_AUD41

ACZ_SYNC_AUD41

ACZ_RST#_AUD41,42

EXT_SCI#30

GND

GND

GND

R1.1

1

T2001

1

T2002

1

T2003

1

T2004

R1.2 2012/11/28
follow Intel design guide

T2008

GND

1

SP2002

1 2

R0402

14

X2001

32.768KHZ
10MOhm

33Ohm

1 2

33Ohm

1 2

33Ohm

1 2

33Ohm

1 2

R2017 10KOhm

R2027 0Ohm

12

R2002

PCH_INTVRMEN

@

1 2

RTC_X1

RTC_X2

SRTC_RST#

SM_INTRUDER#

RTC_RST#

ACZ_BCLK

ACZ_SYNC

ACZ_RST#

Remove TP

ACZ_SDOUT

HDA_DOCK_EN#

+3VSUS_ORG

PCH_JTAG_TCK_BUF

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

PM_TEST_RST_N

+VCC_RTC

+3VSUS_ORG

+VTT_PCH_VCCIO

U2001A

B5

RTCX1

B4

RTCX2

B9

SRTCRST#

A8

INTRUDER#

G10

INTVRMEN

D9

RTCRST#

B25

HDA_BCLK

A22

HDA_SYNC

AL10

SPKR

C24

HDA_RST#

L22

HDA_SDI0

K22

HDA_SDI1

G22

HDA_SDI2

F22

HDA_SDI3

A24

HDA_SDO

B17

DOCKEN#/GPIO33

C22

HDA_DOCK_RST#/GPIO13

AB3

JTAG_TCK

AD1

JTAG_TMS

AE2

JTAG_TDI

AD3

JTAG_TDO

F8

TP25

C26

TP22

AB6

TP20

DH82LPMS

02V000000012

+12VS

+1.5VS

+VCC_RTC 22,27

+3VA

+3VA 27,30,63,65,81,88,93

+3VS

+3VS 16,17,21,22,23,25,26,27,28,30,33,37,38,39,40,41,43,47,48,49,53,55,60,63,65,66, 91,92

+3VSUS_ORG 21,22, 24,25,26,27

+12VS 28,39,41,63,91

+1.5VS 21,22,24,26,27,41,53,55,63,84

+VTT_PCH_VCCIO 26, 27

LPT_PCH_M_EDS

SATA_RXN_0
SATA_RXP_0

SATA_TXN_0

SATA_TXP_0

SATA_RXN_1
SATA_RXP_1

SATA_TXN_1

SATA_TXP_1

SATA

JTAGRTC AZALIA

SATA_RXN_2
SATA_RXP_2

SATA_TXN_2

SATA_TXP_2

SATA_RXN_3
SATA_RXP_3

SATA_TXN_3

SATA_TXP_3

SATA_RXN4/PERN1
SATA_RXP4/PERP1

SATA_TXN4/PETN1

SATA_TXP4/PETP1

SATA_RXN5/PERN2
SATA_RXP5/PERP2

SATA_TXN5/PETN2

SATA_TXP5/PETP2

SATA_RCOMP

SATALED#

SATA0GP/GPIO21

SATA1GP/GPIO19

SATA_IREF

TP9

TP8

BC8
BE8

AW8
AY8

BC10
BE10

AV10
AW10

BB9
BD9

AY13
AW13

BC12
BE12

AR13
AT13

BD13
BB13

AV15
AW15

BC14
BE14

AP15
AR15

AY5

AP3

AT1

AU2

BD4

BA2

BB2

Int. PU

SATA_COMP

SATA_DET0_R_N

BBS_BIT0_R

R1.3 2013/1/11
mSATA move to port 4

1 2

R2026 7.5KOhm

1 2

R2024 10KOhm

SP2001 R0402

R2016 0Ohm

12

12

+1.5VS
+3VS

1

+1.5VS

SATA_RXN0 60
SATA_RXP0 60

SATA_TXN0 60
SATA_TXP0 60

SATA_RXN2 60
SATA_RXP2 60

SATA_TXN2 60
SATA_TXP2 60

SATA_RXN4 53
SATA_RXP4 53

SATA_TXN4 53
SATA_TXP4 53

SATA_RXN5 60
SATA_RXP5 60

SATA_TXN5 60
SATA_TXP5 60

SATA_LED# 66

T2009

BBS_BIT0 23

HDD1

ODD

mSATA

HDD2

RTC battery

3
4

D D

+VCC_RTC

RTCRST# RC delay
should be 18ms~25ms

12

5%

R2018 20KOhm

12

GND GND

R20231MOhm

12

12

5%

R2021 20KOhm

C C

B B

12

Request by CSC
for CMOS clear
function

CMOS Settings

Clear CMOS

Keep CMOS

INTVRMEN: Integrated SUS 1.05V VRM Enables
Low: Enable External VRs
High:Enable Internal VRs

PCH_INTVRMEN

HDA_DKEN : Flash Descriptor Security Overide
H = Disabled (Default)
L = Enabled

Note : Rising edge of PWROK

HDA_DOCK_EN#

A A

5

JRST2003

1MM_OPEN_M1M2

112

2

12

R2030 1KOhm

@

Strap information:

HDA_SPKR: No reboot strap
Low: Disable (Default)
High:Enable

HDA_SDO:

1.Flash descriptor security:
Sampled Low: in effect.
Sampled High: override

2.HDA_SDO which sample high on the rising edge of PWROK
Will also disable Intel ME.

HDA_DOCK_EN#:
Reserved

[0216] : ACZ_SYNC strap is no longer supported on LPT, by Intel FAE Stu.

4

3

SB_SPKR

ACZ_SDOUT

R2019 1KOhm@

R2022 1KOhm@

1 2

1 2

SATA0GP的pull up

+3VS

+3VSUS_ORG

2

電電，參參參參

(43K ohm)和check list(10K ohm))

+3VS

SATA_DET0_R_N

1 2

R2025 10KOhm

@

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

VA70_HW

VA70_HW

VA70_HW

寫的寫寫??先先參參參參

Title :

Title :

Title :

PCH(1)_SATA,IHDA,RTC,LPC

PCH(1)_SATA,IHDA,RTC,LPC

PCH(1)_SATA,IHDA,RTC,LPC

Wing_Cheng

Wing_Cheng

Engineer:

Engineer:

Engineer:

1

Wing_Cheng

20 96Friday , January 18, 2013

20 96Friday , January 18, 2013

20 96Friday , January 18, 2013

Rev

Rev

Rev

1.0

1.0

1.0

5

CLK_REQ1#

A20

C20

A18

C18

B21

D21

G20

AL11

AJ11

AJ7

AL7

AJ10

AH1

AH3

AJ4

AJ2

Y43

Y45

AB1

AA44
AA42

AF1

AB43

AB45

AF3

AD43
AD45

T3

AF43

AF45

V3

AE44
AE42

AA2

AB40
AB39

AE4

AJ44

AJ42

Y3

AH43

AH45

D44

E44

B42

F41

A40

U2001D

LAD_0

LAD_1

LAD_2

LAD_3

LFRAME#

LDRQ0#

LDRQ1#/GPIO23

SERIRQ

SPI_CLK

SPI_CS0#

SPI_CS1#

SPI_CS2#

SPI_MOSI

SPI_MISO

SPI_IO2

SPI_IO3

1

1

1

1
1
1

1

1

1

1

1

T2130

SP2117
SP2118

SP2119

1

CLK_PCH_SRC6_N

1

CLK_PCH_SRC6_P

1

/TPM

CLK_PCH_SRC0_N

CLK_PCH_SRC0_P

CLK_REQ0#

CLK_PCH_SRC2_N

CLK_PCH_SRC2_P

CLK_REQ2#

CLK_PCH_SRC3_N
CLK_PCH_SRC3_P
CLK_REQ3#

CLK_PCH_SRC4_N
CLK_PCH_SRC4_P
CLK_REQ4#

CLK_PCH_SRC5_N
CLK_PCH_SRC5_P
CLK_REQ5#

CLK_REQ6#

CLK_PCH_SRC7_N

CLK_PCH_SRC7_P

CLK_REQ7#

CLK_XDP_N

CLK_XDP_P

12

R213222Ohm

12

R212922Ohm

1

T2121

12

CLK_PCH_SRC1_N

12

CLK_PCH_SRC1_P

12

CLKOUT_PCI0_R

12

CLK_PCI_FB_R

R212822Ohm

CLK_KBCPCI_PCH_R

12

CLK_DEBUG_R

R213022Ohm

CLK_DBG_R

1

SNN_LPC_DRQ#1

Serial Interrupt Request

T2102

T2104

T2101

D D

CLK_PCIE_mSATA#_PCH53

CLK_PCIE_mSATA_PCH53

CLK_REQ2_PCIE_mSATA#53

CLK_PCIE_WLAN#_PCH55

CLK_PCIE_WLAN_PCH55

CLK_REQ3_WLAN#55

CLK_PCIE_LAN#33

CLK_PCIE_LAN33

CLK_REQ4_LAN#33

C C

B B

CLK_PCIE_CR#_PCH40
CLK_PCIE_CR_PCH40

CLK_REQ1_CR#40

SP2104 R0402

SP2105 R0402

SP2106 R0402

SP2107 R0402
SP2108 R0402
SP2109 R0402

100MHz

LPCCLK43

CLK_KBCPCI_PCH30

CLK_DEBUG65

DGPU_PWR_EN is active high

LPC_FRAME#30,43,65

INT_SERIRQ30,43,65

PCH_SPICLK28,30

PCH_SPICS0#28

PCH_SPICS1#28,30

PCH_SPISI28,30

PCH_SPISO28,30

SPI_WP_IO228,30

SPI_HOLD#_IO328,30

1 2

1 2

1 2

1 2

SP2101 R0402

1 2

SP2102 R0402

1 2

SP2103 R0402

1 2
1 2
1 2

T2116
T2117
T2118

T2134
T2133
T2135

T2114

T2115

T2111

T2132

T2131

CLK_PCI_FB

C2103
10PF/50V

1 2

@

GND

LPC_AD030,43,65

LPC_AD130,43,65

LPC_AD230,43,65

LPC_AD330,43,65

PCH_SPICS1#

4

U2001C

CLKOUT_PCIE_N_0

CLKOUT_PCIE_P_0

PCIECLKRQ0#/GPIO73

CLKOUT_PCIE_N_1
CLKOUT_PCIE_P_1

PCIECLKRQ1#/GPIO18

CLKOUT_PCIE_N_2

CLKOUT_PCIE_P_2

PCIECLKRQ2#/GPIO20/SMI#

CLKOUT_PCIE_N_3
CLKOUT_PCIE_P_3
PCIECLKRQ3#/GPIO25

CLKOUT_PCIE_N_4
CLKOUT_PCIE_P_4
PCIECLKRQ4#/GPIO26

CLKOUT_PCIE_N5
CLKOUT_PCIE_P_5
PCIECLKRQ5#/GPIO44

CLKOUT_PCIE_N_6
CLKOUT_PCIE_P_6
PCIECLKRQ6#/GPIO45

CLKOUT_PCIE_N_7

CLKOUT_PCIE_P_7

PCIECLKRQ7#/GPIO46

CLKOUT_ITPXDP

CLKOUT_ITPXDP_P

CLKOUT_33MHZ0

CLKOUT_33MHZ1

CLKOUT_33MHZ2

CLKOUT_33MHZ3

CLKOUT_33MHZ4

CLOCK SIGNAL

DH82LPMS

02V000000012

SPILPC

LPT_PCH_M_EDS

LPT_PCH_M_EDS

SMBus

C-Link

Thermal

CLKOUT_PEG_A

CLKOUT_PEG_A_P

PEGA_CLKRQ#/GPIO47

CLKOUT_PEG_B

CLKOUT_PEG_B_P

PEGB_CLKRQ#/GPIO56

CLKOUT_DMI

CLKOUT_DMI_P

CLKOUT_DP

CLKOUT_DP_P

CLKOUT_DPNS

CLKOUT_DPNS_P

CLKIN_DMI

CLKIN_DMI_P

CLKIN_GND

CLKIN_GND_P

CLKIN_DOT96N

CLKIN_DOT96P

CLKIN_SATA

CLKIN_SATA_P

REFCLK14IN

CLKIN_33MHZLOOPBACK

XTAL25_OUT

XTAL25_IN

CLKOUTFLEX0/GPIO64

CLKOUTFLEX1/GPIO65

CLKOUTFLEX2/GPIO66

CLKOUTFLEX3/GPIO67

ICLK_IREF

TP19
TP18

DIFFCLK_BIASREF

SMBALERT#/GPIO11

SMBCLK

SMBDATA

SML0ALERT#/GPIO60

SML0CLK

SML1ALERT#/PCHHOT#/GPIO74

SML0DATA

SML1CLK/GPIO58

SML1DATA/GPIO75

CL_CLK

CL_DATA

CL_RST#

TD_IREF

AB35

CLK_PCIE_PEG#_PCH_L

AB36

CLK_PCIE_PEG_PCH_L

AF6

CLK_REQ_PEG_A#

Y39

Y38

U4

AF39

AF40

AJ40
AJ39

AF35

CLK_DP_N

AF36

CLK_DP_P

AY24

CLK_BUF_EXP_N

AW24

CLK_BUF_EXP_P

AR24

CLK_BUF_CPYCLK_N

AT24

CLK_BUF_CPYCLK_P

H33

CLK_BUF_DOT96_N

G33

CLK_BUF_DOT96_P

BE6

CLK_BUF_CKSSCD_N

BC6

CLK_BUF_CKSSCD_P

F45

CLK_BUF_REF14

D17

CLK_PCI_FB

AL44
AM43

C40

DGPU_EDID_SELECT#

F38

CLK_OUT1

F36

CLK_OUT2

F39

DGPU_PRSNT#

AM45

ICLK_IREF

AD39
AD38

AN44

N7

R10

U11

N8

U8

R7

H6

K6

N11

AF11

AF10

AF7

BA45

TP1

BC45

TP2

BE43

TP4

BE44

TP3

AY43

CLK_PCH_PEG_B_N

CLK_PCH_PEG_B_P

CLK_REQ_PEG_B#

XTAL25_OUT
XTAL25_IN

SP2120

DIFFCLK_BIASREF

SCL_3A

SDA_3A

DRAMRST_CNTRL_PCH

SML0_CLK

SML0_DAT

SML1ALERT#

SML1_CLK

SML1_DAT

12

R2103

8.06KOhm

+3VS

+1.5VS

+3VSUS_ORG

+VCCAXCK_VRM

1 2

SP2113 R0402

1 2

SP2114 R0402

1 2

SP2112 R0402

1

1

1

1

NB_R0402_20MIL_SMALL

1 2

R1.2 2012/11/28
cost dwon 0ohm

1%

1 2

R2116 7.5KOhm

1

It must be 8.2k ohm 1% ???

3

+3VS 16,1 7,20,22,23,25,26,27,28,30,33,37,38,39,40,41,43,47,48,49,5 3,55,60,63,65,66,91,92

+1.5VS 20,22,24,26,27,41,53,55,63,84

+3VSUS_ORG 20,22,2 4,25,26,27

+VCCAXCK_VRM 27

CLK_PCIE_PEG#_PCH 70

CLK_PCIE_PEG_PCH 70

T2109

T2110

T2105

CLKREQ_PEG# 70

CLK_EXP_N 4

CLK_EXP_P 4

CLK_DP_SSC_N 4
CLK_DP_SSC_P 4

CLK_DP_N 4
CLK_DP_P 4

100MHz

135MHz

135MHz

SP2111
R0402

1 2

XTAL25_OUT_C

1

1

1

12

T2113

T2128

T2126

T2127

+1.5VS

R1.2 2012/12/04
change short pin size

+VCCAXCK_VRM

R2111 1MOhm

Debug

SCL_3A

SDA_3A

SCL_3A

SDA_3A

DRAMRST_CNTRL_PCH

SML0_CLK

SML0_DAT

SML1_CLK

SML1_DAT

SML1ALERT#

ELAN_ALERT#

T2112

ELAN_ALERT# 48

SCL_3A 28

SDA_3A 28

DRAMRST_CNTRL_PCH 5

1

T2120

1

T2122

SML1_CLK 28

SML1_DAT 28

1

T2123

1

T2124

1

T2125

R1.1

C2102 12PF/50V

1 2

GND

X2101

13

25MHZ

2

GND

4

C2101 12PF/50V

1 2

07V080000010

GND

1

T2136

1

T2137

RN2103B 2.2KOhm

RN2103A 2.2KOhm

34

12

1 2

R2104 1KOhm

3 4

2.2KOhm

1 2

2.2KOhm

1 2

2.2KOhm

3 4

2.2KOhm

1 2

R2105 10KOhm

1 2

R2131 10KOhm

2

RN2104B

RN2104A

RN2105A

RN2105B

+3VSUS_ORG

CLK_BUF_CPYCLK_N
CLK_BUF_CPYCLK_P

CLK_BUF_EXP_N
CLK_BUF_EXP_P
CLK_BUF_DOT96_N
CLK_BUF_DOT96_P
CLK_BUF_CKSSCD_N
CLK_BUF_CKSSCD_P

CLK_BUF_REF14

INT_SERIRQ

DGPU_EDID_SELECT#

DGPU_PRSNT#

DGPU_PRSNT#

PCH CLKREQ Setting:
Not connected to device.

CLK_REQ4_LAN#

CLK_REQ0#

CLK_REQ3_WLAN#

CLK_REQ6#

CLK_REQ5#

CLK_REQ7#

CLK_REQ_PEG_B#

CLK_REQ_PEG_A#

Connected to device.

R1.2 2012/12/13
WLAN clk pull-high換換+3VS

CLK_REQ3_WLAN#

CLK_REQ1#

CLK_REQ2#

CLK_REQ6#

CLK_REQ4_LAN#

CLK_REQ3_WLAN#

CLK_REQ2#

CLK_REQ1#

1 2
3 4

1 2
3 4
1 2
3 4
3 4
1 2

1 2

R2101 10KOhm

CLOCK TERMINATION for FCIM
Default power-on mode is ICC.

1 2

R2107 10KOhm

1 2

R2113 10KOhm@

1 2

R2106 10KOhm/UMA

1 2

R2109 10KOhm/DGPU

1 2

R2117 10KOhm

1 2

R2118 10KOhm

@

1 2

R2133 10KOhm

1 2

R2121 10KOhm

1 2

R2122 10KOhm

1 2

R2123 10KOhm

1 2

R2124 10KOhm

1 2

R2125 10KOhm

1 2

R2108 10KOhm

1 2

R2119 10KOhm

1 2

R2120 10KOhm

1 2

R2114 10KOhm@

1 2

R2112 10KOhm@

1 2

R2110 10KOhm@

1 2

R2126 10KOhm@

@

1 2

R2127 10KOhm

10KOhm
10KOhm

10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm

RN2108A
RN2108B

RN2109A
RN2109B
RN2110A
RN2110B
RN2111B
RN2111A

GND

+3VS

GND

+3VSUS_ORG

R1.2 2012/12/17
Add R2133

+3VS

GND

1

GND

A A

DH82LPMS

02V000000012

BG1\CORE

BG1\CORE

BG1\CORE

Size Project Nam e

Size Project Nam e

Size Project Nam e

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

VA70_HW

VA70_HW

VA70_HW

Title :

Title :

Title :

PCH(2)_PCIE,CLK,SMB,PEG

PCH(2)_PCIE,CLK,SMB,PEG

PCH(2)_PCIE,CLK,SMB,PEG

Wing_Cheng

Wing_Cheng

Wing_Cheng

Engineer:

Engineer:

Engineer:

1

Rev

Rev

Rev

1.1

1.1

1.1

21 96Friday, January 18, 2013

21 96Friday, January 18, 2013

21 96Friday, January 18, 2013

5

DMI_RXN03
DMI_RXN13

D D

If SUSWARN #/SUS_ACK # handshake
is not used, these signals are tied on the board

R1.2 2012/11/06

工工工工工工

PM_PWROK9,30,92

C C

PM_RSMRST# has pull down 10k ohm in EC

DMI_RXN23
DMI_RXN33

DMI_RXP03
DMI_RXP13

DMI_RXP23
DMI_RXP33

DMI_TXN03
DMI_TXN13

DMI_TXN23
DMI_TXN33

DMI_TXP03
DMI_TXP13

DMI_TXP23
DMI_TXP33

R2225 0Ohm

+1.5VS

+1.5VS

T2211

SUS_PWR_ACK_R

1

SUSACK#_PCH

+3VS

T2212

1

ME_SUSPWRDNACK30

SYS_PWROK SYS_PWROK_R

PM_DRAM_PWRGD4

PM_RSMRST#30

PM_PWRBTN#30

ME_AC_PRESENT30

T2201

1

T2202

1

T2203

1

12

R2231 7.5KOhm

1 2

SP2208 R040 2

1 2

R2203 0Ohm@

R2205 10KOhm

SP2209 R040 2

1 2

SP2205 R040 2

1 2

SP2212 R040 2

1 2

SP2206 R040 2

1 2

SP2210 R040 2

1 2

SP2207 R040 2

1 2

SP2211 R040 2

1 2

12

12

4

DMI_IREF

DMI_RCOMP

SUSACK#_RSUSACK#_RSUSACK#_RSUSACK#_R

PM_SYSRST#_R

PM_PCH_PWROK_R

PM_APWROK_R

PM_RSMRST_R

SUS_PWR_ACK_R

AC_PRESENT_R

BATLOW#

RI#

SLP_WLAN#

U2001B

AW22

DMI_RXN_0

AR20

DMI_RXN_1

AP17

DMI_RXN_2

AV20

DMI_RXN_3

AY22

DMI_RXP_0

AP20

DMI_RXP_1

AR17

DMI_RXP_2

AW20

DMI_RXP_3

BD21

DMI_TXN_0

BE20

DMI_TXN_1

BD17

DMI_TXN_2

BE18

DMI_TXN_3

BB21

DMI_TXP_0

BC20

DMI_TXP_1

BB17

DMI_TXP_2

BC18

DMI_TXP_3

BE16

DMI_IREF

AW17

TP12

AV17

TP7

AY17

DMI_RCOMP

R6

SUSACK#

AM1

SYS_RESET#

AD7

SYS_PWROK

F10

PWROK

AB7

APWROK

H3

DRAMPWROK

J2

RSMRST#

J4

SUSWARN#/SUSPWRNACK/GPIO30

K1

PWRBTN#

E6

ACPRESENT/GPIO31

K7

BATLOW#/GPIO72

N4

RI#

DH82LPMS

AB10

TP21

D2

SLP_WLAN#/GPIO29

02V000000012

LPT_PCH_M_EDS

DMI

System Power

Management

FDI

FDI_RXN_0

FDI_RXN_1

FDI_RXP_0

FDI_RXP_1

FDI_CSYNC

FDI_INT

FDI_IREF

FDI_RCOMP

DSWVRMEN

DPWROK

WAKE#

CLKRUN#

SUS_STAT#/GPIO61

SUSCLK/GPIO62

SLP_S5#/GPIO63

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

SLP_LAN#

3

AJ35

AL35

AJ36

AL36

AV43

TP16

AY45

TP5

AV45

TP15

AW44

TP10

AL39

AL40

AT45

AU42

TP17

AU44

TP13

AR44

C8

L13

K3

AN7

U7

Y6

Y7

C6

H1

F3

F1

AY3

G5

FDI_CSYNC_R

FDI_INT_R

FDI_IREF

FDI_RCOMP

DSWODVREN

PCH_DPROK

PM_CLKRUN#

SUS_STAT

SUSCLK_C

SLP_S5#

SLP_S4#_R

SLP_S3#_R

ME_PM_SLP_A#_R

SLP_DSW#_R

ME_PM_SLP_LAN#_R

SP2213 R040 2

1 2

SP2201 R040 2

1 2

R2230 7.5KOhm

R2208 330KOhm@

1 2

R2207 330KOhm

1 2

SP2214 R040 2

1 2

T2206

1

T2205

1

T2204

1

SP2202 R040 2

1 2

SP2203 R040 2

1 2

R2210 0Ohm@

12

1 2

1 2

T2209

1

R22260Ohm

GND

PM_RSMRST_R

1

+VCC_RTC

2

FDI_TXN0 4

FDI_TXN1 4

FDI_TXP0 4

FDI_TXP1 4

FDI_CSYNC 3

FDI_INT 3

+1.5VS

R1.2 2012/10/29
option changed from /FDI
R1.2 2012/12/19
option changed from /non_RETINA

+1.5VS

DSWODVREN - On Die DSW VR Enable
HIGH - Enabled(DEFAULT) ; LOW-Disabled

PCIE_WAKE# 3 3,53

PM_CLKRUN# 43

PM_SUSC# 30

PM_SUSB# 30

SLP_SUS# 30

H_PM_SYNC 4

T2210

i-AMT

i-AMT

+3VSUS_ORG

+1.5VS

+VCC_RTC

+3VSUS

+5VSUS

+12VSUS

+VCCDSW

+3VSUS_ORG 20,21,24,25 ,26,27

+3VS

+3VS 16,17,20,21,23,25,26,27,28,30,33 ,37,38,39,40,41,43,47,48,49,53,55,60,6 3,65,66,91,92

+1.5VS 20,21,24,26,27,41,53 ,55,63,84

+VCC_RTC 20,27

+3VSUS 4,23,27,28,30 ,33,43,61,81,92

+5VSUS 30,60,61,63 ,65,66,83,91

+12VSUS 28,33,55,6 0,81,91

+VCCDSW 27

+3VA

+3VA 20,27,30,63,65,81,88,93

1

R1.2 2012/12/17
U2201 @
R2204 mount

SYS_PWROK for PCH

R2204 0Ohm

12

+3VSUS

U2201

A

1

2

3 4

12

R2223
10KOhm

@

61

B

GND

Vcc=2~5.5

@

5

VCC

Q2201B

UM6K1N

SYS_PWROK

+3VS

/TPM

R2212 8.2KOhm

+12VSUS+3VSUS +5VSUS

5%

R2222
100KOhm

@

1 2

PS_S3CNTRL_1.5V 6

34

@

5

4

PM_CLKRUN#

PM_PWROK

PCH_DPROK

SUSCLK_C

1 2

R2213 10KOhm

1 2

R2235 100KOhm@

1 2

R2229 1KOhm@

1 2

3

GND

PLL ON DIE VR ENABLE
HIGH - ENABLED

GND

LOW - DISABLED (DEFAULT

PCIE_WAKE#

ME_AC_PRESENT
BATLOW#

ME_PM_SLP_A#_R

ME_SUSPWRDNACK

RI#

ME_PM_SLP_LAN#_R

R2232 10KOhm

R2234 10KOhm
R2233 10KOhm

R2217 10KOhm@

R2218 10KOhm

R2214 10KOhm

R2220 10KOhm@

2

Y

PM_SUSB#

PM_PWROK

SP2204 R040 2

1 2

R2224 0Ohm@12

5

10KOhm

R2221

R2206 0Ohm@12

12

@

Q2201A

UM6K1N

@

2

GND GND

DELAY_VR_AND_ALL_SYS92

B B

SUSB_EC#23,30 ,63,91,92

A A

1 2

1 2
1 2

1 2

1 2

1 2

1 2

+3VSUS_ORG

Title :

Title :

Title :

PCH(3)_FDI,DMI,SYS PWR

PCH(3)_FDI,DMI,SYS PWR

PCH(3)_FDI,DMI,SYS PWR

Engineer:

Wing_Cheng

Engineer:

Wing_Cheng

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

VA70_HW

VA70_HW

VA70_HW

Date: Sheet of

Date: Sheet of

Date: Sheet of

Wing_Cheng

22 96Friday, January 18, 2013

22 96Friday, January 18, 2013

22 96Friday, January 18, 2013

1

Rev

Rev

Rev

1.0

1.0

1.0

5

R1.2 2012/10/29
option changed from /non_FDI_@

R1.2 2012/12/06

CRT_B_PCH

DAC_B_PCH38

D D

DAC_G_PCH38

DAC_R_PCH38

+3VS

1 2

R2309 1KOhm@

1 2

R2307 1KOhm@

1 2

R2308 1KOhm@

1 2

R2313 10KOhm

R2327 2.2KOhm

R2328 2.2KOhm

C C

CRT Disable: (For discrete graphic)

1. NC:

CRT_R,CRT_G,CRT_B

CRT_HSYCN,CRT_VSYNC

2. 1KΩ+-5% pull-down to GND:

50 ohm

CRT_G_PCH

50 ohm

CRT_R_PCH

50 ohm

R1.2 2012/10/29
option changed from /FDI
R1.2 2012/12/19
option changed from /non_RETINA

R1.3 2013/1/8
R2332~R2334 are removed

12

12

@

12

12

12

R231810KOhm @

R231910KOhm /DGPU

R232010KOhm /DGPU

Close to CPU

LCD_BL_PWM_PCH

LCD_BACKEN_PCH

LCD_VDD_EN_PCH

DGPU_PWM_SELECT#

DGPU_SELECT#

DGPU_HOLD_RST#_R

DGPU_PWR_EN

DDC2BC_PCH

DDC2BD_PCH

3. Connected to GND:

4. Connect to +V3.3:

CRT_ITRN
DAC_IREF

VCCADAC

JP2301 SHORT_PIN

JP2302 SHORT_PIN

JP2303 SHORT_PIN

BBS_BIT0,BBS_BIT1 : Boot BIOS Strap

Boot BIOS Strap

BBS_BIT0BBS_BIT1

Boot BIOS Location

LPC0

0

remove R2335~R2337, R2339~R2341, JP2304~JP2306 for GDDR5

0

Reserved (NAND)

Reserved

SPI

0 1

1

1 (PCH) DEFAULT1

12

12

12

R1.2 2012/10/29
option changed from /FDI

R1.2 2012/12/19
option changed from /non_RETINA

STP_A16OVR:
A16 swap override Strap/

Top-Block swap override jumper

Low=Enabled A16 swap override/
Top-Block swap override

High=Default

Sampled on rising edge of PWROK.

B B

BBS_BIT020

BBS_BIT0

BBS_BIT1

R1.1

1 2

R2310 1KOhm@

1 2

R2311 1KOhm@

1 2

R2316 10KOhm@

1 2

R2317 10KOhm@

STP_A16OVR

+3VS

GND

R2304

150Ohm

VGA_PWRON91

4

12

R2305

150Ohm

DGPU_HOLD_RST#70

1 2

R2312 1KOhm@

12

R2306

150Ohm

GND

+3VS

DGPU_PWR_EN63

R2325 0Ohm@

37.5 ohm

37.5 ohm

37.5 ohm

12

LCD_BL_PWM_PCH37

LCD_BACKEN_PCH37

LCD_VDD_EN_PCH37

GND

1 2

T2305

T2302

DDC2BC_PCH38

DDC2BD_PCH38

DAC_HSYNC_PCH38

DAC_VSYNC_PCH38

+3VSUS

GND

R1.2 2012/11/27
follow intel design guide
co-lay with R2326

SP2306 R0402

SP2307 R0402

SP2308 R0402

10KOhm

10KOhm

10KOhm

10KOhm

1 2

SP2301 R0402

1

DGPU_PWR_EN

1

U2301

5

VCC

4

GND3Y

SN74LVC1G08DCKR

@

1 2

R2324 0Ohm

B_PCH

G_PCH

R_PCH

1 2

SP2304 R0402

1 2

SP2305 R0402

1 2

R2326 649OHM1%

R1.2 2012/12/06
remove R2348 for GDDR5

1 2

1 2

1 2

56

78

34

12

1

A

2

B

RN2301C

RN2301D

RN2301B

RN2301A

R1.2 2012/12/19
option changed from /non_RETINA

INT_PIRQA#

INT_PIRQB#

INT_PIRQC#

INT_PIRQD#

DGPU_HOLD_RST#_R

DGPU_SELECT#

BBS_BIT1

DGPU_PWM_SELECT#

STP_A16OVR

PLT_RST#

+3VS

12

R2321
10KOhm

@

R2323 0Ohm@

GND

3

T45

U44

V45

M43

M45

N42

N44

U40

U39

N36

K36

G36

H20

L20

K17

M20

A12

B13

C12

C10

Int. PU

A10

AL6

Int. PU

DH82LPMS

02V000000012

U2302

1

A

2

B
GND3Y

SN74LVC1G08DCKR

@

GND

1 2

R2314 0Ohm

1 2

SUSB_EC# 22,30,63,91,92

U2001E

VGA_BLUE

VGA_GREEN

VGA_RED

VGA_DDC_CLK

VGA_DDC_DATA

VGA_HSYNC

VGA_VSYNC

DAC_IREF

VGA_IRTN

EDP_BKLTCTL

EDP_BKLTEN

EDP_VDDEN

PIRQA#

PIRQB#

PIRQC#

PIRQD#

GPIO50

GPIO52

GPIO54

GPIO51

GPIO53

GPIO55

5

VCC

4

DGPU_PWR_EN

+3VS

12

R2347
0Ohm

@

+3VS

+3V

LPT_PCH_M_EV

DDPB_CTRLCLK

DDPB_CTRLDATA

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPD_CTRLCLK

DDPD_CTRLDATA

DISPLAY

LVDSCRT

PCI

+3VSUS

12

Strap information:

R2346

There signals have a weak internal pull down

0Ohm

@

DDPB_CTRLDATA: "0" = Port is not detected; "1"= Port is detected
DDPC_CTRLDATA: "0" = Port is not detected; "1"= Port is detected
DDPD_CTRLDATA: "0" = Port is not detected; "1"= Port is detected

BUF_PLT_RST# 30,33,40,43,47,53,55,70

12

R2315

100KOhm

GND

DDPB_AUXN

DDPC_AUXN

DDPD_AUXN

DDPB_AUXP

DDPC_AUXP

DDPD_AUXP

DDPB_HPD

DDPC_HPD

DDPD_HPD

PIRQE#/GPIO2

PIRQF#/GPIO3

PIRQG#/GPIO4

PIRQH#/GPIO5

PME#

PLTRST#

R40

R39

R35

R36

N40

N38

H45

K43

J42

H43

K45

J44

K40

K38

H39

G17

F17

L15

M15

AD10

Y11

2

+3VS 16,17,20,21,22,25,26,27,28,30,33,37,38,39,40,41,43,47,48,49,53,55,60,63,65,66, 91,92

+3V 37,43,63,65, 91

HDMI_DDC_CLK_PCH 39

T2306

HDMI_DDC_DATA_PCH 39

1

R1.1

R1.2 2012/10/29

DPC_AUXN

DPC_AUXP

MPC_PWR_CTRL#

SATA_ODD_DA#

EXTTS_SNI_DRV0_PCH

EXTTS_SNI_DRV1_PCH

PCI_PME#

PLT_RST#

1

T2303

option changed from /non_FDI

R1.2 2012/12/06
remove R2338, R2329~R2331, R2349 for GDDR5

1

T2304

R1.2 2012/11/27

HDMI_HPD_PCH 39

SATA_ODD_DA# 60

1

T2301

+3VS

12

R23221KOhm @

follow intel design guide

GND

1 2
1 2
1 2
1 2

是否會浪費電?

R234210KOhm
R234310KOhm @
R234410KOhm @
R234510KOhm @

1

SATA_ODD_DA#
EXTTS_SNI_DRV1_PCH

EXTTS_SNI_DRV0_PCH

MPC_PWR_CTRL#

A A

Title :

Title :

Title :

PCH(4)_DP,LVDS,CRT

PCH(4)_DP,LVDS,CRT

PCH(4)_DP,LVDS,CRT

Wing_Cheng

Wing_Cheng

Engineer:

Engineer:

VA70_HW

VA70_HW

VA70_HW

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Wing_Cheng

1

Rev

Rev

Rev

1.0

1.0

1.0

23 96Friday , January 18, 2013

23 96Friday , January 18, 2013

23 96Friday , January 18, 2013

5

U2001I

PCIE_IREF

AW31
AY31

BE32
BC32

AT31

AR31

BD33
BB33

AW33
AY33

BE34
BC34

AT33

AR33

BE36
BC36

AW36
AV36

BD37
BB37

AY38
AW38

BC38
BE38

AT40
AT39

BE40
BC40

AN38
AN39

BD42
BD41

BE30

BC30

BB29

BD29

PERN1/USB3RN3
PERP1/USB3RP3

PETN1/USB3TN3
PETP1/USB3TP3

PERN2/USB3RN4
PERP2/USB3RP4

PETN2/USB3TN4
PETP2/USB3TP4

PERN_3
PERP_3

PETN_3
PETP_3

PERN_4
PERP_4

PETN_4
PETP_4

PERN_5
PERP_5

PETN_5
PETP_5

PERN_6
PERP_6

PETN_6
PETP_6

PERN_7
PERP_7

PETN_7
PETP_7

PERN_8
PERP_8

PETN_8
PETP_8

PCIE_IREF

TP11

TP6

DH82LPMS

02V000000012

PCIE_RCOMP

PCIE_RXN1_CR4 0
PCIE_RXP1_CR40

PCIE_TXN1_CR40
PCIE_TXP1_CR40

D D

PCIE_RXN6_mSATA53
PCIE_RXP6_mSATA53

PCIE_TXN6_mSATA5 3
PCIE_TXP6_mSATA53

PCIE_RXN2_WLAN55
PCIE_RXP2_WLAN55

PCIE_TXN2_WLAN55
PCIE_TXP2_WLAN55

PCIE_RXN3_LAN33
PCIE_RXP3_LAN33

PCIE_TXN3_LAN33
PCIE_TXP3_LAN33

C C

B B

A A

+1.5VS

+1.5VS

1 2

C2409 0.1UF/10V

1 2

C2410 0.1UF/10V

@

1 2

C2404 0.1UF/10V

1 2

C2403 0.1UF/10V

@

1 2

C2401 0.1UF/10V

1 2

C2402 0.1UF/10V

1 2

C2406 0.1UF/10V

1 2

C2407 0.1UF/10V

SP2403 NB_R0402_20MIL_SMALL

1 2

R1.2 2012/11/28
cost dwon 0ohm

R1.2 2012/12/04
change short pin size

1 2

R2401 7.5KOhm

5

PCIE_TXN1_CR_C
PCIE_TXP1_CR_C

PCIE_TXN6_mSATA_C
PCIE_TXP6_mSATA_C

PCIE_TXN2_WLAN_C
PCIE_TXP2_WLAN_C

PCIE_TXN3_GLAN_C
PCIE_TXP3_GLAN_C

PCIE_RCOMP

LPT_PCH_M_EDS

PCIe

4

B37

USB_PN0

USB2N0

D37

USB_PP0

USB2P0

A38

USB_PN1

USB2N1

C38

USB_PP1

USB2P1

A36

USB_PN2

USB2N2

C36

USB_PP2

USB2P2

A34

USB2N3

C34

USB2P3

B33

1

USB_PN4

USB2N4

D33

USB_PP4

USB2P4

F31

USB_PN5

USB2N5

G31

USB_PP5

USB2P5

K31

USB2N6

L31

USB2P6

G29

USB_PN7

USB2N7

H29

USB_PP7

USB2P7

A32

USB_PN8

USB2N8

C32

USB_PP8

USB2P8

A30

USB_PN9

USB2N9

C30

USB_PP9

USB2P9

B29

USB_PN10

USB2N10

D29

USB_PP10

USB2P10

A28

USB_PN11

USB2N11

C28

USB_PP11

USB2P11

G26

USB_PN12

USB2N12

F26

USB_PP12

USB2P12

F24

USB2N13

USB

4

USB2P13

USB3RN1
USB3RP1
USB3TN1
USB3TP1
USB3RN2
USB3RP2
USB3TN2
USB3TP2
USB3RN5
USB3RP5
USB3TN5
USB3TP5
USB3RN6

USB3RP6
USB3TN6
USB3TP6

USBRBIAS#

USBRBIAS

OC0#/GPIO59
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43

OC5#/GPIO9
OC6#/GPIO10
OC7#/GPIO14

G24

AR26
AP26
BE24
BD23
AW26
AV26
BD25
BC24
AW29
AV29
BE26
BC26
AR29
AP29
BD27
BE28

K24
K26

M33

TP24

L33

TP23

P3
V1
U2
P1
M3
T1
N2
M1

USB_BIAS

OC0#/GPIO59
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO9
OC6#/GPIO10
OC7#/GPIO14

1

1
1

1
1

1
1

T2403
T2405

T2404
T2406

T2407
T2408

T2401
T2402

1 2

R2403 22.6Ohm1%

SP2402 R0402

1 2

SP2401 R0402

@

1 2

R2404 0Ohm

7 8
1 2
3 4
1 2
7 8
5 6
3 4
5 6

1 2

USB_PN5 55
USB_PP5 55

USB_PN8 37
USB_PP8 37
USB_PN9 61
USB_PP9 61

USB_PN11 53
USB_PP11 53

10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm

USB_PN0 61
USB_PP0 61
USB_PN1 61
USB_PP1 61
USB_PN2 61
USB_PP2 61

GND

3

USB3_RX1_N 61
USB3_RX1_P 61
USB3_TX1_N 61

USB3_TX1_P 61
USB3_RX2_N 61
USB3_RX2_P 61
USB3_TX2_N 61

USB3_TX2_P 61

RN2401D
RN2401A
RN2401B
RN2402A
RN2402D
RN2401C
RN2402B
RN2402C

Place within 500 mils of PCH

3

+3VSUS_ORG

USB_OC0# 61

USB_OC1# 61

USB PORT

USB P00

USB P01

USB P02

USB P03

USB P04

USB P05

USB P07

USB P08

USB P09

USB P10

USB P11

USB P12

USB P13

External 2.0/3. 0

External 2.0/3. 0

External 2.0

WiFi

Camera

External 2.0

BT

PCIE/mSATA

+3VSUS

+3VSUS_ORG

+12VS

+1.5VS

2

+3VSUS 4,22,23,27,28,30,33,43,61,81,92

+3VS

+3VS 16,1 7,20,21,22,23,25,26,27,28,30,33,37,38,39,40,41,43,47,48,4 9,53,55,60,63,65,66,91,92

+3V

+3V 37,43,6 3,65,91

+3VSUS_ORG 20,21,22,25,26, 27

+12VS 28, 39,41,63,91

+1.5VS 20,21,22,26,27,41,53,55,63,84

2

1

Title :

Title :

Title :

PCH(5)_PCI,NVRAM,USB

PCH(5)_PCI,NVRAM,USB

PCH(5)_PCI,NVRAM,USB

Wing_Cheng

Wing_Cheng

Wing_Cheng

Engineer:

Engineer:

VA70_HW

VA70_HW

VA70_HW

Engineer:

1

24 96Friday, January 18, 2013

24 96Friday, January 18, 2013

24 96Friday, January 18, 2013

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Rev

Rev

Rev

1.0

1.0

1.0

5

R2561

10KOhm

@

R2558

10KOhm

EXT_SMI#

PCH_GPIO8

PM_LANPHY_EN

PCH_GPIO24

DGPU_HPD_INTR#

PCH_ALERT#

DGPU_PWROK

GPIO69

GPIO1

STP_PCI#

SATA_DET#4

PCH_GPIO0_R

GPIO27

+3VS

12

R2559

10KOhm

12

R2560

10KOhm

@

GND

+3VS

12

R2553

10KOhm

@

PCB_ID0
PCB_ID1
PCB_ID2

12

R2554

10KOhm

@

GND

1 2

R2512 1KOhm

12

R2513 10KOhm

@

12

R2518 10KOhm

@

12

R2520 10KOhm

@

@

12

R2514 10KOhm

12

@

R2515 10KOhm

12

R2519 10KOhm

12

R2502 10KOhm@

12

R2521 10KOhm@

12

R2517 10KOhm

12

R2522 10KOhm

12

R2556 10KOhm

@

12

R2557 10KOhm

@

PCB ID2 PCB_ID1 PCB_ID0
R1.0 TBD 0 0
R1.1 TBD 0 1
R1.2 TBD 1 0
R1.3 TBD 1 1

+3VSUS_ORG

+3VS

+3VSUS_ORG

WLAN_ON53,55

+3VS

D D

C C

B B

R1.2 2012/11/30
PCB_ID R1.2

12

12

GND

RCIN# has pull high at EC side

R1.2 2012/11/29
R2523, eDP_ON# pull-up is removed

4

Reserved
This signal has a weak internal pull-up but requires an
external pull down.

PCH_GPIO8

+3VS +3VS

12

12

R2524

R2525

10KOhm

10KOhm

@

@

34

Q2501B

5

UM6K1N

DGPU_PWROK

PCH_GPIO8_R

@

Q2501A
UM6K1N

@

GND GND

R2532 10KOhm@

R2526 10KOhm@

61

2

12

12

R1.1

1 2

R2534 1KOhm1%

+3VS GND

@

Functional Strap Definitions
Usage: TLS Confidentiality(Intel Crypto Transport Layer Security)
"0" = Disable
"1" = Enable

1 2

R2533 200KOhm1%

+3VS

Functional Strap Definitions

@

Usage: Reserved
This signal has a weak internal pull-down.
NOTES:

1. The internal pull-down is disabled after PLTRST# deasserts.

2. This signal should not be pulled high when strap is sampled

WLAN_ON_R

GND

FDI_OVRVLTG

SATA_ODD_PRSNT#_R

1 2

SP2506 R0402

1 2

R2531 100KOhm

@

SATA_ODD_PWRGT60

3

+3VS

+3VS 16,17,20,21,22,23,26,27,28,30,33,37,38,39,40,41,43,47,48,49,53,55,60,63,65,66,91,92

+3VSUS

+3VSUS 4,22,23,27,28,30,33,43,61,81,92

+VCCDSW

SP2502 R0402

SP2501 R0402

DGPU_PWROK87,92

WLAN_LED66

AOAC_ON55

R1.2 2012/11/08
cost dwon 0ohm

SP2507 R0402

BT_ON_PCH55

1

PCH_ALERT#

PCB_ID2

+VCCDSW 27

+3VSUS_ORG 20,21,22,24,26,27

1 2

1 2

DGPU_PWROK

1 2

SP2505 R0402

1 2

IO Flexible:

GPIO70

GPIO71

GPIO70

GPIO71

+3VSUS_ORG

R1.2 2012/11/28
eDP_ON# is not used
R1.2 2012/11/29
T2505, R2563 are removed, too

PCH_GPIO8_R

WLAN_RST#_PCH53,55

EXT_SMI#30,65

OP_SD#42

SATA_ODD_PRSNT#60

T2504

GPIO change:
CIO_PLUG_EVENT/PCIE_WAKE#/OP_SD#/DDR_VOLT_SEL
PCB_ID2

R1.1

PCH_GPIO0_R

GPIO1

1

DGPU_HPD_INTR#

T2503

PM_LANPHY_EN

HOST_ALERT#1_R

SATA_DET#4

1 2

SP2504 R0402

1 2

SP2503 R0402

1 2

R25520Ohm @

R2527 10KOhm@

R2528 10KOhm@

R2529 10KOhm@

R2530 10KOhm@

GPIO27

WLAN_ON_R

STP_PCI#

SATA_PWR_EN#1_R

SATA_ODD_PRSNT#_R

FDI_OVRVLTG

PCB_ID0

PCB_ID1

CRIT_TEMP_REP#_R

GPIO69

GPIO70

GPIO71

GND

12

12

12

12

PCH_GPIO24

LPT_PCH_M_EDS

U2001F

AT8

BMBUSY#/GPIO0

F13

TACH1/GPIO1

A14

TACH2/GPIO6

G15

TACH3/GPIO7

Y1

GPIO8

K13

LAN_PHY_PWR_CTRL/GP IO12

AB11

GPIO15

AN2

SATA4GP/GPIO16

C14

TACH0/GPIO17

BB4

SCLOCK/GPIO22

Y10

GPIO24

R11

GPIO27

AD11

GPIO28

AN6

GPIO34

AP1

GPIO35/NMI#

AT3

SATA2GP/GPIO36

AK1

SATA3GP/GPIO37

AT7

SLOAD/GPIO38

AM3

SDATAOUT0/GPIO39

AN4

SDATAOUT1/GPIO48

AK3

SATA5GP/GPIO49

U12

GPIO57

C16

TACH4/GPIO68

D13

TACH5/GPIO69

G13

TACH6/GPIO70

H15

TACH7/GPIO71

BE41

VSS25

BE5

VSS24

C45

VSS23

A5

VSS22

DH82LPMS

02V000000012

+3VS

USB3 Port 3 PCIE Port2 Mode (USB3P3_PCIEP2_MODE)
USB3p3_tach6_gp70 pin is a ‘0’, then Root Port 2 is
assigned to USB3 Port 3, else it is assigned to PCI Express.

USB3 Port 2 PCIE Port1 Mode (USB3P2_PCIEP1_MODE)
USB3p2_tach7_gp71 pin is a ‘0’, then Root Port 1is
assigned to USB3 Port 2, else it is assigned to PCI Express.

GND

CPU/Misc

GPIO

PROCPWRGD

THRMTRIP#

PLTRST_PROC#

NCTF

2

TP14 is Intel R eserved Pin: Mu st have a pull up resistor to VCC3_3. Standar d
resistor value in the range of 4.7K to 15K ok (shark bay LPT EDS 486708)

AN10

TP14

AY1

H_PECI_R

PECI

AT6

RCIN#

AV3

AV1

PM_THRMTRIP#

AU4

N10

VSS3

A2

VSS4

A41

VSS13

A43

VSS14

A44

VSS12

B1

VSS11

B2

VSS10

B44

VSS21

B45

VSS9

BA1

VSS1

BC1

VSS2

BD1

VSS8

BD2

VSS6

BD44

VSS7

BD45

VSS5

BE2

VSS20

BE3

VSS19

D1

VSS18

E1

VSS17

E45

VSS16

A4

VSS15

1 2

1 2

GND

GND

need close to EC

R25030Ohm @

1 2

R250443Ohm

R2505390Ohm 1%

R2506 1KOhm1%

12

@

A20GATE 30

H_PECI 4
H_PECI_EC 30

RCIN# 30

H_CPUPWRGD 4

H_THRMTRIP# 4,47

+1.05VS

PCH_PLTRST_CPU# 4

1

A A

GPIO27

5

12

R2535 10KOhm

@

Title :

Title :

Title :

PCH(6)_CPU,GPIO,MISC

PCH(6)_CPU,GPIO,MISC

GND

4

3

2

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

VA70_HW

VA70_HW

VA70_HW

Date: Sheet

Date: Sheet of

Date: Sheet of

1

Engineer:

Engineer:

Engineer:

PCH(6)_CPU,GPIO,MISC

Wing_Cheng

Wing_Cheng

Wing_Cheng

Rev

Rev

Rev

1.0

1.0

1.0

of

25 96Friday, January 18, 2013

25 96Friday, January 18, 2013

25 96Friday, January 18, 2013

5

LPT_PCH_M_EDS

U2001J

AL34

VSS116

AL38

VSS115

AL8

VSS114

AM14

VSS113

D D

C C

AM24
AM26
AM28
AM30
AM32
AM16
AN36
AN40
AN42

AP13
AP24
AP31
AP43

AK16
AT10
AT15
AT17
AT20
AT26
AT29
AT36
AT38

AV13
AV22
AV24
AV31
AV33
BB25
AV40

AY10
AY15
AY20
AY26
AY29

VSS112
VSS111
VSS91
VSS90
VSS110
VSS118
VSS89
VSS88
VSS117

AN8

VSS109
VSS108
VSS87
VSS107
VSS86

AR2

VSS85
VSS84
VSS83
VSS82
VSS37
VSS36
VSS35
VSS38
VSS34
VSS80

D42

VSS33
VSS32
VSS119
VSS39
VSS28
VSS31
VSS29
VSS30

AV6

VSS106

AW2

VSS105

F43

VSS81
VSS104
VSS103
VSS102
VSS101
VSS100

AY7

VSS99

B11

VSS98

B15

VSS97

VSS96
VSS95
VSS94
VSS93
VSS92
VSS40
VSS42
VSS41
VSS43
VSS45
VSS44
VSS48
VSS47
VSS46
VSS49
VSS50
VSS53
VSS52
VSS51
VSS55
VSS54
VSS56
VSS58
VSS57
VSS60
VSS59
VSS61
VSS62
VSS63
VSS65
VSS64
VSS66
VSS67
VSS68
VSS71
VSS70
VSS69
VSS73
VSS72
VSS74
VSS76
VSS75
VSS78
VSS77
VSS79

K39
L2
L44
M17
M22
N12
N35
N39
N6
P22
P24
P26
P28
P30
P32
R12
R14
R16
R2
R34
R38
R44
R8
T43
U10
U16
U28
U34
U38
U42
U6
V14
V16
V26
V43
W2
W44
Y14
Y16
Y24
Y28
Y34
Y36
Y40
Y8

+V1.05VS_PCH_VCC

10UF/10V

1 2

C2612 1UF/6.3V

GND

+V1.05VM_VCCASW

DCPSUS1，DCPSUS2(27頁)，DCPSUS3:
If INTVRMEN is strapped high then power to this well is supplied internally
and this pin should be left as no connect.
If INTVRMEN is strapped low then power to this well must be supplied by an
external 1.05 V suspend rail.
Note: External VR mode applies to Mobile Only.
(shark bay GaryReff schematic 481356)

C2616

12

12

C2603
22UF/6.3V

4

R2601 5.1Ohm

12

12

C2614

C2615

1UF/6.3V

1UF/6.3V

GNDGND GND GND

1 2

12

12

C2604

C2605

1UF/6.3V

1UF/6.3V

GNDGNDGND

1.31A

12

C2601
1UF/6.3V

+PCH_VCCDSW

0.67A

AA24
AA26
AD20
AD22
AD24
AD26
AD28
AE18
AE20
AE22
AE24
AE26
AG18
AG20
AG22
AG24

AA18

Y26

U14

U18
U20
U22
U24
V18
V20
V22
V24
Y18
Y20
Y22

U2001G

VCC7
VCC8
VCC9
VCC11
VCC10
VCC12
VCC13
VCC1
VCC17
VCC2
VCC16
VCC15
VCC14
VCC6
VCC5
VCC4
VCC3

DCPSUSBYP
VCCASW12
VCCASW11
VCCASW1
VCCASW2
VCCASW3
VCCASW9
VCCASW10
VCCASW4
VCCASW5
VCCASW6
VCCASW7
VCCASW8

3

LPT_PCH_M_EDS

2

+VCCA_DAC_1_2

12

12

C2620

0.1UF/16V

C2606

1UF/6.3V

GND

@

12

C2623 10UF/10V@

C2617

0.1UF/16V

GND

12

C2621
10UF/10V

GNDGND

+V3.3S_ADACBG

1 2

12

C2608

1UF/6.3V

0Ohm

1 2

R2602

NB_R0402_20MIL_SMALL

1 2

SP2617

NB_R0402_20MIL_SMALL

1 2

SP2616

12

1UF/6.3V

C2607

C2619

0.01UF/50V

P45

P43

M31

BB44

AN34

AN35

R30
R32

Y12

AJ30
AJ32

AJ26
AJ28
AK20
AK26
AK28

BE22

AK18

AN11

AK22

AM18
AM20
AM22
AP22
AR22
AT22

70mA

13mA

+3VS_VCC_GIO

1

1

+V1.5S_VCCAPLL_FDI

+V1.05S_VCC_EXP

T2601

T2602

+V1.05S_VCC_EXP
+VCCAPLL_USB3

+VCCAPLL_EXP

C2610 10UF/10V

+VCCAPLL_SATA3

VCCADAC1_5

CRT DAC

FDI

HVCMOS

Core

USB3

PCIe/DMI

SATA

VCCMPHY

VSS26

VCCADACBG3_3

VCCVRM2

VCCIO1

VCCIO2

VCC3_3_R30
VCC3_3_R32

DCPSUS1

VCCSUS3_3_1
VCCSUS3_3_2

DCPSUS3_1
DCPSUS3_2

VCCIO3
VCCVRM3
VCCVRM4

VCCVRM5

VCCIO4

VCCVRM1

VCCIO9

VCCIO11
VCCIO10

VCCIO5

VCCIO6

VCCIO7

VCCIO8

GND

1UF/6.3V

1 2

C2609

GND

12

GND

@

12

C2611
10UF/10V

GND

B2601

21

1kOhm/100Mhz

R2603 0Ohm

1 2

NB_R0402_20MIL_SMALL

GND

1 2

SP2613

12

12

C2622

C2613

10UF/10V

1UF/6.3V

+3VSUS_ORG

+3VSUS_VCCPSUS

+1.5VS

1UF/6.3V

+1.5VS

R1.2 2012/12/03
cost dwon 0ohm
R1.2 2012/12/04
change short pin size

+1.5VS

+3VS

R1.2 2012/12/03
cost dwon 0ohm

+1.5VS

12

SP2614

12

C2618

0.1UF/16V

GND

12

C2602

GND

1

R1.2 2012/11/27
follow intel design guide
R1.2 2012/11/28
R2611 is removed
R1.2 2012/12/06
remove R2612, R2610 for GDDR5

R1.2 2012/12/19
option changed to N/A

+VTT_PCH_VCCIO

R1.2 2012/12/04
change short pin size

R1.2 2012/12/17
R2606 is removed

NB_R0402_20MIL_SMALL

1 2

SP2615

@

+3VS

R1.2 2012/12/03
cost dwon 0ohm

R1.2 2012/12/04
change short pin size

+1.5VS

NB_R0402_20MIL_SMALL

1 2

R1.2 2012/12/03
cost dwon 0ohm

R1.2 2012/12/04
change short pin size

GND

DH82LPMS

02V000000012

B B

A A

5

GND

DH82LPMS

02V000000012

+1.05VS +V1.05VS_PCH_VCC

JP2601

112

2MM_OPEN_5MIL

JP2602

2

2MM_OPEN_5MIL

JP2603

112

2MM_OPEN_5MIL

4

1.29A

2

+V1.05VM_VCCASW

0.67A

112

+VTT_PCH_VCCIO

3.629A

2

3

+V1.05VM_VCCASW

+VTT_PCH_VCCIO

+1.05VS

+1.5VS

+3VSUS_VCCPSUS

+V1.05VM_VCCASW 27

+VTT_PCH_VCCIO 27

+1.05VS 4,25,27,47,63,80, 82

+1.5VS 20,21,22,24,27,41,53,55,63,84

+3VS

+3VS 16,17,20,21,22,23,25,27,28,30,33,37,38,39,40,41,43,47,48,49,53,55,60,63,65,66, 91,92

+3VSUS_VCCPSUS 27

2

Title :

Title :

Title :

PCH(7)_POWER,GND

PCH(7)_POWER,GND

PCH(7)_POWER,GND

Wing_Cheng

Wing_Cheng

Engineer:

Engineer:

VA70_HW

VA70_HW

VA70_HW

Engineer:

BG1\CORE

BG1\CORE

BG1\CORE

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Wing_Cheng

26 96Friday , January 18, 2013

26 96Friday , January 18, 2013

26 96Friday , January 18, 2013

1

Rev

Rev

Rev

1.1

1.1

1.1

5

LPT_PCH_M_EDS

U2001K

AA16

VSS136

AA20

VSS197

AA22

VSS196

AA28

VSS195

AA4

VSS194

AB12

VSS193

AB34

VSS192

AB38

VSS146

AB8

VSS128

AC2

D D

C C

B B

VSS145

AC44

VSS191

AD14

VSS190

AD16

VSS189

AD18

VSS204

AD30

VSS203

AD32

VSS202

AD40

VSS209

AD6

VSS208

AD8

VSS188

AE16

VSS187

AE28

VSS186

AF38

VSS185

AF8

VSS184

AG16

VSS183

AG2

VSS201

AG26

VSS200

AG28

VSS199

AG44

VSS198

AJ16

VSS182

AJ18

VSS148

AJ20

VSS147

AJ22

VSS150

AJ24

VSS149

AJ34

VSS181

AJ38

VSS180

AJ6

VSS179

AJ8

VSS178

AK14

VSS177

AK24

VSS176

AK43

VSS175

AK45

VSS174

AL12

VSS173

AL2

VSS172

BC22

VSS206

BB42

VSS205

DH82LPMS

02V000000012

GND

B19

VSS171

B23

VSS170

B27

VSS169

B31

VSS168

B35

VSS167

B39

VSS166

B7

VSS165

BA40

VSS164

BD11

VSS163

BD15

VSS162

BD19

VSS161

AY36

VSS160

AT43

VSS159

BD31

VSS129

BD35

VSS130

BD39

VSS131

BD7

VSS132

D25

VSS144

AV7

VSS133

F15

VSS143

F20

VSS134

F29

VSS142

F33

VSS135

BC16

VSS121

D4

VSS120

G2

VSS122

G38

VSS123

G44

VSS124

G8

VSS125

H10

VSS126

H13

VSS127

H17

VSS139

H22

VSS140

H24

VSS141

H26

VSS138

H31

VSS158

H36

VSS137

H40

VSS157

H7

VSS156

K10

VSS155

K15

VSS154

K20

VSS153

K29

VSS152

K33

VSS151

BC28

VSS207

R1.2 2012/12/03
cost dwon 0ohm
R1.2 2012/12/04
change short pin size

+1.05VS

NB_R0402_20MIL_SMALL

1 2

SP2713

+3VS

NB_R0402_20MIL_SMALL

1 2

SP2716

+1.05VS

NB_R0402_20MIL_SMALL

1 2

SP2719

+1.5VS

GND

R2726 0Ohm

+1.05VS

R1.2 2012/12/03
cost dwon 0ohm

R1.2 2012/12/04
change short pin size

NB_R0402_20MIL_SMALL

1 2

SP2711

10UF/10V

+1.05VS_VCC_SSCFF

12

C2718
1UF/6.3V

GND

+3VS_VCC_FLEX23

12

C2721
1UF/6.3V

GND

+1.05VS_VCCCLKF100

12

C2724
1UF/6.3V

1 2

C2703

0.1UF/16V

C2715

+1.05VS

+3VSUS_ORG

12

GND

+3VS

SP2714

+3VS

SP2717

SP2720

+VTT_PCH_VCCIO
GND

+VCCAXCK_VRM

+1.05VS

R1.2 2012/12/03
cost dwon 0ohm

R1.2 2012/12/04
change short pin size

4

SP2708

R1.2 2012/12/03
cost dwon 0ohm

R1.2 2012/12/04
change short pin size

12

SP2709

+3VS

SP2710

NB_R0402_20MIL_SMALL

1 2

SP2712

NB_R0402_20MIL_SMALL

1 2

+3VS_VCC_FLEX0

GND

NB_R0402_20MIL_SMALL

1 2

+3VS_VCC_ASEPCI

GND

NB_R0402_20MIL_SMALL

1 2

+1.05VS_VCCSSCF100

NB_R0402_20MIL_SMALL

1 2

12

12

12

+3VSUS_VCCPUSB

R1.2 2012/12/03
cost dwon 0ohm
R1.2 2012/12/04
change short pin size

NB_R0402_20MIL_SMALL

1 2

C2714 0.1UF/16V

NB_R0402_20MIL_SMALL

1 2

12

12

C2716

@

10UF/10V

GND

+3VS

C2719
1UF/6.3V

+1.05VS

C2722
1UF/6.3V

C2725
1UF/6.3V

C2702

0.1UF/16V

1 2

+1.05VS_VCCUSBCORE

1 2

C2730 0.1UF/16V

+1.05VS_VCC_AXCK_DCB

C2717
1UF/6.3V

NB_R0402_20MIL_SMALL

1 2

SP2715

NB_R0402_20MIL_SMALL

1 2

SP2718

12

GND

GND

+1.05VS_VCCAUSB

+3VS_VCCAUBG

GND

GND

T2701

+1.05VS_VCC_SSCFF

+3VS_VCC_FLEX0

+3VS_VCC_FLEX1

+3VS_VCC_FLEX23

+3VS_VCC_ASEPCI

+VCCCLKF135

+1.05VS_VCC_SSCFF

+1.05VS_VCCCLKF100

+1.05VS_VCCSSCF100

+1.05VS_VCCCLKF100

+1.05VS_VCCSSCF100

+3VS_VCC_FLEX1

12

C2720
1UF/6.3V

GND

+VCCCLKF135

12

C2723
1UF/6.3V

GND

3

U2001H

R24

VCCSUS3_3_9

R26

VCCSUS3_3_3

R28

VCCSUS3_3_4

U26

VCCSUS3_3_5

M24

VSS27

U35

VCCUSBPLL

L24

VCC3_3_1

U30

VCCIO12

V28

VCCIO14

V30

VCCIO13

Y30

VCCIO16

1

Y35

DCPSUS2

AF34

VCCVRM7

AP45

VCC20

Y32

VCCCLK1

M29

VCCCLK3_3_1

L29

VCCCLK3_3_2

L26

VCCCLK3_3_3

M26

VCCCLK3_3_4

U32

VCCCLK3_3_5

V32

VCCCLK3_3_6

AD34

VCCCLK2

AA30

VCCCLK3

AA32

VCCCLK4

AD35

VCCCLK5

AG30

VCCCLK6

AG32

VCCCLK7

AD36

VCCCLK8

AE30

VCCCLK9

AE32

VCCCLK10

DH82LPMS

02V000000012

LPT_PCH_M_EDS

USB

20mA

VCCSUS3_3_6

Azalia

CPU

SPI

GND

12

C2728
1UF/6.3V

VCCSUS3_3_7

VCCDSW3_3

VCCSUSHDA

VCCSUS3_3_8

V_PROC_IO_1
V_PROC_IO_2

+3VM_VCCPSPI

GPIO/LPC

RTC

ICC

Fuse

Thermal

+3VSUS_VCCPSUS

R20
R22

A16

AA14

DCPSST

AE14

VCC3_3_2

AF12

VCC3_3_3

AG14

VCC3_3_4

U36

VCCIO15

A26

K8

A6

VCCRTC

P14

DCPRTC1

P16

DCPRTC2

AJ12
AJ14

AD12

VCCSPI

P18

VCC18

P20

VCC19

L17

VCCASW13

R18

VCCASW14

AW40

VCCVRM6

AK30

VCC3_3_5

AK32

VCC3_3_6

R2701 0Ohm@

R2702 0Ohm

+3VS_VCCPCORE

+V1.05S_VCCAUX

+3VSUS_VCCPAZSUS

+VCCPRTCSUS

+VCCRTCEXT

+1.05VS_VCCPCPU

+3VM_VCCPSPI

+3VS_VCCPFUSE

PCH_VCC_1_1_20

PCH_VCC_1_1_21

+V1.5S_VCCATS

12

12

+VCCDSW

+VCCSST

+3VS_VCCPTS

+3VS

+3VM_SPI

NB_R0402_20MIL_SMALL

1 2

SP2703

SP2704

12

GND

12

C2709

0.1UF/16V

12

C2711

0.1UF/16V

GND

2

1 2

C27050.1UF/16V

+VTT_PCH_VCCIO

+3VSUS_ORG

NB_R0402_20MIL_SMALL

1 2

R1.2 2012/12/03
cost dwon 0ohm

C2706

0.1UF/16V
C2712

0.1UF/16V

12

C2710

0.1UF/16V

NB_R0402_20MIL_SMALL

1 2

SP2705

NB_R0402_20MIL_SMALL

1 2

SP2706

NB_R0402_20MIL_SMALL

1 2

SP2707

NB_R0402_20MIL_SMALL

1 2

SP2721

R1.2 2012/12/03
cost dwon 0ohm

R1.2 2012/12/04
change short pin size

+VCCPRTCSUS

GND

NB_R0402_20MIL_SMALL

1 2

SP2702

12

C2701

0.01UF/50V

GND

R1.2 2012/12/04
change short pin size

12

12

12

C2731

C2713

1UF/6.3V

0.1UF/16V

GND

12

C2727
1UF/6.3V

GND

+V1.05VM_VCCASW

+V1.05VM_VCCASW

+1.5VS

R1.2 2012/12/03
cost dwon 0ohm

R1.2 2012/12/04
change short pin size

+3VS

12

C2726
1UF/6.3V

GND

+VCCDSW

NB_R0402_20MIL_SMALL

1 2

SP2701

R1.2 2012/12/03
cost dwon 0ohm

R1.2 2012/12/04
change short pin size

1 2

0Ohm

1 2

@

Unstuff R2731, stuff R2732

Intel MOW WW09: renamed
VCCIO2PCH to RSVD

R2719 0Ohm

R2718 0Ohm

+3VS

R2732

R27330Ohm

1 2

@

1 2

R1.2 2012/12/04
change short pin size

C2704

0.1UF/16V

+VCC_RTC

+1.05VS

+VCCIO2PCH

+3VSUS_ORG

12

GND

R1.1

+3VSUS_ORG

1

12

C2708

0.1UF/16V

GND

GND

+3VA

12

C2729
1UF/6.3V

R2720
0Ohm

+1.05VS

1 2

R2734
0Ohm

+3VS

1 2

@

GND

A A

5

GND

+3VSUS

JP2702

2

1MM_OPEN_M1M2

4

3

+3VSUS_ORG

261mA

112

+V1.05VM_VCCASW

+3VSUS

+3VSUS_ORG

+1.05VS

+VTT_PCH_VCCIO

+VCCAXCK_VRM

+3VSUS_VCCPSUS

+3VA

+VCC_RTC

+VCCIO2PCH

2

+V1.05VM_VCCASW 26

+3VSUS 4,22,23,28,30, 33,43,61,81,92

+3VSUS_ORG 20, 21,22,24,25,26

+1.5VS

+1.5VS 20,21,22,24,26, 41,53,55,63,84

+3VS

+3VS 16,17,20,21,22,23,25,26,28,30,33,37, 38,39,40,41,43,47,48,49,53,55,60,63,65,66,91,92

+1.05VS 4,25,26,47,63, 80,82

+VTT_PCH_VCCIO 26

+VCCAXCK_VRM 21

+3VSUS_VCCPSUS 26

+3VA 20,30,63,65,81,88,93

+VCC_RTC 20,22

+VCCIO2PCH 6

Title :

Title :

Title :

PCH(8)_POWER,GND

PCH(8)_POWER,GND

PCH(8)_POWER,GND

Wing_Cheng

Wing_Cheng

Wing_Cheng

Engineer:

Engineer:

VA70_HW

VA70_HW

VA70_HW

1

Engineer:

27 96Friday, January 18, 2013

27 96Friday, January 18, 2013

27 96Friday, January 18, 2013

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Rev

Rev

Rev

1.0

1.0

1.0

5

PCH SPI ROM

@

+3VA_EC

D D

C C

+3VSUS

R2802 0Ohm

R2803 0Ohm

PCH_SPICS0#21
PCH_SPISO21,30

PCH_SPICS1#21,30

12

12

R2801 0Ohm

+3VM_SPI

PCH_SPICS0#

SPI_WP_IO221,30

PCH_SPISO

PCH_SPICS1#

+3VM_SPI

D2801

1

3

2

@

1V/0.2A

12

R1.2 2012/11/29
reserved for intel design guide

R2822
1KOhm

@

1 2

1 2

R28040Ohm

1 2

R280533Ohm

1 2

R280633Ohm

1 2

R28170Ohm

1 2

R281633Ohm

1 2

R281833Ohm

@
@
@

@

+3VM_SPI

R2807
1KOhm

1 2

SPI1_CS#0
SPI1_SO
+3VM_SPI1_WP#

+3VM_SPI

R2821
1KOhm

1 2

@

SPI2_CS#1
SPI2_SO

+3VM_SPI2_WP# SPI2_CLK

4

R1.2 2012/11/28
follow intel design guide

U2801

1

CS#

2

SO/SIO1

3

WP#/SIO2

4

GND

MX25L1675EM2I-10G

05V000000023

R1.2 2012/11/28
follow intel design guide

U2802

1

CS#

2

DO(IO1)

3

WP#(IO2)

4

GND

W25Q32FVSSIQ

05V000000022
@

VCC

NC/SIO3

SCLK

SI/SIO0

(16Mb)

HOLD#/RESET#(IO3)

(32Mb)

C2802

0.1UF/16V

8
7
6
5

VCC

CLK

DI(IO0)

12

SPI1_HOLD#
SPI1_CLK
SPI1_SI

0.1UF/16V

8
7
6
5

+3VM_SPI

C2801

R1.2 2012/11/28
follow intel design guide

R2808
1KOhm

1 2

+3VM_SPI

12

@

SPI2_HOLD#

SPI2_SI

R2811 33Ohm
R2809 33Ohm
R2810 33Ohm

R1.2 2012/11/28
follow intel design guide

R2815
1KOhm

1 2

@

R2814 33Ohm
R2812 33Ohm
R2813 33Ohm

3

1 2
1 2
1 2

1 2
1 2
1 2

@
@
@

+3VM_SPI

R1.2 2012/11/29
reserved for intel design guide

R2823
1KOhm

@

1 2

SPI_HOLD#_IO3 21,30

PCH_SPICLK 21,30

PCH_SPISI 21,30

R1.0 0106

2

+3VS

+3VS 16,17,20,21,22,23,25,26,27,30,33,37,38,39,40,41,43,47,48,49,53,55,60,63,65,66, 91,92

+12VS 39,41,63,91

+12VSUS 22,33, 55,60,81,91

+3VM_SPI 27

+3VSUS 4,22,23,27,30,33, 43,61,81,92

+12VSUS

+3VM_SPI

+3VSUS

+12VS

PCH EC

ROM setting:
Configuration 1. ITE HSPI -> short J2803 pin2 & 3
and no stuff U2801,U2802
Configuration 2. One ROM solution -> short J2803 pin1&2
and no stuff U2802 ; stuff U2801(BIOS+ME)
Configuration 3. Two ROM solution -> short J2803 pin1&2 , J2802 pin2&3
Stuff U2801(ME), Stuff U2802(BIOS)

Follow Intel setting:
U2801: ME
U2802: BIOS

1

<6.5 inch <6.5 inch

SPI ROM
(32Mb)

SPI ROM
(128 Kb)

+12VS

5

R2820 0Ohm

R2819 0Ohm

34

1 2

@

1 2

+3VS

SMBUS Link device

eDP
WLAN

34

12

RN2801A

4.7KOHM

RN2801B

4.7KOHM

CPU XDP
PCH XDP

+3VS

SMB_CLK_S 16,17,48,53,55

SMB_DAT_S 16,17,48,53,55

+12VSUS

+12VS

SML1_CLK 21

PCH

SML1_DAT 21

SCL_VGA 30,49,74

SDA_VGA 30,49,74

2

+3VS

ANX6211

Title :

Title :

Title :

PCH(9)_SPI,SMB

PCH(9)_SPI,SMB

PCH(9)_SPI,SMB

Wing_Cheng

Wing_Cheng

Engineer:

Engineer:

VA70_HW

VA70_HW

VA70_HW

Engineer:

1

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Wing_Cheng

28 96Friday , January 18, 2013

28 96Friday , January 18, 2013

28 96Friday , January 18, 2013

Rev

Rev

Rev

1.0

1.0

1.0

SPI Debug Connector

B B

A A

5

4

PCH SMBus

EC, VGA Thermal

+3VSUS

SCL_3A21

PCH

SDA_3A21

+3VS +3VSUS

SMB1_CLK30,49,74

SMB1_DAT30,49,74

3

2

6 1

Q2801A

UM6K1N

3 4

Q2801B

UM6K1N

2

Q2802A

UM6K1N

61

5

Q2802B

UM6K1N

R1.2 2012/10/29
option changed from /non_FDI_@

R1.2 2012/11/28
R2822, R2823 are removed

5

D D

C C

4

3

2

1

B B

A A

Title :

Title :

Title :

CLK_ICS9LRS3197

CLK_ICS9LRS3197

CLK_ICS9LRS3197

Wing_Cheng

Wing_Cheng

Engineer:

Engineer:

VA70_HW

VA70_HW

VA70_HW

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

5

4

3

Date: Sheet of

2

Wing_Cheng

1

Rev

Rev

Rev

1.0

1.0

29 96Friday, January 18, 2013

29 96Friday, January 18, 2013

29 96Friday, January 18, 2013

1.0

5

D D

+3VA_EC

C C

R1.2 2012/11/06

工工工工工工

B B

RF_ON55

Q3001B
UM6K1N

+3VS_WLAN

+3VS_WLAN

12

12

R3040
10KOhm

34

5

61

Q3001A
UM6K1N

GND GND

12

R3035 0Ohm

@

R1.2 2012/11/06

工工工工工工

H_PECI_EC25

T3012

USBCHG_EN81

R3041
10KOhm

PCH_FLASH_DESCRIPTOR20

2

RF_ON_R

Thermal sensor

H_PECI_EC

1

SPI_HOLD#_IO321,28

R1.2 2012/11/08
cost dwon 0ohm
R1.2 2012/11/28
change back to 0ohm
R1.2 2012/12/06
R3042, R3044 are replaced by SP3008, SP3012
R1.2 2012/12/17
SP3008, SP3012 replaced by 0ohm

CLK_KBCPCI_PCH21

ME_SUSPWRDNACK22

WLAN_RST#_EC55

PM_PWRBTN#22

Battery

12

C3011

10PF/50V

@

SPI_WP_IO221,28

PCH_FLASH_DESCRIPTOR

LPC_AD021,43,65
LPC_AD121,43,65
LPC_AD221,43,65
LPC_AD321,43,65

LPC_FRAME#21,43,65

BUF_PLT_RST#23,33,40,43,47,53,55,70

INT_SERIRQ21,43,65

EXT_SMI#25,65
EXT_SCI#20

A20GATE25

RCIN#25

EC_RST#47

1

T3013

KSI048
KSI148
KSI248
KSI348
KSI448
KSI548
KSI648

KSI748
KSO048
KSO148

KSO248
KSO348
KSO448
KSO548
KSO648
KSO748
KSO848
KSO948
KSO1048
KSO1148
KSO1248
KSO1348
KSO1448
KSO1548

THRO_CPU4

BAT_LEARN88

TP_CLK48

TP_DAT48

SMB0_CLK63,88
SMB0_DAT63,88
SMB1_CLK28,49,74
SMB1_DAT28,49,74

LCD_BACKOFF#37

CTL_FAN49
FB_CLAMP71,74,84

IOAC_EN55,81

1 2

R3044 0Ohm

1 2

R3042 0Ohm

SCLCDP_EC61

R1.2 2012/11/08
cost dwon 0ohm
R1.2 2012/12/04
remove R3016

Share ROM

A A

R1.2 2012/11/08
cost dwon 0ohm
R1.2 2012/11/28
change back to 0ohm

FDIO2

5

12

R3069 0Ohm

R3029 15Ohm

1 2

R3072

0Ohm

+3VA_EC_SPI

R3071
1KOhm

1 2

ROM_WP#_S

SCE#_SSCE#

SO_SSO

R1.2 2012/11/28
follow Intel design guide

CS#
DO(IO1)
WP#(IO2)
GND

HOLD#/RESET#(IO3)

DI(IO0)

(32Mb)

0.1UF/16V

VCC

CLK

U3003

1
2
3
4

W25Q32FVSSIQ

05V000000022

need to check ROM P/N

C9201

8
7
6
5

+3VACC

+3VS

7 8

47OHM

5 6

47OHM

3 4

47OHM

1 2

47OHM

1 2

SP3004 R0402

1 2

SP3005 R0402

1 2

SP3006 R0402

1 2

SP3007 R0402

T3009

SPI_HOLD#_IO3_R

1 2

R3079 0Ohm@

SCE#
SCK
SI
SO

+3VA_EC_SPI

R1.2 2012/11/28
follow Intel design guide

12

R3070
1KOhm

1 2

ROM_HD#_S

SCLK_S

SI_S

4

LAD0

RN3004D

LAD1

RN3004C

LAD2

RN3004B

LAD3

RN3004A

1

eDP_ON#_EC

SPI_WP_IO2_R

SCLCDP_EC_R

R1.2 2012/11/08
cost dwon 0ohm
R1.2 2012/11/28
change back to 0ohm

1 2

R3073 0Ohm

R3030 15Ohm

R3067 15Ohm

4

U3001

3

VBAT

127

VSTBY(PLL)

121

VSTBY5

114

VSTBY4

92

VSTBY3

50

VSTBY2

26

VSTBY1

74

AVCC

11

VCC

10

LAD0/GPM0

9

LAD1/GPM1

8

LAD2/GPM2

7

LAD3/GPM3

13

LPCCLK/GPM4

6

LFRAME#/GPM5

22

LPCRST#/GPD2

5

SERIRQ/GPM6

15

ECSMI#/GPD4

23

ECSCI#/GPD3

126

GA20/GPB5

4

KBRST#/GPB6

14

WRST#

58

KSI0/STB#

59

KSI1/AFD#

60

KSI2/INIT#

61

KSI3/SLIN#

62

KSI4

63

KSI5

64

KSI6

65

KSI7

36

KSO0/PD0

37

KSO1/PD1

38

KSO2/PD2

39

KSO3/PD3

40

KSO4/PD4

41

KSO5/PD5

42

KSO6/PD6

43

KSO7/PD7

44

KSO8/ACK#

45

KSO9/BUSY

46

KSO10/PE

51

KSO11/ERR#

52

KSO12/SLCT

53

KSO13

54

KSO14

55

KSO15

119

CRX0/GPC0

123

CTX0/TMA0/GPB2

85

PS2CLK0/TMB0/CE C/GPF0

86

PS2DAT0/TMB1/GPF1

87

PS2CLK1/DTR0#/ GPF2

88

PS2DAT1/RTS0#/GPF3

89

PS2CLK2/GPF4

90

PS2DAT2/GPF5

110

SMCLK0/GPB3

111

SMDAT0/GPB4

115

SMCLK1/GPC1

116

SMDAT1/GPC2

117

SMCLK2/PECI/GPF 6

118

SMDAT2/PECIRQT#/GPF7

81

DAC5/RIG0#/GPJ5

80

DAC4/DCD0#/GPJ4

79

DAC3/TACH1B/GPJ3

78

DAC2/TACH0B/GPJ2

77

HDIO3/GPJ1

76

TACH2/HDIO2/GPJ0

128

CK32K/GPJ6

2

CK32KE/GPJ7

101

FSCE#

105

FSCK

102

FMOSI

103

FMISO

IT8528E/AX

06V380000016

RING#/PWRFAIL#/

PWUREQ#/BBO/SMCL K2ALT/GPC7

FDIO2/DTR1#/SBUSY/G PG1/ID7

CTX1/SOUT1/GPH2/SMDAT3/ID2

FDIO3
SCK
SI

CRX1/SIN1/SMCLK3 /GPH1/ID1

3

+3VA_EC

+3VA_EC 28,47

+3VS

+3VS 16,17,20,21,22,23,25,26,27,28,33,37,38,39,40,41,43,47,48,49,53,55,60,63,65,66,91,92

+3VSUS

+3VSUS 4,22,23,27,28,33,43,61,81,92

+3VA

+3VA 20,27,63,65,81,88,93

R1.2 2012/11/08

R3075 0Ohm

SP3003

1 2

1

T3008

RF_ON_R
FDIO2

1

T3006

FDIO3

1

T3003

1 2

R3056 0Ohm

1 2

R3057 0Ohm

1 2

R3058 0Ohm

1 2

R3059 0Ohm

GND
GND

EC_AGND

cost dwon 0ohm

1 2

SP3013 R0402

1 2

SP3021 R0402

1 2

SP3017 R0402

1 2

SP3018 R0402

1 2

@

R0402

ADC0/GPI0
ADC1/GPI1
ADC2/GPI2
ADC3/GPI3

ADC4/GPI4
ADC5/DCD1#/GPI5
ADC6/DSR1#/GPI6
ADC7/CTS1#/GPI7

PWM0/GPA0
PWM1/GPA1
PWM2/GPA2
PWM3/GPA3
PWM4/GPA4

PWM5/GPA5
PWM6/SSCK/GP A6
PWM7/RIG1#/ GPA7

RXD/SIN0/GPB0

TXD/SOUT0/GPB1

CK32KOUT/LPCRST#/GPB7

KSO16/SMOSI/GPC3

TMRI0/GPC4

KSO17/SMISO/GPC5

TMRI1/GPC6

RI1#/GPD0
RI2#/GPD1

GINT/CTS0#/GPD5

TACH0A/GPD6

TACH1A/TMA1/GPD7

L80HLAT/BAO/GPE0

EGAD/GPE1

EGCS#/GPE2
EGCLK/GPE3

PWRSW/GP E4

RTS1#/GPE5
LPCPD#/GPE6
L80LLAT/GPE7

SSCE1#/FSCE1 #/GPG0

SSCE0#/GPG2

FDIO3/DSR0#/GP G6

CLKRUN#/GPH0/ID0

HSCE#/GPH3/ID3

HSCK/GPH4/ID4
HMISO/GPH5/ID5
HMOSI/GPH6/ID6

VCORE

VSS1

VSS2
VSS3
VSS4
VSS5
VSS6

AVSS

66
67

SUS_PWRGD_R

68

ALL_SYSTEM_PWRGD_R

69

VRM_PWRGD_R

70
71

SLP_SUS#_R

72
73

24
25
28
29
30
31
32
34

108
109
112

56

KSO16

120
57

KSO17

124
16

18
21
33
47

FAN0_TACH

48

19

VSUS_ON_EC

82
83
84
125
35
17
20

LAN_WAKE#

106
107
100
104

93

EN_POC_PWR

94
95
96

HSPI_CS

97

HSPI_CLK

98

HSPI_SO

99

HSPI_SI

R1.2 2012/11/08
cost dwon 0ohm
R1.2 2012/11/28
change to 33ohm for Intel check list
R1.2 2012/12/07
R3056~R3059 are replaced by SP3014, SP3015, SP3019, SP3020
R1.2 2012/12/17
SP3014, SP3015, SP3019, SP3020 are replaced by 0ohm

1

C3008 0.1UF/16V

1 2

12
27
49
91
113
122

75

Cload=12.5PF
place close to EC

non-Share ROM

+3VA_EC_SPI

R3013

3.3KOhm

1 2

U3002

@

SCE# SCE#_nonS
SO SO_nonS ROM_HD#_nonS

12

R3068 0Ohm@
R3031 15Ohm

@

1
2
3

ROM_WP#_nonS SCK_nonS

4

PM25LD010C-SCE

GND

3

SLP_SUS# 22
WLAN_WAKE# 55

CHGCB0 61

USBP2_EN 61

PCH_SPICS1# 21,28
PCH_SPICLK 21,28
PCH_SPISO 21,28
PCH_SPISI 21,28

+3VA_EC +3VA_EC_SPI

1

2

1 2

R3039 0Ohm

8

CE#

VCC

7

SO

HOLD#

6

WP#

SCK

5

SIO

GND

(128KB)

@

AD_IINP 88
SUS_PWRGD 81,92
ALL_SYSTEM_PWRGD 92
VRM_PWRGD 80,92

THERM_ALERT#_EC 74

VR_IMON 80

PWR_BLUE_LED# 65,66
CHG_LED_BLUE# 66
BAT_ORG_LED# 66

PWR_AMBER_LED# 65,66

FB_CLAMP_TGL_REQ# 74

USBP0_EN 61
EC_SPKR 41

LCD_EC_PWM 37

LAN_PWR_ON# 33

BT_ON_EC 55

PM_RSMRST# 22

KSO16 48

AC_IN_OC 74,88,90

KSO17 48

BAT1_IN_OC# 90

ME_AC_PRESENT 22

PM_SUSB# 22

PM_SUSC# 22

PM_PWROK 9,22,92

FAN0_TACH 49
USBP1_EN 61

VSUS_ON 63,81,91,93

SUSC_EC# 63,91
SUSB_EC# 22,23,63,91,92

CPU_VRON 80

PWR_SW#_M 65
RF_DET# 55

LID_SW# 37,65

D3001

@

3

0.8V/0.2mA

07V030000001

+3VA_EC_SPI

R3001

3.3KOhm

1 2

@

T3010

T3011

mSATA_PWR_ON#
LAN_PWR_ON#
AUD_PWR_ON#
CAMERA_PWR_ON#
ODD_PWR_ON#

12

C3010

0.1UF/16V

@

@
@

2

1

1

R301615Ohm
R302315Ohm

AC_IN_OC# 90

M_VREF 83

R3074 0Ohm

+3VA_EC

12

12

C3002

C3001

10UF/10V

0.1UF/16V

GND

SP3001

1 2

R0603

EC_AGND

GND

For PU / PD

+3VA_EC

10KOhm

1 2

R3062

1 2

R3004 47KOhm

1 2

R3025 10KOhm

1 2

RN3001A

3 4

RN3001B

+3VS

7 8

RN3001D

5 6

RN3001C

1 2

R3055 10KOhm

PM_SUSB#
PM_SUSC#

CPU_VRON

PCH_FLASH_DESCRIPTOR

PM_RSMRST#

AC_IN_OC is pulled high at power

VSUS_ON

R3008 100KOHM

+3VSUS

R3053 100KOHM@

+3VA_EC

R3054 10KOhm

SCK

SISI_nonS

2

AC_IN_OC

@

BAT1_IN_OC#

PWR_SW#_M
SMB0_CLK

4.7KOHM

SMB0_DAT

4.7KOHM

4.7KOHM

4.7KOHM

THERM_ALERT#_EC

1 2

R3006 100KOHM

1 2

R3007 100KOHM

1 2

R3009 100KOHM

1 2

R3076 100KOHM

1 2

R3011 10KOhm

1 2

12

1 2

@

VSUS_ON Default Pull High to +3VSUS

BU2/RD3

BU2/RD3

BU2/RD3

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

12

C3003

0.1UF/16V

SMB1_DAT
SMB1_CLK

VSUS_ON

VSUS_ON

VA70_HW

VA70_HW

VA70_HW

+3VA_EC

12

C3004

10UF/10V

+3VS

12

C3006

0.1UF/16V

R1.2 2012/11/08
follow MA50

+3VS

1 2

RN3002A

3 4

RN3002B

3 4

RN3003B

1 2

RN3003A

GND

+3VS

1 2

R3017 10KOhm

1 2

R3018 10KOhm

1 2

R3060 10KOhm

1 2

R3066 10KOhm

+3VA_EC

1 2

R3038 10KOhm

R3061 10KOhm

R3064 10KOhm

R3063 10KOhm

+3VSUS

R3020 10KOhm

R3065 10KOhm @

+5VSUS

R3014 47KOhm

R3027 47KOhm

+5VA

R3015 47KOhm

R3022 47KOhm

Title :

Title :

Title :

ITE8528E

ITE8528E

ITE8528E

Engineer:

Wing_Cheng

Engineer:

Wing_Cheng

Engineer:

Wing_Cheng

30 96Friday, January 18, 2013

30 96Friday, January 18, 2013

30 96Friday, January 18, 2013

L3001

1kOhm/100Mhz

1 2

1 2

4.7KOHM

4.7KOHM

4.7KOHM

4.7KOHM

1 2

1 2

@

1 2

1 2

1 2

@

@

@

@

@

SP3002

R0603

12

12

12

12

1

+3VA_EC+3VA

21

12

C3005

0.1UF/16V

+3VACC

12

C3007

0.1UF/16V

EC_AGND

TP_CLK
TP_DAT
SUSB_EC#
SUSC_EC#

A20GATE

RCIN#

FAN0_TACH

FB_CLAMP_TGL_REQ#

WLAN_WAKE#

IOAC_EN

RF_DET#

RF_DET#

PM_PWRBTN#

LAN_PWR_ON#

PWR_BLUE_LED#

PWR_AMBER_LED#

BAT_ORG_LED#

CHG_LED_BLUE#

Rev

Rev

Rev

1.0

1.0

1.0

1

R1.2 2012/11/06

工工工工工工

T3014

1

T3015

1

T3016

1

R1.2 2012/12/05
R3065 changed to @

R1.2 2012/11/30
cost down

5

4

3

2

1

Close to LAN chip withi n 250mils

PCIE_RXP3_L OM

PCIE_RXN3_LOM

D D

BUF_PLT_RST#

PCIE_WAKE# _LAN

XTALO

C C

12

C3315 0.1UF/10V

C3314 0.1UF/10V

PCIE_TXP3
PCIE_TXN3

CLK_PCIE_LA N
CLK_PCIE_LA N#

+VDD1.2_LAN

12

C3301

0.1UF/10V

Frank
0503 LAN_LPWR is not defined GPIO in PCH .

1 2

R3312 4.7KOhm@

1 2

R3311 4.7KOhm

R3301

1 2

200Ohm

R1.1
change value for -R test repor t

12

VDDC LX

12

C3308

10UF/6.3V

+VDD33_LOM

X3301 25MHZ

1 3

2

4

C3309
15PF/50V

1AV20000000 5

PCIE_RXP3_L AN 24

PCIE_RXN3_LAN 24

PCIE_TXP3_L AN 24
PCIE_TXN3_LAN 24

CLK_PCIE_LA N 21
CLK_PCIE_LA N# 21

L3304

4.7UH

09V03000008 4

Irat=1.2A

XTALIXTALO_R

C3325
15PF/50V

1AV20000000 5

BUF_PLT_RST#23,30,40,43,47,53,55,70

R1.1 IOAC 10/31

4.7UF/6.3V

1

T3301

CLK_REQ4_LAN#21

+VDD33_LOM

SP3301

12

C3302

+VDD1.2_LAN

12

12

C3310

4.7UF/6.3V

R1.2 2012/10/29
pin 46~48 has been connected
together.

LED_BLINKINGn34

LED_LINKn34

R1.2 2012/11/08
cost dwon 0ohm

0Ohm@

12

LAN_LPWR_R

R3308

1 2

SP3302 R0402

PCIE_WAKE# _LAN

VDDC

1 2

12

C3316

0.1UF/10V

+VDD1.2_LAN

SR_VDD

LX
XTALI

NB_R0603_32MIL_ SMALL

C3307

0.1UF/10V

U3301

1

LOW_PWR

2

PERST#

3

CLKREQ#

4

WAKE#

5

MODE

6

VDDC1

7

VREGPNP_CTL

8

SR_VFB

9

SR_VDD

10

SR_VDDP

11

SR_LX

12

XTALI

BCM57780A0KMLG

02V0H0000001

XTALO
XTALVDD

12

12

C3304

0.1UF/10V

+VDD33_LOM

EECLK

49

48

47

46

45

44

GND

EECLK

LINKLED#

SPD100LED#

TRAFFICLED#

SPD1000LED#

XTALO13XTALVDDH14VDDC215PCIE_TXD_N16PCIE_TXD_P17PCIE_PLLVDDL118PCIE_REFCLK_N19PCIE_REFCLK_P20PCIE_PLLVDDL221PCIE_RXD_P22PCIE_RXD_N23GPHY_PLLVDDL

VDDC

+VDD_LANPLL

PCIE_RXN3_LOM

PCIE_RXP3_LOM

0.1UF/10V

EEDAT

43

CLK_PCIE_LAN#

C3305

+3VS

VDDC

VDDO

42

41

VDDO

EEDATA

+VDD_LANPLL

CLK_PCIE_LAN

12

R3303
1KOhm

AVDDL

40

39

38

37

VDDC3

TRD3_P

TRD3_N

AVDDL3

AVDDH2
TRD2_N

TRD2_P

VMAIN_PRSNT

AVDDL2

TRD1_P
TRD1_N
AVDDH1
TRD0_N

TRD0_P
AVDDL1

RDAC

BIASVDDH

24

+VDD_GPHYPLL

PCIE_TXN3

PCIE_TXP3

L_TRDP3 34
L_TRDN3 34

R1.0 chnge VP P/N.

36

AVDDH

35
34
33

AVDDL

32
31
30

AVDDH

29
28
27

AVDDL

26

RDAC

25

BIASVDD

+VDD33_LOM

R3305
1KOhm

1 2

EECLK

@

EEDAT

R3307
1KOhm

1 2

+VDD1.2_LAN

L3301

+VDD_GPHYPLL

12

C3321

C3320

4.7UF/6.3V

0.1UF/10V

+VDD_LANPLL

12

C3322

C3323

0.1UF/10V

4.7UF/6.3V

AVDDL

12

C3317

C3318

4.7UF/6.3V

0.1UF/10V

L_TRDN2 34
L_TRDP2 34

L_TRDP1 34
L_TRDN1 34

L_TRDN0 34
L_TRDP0 34

1 2

R3302

1.24KOhm

10V22000019 8

+VDD33_LOM

12

R3304
1KOhm

1 2

8
7
6
5

AT24C02C-XHM-T

R3306

05V02000000 3

1KOhm

@

1 2

C3303

0.1UF/10V

@

U3302

1

A0

VCC

2

A1

WP

3

A2

SCL

4

GND

SDA

@

AVDDH

C3313

0.1UF/10V

XTALVDD

C3324

0.1UF/10V

BIASVDD

C3319

0.1UF/10V

12

12

12

C3312

0.1UF/10V

21

12

1KOhm/100Mhz

09V01000003 8

+VDD1.2_LAN

L3307

21

1KOhm/100Mhz

12

09V01000003 8

R1.2-26 EMI

12

12

+VDD1.2_LAN

L3306

21

1.5KOhm/100Mhz

09V01000003 9

+VDD33_LOM

L3302

21

1KOhm/100Mhz

09V01000003 8

+VDD33_LOM

L3303

21

1KOhm/100Mhz

09V01000003 8

+VDD33_LOM

L3305

21

1KOhm/100Mhz

09V01000003 8

BG1-HW RD Div.2-NB RD Dept.5

BG1-HW RD Div.2-NB RD Dept.5

BG1-HW RD Div.2-NB RD Dept.5

Size Project Name

Size Project Name

Size Project Name

D

D

D

Date: Sheet of

Date: Sheet of

Date: Sheet of

R1.1 10/31 EMI CHANGE

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

VA70_HW

VA70_HW

VA70_HW

LAN_RTL8411

LAN_RTL8411

LAN_RTL8411

Wing_Cheng

Wing_Cheng

Wing_Cheng

33 9 6Friday, January 18, 2013

33 9 6Friday, January 18, 2013

33 9 6Friday, January 18, 2013

Rev

Rev

Rev

1.0

1.0

1.0

B B

R1.2 2012/10/29

+3VSUS

+12VSUS

3

1

G

2

/TP1_LAN

3

option changed from /ABCT

R3315

1 2

0Ohm

10V44000000 1
@

S

D

3

2

SI2304BDS-T1-G E3

G

1

Q3301

/TP1_LAN

R3314
100KOhm

/TP1_LAN

1 2

D

Q3302

12

2N7002

S

C3355
1UF/25V

1AV30000003 1

/TP1_LAN

R3313
10KOhm

1

G

0Ohm

PCIE_WAKE# _LAN

2

S

R1.1 IOAC 10/31

12

+VDD33_LOM

12

C3306

12

0.1UF/10V

C3311

4.7UF/6.3V

1

R1.1 10/31 EMI CHANGE

L3308

21

1.5KOhm/100Mhz

09V01000003 9

PCIE_WAKE#22,53

3

D

2N7002
Q3303

@

R3309

2

For LAN power control on S5 state

LAN_PWR_ON#30

A A

5

4

5

4

3

2

1

FAE suggestion 1003

Co-Layout

LU3401

D D

C C

EMI Req

D3401

AZ2025-01H.R7G

1 2

12

12

12

@

C34041 0PF/50V

C34051 0PF/50V

C34061 0PF/50V

1 2

R3402 0Ohm

LAN_GND

R1.2 2012/11/08
cost dwon 0ohm

R1.2 2012/12/04
change short pin size

L_TRDP033

L_TRDN033

L_TRDP133

L_TRDN133

L_TRDP233

L_TRDN23 3

L_TRDP333

L_TRDN33 3

L_TXP_T

L_TXN_T

L_RXP_T

L_RXN_T

L_TRLP2_T

L_TRLM2_T

L_TRLP3_T

L_TRLM3_T

+VDD33_LOM

12

SP3401
NB_R0402_ 20MIL_SMALL

C3410

12

0.1UF/16V

C3409

12

0.1UF/16V

C3408

12

0.1UF/16V

C3407

12

0.1UF/16V

2

TD1+

1

TCT1

3

TD1-

5

TD2+

4

TCT2

6

TD2-

8

TD3+

7

TCT3

9

TD3-

11

TD4+

10

TCT4

12

TD4-

09V12000000 3 GS T5009

1 2

R3405510Ohm

470PF/50V

C3402

MCT1

MCT2

MCT3

MCT4

@

LAN_GND

MX1+

MX1-

MX2+

MX2-

MX3+

MX3-

MX4+

MX4-

12

23

24

22

20

21

19

17

18

16

14

15

13

LED_LINKn

L_TXP

L_CMT0

L_TXN

L_RXP

L_CMT1

L_RXN

L_TRLP2

L_CMT2

L_TRLM2

L_TRLP3

L_CMT3

L_TRLM3

1 2

R3401 7 5Ohm

EMI suggest to change 0805 size 0921

1500PF/2KV

LED_LINKn 33

C3403

12

LAN_GND

B B

9

10

G

1

+VDD33_LOM

R1.2 2012/11/08
cost dwon 0ohm

R1.2 2012/12/04
change short pin size

A A

5

SP3402
NB_R0402_ 20MIL_SMALL

1 2

4

L_TXP
L_TXN

L_RXP
L_TRLP2
L_TRLM2

L_RXN
L_TRLP3
L_TRLM3

2
3
4
5
6
7
8

Y

CON3401

11

12

12V23GBSD009

LAN_GND

LAN_GND

1314

LAN_JACK_8P

P_GND1P_GND2

1 2

R3404 510Ohm

@

3

12

LAN_GND

C3401
470PF/50V

LED_BLINKINGn 33

Close Connector

<Variant Name>

<Variant Name>

<Variant Name>

RJ45/ RJ11

RJ45/ RJ11

RJ45/ RJ11

Title :

Title :

Title :

Engineer:

Wing_Cheng

Engineer:

Wing_Cheng

Engineer:

BG1-CSC-HW R&D Dept.5

BG1-CSC-HW R&D Dept.5

BG1-CSC-HW R&D Dept.5

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

VA70_HW

VA70_HW

VA70_HW

Wing_Cheng

34 96Friday, January 18, 2013

34 96Friday, January 18, 2013

1

34 96Friday, January 18, 2013

Rev

Rev

Rev

1.0

1.0

1.0

5

R1.2 2012/10/29
All components options changed from /non_FDI

R1.2 2012/12/06
remove U3501 for GDDR5

D D

C C

B B

4

3

2

1

A A

5

4

3

2

<Variant Name>

<Variant Name>

<Variant Name>

BG1-CSC-HW R&D Dept.5

BG1-CSC-HW R&D Dept.5

BG1-CSC-HW R&D Dept.5

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

VA70_HW

VA70_HW

VA70_HW

DP to VGA

DP to VGA

DP to VGA

Wing_Cheng

Wing_Cheng

Wing_Cheng

35 96Friday, January 18, 2013

35 96Friday, January 18, 2013

35 96Friday, January 18, 2013

Rev

Rev

Rev

1.0

1.0

1.0

5

D D

C C

B B

4

3

2

1

Initial Code EEPROM

A A

LVDS CONN

LVDS CONN

LVDS CONN

Title :

Title :

Title :

Wing_Cheng

Wing_Cheng

Wing_Cheng

Engineer:

Engineer:

1

Engineer:

VA70_HW

VA70_HW

VA70_HW

Rev

Rev

Rev

1.0

1.0

1.0

36 96Friday, January 18, 2013

36 96Friday, January 18, 2013

36 96Friday, January 18, 2013

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

A

LVDS

1 1

CH A

B

C

D

E

LVDS/eDP control signal

共共共共共共共共

LVDS/EDP

pin LVDS/EDP

LCD_BACKOFF

LCD_VDD_EN

LCD_BL_PWM

LCD_BACKEN_PCH 23

LCD_VDD_EN_PCH 23

LCD_BL_PWM_PC H 23

共共共共共共共共

pin

CH B

2 2

R1.2 2012/11/29

3 3

DP_AUXP

eDP

+EDP_VCC

12

R3724
0Ohm

U3701

1

2

80Ohm/100Mhz

2 1

Irat=2A

OUT

GND

EN3DSG

G5244T11U

L3701

C3708

@

0.1UF/25V

C3719
39PF/50V

1AV20000001 4
@

+3VS

IN

12

5

4

C3709

0.1UF/25V

C3710

0.1UF/10V

1AV20000002 4

+EDP_VCC_R

12

A

AC_INV

C3721
39PF/50V

1AV20000001 4

@

C3720
39PF/50V

1AV20000001 4

@

R3701

150Ohm

+EDP_VCC_OUT

LCD_VDD_EN

R3713
100KOhm

12

4 4

5 5

C3701

1 2

4.7UF/6.3V

+AC_BAT_SYS

+EDP_VCC

12

+EDP_VCC_OUT

+3VS

C3702
1UF/6.3V

1AV20000003 8

DP_AUXN

DP_TXP0
DP_TXN0

DP_TXP1
DP_TXN1

R1.2 2012/10/29
option changed from /non_FDI
R1.2 2012/12/06
remove C3727~C3730 for GDDR5

@

C3726

SP3702

1 2

ANALOG

1 2

INT_MIC_AC_IN

C3716 0.1UF/10V
C3717 0.1UF/10V

C3722 0.1UF/10V
C3718 0.1UF/10V

C3724 0.1UF/10V
C3723 0.1UF/10V

HPD low active

D3703

1 2

AZ2025-01H.R7G

12

10PF/50V

R0402

D3702

AZ2025-01H.R7G @

B

1 2
1 2

1 2
1 2

1 2
1 2

CPU

@

A_GND

From CPU

EDP_AUXP 4

EDP_AUXN 4

EDP_TXP0 4

EDP_TXN0 4

EDP_TXP1 4

EDP_TXN1 4

HPD

+VCCIO_OUT

12

EDP_HPD#4

3

D

S

2

R3719
10KOhm

G

Q3701
2N7002

1

R3720
100KOhm

DP_HPD_C

12

R1.2 2012/11/15
Changing to 30pins+10pins

R1.2 2012/11/26
prevent +EDP_VCC voltage drop
R1.2 2012/11/28
SCL, SDA changed to +EDP_VCC
R1.2 2012/11/30
CON3704 pin8 chaged to NC

+3V_CMOS

L3705
120Ohm

21

Irat=500mA

12

C3733

0.1UF/16V

INT_MIC_AC_IN41

R1.2 2012/11/19
Pin mapping changed

+EDP_VCC

1

T3701

C

+3V_CMOS_C
USBP8-_E
USBP8+_E

ANALOG
INT_MIC_AC_IN

DP_TXN1
DP_TXP1

DP_TXN0
DP_TXP0

DP_AUXP
DP_AUXN

BIST

DP_HPD_C
BACK_EN_C
LCD_BL_PWM_C

AC_INV
AC_INV
AC_INV
AC_INV

P/N changed to 12V37GBSM011
R1.2 2012/11/29
option changed from N/A
R1.2 2012/12/06
remove CON3704 for GDDR5

31

CON3703

1

1

2

2

3

SIDE1

3

4

4

5

5

6

33

6

SIDE3

7

7

8

8

9

9

10

10

11

11

12

12

13

34

13

SIDE4

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

35

26

SIDE5

27

27

28

28

29

29

30

30

SIDE2

WTOB_CON_30P

32

12V37GBSM007

R1.2 2012/11/20
P/N changed

USB Camera

D

+EDP_VCC

R3704
10KOhm

1 2

BACK_EN_C

12

C3706

100PF/50V

@

LCD_BL_PWM_C

R1.3 2013/1/21

12

C3707

L3702 is changed to 0ohm

100PF/50V

+3V

+3VS

L3703

R3706 0Ohm

1 2

@

R3707

1 2

0Ohm

1kOhm/100Mhz

Irat=300mA@

L3702 0Ohm

12

D3704

1 2

RB751V-40

D3701

3

1V/0.1A

21

LCD_BL_PWM

+3V_CMOS

2

1

12

R3712
100KOhm

1 2

LCD_EC_PWM 30

R37030Ohm @

EDP_DISP_UTIL 4

USB_PN824

USB_PP824

LCD_BACKOFF# 30

LID_SW# 3 0,65

LCD_BACKOFF

C3732

RN3711A

1 2

23

3 4

RN3711B

@

22PF/50V
0Ohm

@

0Ohm

@

1 2

USBP8-_E

14

L3704
90Ohm/100Mhz

USBP8+_E

12

C3731

22PF/50V @

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

Size Projec t Name

Size Projec t Name

Size Projec t Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

E

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

VA70_HW

VA70_HW

VA70_HW

LVDS CONN

LVDS CONN

LVDS CONN

Wing_Cheng

Wing_Cheng

Wing_Cheng

37 96Monday, January 21, 2013

37 96Monday, January 21, 2013

37 96Monday, January 21, 2013

Rev

Rev

Rev

1.0

1.0

1.0

5

4

3

2

1

1 2

JP3801 SHORT_PIN

1 2

JP3802 SHORT_PIN

1 2

JP3803 SHORT_PIN

DDC2BD_5

HSYNC_CRT

VSYNC_CRT

DDC2BD_5

DDC2BC_5

+5VS_CRT

+5VS

12

12

R3806

2.2KOhm

34

U3801

3

GND

2

A

1

OE#

Vcc

74AHCT1G1 25GW

06V0300 00010

U3802

1

OE#

Vcc

2

A

3

GND

74AHCT1G1 25GW

06V0300 00010

DAC_R

DAC_G

DAC_B

D3804
RB751V-4 0

+5VS_CRT

4

Y

5

5

4

Y

12

R3807

2.2KOhm

HSYNC_CRT

VSYNC_CRT

DAC_R_PCH23

D D

R1.2 2012/10/29
option changed from /non_FDI

R1.2 2012/12/06
remove R3837, R3838 for GDDR5

R1.2 2012/10/29
option changed from /FDI

R1.2 2012/12/19
option changed from /non_RETINA

C C

DDC2BD_PCH2 3

DDC2BC_PCH2 3

B B

DAC_HSYNC_P CH23

DAC_VSYNC_ PCH2 3

R3833

1 2

0Ohm
R3834

1 2

0Ohm

R1.2 2012/10/29
option changed from /non_FDI_@

R1.2 2012/12/06
remove R3825, R3826, R3835, R3836 for GDDR5

1 2

R1.2 2012/10/29
option changed from /FDI

R1.2 2012/12/19
option changed from /non_RETINA

R3824 0O hm

1 2

R3823 0O hm

DAC_G_PC H23

DAC_B_PC H23

UM6K1N

DDC2BD

DDC2BC

DAC_HSYNC

DAC_VSYNC

+3VS

2

Q3801A

61

5

Q3801B
UM6K1N

V_RED_J

V_GREEN_ J

V_BLUE_ J

12

R3801
150Ohm

1%

DDC2BC_S

VSYNC

HSYNC

DDC2BD_S

12

R3802
150Ohm

1%

CON3801

16

15
10
14

9

13

8

12

7

11

6

17

D_SUB_15 P

12V10GB RD012

12

R3803
150Ohm

1%

C3801

10PF/50V

12

12

C3802

10PF/50V

CRT_IN#_EC_ CON

BLUE

GREEN

RED

C3803

10PF/50V

12

5

4

3

2

1

21

L3801 75Ohm/100 Mhz

09V0100 00050

21

L3802 75Ohm/100 Mhz

09V0100 00050

21

L3803 75Ohm/100 Mhz

09V0100 00050

1 2

R3814 0Ohm

R3804 0Ohm

R3805 0Ohm

R3815 0Ohm

1 2

R3822

0Ohm

12

12

12

12

C3804

10PF/50V

6

1

12

C3805

10PF/50V

+5VS

5

2

12

C3806

10PF/50V

C3807

12PF/50V

1 2

3 4

12

C3808

6.8PF/50 V

D3801
CM1293_0 4SO

@

12

C3809

6.8PF/50 V

RED

GREEN

BLUE

DDC2BD_S

HSYNC

VSYNC

DDC2BC_SDDC2BC_5

C3810

12PF/50V

1 2

The LC filter circuit(NV DSC only)
DDC:L=27nH,C=12PF
HSYNC/VSYNC:L=27nH,C=47PF
RGB:L=100nH,C=10PF

R1.2 2012/10/29
option changed from /non_FDI_@

R1.2 2012/12/06
remove R3825, R2826, R3835, R3836 for GDDR5

A A

5

4

3

HSYNC VSYNC

DDC2BC_S DDC2BD_S

CRT

CRT

CRT

Title :

Title :

Title :

Engineer:

Wing_Cheng

Engineer:

Wing_Cheng

Engineer:

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

VA70_HW

VA70_HW

VA70_HW

1

Wing_Cheng

38 9 6Friday, January 18, 2013

38 9 6Friday, January 18, 2013

38 9 6Friday, January 18, 2013

Rev

Rev

Rev

1.0

1.0

1.0

5

4

3

2

1

1 2

HDMI_CLKP_PCH4

HDMI_CLKN_PCH4

HDMI_TXP0_PCH4

HDMI_TXN0_PCH4

HDMI_TXP1_PCH4

HDMI_TXN1_PCH4

HDMI_TXP2_PCH4

D D

R1.2 2012/12/03
L3901~L3904 are changed to 90ohm for layout to change footpring
0ohm are removed cause they can't co-lay with new footprint
R1.2 2012/12/04
L3903, L3902 pin mapping changed
Add RN3901~RN3904 for layout
R1.2 2012/12/11
changed to 45ohm
R1.3 2013/1/15
changed to 67ohm
R1.3 2013/1/16
L3901~L3904 are swaped

C C

HDMI_CLKP HDMI_CLKP_CON

RN3905,RN3906
Intel design guide:2.2K ohm / UMA
NV reference schematics:4.7K o hm /DGPUO

B B

HDMI_DDC_CLK_PCH23
HDMI_DDC_DATA_PCH23

HDMI_HPD_PCH23

A A

1 2

3 4

3 4

1 2

HDMI_TXN2_PCH4

@

0Ohm

1 4

2 3

@

0Ohm

@

0Ohm

14

23

@

0Ohm

HDMI_TXN0_CON

RN3903A

L3904
67ohm

N/A

EMI suggestion 0922

09V090000007

RN3903B

RN3904B

EMI suggestion 0922

L3903
67ohm

N/A
09V090000007

HDMI_CLKN_CONHDMI_CLKN HDMI_TXN1

RN3904A

C3908 0.1UF/16V

1 2

C3910 0.1UF/16V

1 2

C3909 0.1UF/16V

1 2

C3911 0.1UF/16V

1 2

C3904 0.1UF/16V

1 2

C3905 0.1UF/16V

1 2

C3906 0.1UF/16V

1 2

C3907 0.1UF/16V

Close to connector and do T routing

+5VS

HDMI_TXN2

HDMI_TXP2

HDMI_TXP1

+12VS

1

G

2

S

+5VS

NDS351AN_NL

Q3901

+3VS

RN3905B

2.2KOhm

3 4

1 2

HDMI_SCL_PCH HDMI_SCL

HDMI_HPD

3

2

+3VS

D3901

1.25V/0.15A

1

R3902 4.7KOhm

12

R3918
10KOhm

3

D

RN3905A

2.2KOhm

1 2

F3901

0.35A/6V

0.1UF/25V

+3VS

2

Q3904A
UM6K1N

HDMI_HPD_CON

12

C3901

61

+3VS

5

R3914680OHM

1 2

1 2

+5VS_HDMI

1 2

RN3906A

2.2KOhm

34

Q3904B
UM6K1N

R3917680OHM

R3913680OHM

1 2

1

G

GND

R3911680OHM

1 2

3

2

3 4

1 2

1

1 2

R3912680OHM

R3916680OHM

1 2

1 2

D

Q3902

2N7002

S

N/A

@

1 2

0Ohm

1 4

@

3 4

0Ohm

@

0Ohm

14

@

0Ohm

3

D3902
1V/0.1A

2

RN3906B

2.2KOhm

3 4

C3903

10PF/50V

@

HDMI_CLKP

HDMI_CLKN

HDMI_TXP0

HDMI_TXN0

HDMI_TXP1

HDMI_TXN1

HDMI_TXP2

HDMI_TXN2

R3915680OHM

R3910680OHM

R3910,R3911,R3912,R3913,R3914,R3915,R3916,R3917
Intel design guide : 680ohm /UMA

1 2

1 2

NV reference schematics : 499ohm /DGPUO

EMI solution

R3922 220Ohm@

R3923 220Ohm@

R3924 220Ohm@

R3925 220Ohm@

1 2

1 2

1 2

1 2

10V220000339

10V220000339

10V220000339

10V220000339

L3901
67ohm

N/A

2 3

09V090000007

RN3902B

23

L3902

67ohm

N/A
09V090000007

RN3902A

12

12

RN3901A

RN3901B

C3902
10PF/50V

@

HDMI_CLKP

HDMI_TXN2_CONHDMI_TXN0

HDMI_TXP0

EMI suggestion 0922

HDMI_TXP2_CONHDMI_TXP0_CONHDMI_TXP0

HDMI_TXP1_CON

EMI suggestion 0922

HDMI_TXN1_CON

HDMI_SDAHDMI_SDA_PCH

R1.0 0106
HDMI HPD Cost Reduced Level Shifter Design Recommendation

HDMI_SCL & HDMI_SDA : no via , trace length should be as short as possible

HDMI_TXP2_CON
HDMI_TXN2_CON

HDMI_TXN0_CON

HDMI_SCL

HDMI_CLKN

HDMI_TXN0

HDMI_TXN1HDMI_TXP1

HDMI_TXN2HDMI_TXP2

12V12GBRD001

20

22

HDMI_CON_19P

P_GND1

P_GND3

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

P_GND2

P_GND4

CON3901

21

23

HDMI_TXP1_CON
HDMI_TXN1_CONHDMI_TXP0_CON

HDMI_CLKP_CON
HDMI_CLKN_CON

HDMI_SDA

+5VS_HDMIHDMI_HPD_CON

HDMI_CLKP_CON

1KOhm

12

@

@

R3920

HDMI_CLKN_CON

12

R3921 1KOhm

EMI solution

Title :

Title :

Title :

HDMI

HDMI

HDMI

Wing_Cheng

Wing_Cheng

Wing_Cheng

Engineer:

Engineer:

VA70_HW

VA70_HW

VA70_HW

Engineer:

1

Rev

Rev

Rev

1.0

1.0

1.0

39 96Friday, January 18, 2013

39 96Friday, January 18, 2013

39 96Friday, January 18, 2013

BG1-HW RD Div.2-NB RD Dept.5

BG1-HW RD Div.2-NB RD Dept.5

BG1-HW RD Div.2-NB RD Dept.5

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

5

4

3

2

1

From System's PCIE interface

C4016

C4006

PCIE_TXP1_CR

PCIE_TXN1_CR
CLK_PCIE_CR_PCH
CLK_PCIE_CR#_PCH

1 2

1 2

0.1UF/16V

C4007

12

12

GNDGND

PCIE_TXP1_CR

PCIE_TXN1_CR

PCIE_RXP1_CR

PCIE_RXN1_CR

CLK_PCIE_CR_PCH

CLK_PCIE_CR#_PCH

CLK_REQ1_CR#

BUF_PLT_RST#

GND

GND

RES 6.2K OHM 1/16W (0402) 1%

AV12
HSOP_R
HSON_R

DV12

+3VS

C4008

0.1UF/16V

C4019 0.1UF/16V

1 2

R4019

10V220000088

U4000

1

HSIP

2

HSIN

3

REFCLKP

4

REFCLKN

5

AV12

6

HSOP

7

HSON

8

GND1

9

DV12

10

Card1_3V3

11

3V3_IN1

12

Card2_3V3

RTS5209-GR

MS_CLK

12

1%

+3VS

47

48

RREF

xD_CD#13DV33_1814GND215SP116SP217SP318SP419SD_D120SD_D021SD_CLK22SD_CMD23SD_D3

XD_CD#

DV33_18

C40204.7UF/6.3V

@

1 2

1 2

GND

+3VS16,17,20,21,22,23,25,26,27,28,30,33,37,38,39,41,43,47,48,49,53,55,60,63,65, 66,91,92

R1.2 2012/11/08
cost dwon 0ohm

C4013

10PF/50V

C4014

10PF/50V

T4009

T4005

T4008

1

1

CLK_REQ1_CR#

BUF_PLT_RST#

43

44

45

46

EECS

EEDO

3V3_IN2

PERST#

CLK_REQ#

SP1

SP2

SP3

C40240.1UF/16V

PCIE_TXP1_CR24

PCIE_TXN1_CR24

PCIE_RXP1_CR24

D D

C C

PCIE_RXP1_CR
PCIE_RXN1_CR

+3V_CARD

B B

PCIE_RXN1_CR24

CLK_PCIE_CR_PCH21

CLK_PCIE_CR#_PCH21

CLK_REQ1_CR#21

BUF_PLT_RST#23,30,33,43,47,53,55,70

C4012 0.1UF/16V

1 2
1 2

0.1UF/16V

C4009

trace width 40mils

1 2

AV12

R4001

0Ohm

@

4.7UF/6.3V

GND

GND

10UF/10V

DV12

Remove Serial Flash

Reserve for BIOS boot function

+3VS

SP4001

1 2

12

@

1 2

SP4002 R0402

12

@

T4010

SP14

SP15

1

1

SD_CD#

MS_INS#

38

39

40

41

42

SP1437SP15

EESK

SD_CD#

MS_INS#

SP13

GPIO/EEDI

SP12
SP11
SP10

DV12_S

GND3

SD_D2

24

Part number:020J-007D000

SD_D1

SD_D0

SD_CLK

SD_CMD

SD_D3

SP4

GND

1

CON4001

SD_D2

SD_D3

SD_CMD
MS_D3
MS_INS#

MS_D2

MS_D0

MS_D1
MS_BS

SD_CD#
SD_D0
SD_D1
SD_WP

GND

C4023

10UF/10V

+3V_CARD

12

GND

Pin Name

SP1

SP2

SP3

SP4

SP5

SP6

SP7

SP8

SP9

SP10

SP11

SP12

SP13

SP14

SP15

SD_CLK_RSD_CLK

4.7UF/6.3V

C4022 0. 1UF/16V

C4021

1 2

1 2

+3V_CARD

+3V_CARD

R0402

@

@

SP9
SP8
SP7
SP6
SP5

MS_CLK_R

12

C4011
10PF/50V

12

C4010
10PF/50V

36

SP13

35

SP12

34

SP11

33

SP10

32

SP9

31

SP8

30

SP7

29

SP6

28

SP5

27

DV12_S

26
25

SD_D2

P20

SD_DAT2

P19

MS_VSS(GND)2

P18

SD_DAT3/MMC_RSV

P17

MS_VCC

P16

MS_SCLK

P15

SD_CMD/MMC_CMD

P14

MS_DATA3

P13

MS_INS

P12

SD_VSS/MMC_VSS1

P11

MS_DATA2

P10

SD_VDD/MMC_VDD

P9

MS_SDIO/DATA0

P8

SD_CLK/MMC_CLK

P7

MS_DATA1

P6

MS_BS

P5

MS_VSS(GND)1

P4

SD_CD

P3

SD_DAT0/MMC_DAT

P2

SD_DAT1

P1

SD_WP

CARD_READER_40P

12V34GBSM002

GND

SD/MMC/MMC plus /MS/xD

12

C4002

0.1UF/16V

Close to connec tor

Description

SD_D7/XD_RDY

SD_D6/XD_RE#

SD_D5/XD_CE#

SD_D4/XD_WE#

MS_BS/XD_CLE

MS_D5/XD_ALE

MS_D1/XD_WP#

MS_D4/XD_D0

MS_D0/XD_D1

MS_D2/XD_D2

MS_D6/XD_D3

MS_D3/XD_D4

MS_D7/XD_D5

MS_CLK/XD_D6

SD_WP/XD_D7

SD_VSS/MMC_VSS2/GND_FOR_CD/WP

12

C4003

0.1UF/16V

4

NP_NC1

P_GND2

3

C4008 C4002 SD CARD CAP
C4003 MS CARD CAP
C4004 XD CARD CAP

12

C4004

0.1UF/16V

XD_GND2

XD_CD

XD_R/XD_B

XD_RE

XD_CE
XD_CLE
XD_ALE
XD_WE
XD_WP

XD_GND1

XD_D0

XD_D1

XD_D2

XD_D3

XD_D4

XD_D5

XD_D6

XD_D7

XD_VCC

NP_NC22P_GND1

P40
P39
P38
P37
P36
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26
P25
P24
P23
P22
P21

SP1 SD_D7 XD_RDY

SP2 SD_D6 XD_RE#

SP3 SD_D5 XD_CE#

SP4 SD_D4 XD_WE#

SP5 XD_CLEMS_BS

SP6 MS_D5 XD_ALE

SP7 XD_WP#MS_D1

SP8 MS_D4 XD_D 0

SP9 MS_D0 XD_D 1

SP10 MS_D2 XD_D2

SP11 MS_D6 XD_D3

SP12 MS_D3 XD_D4

SP13 MS_D7 XD_D5

SP14 XD_D6MS_CLK

SP15 XD_D7SD_WP

XD_CD#
XD_RDY
XD_RE#
XD_CE#
XD_CLE
XD_ALE
XD_WE#
XD_WP#

GNDGND

XD_D0
XD_D1
XD_D2
XD_D3
XD_D4
XD_D5
XD_D6
XD_D7

+3V_CARD

When EECS switch to be D3-Delink sideband signal, Serial Flash function is disabled.

A A

5

4

3

Share Pin

2

RTS5209

RTS5209

RTS5209

Title :

Title :

Title :

Engineer:

Engineer:

VA70_HW

VA70_HW

VA70_HW

Engineer:

1

Wing_Cheng

Wing_Cheng

Wing_Cheng

40 96Friday , January 18, 2013

40 96Friday , January 18, 2013

40 96Friday , January 18, 2013

BG1/CSC/HW5

BG1/CSC/HW5

BG1/CSC/HW5

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet

Date: Sheet of

Date: Sheet of

Rev

Rev

Rev

1.0

1.0

1.0

of

5

Intel 1.01 Design Guide update #440484
R1.3 use dual mosfet

D D

C C

B B

ACZ_SDOUT_AUD20

B4102 80Ohm/10 0Mhz

+5VS

B4104 80Ohm/10 0Mhz

+3VS

+1.5VS

@

1 2

R4109 0Ohm

D4101

SB_SPKR20

EC_SPKR30

1

2

1V/0.2A

1 2

R4108 0Ohm

@

JP4102

1 2

SHORTPIN

@

JP4101

1 2

SHORTPIN

@

JP4104

1 2

SHORTPIN

@

+12VS +12VS

@

5

Q4101B
UM6K1N

3 4

1 2

SP4103 R0402

R1.2 2012/11/08
cost dwon 0ohm

Moat

+5VS_AUDIO+5VS

21

vx_l0805_h43_smallIrat=2A

+5VS_AMP

21

vx_l0805_h43_smallIrat=2A

+3VS_DVDD

B4101

21

Moat

3

AVDD

B4107

21

@

B4108

21

+3VS_DVDD

12

12

C4126
10UF/10V

C4148

0.1UF/16V

1 2

PC_BEEP_R

R4103

47KOhm

PC_BEEP_R

A_GND

A_GND

HP Jack Detect
EXT MIC Detect

120Ohm

120Ohm

120Ohm

6 1

1 2

ACZ_SYNC_AUD20

SP4104 R0402

R1.2 2012/11/08
cost dwon 0ohm

>30 mil or shape

12

C4141
10UF/10V

ACZ_BCLK_AUD20

ACZ_SDIN0_AUD2 0

ACZ_RST#_AUD2 0,42

12

PC_BEEP_C PC_BEEP

C4114 1UF/6.3V

12

12

C4150

R4106

4.7KOhm

100PF/50V

HP_JD#61

MIC_EXT_JD#61

COMBO JACK MIC

@

UM6K1N

2

Q4101A

+3VS_DVDD

ACZ_SDOUT_AUD_R

ACZ_SYNC_AUD_R

A_GND

ACZ_SYNC_AUD_R

ACZ_SDOUT_AUD_R

MUTE_AMP#42

C4110

0.1UF/16V

1 2

@

1 2

R4105 22Ohm

1 2

C4159

22PF/50V

R4104 39.2K Ohm1%
R4101 20KO hm1%

R4102 20KO hm1%

ACZ_BCLK_AUD

C4120

22PF/50V

Placement near audio codec

+5VS_AMP

C4111

0.1UF/16V

ACZ_SDIN0_R

12

1 2
1 2

1 2

12

@

4

+5VS

+5VS 38,39,42,49,60,63,66,80,87,91

+3VS

+3VS 16,17,20,21,22,23,25,26,27,28 ,30,33,37,38,39,40 ,43,47,48,49,53,55 ,60,63,65,66,91,92

+5VS_AMP

Placement near audio codec

12

C4113
10UF/10V

C4115

0.1UF/16V

12

C4108

C4102

10UF/10V

1 2

U4101A

DIGITAL GND

1

DVDD

2

GPIO0/DMIC-DATA

3

GPIO1/DMIC-CLK

4

DVSS

5

SDATA-OUT

6

BCLK

7

LDO3-CAP

8

SDATA-IN

9

DVDD-IO

10

SYNC

11

RESETB

12

PCBEEP

12

C4123
10UF/10V

ALC3225-CG

02V0J000002 6

COMBO_MIC_IN_AC_E_ L
COMBO_MIC_IN_AC_E_ R

VREFOUT_A_E_L

VREFOUT_A_E_R

MIC2_VREFO

AUD_LDO_CAP

LDO2_CAP

0.1UF/16V

GPIO

H_SPKR-_M

H_SPKR+_M

44

45

46

47

48

49

PDB

GND

PVDD2

SPK-OUT-R+

RSPDIF-OUT/GPIO2

SenseA13SenseB14JDREF15MONO-OUT16MIC2-L(PORT-F-L)17MIC2-R(PORT-F-R)18MIC1-L(PORT-B-L)19MIC1-R(PORT-B-R)20LINE1-R(PORT-C-R)21LINE1-L(PORT-C-L)22LINE2-R(PORT-E-R)23LINE2-L(PORT-E-L)

12

C4160
10UF/10V

A_GND

H_SPKL-_M

H_SPKL+_M

LDO2_CAP

39

41

42

43

AVDD240PVDD1

LDO2-CAP

SPK-OUT-L-

SPK-OUT-R-

SPK-OUT-L+

AUD_EXT_MIC_L

AUD_EXT_MIC_R

12

C4105
10UF/10V

A_GND

1 2

C4101

0.1UF/16V

1 2

1 2

C4118

2.2UF/10V

37

38

CBP

AVSS2

DIGITAL GND

CPVDD

CBN

CPVEE

HPOUT-R(PORT-I-R)

HPOUT-L(PORT-I-L)

MIC1-VREFO-L
MIC1-VREFO-R

MIC2-VREFO

VREF

LDO1-CAP

AVDD1
AVSS1

ANALOG GND

24

INT_MIC_AC_IN_L

INT_MIC_AC_IN_R

12

C4145
10UF/10V

@

A_GND A_GND A_GND

AVDD

12

C4103
10UF/10V

A_GND

+3VS_DVDD

C4155

1 2

36
35
34
33
32
31
30
29
28
27
26
25

0.1UF/16V

C4147

1 2

2.2UF/10V

AC_HP_R
AC_HP_L

MIC2_VREFO

AUD_LDO_CAP

C4107

0.1UF/16V

A_GND

12

12

C4142

C4117

10UF/10V

10UF/10V

@

12

1 2

C4134 1UF/6.3V

C4135 1UF/6.3V

@

C4121
10UF/10V

12

12

VREF_CODEC

+5VS_AUDIO

A_GND

50
51
52
53
54
55
56
57

12

C4106

0.1UF/16V

C4136
1000PF/50V

U4101B

GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8

ALC3225-CG

02V0J000002 6

1 2

@

A_GND

R4114 1KOhm

R4125 1KOhm

12

C4154
1000PF/50V

3

AC_HP_R 42
AC_HP_L 42

12

C4104

2.2UF/10V

A_GND

12

12

@

Frank
0503 Vender request
close codec IC

HeadPhone Out

EXT MIC Vref.
EXT MIC Vref.
COMBO MIC Vref.
INT MIC Vref.

C4116

12

C4158
10UF/10V

@

AUD_LDO_CAP

1 2

10UF/10V

2

VREFOUT_A_E_R 42

A_GND

@

12

R4126
10KOhm

INT_MIC_AC_IN 37

VREFOUT_A_E_L 42

1 2

C4144

A_GND

10UF/10V

@

H_SPKL+_M
H_SPKL-_M
H_SPKR+_M
H_SPKR-_M

R1.2 2012/11/08
cost dwon 0ohm
R1.2 2012/12/18
short pin changed to 20 mil

1 2

SP4101 NB_R0402_20MIL_SMALL

1 2

SP4102 NB_R0402_20MIL_SMALL

1 2

SP4106 NB_R0402_20MIL_SMALL

1 2

SP4105 NB_R0402_20MIL_SMALL

R1.0 remove VG70 connector 071 9

H_SPKL+
H_SPKL­H_SPKR+

H_SPKR-

12

12

12

12

C414310PF/50V

C411210PF/50V

C413110PF/50V

C410910PF/50V

CON4101

1
2
3
4

GND2
1
2
3
4

GND1

WTOB_CON_4P

12V17ABSM000

6

5

1

MIC2_VREFO

COMBO_MIC61

GPIO

A A

5

R4124 2 2KOhm

12

12

C4156
10UF/6.3V

A_GND

1 2

1KOhm

R4110
22KOhm

1 2

A_GND

R4112

1 2

C4140 2.2UF/6.3V

1 2

C4139 2.2UF/6.3V

COMBO_MIC_IN_AC_E_ R

COMBO_MIC_IN_AC_E_ L

1 2

1 2

C4137 1 000PF/50V

12

C4138 1000PF/50V

12

2

A_GND

A_GND

MIC_IN_AC_E_R 42

MIC_IN_AC_E_L 4 2

EXT MIC IN

Title :

Title :

Title :

CODEC-ALC3225

CODEC-ALC3225

CODEC-ALC3225

Engineer:

Wing_Cheng

Engineer:

Wing_Cheng

Engineer:

ASUSTeK COMPUTER INC. NB1

ASUSTeK COMPUTER INC. NB1

ASUSTeK COMPUTER INC. NB1

Size Project Name

Size Project Name

Size Project Name

D

D

D

VA70_HW

VA70_HW

VA70_HW

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

Wing_Cheng

41 96Friday, January 18, 2013

41 96Friday, January 18, 2013

41 96Friday, January 18, 2013

Rev

Rev

Rev

1.0

1.0

1.0

AUD_EXT_MIC_L

AUD_EXT_MIC_R

C4146 2.2UF/6.3V

C4119 2.2UF/6.3V

4

3

R4111 2.2KOhm

1 2

5

D D

C C

MIC_IN_AC_E_L41

MIC_IN_AC_E_R41

AMP De-Pop Control circuit

OP_SD#25

ACZ_RST#_AUD20,41

1 2

R4207 1KOhm

1 2

R4204 1KOhm

SP4201

1 2

SP4202

1 2

VREFOUT_A_E_R41

VREFOUT_A_E_L41

R0402

R0402

Q4202A

UM6K1N

Q4202B

UM6K1N

4

+5VS

+5VA

12

R4201
100KOhm

61

2

34

5

1 2

R4211

4.7KOhm

12

R4202
10KOhm

MUTE_AMP#

3

D

Q4201

1

2N7002

G

S

2

GND

R4210

4.7KOhm

1 2

3

MUTE_AMP# 41

MIC_IN_AC_E_L_J 61

MIC_IN_AC_E_R_J 61

2

1

B B

1 2

AC_HP_R41

AC_HP_L41

A A

5

R4205 51Ohm

1 2

R4206 51Ohm

HP_JACK_R 61

HP_JACK_L 61

AUDIO ALC269

AUDIO ALC269

AUDIO ALC269

Title :

Title :

Title :

Wing_Cheng

Wing_Cheng

Engineer:

Engineer:

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

Size Projec t Name

Size Projec t Name

Size Projec t Name

B

B

B

Date: Sheet of

Date: Sheet of

4

3

2

Date: Sheet of

Engineer:

VA70_HW

VA70_HW

VA70_HW

Wing_Cheng

1

Rev

Rev

Rev

1.0

1.0

42 96Friday, January 18, 2013

42 96Friday, January 18, 2013

42 96Friday, January 18, 2013

1.0

5

D D

4

3

2

1

R1.2 2012/11/30
follow MA50, 旋旋180

度

+3VS +3V +3VSUS

12

PCH

分分分

12

R4310

0Ohm

12
12

C4302

@

1UF/6.3V

GND

R43090Oh m/TPM
R43080Oh m/TPM

@

12

0.1UF/16V

/TPM

+3VS

LPCPDN_TPM

12V162BSM003

BTOB_CON_16P

889

7

7

6

6

5

5

4

4

3

3

2

2

1

1

CON4301

R4301

4.7KOhm

@

12

C4301

0.1UF/16V

靠靠

@

9

TPM_CLKRUN#

10

10
11
12
13
14
15
16

TPM_RST#

11
12
13
14
15
16

GND

靠靠

PCH

分分分

12

LPC_AD3_TPM

LPC_AD321,30,65
LPC_AD221,30,65

LPCCLK21

C C

B B

LPC_FRAME#21,30,65

LPC_AD121,30,65
LPC_AD021,30,65

INT_SERIRQ21,30,65

R43070Oh m/TPM

12

R43060Oh m/TPM

12

R43050Oh m/TPM

12

R43040Oh m/TPM

12

R43030Oh m/TPM

12

R43020Oh m/TPM

LPC_AD2_TPM

LPC_FRAME#_TPM

LPC_AD1_TPM
LPC_AD0_TPM

INT_SERIRQ_TPM

C4303

@

R4311

0Ohm

/TPM

12

12

C4304

@

1UF/6.3V

PM_CLKRUN# 22

BUF_PLT_RST# 23,30,33,40,47,53 ,55,70

A A

Title :

Title :

Title :

Engineer:

Engineer:

BG1-HW RD Div.2-NB RD Dept.5

BG1-HW RD Div.2-NB RD Dept.5

BG1-HW RD Div.2-NB RD Dept.5

Size Projec t Name

Size Projec t Name

Size Projec t Name

B

B

B

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

VA70_HW

VA70_HW

VA70_HW

Engineer:

1

TPM CONN

TPM CONN

TPM CONN

Wing_Cheng

Wing_Cheng

Wing_Cheng

43 96Friday, January 18, 2013

43 96Friday, January 18, 2013

43 96Friday, January 18, 2013

Rev

Rev

Rev

1.0

1.0

1.0

5

D D

C C

4

3

2

1

B B

Del Entry audio circuit

A A

5

4

3

SR-8
0121-11

Title :

Title :

Title :

Engineer:

Engineer:

ASUSTeK C OMPUTER INC. NB1

ASUSTeK C OMPUTER INC. NB1

ASUSTeK C OMPUTER INC. NB1

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet o f

Date: Sheet o f

2

Date: Sheet o f

VA70_HW

VA70_HW

VA70_HW

Engineer:

1

CODEC-ALC269

CODEC-ALC269

CODEC-ALC269

Wing_Cheng

Wing_Cheng

Wing_Cheng

44 96Friday, January 18, 2013

44 96Friday, January 18, 2013

44 96Friday, January 18, 2013

Rev

Rev

Rev

1.0

1.0

1.0

5

D D

C C

4

3

2

1

Del Entry audio circuit

B B

A A

SR-8
0121-11

AUDIO ALC269

AUDIO ALC269

AUDIO ALC269

Title :

Title :

Title :

Wing_Cheng

Wing_Cheng

1

Wing_Cheng

45 96Friday, January 18, 2013

45 96Friday, January 18, 2013

45 96Friday, January 18, 2013

Rev

Rev

Rev

1.0

1.0

1.0

Engineer:

Engineer:

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet o f

Date: Sheet o f

5

4

3

2

Date: Sheet o f

Engineer:

VA70_HW

VA70_HW

VA70_HW

5

4

3

2

1

Thermal Policy

+3VS

D D

R4709
10KOhm

@

1 2

+3VS

1 2

R4706
10KOhm

Q4703B

T4701

1

VGA_HOT#

VGA_OVERTEMP#74

C C

PR_OVERTEMP#49

CPU_THERM#49

FORCE_OFF#92

B B

BUF_PLT_RST#23,30,33,40,43,53,55,70

+1.05VS +VCCIO_OUT

R4701 330Ohm@

R4707 330Ohm

UM6K1N

R4705 0Ohm

12

12

@

5

/DGPU

1 2

R4702

1 2

0Ohm @

R4708

1 2

0Ohm

R4703

1 2

0Ohm

34

Q4703A

UM6K1N

@

2

CPU_VGA_THERM#

61

UM6K1N

Q4702A

Q4702B

UM6K1N

1

+3VA_EC

2

6 1

34

5

3

C

B

Q4701
PMBS3904

E
2

NPCE795 has internal power-on reset circuit
Use 47k ohm to make sure that raising time of POR is less than 10us

R4704 47KOhm

D4702 1.2V/0.1A

D4703 1.2V/0.1A

12

12

12

12

C4701

4.7UF/6.3V

@

EC_RST# 30

H_THRMTRIP#4,25

A A

+3VA_EC

+3VS

5

+3VA_EC 28,30

+3VS 16 ,17,20,21,22,23,25,26,27,28,30,33,37,38,39,40,41,43,48 ,49,53,55,60,63,65,66,91,92

4

Title :

Title :

Title :

Engineer:

Engineer:

BG1-HW RD Div.2-NB RD Dept.5

BG1-HW RD Div.2-NB RD Dept.5

BG1-HW RD Div.2-NB RD Dept.5

Size Projec t Name

Size Projec t Name

Size Projec t Name

B

B

B

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

VA70_HW

VA70_HW

VA70_HW

Engineer:

RST_Reset Circuit

RST_Reset Circuit

RST_Reset Circuit

Wing_Cheng

Wing_Cheng

Wing_Cheng

47 96Friday, January 25, 2013

47 96Friday, January 25, 2013

47 96Friday, January 25, 2013

1

Rev

Rev

Rev

1.0

1.0

1.0

5

4

3

2

1

Touch Pad Button

12V18GWSM059

+3VS

TP_CLK30

D D

要要

C C

B B

TP_DAT30

SMB_DAT_S16,17,28,53,55
SMB_CLK_S16,17,28,53,55

+3VS

+3VS

ELAN_ALERT#21

R2.0 12/14

GND

R4801 10K Ohm@

SB5接ELAN_ALERT#

12

12

R4802100KOhm @

1

3

D

@

，還還要

G

S

TP_CLK
TP_DAT

Q4801

2

2N7002

EXT_SCI#_R

1 2

C4818 10U F/10V

GND

FPC_CON_8P

1

1

2
3
4
5
6
7
8

2

SIDE1
3
4
5
6
7

SIDE2
8

CON4802

9

10

JM50接EXT_SCI#

TP_CLK
TP_DAT
SMB_DAT_S
SMB_CLK_S

GND

TP_CLK TP_DAT

1 2

C4801 1000PF/50V@

1 2

C4802 1000PF/50V@

1 2

C4803 1000PF/50V@

1 2

C4819 1000PF/50V@

D4802

1

I/O1

2

GND

3 4

I/O2 I/O3

CM1293_04SO

@

6

I/O4

5

GND

R1.2 2012/11/08

與TP吃吃吃吃吃吃吃

VDD

+3VS

Keyboard

CON4801

27

GND1

28

GND2

FPC_CON_26P

12V18ABSM001

1218-00MW000

N/A

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

C4816 33PF/50V
C4817 33PF/50V

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

1 2

33PF/50V

3 4

33PF/50V

5 6

@

33PF/50V

7 8

@

33PF/50V

1 2

@

33PF/50V

3 4

@

33PF/50V

5 6

@

33PF/50V

7 8

@

33PF/50V

1 2

@

33PF/50V

3 4

@

33PF/50V

5 6

@

33PF/50V

7 8

@

33PF/50V

1 2

@

33PF/50V

3 4

@

33PF/50V

5 6

@

33PF/50V

7 8

@

33PF/50V

1 2

@

33PF/50V

3 4

@

33PF/50V

5 6

@

33PF/50V

7 8

@

33PF/50V

1 2

@

33PF/50V

3 4

@

33PF/50V

5 6

@

33PF/50V

7 8

@

33PF/50V

1 2

@

1 2

@

@
@

CN4801A
CN4801B
CN4801C
CN4801D
CN4802A
CN4802B
CN4802C
CN4802D
CN4803A
CN4803B
CN4803C
CN4803D
CN4804A
CN4804B
CN4804C
CN4804D
CN4805A
CN4805B
CN4805C
CN4805D
CN4806A
CN4806B
CN4806C
CN4806D

KSO1
KSO2

KSO8

KSO0

KSO3
KSO4
KSO5
KSO6
KSO7

KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

KSO0 30
KSO1 30
KSO2 30
KSO3 30
KSO4 30
KSO5 30
KSO6 30
KSO7 30
KSO8 30
KSO9 30
KSO10 30
KSO11 30
KSO12 30
KSO13 30
KSO14 30
KSO15 30
KSO16 30
KSO17 30

KSI0 30
KSI1 30
KSI2 30
KSI3 30
KSI4 30
KSI5 30
KSI6 30
KSI7 30

A A

KB/ TP/ FLASH

KB/ TP/ FLASH

KB/ TP/ FLASH

Title :

Title :

Title :

Engineer:

Wing_Cheng

Engineer:

Wing_Cheng

Engineer:

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

VA70_HW

VA70_HW

VA70_HW

Wing_Cheng

1

Rev

Rev

Rev

1.0

1.0

48 96Friday, January 18, 2013

48 96Friday, January 18, 2013

48 96Friday, January 18, 2013

1.0

5

D D

4

3

2

1

Plam Rest Thermal Sensor

U5001 Close to CPU

+3VS

X5R is changed to X7R

5

12

C4904

0.1UF/10V

C C

R4906

1 2

0Ohm

VCC

4

HYST

G709T1U F

06V2200 00007

temp setting : 97 degree

U4902

1

SET

GND

OT#

THERM_S ET

2
3

CPU_THE RM#

1 2

R4903 17.4KOhm1%

CPU_THE RM# 47

PHILIP PMBS3904

Pleace in the center
of Plamrest.

3
C

B

1

Place near PCH

E
2

@

Q4902
PMBS390 4

Palmrest_THRM_D A

Plamrest_THRM_D C

12

@

C4901
2200PF/5 0V

+3VS_TH EM +3VS

R4901

1 2

150Ohm

@

@

U4903

1
2
3
4

VCC
DXP
DXN
THERM#

G781

@

8

SMBCLK

7

SMBDATA

6

ALERT#

5

GND

PR_OVER TEMP# 47

SMB1_CL K_Thermal
SMB1_DA T_Thermal

12

C4902

0.1UF/16V

@

1 2

R4908 0Ohm

1 2

R4909 0Ohm

@

SMB1_CL K 28,30,7 4

SMB1_DA T 28,30,74

U4903 under palmrest

SMBUS addr=1001100x (98)

U4903: Remote(Local) thermal sensor,use remote mode.

R1.2-10

R4907

12

C4905

2.2UF/10V

0Ohm

12

@

12

C4908

100PF/50 V

@

+5VS

12

C4906

2.2UF/10V

FAN0_TA CH 30

CTL_FAN30

U4901

1

FON#

2

VIN

3

VO
VSET4GND1

G991P11 U

06V5200 00001

GND4
GND3
GND2

8
7
6
5

FAN

12

B B

12V17GISM 046

45

CON4901

HOLD1

1
2
3

HOLD2

WTOB _CON_3P

C4907
22PF/50V

@

+5VS_FA N

D4901 SS0520

12

A A

THERMAL/ FAN

THERMAL/ FAN

THERMAL/ FAN

Title :

Title :

Title :

Wing_Cheng

Wing_Cheng

1

Wing_Cheng

49 96Friday, January 18, 2013

49 96Friday, January 18, 2013

49 96Friday, January 18, 2013

Rev

Rev

Rev

1.0

1.0

1.0

Engineer:

Engineer:

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet o f

Date: Sheet o f

5

4

3

2

Date: Sheet o f

Engineer:

VA70_HW

VA70_HW

VA70_HW

5

D D

C C

4

3

2

1

B B

A A

Title :

Title :

Title :

Realtek_RTS5138

Realtek_RTS5138

Realtek_RTS5138

Wing_Cheng

Wing_Cheng

Engineer:

Engineer:

VA70_HW

VA70_HW

VA70_HW

Engineer:

1

BG1-HW RD Div.2-NB RD Dept .5

BG1-HW RD Div.2-NB RD Dept .5

BG1-HW RD Div.2-NB RD Dept .5

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Wing_Cheng

50 96Friday , January 18, 2013

50 96Friday , January 18, 2013

50 96Friday , January 18, 2013

Rev

Rev

Rev

1.0

1.0

1.0

5

D D

C C

4

3

2

1

B B

A A

Title :

Title :

Title :

USB3.0 uPD720200

USB3.0 uPD720200

USB3.0 uPD720200

Wing_Cheng

Wing_Cheng

Engineer:

Engineer:

VA70_HW

VA70_HW

VA70_HW

Engineer:

1

BG1\HW1

BG1\HW1

BG1\HW1

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Wing_Cheng

51 96Friday , January 18, 2013

51 96Friday , January 18, 2013

51 96Friday , January 18, 2013

Rev

Rev

Rev

1.0

1.0

1.0

5

D D

C C

4

3

2

1

B B

A A

PCIE NEW CARD

PCIE NEW CARD

PCIE NEW CARD

Title :

Title :

Title :

Wing_Cheng

Wing_Cheng

1

Wing_Cheng

52 96Friday, January 18, 2013

52 96Friday, January 18, 2013

52 96Friday, January 18, 2013

Rev

Rev

Rev

1.0

1.0

1.0

Engineer:

Engineer:

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet o f

Date: Sheet o f

5

4

3

2

Date: Sheet o f

Engineer:

VA70_HW

VA70_HW

VA70_HW

5

4

3

2

1

PCIE/mSATA

Select PCIE or mSATA IF select mSATA(only +3VAUX)

1 2

PCIE_RXN6 _mSATA24

D D

PCIE_RXP6 _mSATA24

PCIE_TXN6 _mSATA24
PCIE_TXP6 _mSATA24

+3.3VS_m SATA

R5320 0Ohm@

1 2

R5321 0Ohm@

1 2

R5318 0Ohm@

1 2

R5319 0Ohm@

PCIE_mSAT A_C23
PCIE_mSAT A_C25

PCIE_mSAT A_C31
PCIE_mSAT A_C33

1 2

C5314 0.01 UF/50V

1 2

C5315 0.01 UF/50V

1 2

C5316 0.01 UF/50V

1 2

C5317 0.01 UF/50V

SATA_RX P4 2 0
SATA_RX N4 20

SATA_TX N4 20
SATA_TX P4 20

2
4
6
8
10
12
14
16

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

56
55

+3.3VS_m SATA

R5308

1 2

0Ohm

10V4400 00001

+1.5VS_m SATA

MINICARD_RST #_mSATA

SMBC_mS ATA
SMBD_mS ATA

USBP11­USBP11+

R5315
Q5310
2N7002

@

1

G

3

PCIE_W AKE#22,33

CLK_REQ 2_PCIE_mSATA#21

C C

CLK_PCIE_ mSATA#_PCH2 1
CLK_PCIE_ mSATA_PCH21

2

D

S

Follow SanDisk SSD U100 spec.

+3.3VS_m SATA

C5304

0.1UF/16V

PCIE_mSAT A_C23
PCIE_mSAT A_C25

PCIE_mSAT A_C31
PCIE_mSAT A_C33

12

C5305

0.01UF/50 V

@

23 TXP
25 TXN
31 RXN
33 RXP

B B

+3.3VS_m SATA

C5302
10UF/10V

1AV5000 00008

12

C5303

0.1UF/16V

12

10KOhm

@

1 2

PCIE_W AKE#_mSATA

PCIE_W AKE#_mSATA

12

C5301

0.01UF/50 V

@

CON5301

1

WAKE#

3

Reserved1

5

Reserved2

7

CLKREQ#

9

GND1

11

REFCLK-

13

REFCLK+

15

GND2

17

Reserved/UIM_C8

19

Reserved/UIM_C4

21

GND3

23

PERn0

25

PERp0

27

GND4

29

GND5

31

PETn0

33

PETp0

35

GND6

37

Reserved3

39

Reserved4

41

Reserved5

43

Reserved6

45

Reserved7

47

Reserved8

49

Reserved9

51

Reserved10

53

GND13

54

GND14

MINI_PCI_LATCH _52P

12V44GISM 005

3.3V_1
GND7

1.5V_1

UIM_PWR

UIM_DATA

UIM_CLK

UIM_RESET

UIM_VPP

GND8

W_DISABLE#

PERST#

+3.3Vaux

GND9

1.5V_2

SMB_CLK

SMB_DATA

GND10
USB_D­USB_D+

GND11

LED_WWAN#

LED_WLAN#

LED_WPAN#

1.5V_3

GND12

3.3V_2

NP_NC2
NP_NC1

+3VS +3.3VS_m SATA

H5301

HT-G4041 M20TFE

R5305 0Ohm
R5306 0Ohm

@

1 2

R5316 0Ohm@

1 2

R5317 0Ohm@

USBP11-

USBP11+

+1.5VS +1.5VS_m SATA

12
12

RN5301B

3 4

0Ohm

@

1 4

2 3

RN5301A

1 2

0Ohm

@

H5302

HT-G4041 M20TFE

WLA N_ON 25,55
BUF_PLT _RST# 23,30,33 ,40,43,47,55,70
WLA N_RST#_PCH 25,55

SMB_CLK _S 16,17 ,28,48,55
SMB_DAT _S 16,17,28 ,48,55

L5301

90Ohm/10 0MHz

09V0900 00002

@

R5313

1 2

0Ohm

10V4400 00001

USB_PN1 1 24
USB_PP1 1 24

+1.5VS_m SATA

12

C5307
10UF/10V

1AV5000 00008

A A

@

5

C5308

0.1UF/16V

@

12

C5309

0.1UF/16V

@

12

C5310

0.01UF/50 V

@

WiFi/WiMAX

WiFi/WiMAX

WiFi/WiMAX

Title :

Title :

Title :

Engineer:

Engineer:

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet o f

Date: Sheet o f

4

3

Date: Sheet o f

2

Engineer:

VA70_HW

VA70_HW

VA70_HW

Rev

Rev

Rev

1.0

1.0

53 96Friday, January 18, 2013

53 96Friday, January 18, 2013

53 96Friday, January 18, 2013

1

1.0

5

D D

C C

4

3

2

1

B B

A A

MINICARD (WUSB /UPCONVERT)

MINICARD (WUSB /UPCONVERT)

MINICARD (WUSB /UPCONVERT)

Title :

Title :

Title :

Wing_Cheng

Wing_Cheng

1

Wing_Cheng

54 96Friday, January 18, 2013

54 96Friday, January 18, 2013

54 96Friday, January 18, 2013

Rev

Rev

Rev

1.0

1.0

1.0

Engineer:

Engineer:

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet o f

Date: Sheet o f

5

4

3

2

Date: Sheet o f

Engineer:

VA70_HW

VA70_HW

VA70_HW

5

1215

CLK_REQ3_WLAN#21

RB751V-40

12

C5511

0.1UF/16V

@

D5501

1 2

C5503

0.1UF/16V

WLAN_WAKE#30

12

12

12

C5512

0.1UF/16V

R1.1 For IOAC, 10/31

+3VS_WLAN

BT_ON/OFF#_R

12

C5505

C5504

0.01UF/50V

0.1UF/16V

@

12

C5513

0.01UF/50V

@

@

1 2

D D

BT_ON_PCH25

BT_ON_EC30

C C

B B

R5530 0Ohm@

R5531 0Ohm

+3VS_WLAN

+1.5VS_WLAN

C5510
10UF/10V

1AV500000008
@

C5502
10UF/10V

1AV500000008

R5514 0Ohm@

12

4

R1.2 2012/12/13
wake

訊訊訊訊

+3VS_WLAN

1

G

/IOAC

3

2

D

S

2N7002

R1.2 2012/12/05

Q5511

option changed from N/A

@

1 2

R5524 0Ohm

CLK_PCIE_WLAN#_PCH21
CLK_PCIE_WLAN_PCH21

PCIE_RXN2_WLAN24
PCIE_RXP2_WLAN24

PCIE_TXN2_WLAN24
PCIE_TXP2_WLAN24

R5518
10KOhm

SP5501 R0402

12

R1.2 2012/11/06

工工工工工工

T5502

T5501

1

1

12

C5506

0.01UF/50V

@

MOS

PCIE_WAKE#_WLAN

R5509

12

BT_DISABLE_M5BT_ON/OFF#_R

0Ohm

@

+3VS_WLAN

BT_DISABLE_M51

R1.2 2012/10/29
option changed from /AOAC

AOAC_ON25

IOAC_EN30,81

RF_ON

WiFi/WiMAX

CON5501

1

WAKE#

3

Reserved1

5

Reserved2

7

CLKREQ#

9

GND1

11

REFCLK-

13

REFCLK+

15

GND2

17

Reserved/UIM_C8

19

Reserved/UIM_C4

21

GND3

23

PERn0

25

PERp0

27

GND4

29

GND5

31

PETn0

33

PETp0

35

GND6

37

Reserved3

39

Reserved4

41

Reserved5

43

Reserved6

45

Reserved7

47

Reserved8

49

Reserved9

51

Reserved10

53

GND13

54

GND14

MINI_PCI_LATCH_52P

12V44GBSD000

@

12

12

/IOAC

12

UIM_PWR

UIM_DATA

UIM_CLK

UIM_RESET

UIM_VPP

W_DISABLE#

PERST#

+3.3Vaux

SMB_CLK

SMB_DATA

GND10
USB_D-

USB_D+

GND11

LED_WWAN#

LED_WLAN#

LED_WPAN#

GND12

NP_NC2
NP_NC1

R55330Ohm

R55270Ohm

R55290Ohm @

3.3V_1
GND7

1.5V_1

GND8

GND9

1.5V_2

1.5V_3

3.3V_2

+3VO

+3VS

2
4
6
8
10
12
14
16

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

56
55

3

+3VS_WLAN

+1.5VS_WLAN

MINICARD_RST#

SMBC
SMBD

USBP5­USBP5+

RF_DET#_R

1 2

R5534 0Ohm

/IOAC

1 2

R5508 0Ohm

/non_IOAC

+AC_BAT_SYS

+3VO

R5526
100KOhm

1 2

/IOAC

61

UM6K1N
Q5513A

2

/IOAC

WLAN_ON_C

+3VS_WLAN

@

R5501 0Ohm

R5525
180KOHM

@

1 2

R5532
1MOhm

@

1 2

5

USBP5-

USBP5+

R5505 0Ohm@
R5506 0Ohm@
R5507 0Ohm

1 2

R5516 0Ohm@

1 2

R5517 0Ohm@

1

G

Q55022N7002

3

2

D

S

1 2

R5528 0Ohm

+12VSUS

12

R5535
560KOhm

vx_r0402_small 5%

/IOAC

34

UM6K1N
Q5513B

/IOAC

2

RN5501A

1 2

0Ohm

@

14

23

09V090000002

90Ohm/100MHz

L5501

RN5501B

3 4

0Ohm

12
12
12

1 2

D

3

/IOAC

BUF_PLT_RST# 23,30,33,40,43,47,53,70
WLAN_RST#_PCH 25,53
WLAN_RST#_EC 30

SMB_CLK_S 16,17,28,48,53
SMB_DAT_S 16,17,28,48,53

LED_WLAN# 66

RF_DET# 30

+3VS_WLAN

/non_IOAC

S

2

SI2304BDS-T1-GE3

G

1

Q5501

R1.2 2012/12/05
Add 5535
change R5525 and R5532 options

12

C5501
1UF/25V

/IOAC

USB_PN5 24
USB_PP5 24

1

1215

R5522 0Ohm

@

R5523 0Ohm

+1.5VS +1.5VS_WLAN

1 2

R5513 0Ohm

RF_ON 30

WLAN_ON 25,53

A A

WiFi/WiMAX

WiFi/WiMAX

WiFi/WiMAX

Title :

Title :

Title :

Engineer:

Engineer:

BU1-RD Div.1-HW RD Dept .1

BU1-RD Div.1-HW RD Dept .1

BU1-RD Div.1-HW RD Dept .1

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

VA70_HW

VA70_HW

VA70_HW

1

Rev

Rev

Rev

1.0

1.0

55 96Friday , January 18, 2013

55 96Friday , January 18, 2013

55 96Friday , January 18, 2013

1.0

5

D D

C C

4

3

2

1

B B

A A

TP_M

TP_M

TP_M

Title :

Title :

Title :

Wing_Cheng

Wing_Cheng

Engineer:

Engineer:

BG1-HW RD Div.2-NB RD Dept.5

BG1-HW RD Div.2-NB RD Dept.5

BG1-HW RD Div.2-NB RD Dept.5

Size Projec t Name

Size Projec t Name

Size Projec t Name

B

B

B

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

VA70_HW

VA70_HW

VA70_HW

Wing_Cheng

1

Rev

Rev

Rev

1.0

1.0

56 96Friday, January 18, 2013

56 96Friday, January 18, 2013

56 96Friday, January 18, 2013

1.0

5

4

3

2

1

Screw G x 2 Fix Hole H x 1 Fix Hole I x 1

PWR_H1

1

C276D110

PWR_H2

1

C276D110

D D

PWR_GND

PWR_H3

1

CT197D118N

PWR_H4

1

OT39DO142X118N

+5VSUS_PWR

POWER Button LED

12

PWR_C01

@

12

+

PWR_LED01
BLUE

07V130000054

PWR_R02
300Ohm

1 2

C C

PWRLED_ON#_PWR

47PF/50V

PWR_GND

R1.1 reverse PWR_CON01 and change pin 1~4 pin define 1024

PWR_CON01

HOTBAR_10P

B B

A A

+3VA_PWR

+5VSUS_PWR

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

PWR_GND

5

LID_SW#_PWR

PWRLED_ON#_PWR

PWR_SW#_PWR

LID Switch

PWR_SW01

SWITCH_4P

GND2

34

12

GND1

5 6

PWR_GND

4

LID_SW#_PWR

12

PWR_C04

@

1000PF/50V

1AV200000003

PWR_GND

3

12

PWR_R05
100KOhm

R1.2 2012/11/28
cost down

12

PWR_D4

AZ5123-01H

07V180000006
@

PWR_GND

+3VA_PWR

PWR_C02 0.1UF/16V

12

PWR_D5

AZ5123-01H

07V180000006
@

PWR_GND

1 2

AH180-WG-7

1

Vdd

2

OUTPUT

PWR_U01

12

@

PWR_GND

2

3

GND

PWR_GND

PWR_C03
1000PF/50V

1AV200000003

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

VA70_HW

VA70_HW

VA70_HW

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

PWR BTN

PWR BTN

PWR BTN

Wing_Cheng

Wing_Cheng

Wing_Cheng

1

Rev

Rev

Rev

1.0

1.0

57 96Friday, January 18, 2013

57 96Friday, January 18, 2013

57 96Friday, January 18, 2013

1.0

5

D D

+5V_USB_DB_C

HOTBAR_20P

20

20

19

19

18

18

17

17

16

16

15

15

14

14

13

13

12

12

11

11

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

IOCON5

A_GND_IO

C C

Screw L x 2

IO_H1

1

C354D118

IO_H2

1

C354D118

Fix Hole F x 1

IO_H3

1

OB291X283DO118X130N

D_GND_IO

MIC_IN_AC_E_R_IO
MIC_IN_AC_E_L_IO
MIC_EXT_JD#_IO
AC_HP_L_IO
AC_HP_R_IO
HP_JD#_IO
COMBO_MIC_IO

IO_USB_PN2

IO_USB_PP2

IO_USB_PN9

IO_USB_PP9

4

D_GND_IO

D_GND_IO

A_GND_IO

COMBO_MIC_IO

AU_HP_RR_JACK

AU_HP_LL_JACK

@

1

2

AZ2025-02S

AZ2025-02S

1

MIC_EXT_JD#_IO

@

2

12

IOC120.01UF/16V

12

IOC130.01UF/16V

12

IOC140.01UF/16V

12

IOC110.01UF/16V

A_GND_IO

Moat

HP_JD#_Jack

AZ2025-01H.R7G

@

+5V_USB_DB_C

R1.2 2012/11/20
IOCE1
IOL1

給

layout
R1.2 2012/11/20
layout
R1.3 2013/1/21
IOL1 is changed to 0ohm

MIC_IN_AC_E_R_JACK

1

AZ2025-02S

IOL1 0Ohm

暫暫暫暫

暫暫暫暫暫暫

評評評評暫評

評評評評暫評

MIC_IN_AC_E_L_JACK

@

2

1 2

3

12

+

layout

作作

MB P.61

IOD4

IO_USB_PP2 IO_USB_PN2

D_GND_IO

IO_USB_PN9 IO_USB_PP9

1

2

3 4

CM1293_04SO

AC_HP_L_IO

AC_HP_R_IO

HP_JD#_IO

IOCE1
100UF/6.3V

1BV080000001

@

R1.2 2012/11/08
cost dwon 0ohm

R1.2 2012/12/04
change short pin size

IOSP1 N B_R0402_20MIL_SMALL

1 2

IOSP2 N B_R0402_20MIL_SMALL

1 2

IOSP3 N B_R0402_20MIL_SMALL

1 2

IOC17

0.1UF/16V

1 2

D_GND_IO

6

+5VUSB0_IO

5

R1.2 2012/12/05
options are chaned from Entry

12

IOC9

100PF/50V

+5VUSB0_IO

12

D_GND_IO

IOC18
33PF/50V

12

IOC6

100PF/50V

2

USB 2.0

12V13GBSD021

USB_CON_1x4P

P_GND1

1

P_GND2

2

P_GND3

3

P_GND4

4

IOCON4

12V13GBSD021

USB_CON_1x4P

1

P_GND1

1

2

P_GND2

2

3

P_GND3

3

4

P_GND484

IOCON3

A_GND_IO

5
6
7
8

5
6
7

7
1

2
6
3
4
5

PHONE_JACK_9P

12V14GBSD006

IOCON6

P_GND1
P_GND2

NP_NC1
NP_NC2

8
9

10
11

+5VUSB0_IO
IO_USB_PN2
IO_USB_PP2

1
2
3
4

D_GND_IO D_GND_IO

+5VUSB0_IO
IO_USB_PN9
IO_USB_PP9

D_GND_IO D_GND_IO

Headphone & MIC combo Jack

COMBO_MIC_IO

AU_HP_LL_JACK

AU_HP_RR_JACK

HP_JD#_Jack

12

IOC7

100PF/50V

A_GND_IOA_GND_I OA_GND_IO

1

A_GND_IO

D_GND_IO

B B

A A

Fix Hole E x 1

1

CB276D118N

IO_H4

IOD1

IOD2

3

A_GND_IO A_GND_IO A_GND_IO

3

IOD3

IOD5

1 2

3

A_GND_IO

MIC_IN_AC_E_R_IO

MIC_EXT_JD#_IO

12

12

IOC10

10PF/50V

R1.2 2012/11/08
cost dwon 0ohm

IOSP4 R0603

IOSP5 R0603

@

@

A_GND_IO

1 2

1 2

IOC2
33PF/50V

COMBO_MIC_IO

12

IOC8

100PF/50V

MIC_IN_AC_E_L_JACKMIC_IN_AC_E_L_IO

MIC_IN_AC_E_R_JACK

12

IOC16

100PF/50V

12

IOC15

100PF/50V

MIC JACK

8

8

7

7

1

1

2

2

6

6

3

3

4

4

5

5

9

NP_NC1

10

NP_NC2

PHONE_JACK_8P

A_GND_IOA_GND_IOA_GND_IOA_GND_IO

IOCON2

R1.1 Add 2nd MI C schematic 080 4

IO

IO

IO

Title :

Title :

Title :

Wing_Cheng

Wing_Cheng

Wing_Cheng

Engineer:

Engineer:

BG1-NB1-HW-NB5

BG1-NB1-HW-NB5

BG1-NB1-HW-NB5

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

VA70_HW

VA70_HW

VA70_HW

1

Rev

Rev

Rev

1.0

1.0

1.0

58 96Monday, January 21, 2013

58 96Monday, January 21, 2013

58 96Monday, January 21, 2013

5

4

3

2

1

HDD 1 HDD 2

+5VS

12

C6019

0.1UF/25V

12
12

12
12

SP6001

1 2

SHORT_P IN

SATA_TX P020

D D

C C

SATA_TX N020

SATA_RX N020
SATA_RX P020

+3VS

12

C6018

@

10UF/6.3V

+5VS_HD D1

12

C6021

@

10UF/6.3V

C6001 0.01 UF/50V
C6002 0.01 UF/50V

C6003 0.01 UF/50V
C6004 0.01 UF/50V

12

C6017

@

0.1UF/25V

12

C6020

@

10UF/6.3V

T6001

SATA_TX P0_C
SATA_TX N0_C

SATA_RX N0_C
SATA_RX P0_C

+3VS

+5VS_HD D1

1

9.5mm

CON6001

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

SATA_CO N_22P

12V241B RD010

NP_NC3

NP_NC1

NP_NC2

NP_NC4

25

23

+3VS

12

C6026

10UF/6.3V

24

26

+5VS_HD D2

12

C6024

10UF/6.3V

12

C6025

@

@

@

0.1UF/25V

12

C6023

@

10UF/6.3V

12

C6022

0.1UF/25V

SATA_TX P520
SATA_TX N520

SATA_RX N520
SATA_RX P520

C6006 0.01 UF/50V
C6008 0.01 UF/50V

C6005 0.01 UF/50V
C6007 0.01 UF/50V

+5VS

12
12

12
12

SP6002

1 2

SHORT_P IN

+5VS_HD D2

T6002

SATA_TX P5_C
SATA_TX N5_C

SATA_RX N5_C
SATA_RX P5_C

+3VS

1

CON6002

S1

S1

S2

S2

S3

S3

S4

S4

S5

S5

S6

S6

S7

S7

P1

P1

P2

P2

P3

P3

P4

P4

P5

P5

P6

P6

P7

P7

P8

P8

P9

P9

P10

P10

P11

P11

P12

P12

P13

P13

P14

P14

P15

P15

SATA_CO N_22P

12V24GB RD019

NP_NC3

NP_NC1

NP_NC2

NP_NC4

3

1

2

4

12.5mm

ZERO POWER ODD SUPPORT

ODD

CON6003

4

NP_NC4

2

B B

NP_NC2

1

NP_NC1

3

NP_NC3

SATA_CO N_13P

12V24GB RD020

S1

S1

S2

S2

S3

S3

S4

S4

S5

S5

S6

S6

S7

S7

P1

P1

P2

P2

P3

P3

P4

P4

P5

P5

P6

P6

SATA_OD D_TXP2
SATA_OD D_TXN2

SATA_OD D_RXN2
SATA_OD D_RXP2

1 2

/Zero_ODD

C6015

0.01UF/50 V

@

1 2

/Zero_ODD

R60010Ohm

12

10UF/10V

R60020Ohm

+5VS_OD D

C6016

12

1 2
1 2

1 2
1 2

C60110.01UF/50V
C60120.01UF/50V

C60130.01UF/50V
C60140.01UF/50V

SATA_OD D_PRSNT# 25

12

+

CE5101
100UF/6.3 V

1BV1700 00001

@

SATA_OD D_DA# 23

SATA_TX P2 20
SATA_TX N2 20

SATA_RX N2 20
SATA_RX P2 20

support Hokey turn off ODD power

+3VS

12

R6007
10KOhm

/Zero_ODD

SATA_OD D_PWRGT25

1 2

R60090Ohm

/Zero_ODD

+5VS +5VS_OD D

+12VSUS

+5VSUS

R6006
100KOhm

/Zero_ODD

1 2

UM6K1N
Q6001A

/Zero_ODD

1 2

61

2

R60050Ohm

/Zero_ODD

R6004
100KOhm

/Zero_ODD

1 2

34

UM6K1N
Q6001B

5

/Zero_ODD

R6003

1 2

0Ohm

/non_Zero_ ODD

D

3

S

2

SI2304BDS -T1-GE3

G

1

Q6002

/Zero_ODD

C6010
1UF/25V

/Zero_ODD

12

R6011
10KOhm

/Zero_ODD

3

D

Q6003
2N7002

1

/Zero_ODD

G

S

2

A A

SATA HDD/ ODD

SATA HDD/ ODD

SATA HDD/ ODD

Title :

Title :

Title :

Wing_Cheng

Wing_Cheng

Engineer:

Engineer:

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet o f

Date: Sheet o f

5

4

3

2

Date: Sheet o f

Engineer:

VA70_HW

VA70_HW

VA70_HW

Wing_Cheng

1

Rev

Rev

Rev

1.0

1.0

60 96Friday, January 18, 2013

60 96Friday, January 18, 2013

60 96Friday, January 18, 2013

1.0

A

MB USB

USBP0_EN30

1 1

USB3_TX1_N24

2 2

USB3_TX1_P24

USB3_RX1_N24

USB3_RX1_P24

+5VSUS

USBP1_EN30

12

C6109

1UF/6.3V

/USBSLP

3 3

USB_PN124

USB_PP124

USB3_TX2_N24

USB3_TX2_P24

USB3_RX2_N24

USB3_RX2_P24

4 4

+5VO

12

R6125
100KOhm

1

G

3

2

S

2N7002
Q6105

/USBSLP

0.1UF/25V

C6102

12

0.1UF/25V

12

C6104

12

C6121
10PF/50V

@

GND GND

0.1UF/25V

C6115

12

0.1UF/25V

12

C6112

12

12

C6127

C6128

10PF/50V

10PF/50V

@

@

GND

GND

1

D

/USBSLP

2

USBCEN

3 4

GND

USB3_TX1_C_N SSTN

USB3_TX1_C_P

12

C6122
10PF/50V

@

U6104

1

8

GND

OUT1

2

7

IN1

OUT2

3

6

IN2

OUT/NC

5

EN#/EN4OC#

G547E1P81U

06V290000008
/USBSLP

Active High

2.5A

USB3_TX_C_N SSTN1

USB3_TX_C_P

B

+5VO

12

C6107

0.1UF/16V

U6107

5

A

/USBSLP

VCC

GND

B

GND

Y

Vcc=2~5.5

/USBSLP

RN6103B

34

0Ohm

L6101
90Ohm/100MHz

1 4

2 3

12

0Ohm

RN6103A

RN6111B

34

0Ohm

L6102
90Ohm/100MHz

1 4

2 3

12

0Ohm

RN6111A

R1.3 2013/1/21
L6111 is changed to 0ohm

1 2

L6111 0Ohm

/USBSLP

USB30_OC#

RN6120A

1 2

0Ohm

L6109

@

90Ohm/100MHz

1 4

2 3

RN6120B

3 4

0Ohm

RN6123B

34

0Ohm

L6104

@

90Ohm/100MHz

1 4

2 3

12

0Ohm

RN6123A

RN6126B

34

0Ohm

L6108

@

90Ohm/100MHz

1 4

2 3

12

0Ohm

RN6126A

C

R1.3 2013/1/21

+5VO

12

C6110

1UF/6.3V

@

1 2

@

C6119 10PF/50V

SSTP

@

1 2

C6120 10PF/50V

SSRN

@

SSRP

+5V_USB2

U6101

1

GND

2

IN1

3

IN2
EN#/EN4OC#

G547E1P81U

06V290000008

Active High

2.5A

USB_PP024
USB_PN024

CHGCB030

GND

GND

L6110 is changed to 0ohm

8

OUT1

7

OUT2

6

OUT/NC

5

USB_CHG_OC#

USB30_OC#

Sleep & Charge

12

C6116

+5VO

0.1UF/25V

/USBSLP

1

DPP0_CON_P DPN0_CON_N

2

3 4

USB_PP1_R USB_PN1_R

PLACE ESD Diodes 0700-0014000 near Connector

5
6
7
8
9

D6101

CM1293_04SO

07V000000006

1 2

L6110 0Ohm

U6105

SELCDP4VDD

DP

TDP

DM

TDM

CEN

CB
GND

SLG55584AVTR

06V150000009

/USBSLP

@

+5V_USB1

+3VSUS

12

/USBSLP

3
2
1

USBCEN

6

+5V_USB1

C6111

5

1 2

0.1UF/16V

@

USB 3.0

SSRN1

GND

USB_PN1_R

USB_PP1_R

C6123 10PF/50V

C6124 10PF/50V

100UF/6.3V

+5V_USB2

12

+

CE6103

R1.2 2012/11/20
Changed from 100UF/6.3V
R1.2 2012/11/23
changed from 220UF/6.3V

@

1 2

GND

SSTP1

@

1 2

GND

SSRN1

SSRP1

SSRP1

USB_PP1_R

GND

USB_PN1_R

SSTN1

SSTP1

USB_CON_9P

C6108

0.1UF/25V

1 2

12V13GURD006

U6106

1

SSRN1

2

SSRP1

3
4

SSTN1
SSTP1

AZ1045_04F

@

D

D6102

1

3

2

1V/0.1A

/USBSLP

R1.2 2012/11/20
Changed from 560UF/2.5V

R6116
100KOhm

SCLCDP_EC 30

USB_P0+ DPP0_CON_P
USB_N0-

12

R6115

+5VO

10KOhm

/USBSLP

CON6105

5
4
6
3
7
2
8
1
9

LINE_1
LINE_2
GND(Pin8)
LINE_3
LINE_45NC1

1 4

RN6113A

12

SSRX­PGND

P_GND110P_GND3

SSRX+
D+
GND
D­SSTX­VBUS
SSTX+

P_GND2

P_GND4

11

13

GND

10

SSRN1

NC4

9

SSRP1

NC3

7

SSTN1

NC2

6

SSTP1

RN6113B
0Ohm

0Ohm

USB_OC0# 24

/USBSLP

34

90Ohm/100Mhz

L6114

2 3

12

/USBSLP

CE6104

220UF/6.3V

1BV090000003

DPN0_CON_N

@

USB 3.0

+5V_USB1

12

+

1 2

C6101

0.1UF/25V

1AV200000041

SSRP

DPP0_CON_P

GND

DPN0_CON_N

SSTN

SSTP

SSRN
SSRP

SSTP

SSRN

GND

no sleep & charge

+5V_USB2+5V_USB1

@

R6120

1 2

0Ohm

10V540000001

E

USB_CON_9P

12V13GURD006

U6102

1
2
3
4

AZ1045_04F

@

CON6101

5

SSRX-

4

PGND

6

SSRX+

3

D+

7

GND

2

D-

8

SSTX-

1

VBUS

9

SSTX+

LINE_1
LINE_2
GND(Pin8)
LINE_3
LINE_45NC1

12

P_GND110P_GND3

P_GND2

P_GND4

11

13

GND

10

SSRN

NC4

9

SSRP

NC3

7

SSTNSSTN

NC2

6

SSTP

IO Board

USB Power Switch for USB DB Main

+5VSUS +5V_USB_DB

USBP2_EN30 USB_OC1# 24

12

C6106

1UF/6.3V

USB_PN224

5 5

USB_PP224

USB_PN924

USB_PP924

A

U6103

N/A

1

8

GND

OUT1

2

7

IN1

OUT2

3

6

IN2

OUT/NC

5

EN#/EN4OC#

G547E1P81U

06V290000008

Active High

2.5A

1 2

0Ohm

RN6107A

L6107
90Ohm/100Mhz

1 4

2 3

3 4

0Ohm

RN6107B

BIOS debug port

1 2

0Ohm

RN6106A

1 4

2 3

3 4

0Ohm

RN6106B

@

L6106
90Ohm/100Mhz

USB_PN2_C

USB_PP2_C

USB_PN9_C

@

USB_PP9_C

B

AUDIO BOARD/w U SB2.0 x2

R1.2 2012/11/20
Add 560UF/2.5V for layout to estimate
R1.2 2012/11/23
changed from 560/2.5V
R1.2 2012/11/27
L6115, CE6105 are removed

+5V_USB_DB

USB_PN2_C
USB_PP2_C

USB_PN9_C
USB_PP9_C

MIC_IN_AC_E_R_J42

A_GND

MIC_IN_AC_E_L_J42

MIC_EXT_JD#41
HP_JACK_L42
HP_JACK_R42

HP_JD#41

COMBO_MIC41

CON6104

20

20

19

22

19

SIDE2

18

18

17

17

16

16

15

15

14

14

13

13

12

12

11

11

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

21

2

SIDE1

1

1

FPC_CON_20P

12V18AWSM019

A_GND A_GND

USB PORTS/ eSATA

USB PORTS/ eSATA

USB PORTS/ eSATA

Title :

Title :

Title :

Wing_Chen g

Wing_Chen g

Wing_Chen g

Engineer:

Engineer:

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Shee t of

Date: Shee t of

C

D

Date: Shee t of

Engineer:

VA70_HW

VA70_HW

VA70_HW

E

Rev

Rev

Rev

1.0

1.0

1.0

61 96Monday, January 21, 2013

61 96Monday, January 21, 2013

61 96Monday, January 21, 2013

5

D D

C C

4

3

2

1

B B

A A

Camera/ BT/ FL CONN

Camera/ BT/ FL CONN

Title :

Title :

Title :

Engineer:

Engineer:

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

5

4

3

Date: Sheet of

2

Engineer:

VA70_HW

VA70_HW

VA70_HW

Camera/ BT/ FL CONN

Wing_Cheng

Wing_Cheng

Wing_Cheng

62 96Friday, January 18, 2013

62 96Friday, January 18, 2013

62 96Friday, January 18, 2013

1

Rev

Rev

Rev

1.0

1.0

1.0

5

R1.3 2013/1/4

DC IN

T6313

T6304

1

D D

WTOB_4P

CON6302

12V17AISD002

L6304 is changed to Irat=8A

T6305

T6306

T6307

1

1

1

1

D_A/D_DOCK_IN

C6305

0.1UF/25V

1AV300000024

1

1

1

1

T6310

T6309

T6308

4
3
2
1

T6311

C6309
1000PF/50V

1AV200000018

L6304

80Ohm/100Mhz

09V010000051
Irat=8A

C6307

0.1UF/25V

1AV300000024

21

D_A/D_DOCK_IN

Discharge Circuit

4

R1.2 2012/11/21
F6301 is removed

A/D_DOCK_IN_F +A/D_DOCK_IN

C6306

0.1UF/25V

1AV300000024

C6308
1UF/25V

1AV300000031

+A/D_DOCK_IN

Frank
0505 Follow EVEREST

3

Battery Connector

T6312

T6320

T6321

T6322

1

1

BATT_CON_8P

9

P_GND1

1
2
3
4
5
6
7
8

10

P_GND2

CON6301

12V20GBSD008

GND

1220-00FD000

T6319

1

T6314

T6318

T6315

T6317

1

1

1

1

T6323

1

1

1

1

BAT_CON_F

2
3

PI

4

TS1#_C

5

SMB0_CLK_C

6

SMB0_DAT_C

7
8

T6316

1

BAT_CON_F

SR-5
0120-11

2

R1.2 2012/11/21
F6301 is removed

T6301

T6302

1

1

C6302

0.1UF/25V

100PF/50V

C6301

12

12

@

1AV300000024

PI

R6315
1KOhm

1 2

GND

+BAT_CON

T6303

1

L6301 1kOhm/100Mhz Irat=300mA
L6303 1kOhm/100Mhz Irat=300mA
L6302 1kOhm/100Mhz Irat=300mA

C6304

C6303

100PF/50V

100PF/50V

12

@

@

C6310

0.1UF/25V

1AV300000007

@

2 1
2 1
2 1

D6301

1

TS1#_C SMB0_CLK_C

2

3 4

DF5A6.8FU

@

5

1

TS1# 90
SMB0_CLK 30,88
SMB0_DAT 30,88

SMB0_DAT_C

Q6305B

UM6K1N

5

@

Q6303A

UM6K1N

2

+1.35V

12

R6328
330Ohm

+1.35V_DISCHRG

@

34

+VCORE

12

R6314
330Ohm

@

+VCC_CORE_DISCHRG

61

@

Q6303B

UM6K1N

12

R6307
330Ohm

34

5

+VCCIO_OUT

12

R6308

Q6304A

UM6K1N

330Ohm

@

61

@

2

@

@

Q6304B

UM6K1N

12

R6313
330Ohm

@

34

@

5

VSUS_ON30,81,91,93

Q6305A

UM6K1N

2

+12VS

12

R6327
330Ohm

@

+12VS_DISCHRG

61

@

Q6311A

UM6K1N

+5VSUS

12

Q6311B

UM6K1N

5

@

R6325
330Ohm

@

+5VSUS_DISCHRG

34

+3VA

12

R6324
100KOhm

@

61

2

@

C C

SUSB_EC#22,23 ,30,91,92

B B

Q6301A

UM6K1N

+3VA

12

R6301

100KOhm

61

2

@

SUSC_EC#30,91

Q6301B

UM6K1N

5

@

Q6306A

UM6K1N

12

34

2

R6303
330Ohm

@

+3VS

12

R6304
330Ohm

+3VS_DISCHRG +VTT_CPU_DISCHRG +5VS_DISCHRG+VTT_PCH_DISCHRG+0.675VS_DISCHRG

61

Q6302A
UM6K1N

2

@

+3VA

12

R6302

100KOhm

61

@

R1.1 Mount SUSC_EC# discharge schematic for power timing 0808

+1.5VS+0.675VS +1.05VS +5VS

12

R6305
330Ohm

@

+1.5VS_DISCHRG

34

Q6302B
UM6K1N

5

@

+3V

12

R6311
330Ohm

+3V_DISCHRG

@

34

Q6306B

UM6K1N

5

@

VGA Discharge Circuit

R1.2 2012/12/10
changed to +1.35VS_VGA

R1.2 2013/01/02
changed to 124ohm from 330ohm

R1.2 2013/01/13
changed to 124ohm from 330ohm

R6316

1 2

A A

DGPU_PWR_EN23

100KOhm

VGA_DISCHRG_CTL

/DGPU

5

+3VA

12

R6317
100KOhm

/DGPU

VGA_DISCHRG_EN

34

Q6308B
UM6K1N

/DGPU

+3VS_VGA +1.35VS_VGA+VGA_VCORE

12

R6318
124Ohm

10V320000071
/DGPU

61

Q6308A
UM6K1N

2

/DGPU

5

12

R6319
330Ohm

/DGPU

+3VS_VGA_DISCHRG

34

Q6309B
UM6K1N

/DGPU

61

2

/DGPU

R1.2 2013/01/02
changed to 124ohm from 330ohm

12

R6320
124Ohm

10V320000071
/DGPU

+1.35VS_VGA_DISCHRG+VGA_VCORE_DISCHRG

Q6309A
UM6K1N

34

Q6310B
UM6K1N

5

/DGPU

+1.05VS_VGA

12

R6321
10Ohm

+1.05VS_VGA_DISCHRG

61

Q6310A
UM6K1N

2

/DGPU

/DGPU

Unmount +VGA_Vcore discharg

DC-IN/ DISCHARGE

DC-IN/ DISCHARGE

DC-IN/ DISCHARGE

Title :

Title :

Title :

Engineer:

Wing_Cheng

Engineer:

Wing_Cheng

Engineer:

VA70_HW

VA70_HW

VA70_HW

1

Wing_Cheng

63 96Friday, January 18, 2013

63 96Friday, January 18, 2013

63 96Friday, January 18, 2013

Rev

Rev

Rev

1.0

1.0

1.0

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

5

D D

C C

4

3

2

1

B B

A A

DC-IN/ DISCHARGE

DC-IN/ DISCHARGE

DC-IN/ DISCHARGE

Title :

Title :

Title :

Engineer:

Wing_Cheng

Engineer:

Wing_Cheng

Engineer:

VA70_HW

VA70_HW

VA70_HW

Wing_Cheng

64 96Friday, January 18, 2013

64 96Friday, January 18, 2013

64 96Friday, January 18, 2013

Rev

Rev

Rev

1.0

1.0

1.0

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

Size Project Name

Size Project Name

Size Project Name

E

E

E

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

1

5

PWR BRD/ AMBIENT/ HALL CONN.

4

3

2

1

+5VSUS +3VA

D D

R1.2 2012/11/06

工工工工工工

PWR_SW #_M30

R6503 33Ohm

R1.2 2012/11/28
D6501 pin2 is connected

2

12

3

T6501

1

D6501

1

AZ2025-02S

PWR_SW #_S

0.1UF/16V
C6504

@

PWRLED _ON#

@

12

1 2

10PF/50V
C6508

LID_SW#30,37

1 2

10PF/50V
C6512

0.1UF/25V
C6505

1 2

1 2

10PF/50V
C6506

12V18AW SM001

FPC_CON_10P

12

SIDE2

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

11

SIDE1

CON6504

PWR_BL UE_LED#30,66

PWR_AM BER_LED#30,66

R6509 0Ohm

R6510 0Ohm

12

12

@

PWRLED _ON#

R1.2-28

C C

R1.0 remove VG70 POWER connector CON6503 0719

change Power LED CON6503 circuit

DEBUG CARD CONN.

B B

1 2

C6503 0.1UF/16V

@

LPC_AD021,3 0,43

LPC_AD121,3 0,43

LPC_AD221,3 0,43

LPC_AD321,3 0,43

LPC_FRAME#21,30,4 3

A A

INT_SERIRQ21,30,43

EXT_SMI#25,30

R6501 0Ohm@

R6502 0Ohm@

5

12

INT_SERIRQ_C

12

EXT_SMI#_C

CLK_DEBUG21

Frank
0425_modify Debug port
(add EXT_SMI#_C and INT_SERIRQ_C)

4

LPC_AD0

LPC_AD1
EXT_SMI#_C
LPC_AD2
INT_SERIRQ_C
LPC_AD3

LPC_FRAME#

CLK_DEBUG

CR R1.0 change part for EOL. J oyoung0803
PS. Pin define is reverse.

+3V+3VS

R6506
0Ohm

12

R6505
0Ohm

CON6502

1212SIDE1

11

11

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

SIDE2

FPC_CON_12P

12V18GW SM045

Debug port power is changed to +3VS

@

13

14

3

MDC/ PWR SW/ Debug

MDC/ PWR SW/ Debug

MDC/ PWR SW/ Debug

Title :

Title :

Title :

Wing_Cheng

Wing_Cheng

1

Wing_Cheng

65 96Friday, January 18, 2013

65 96Friday, January 18, 2013

65 96Friday, January 18, 2013

Rev

Rev

Rev

1.0

1.0

1.0

Engineer:

Engineer:

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

Size Proj ect Name

Size Proj ect Name

Size Proj ect Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Engineer:

VA70_HW

VA70_HW

VA70_HW

12

5

Power LED

+5VSUS

12

R6608
10KOhm

D D

PWR_BLUE_LED#30,65

PWR_AMBER_LED#30, 65

WLAN LED

C C

WLAN_LED25

@

61

Q6602A

UM6K1N

@

12

Q6602B

@

UM6K1N

2

R6613
100KOhm

5

@

R1.2 2012/11/08
cost dwon 0ohm

SP6601

1 2

+5VA

+5VS

3

D

Q6604

1

2N7002

G

S

2

@

LED_WLAN#55 SATA_LED#20

BLUE&ORANGE

07V130000038

34

R0402

R6617 0Ohm@

R6618 0Ohm

+3VS_WLAN

12

R6615
10KOhm

Q6605A

UM6K1N

LED6601

R6607

360Ohm

1 2

1 2

+3VS_WLAN +3VS

12

61

2

1 2

R6614
100KOhm

LED_WLAN

+5VSUS

1

A

C23C1

Q6605B

UM6K1N

SR-65

2

R6606
560Ohm

10V240000029

1 2

5

4

1

2

1 2

LED_WLAN#_C

34

@

3

LED6605
AMBER

07V130000055

R6616
499Ohm

10V220000076

12

C6602
47PF/50V

1AV200000015

3

2

+5VA

1

Charger LED

12

C6601

@

1

R6604

360Ohm

SR-65

A

C23C1

2

R6602
560Ohm

1 2

1 2

R6619
0Ohm

Q6601B

1 2

UM6K1N

@

5

LED6602

BLUE&ORANGE

07V130000038

+5VA

0209

@

1 2

R6611 200KOhm

CHG_LED_BLUE#30

BAT_ORG_LED#30

12

@

C6603
1UF/6.3V

+5VS

HDD LED

1 2

R6610 0Ohm

12

R6612
100KOhm

61

Q6603B

@

Q6603A

UM6K1N

UM6K1N

2

@

5

@

1

2

1 2

Storage_LED#

34

UM6K1N

3

R6605
300OHM

Q6601A

@

2

LED6604
BLUE

07V130000017

61

47PF/50V

1AV200000015

R1.2 2012/11/29
cost dwon

34

R6620
0Ohm

1 2

5

Screw A x 4 (PTH)

H6621

1

C354D126

H6622

1

C354D126

H6614

1

C354D126

H6625

1

C354D126

Screw A x 2 (NPTH)

H6620

1

NP_NC

2

GND1

GND4

3

GND2

GND3

C354D126N

5
4

H6615

1

NP_NC

2

GND1

GND4

3

GND2

GND3

RT413X394CBD126N

Screw hole T x 1

H6623

1

C354D126

Screw hole Q x 6

H6608

1

NP_NC

5
4

Screw hole S x 2

H6616

1

NP_NC

2
3

1
2
3

H6624

1

NP_NC

2
3

GND1
GND2

C354D126N

5

GND4

4

GND3

4

GND1

GND4

GND2

GND3

RT394x384CB354D126N

H6617

NP_NC
GND1

GND4

GND2

GND3

RT394x384CB354D126N

5
4

5
4

2
3

1
2
3

1
2
3

S6635

1

1

EMI_SPRING_PAD

/DGPU

3

GND1

GND4

GND2

GND3

ST354CB354D126N

H6609

NP_NC
GND1

GND4

GND2

GND3

ST354CB354D126N

H6610

NP_NC
GND1
GND2

ST354CB354D126N

GND4
GND3

5
4

5
4

5
4

H6613

1

NP_NC

2

GND1

3

GND2

ST354CB354D126N

1

NP_NC

2

GND1

3

GND2

1
2
3

GND4
GND3

H6618

GND4
GND3

ST354CB354D126N

H6619

NP_NC
GND1

GND4

GND2

GND3

ST354CB354D126N

5
4

5
4

5
4

2

WLAN NUT

H6628

A40M20-64AS

H6629

A40M20-64AS

PCH Local Side Symbol

H6611

CT236B67ID47

H6612

CT236B67ID47

BU1-RD Div.1-HW RD Dept .1

BU1-RD Div.1-HW RD Dept .1

BU1-RD Div.1-HW RD Dept .1

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Screw hole V x 1

H6607

1

P_GND

7

NP_NC1

8

NP_NC2

9

NP_NC3

10

NP_NC4

11

NP_NC5

12

NP_NC6

13

NP_NC7

14

NP_NC8

15

NP_NC9

25

NP_NC10

26

NP_NC11

27

NP_NC12

28

NP_NC13

29

NP_NC14

30

NP_NC15

31

NP_NC16

32

NP_NC17

33

NP_NC18

RTCBD126

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

VA70_HW

VA70_HW

VA70_HW

1

NP_NC19
NP_NC20
NP_NC21
NP_NC22
NP_NC23
NP_NC24
NP_NC25
NP_NC26
NP_NC27
NP_NC28
NP_NC29
NP_NC30
NP_NC31
NP_NC32
NP_NC33
NP_NC34
NP_NC35
NP_NC36

LED/ CIR/ FN/ SCREW

LED/ CIR/ FN/ SCREW

LED/ CIR/ FN/ SCREW

Wing_Cheng

Wing_Cheng

Wing_Cheng

66 96Friday , January 18, 2013

66 96Friday , January 18, 2013

66 96Friday , January 18, 2013

43
44
45
46
47
48
49
50
51
61
62
63
64
65
66
67
68
69

Rev

Rev

Rev

1.0

1.0

1.0

CPU Screw B x 4 Screw hole R x 1

B B

A A

H6601

1

CRT276X315D157

H6602

1

CRT276X315D157

H6603

1

CRT276X315D157

H6604

1

CRT276X315D157

GPU Screw P x 2

H6605

1

CRT315x335CB236D138

H6606

1

CRT315x335CB236D138

Fix hole D x 1

H6633

1

CB276D138N

Fix hole N x 1

H6634

1

OB248x236DO150x138N

5

D D

C C

4

3

2

1

B B

A A

TPM

TPM

TPM

Title :

Title :

Title :

Engineer:

Engineer:

Pegatron Corp.

Pegatron Corp.

Pegatron Corp.

Size Projec t Name

Size Projec t Name

Size Projec t Name

B

B

B

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

VA70_HW

VA70_HW

VA70_HW

1

Wing_Cheng

Wing_Cheng

Wing_Cheng

67 96Friday, January 18, 2013

67 96Friday, January 18, 2013

67 96Friday, January 18, 2013

Rev

Rev

Rev

1.0

1.0

1.0

5

D D

C C

4

3

2

1

B B

A A

Pegatron Corp.

Pegatron Corp.

Pegatron Corp.

Size Project Name

Size Project Name

Size Project Name

A

A

A

Date: Sheet of

Date: Sheet of

Date: Sheet of

5

4

3

2

VA70_HW

VA70_HW

VA70_HW

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

Finger Printer

Finger Printer

Finger Printer

Wing_Cheng

Wing_Cheng

Wing_Cheng

68 96Friday, January 18, 2013

68 96Friday, January 18, 2013

68 96Friday, January 18, 2013

1

Rev

Rev

Rev

1.0

1.0

1.0

5

D D

C C

4

3

2

1

B B

A A

Title :

Title :

Title :

Engineer:

Engineer:

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

BU1-RD Div.1-HW RD Dept.1

Size Project Name

Size Project Name

Size Project Name

A

A

A

Date: Sheet of

Date: Sheet of

5

4

3

Date: Sheet of

2

Engineer:

G-Sensor TSH35TR

G-Sensor TSH35TR

G-Sensor TSH35TR

Wing_Cheng

Wing_Cheng

Wing_Cheng

69 96Friday, January 18, 2013

69 96Friday, January 18, 2013

69 96Friday, January 18, 2013

1

Rev

Rev

Rev

1.0

1.0

1.0

5

PEG_TXP[15:0]3
PEG_TXN[15:0]3

PEG_RXP[15:0]3
PEG_RXN[15:0]3

DGPU_HOLD_RST#23

PortPCIE

Port 0~15X16

Port 0~7

5

BUF_PLT_RST#23,30,33,40,43,47,53,55

R7020 0Ohm@

+3VS_VGA

3

D

Q7001
2N7002

/DGPU

1

G

2

S

PEG_TXP0
PEG_TXN0

PEG_TXP1
PEG_TXN1

PEG_TXP2
PEG_TXN2

PEG_TXP3
PEG_TXN3

PEG_TXP4
PEG_TXN4

PEG_TXP5
PEG_TXN5

PEG_TXP6
PEG_TXN6

PEG_TXP7
PEG_TXN7

PEG_TXP8
PEG_TXN8

PEG_TXP9
PEG_TXN9

PEG_TXP10
PEG_TXN10

PEG_TXP11
PEG_TXN11

PEG_TXP12
PEG_TXN12

PEG_TXP13
PEG_TXN13

PEG_TXP14
PEG_TXN14

PEG_TXP15
PEG_TXN15

+3VS_VGA

R7008
10KOhm

/DGPU

1 2

CLK_PCIE_PEG_PCH21
CLK_PCIE_PEG#_PCH21

PEG_RXP0
PEG_RXN0

PEG_RXP1
PEG_RXN1

PEG_RXP2
PEG_RXN2

PEG_RXP3
PEG_RXN3

PEG_RXP4
PEG_RXN4

PEG_RXP5
PEG_RXN5

PEG_RXP6
PEG_RXN6

PEG_RXP7
PEG_RXN7

PEG_RXP8

PEG_RXP9
PEG_RXN9

PEG_RXP10

PEG_RXP11

PEG_RXP12

PEG_RXP13

PEG_RXP14

PEG_RXP15

D D

CLKREQ_PEG#21

C C

B B

EGL

PGV X8

A A

U7002

A

1

VCC

B

2

3 4

GND

SN74LVC1G08DCKR

/DGPU

12

4

5

Y

1 2

CLKREQ_PEG#_R

12

C7032 0.22UF/10V

12

C7021 0.22UF/10V

12

C7018 0.22UF/10V

12

C7019 0.22UF/10V

12

C7024 0.22UF/10V

12

C7031 0.22UF/10V

12

C7020 0.22UF/10V

12

C7022 0.22UF/10V

12

C7023 0.22UF/10V

12

C7028 0.22UF/10V

12

C7036 0.22UF/10V

12

C7030 0.22UF/10V

12

C7026 0.22UF/10V

12

C7025 0.22UF/10V

12

C7029 0.22UF/10V

12

C7027 0.22UF/10V

12

C7034 0.22UF/10V

12

C7033 0.22UF/10V

12

C7046 0.22UF/10V

12

C7035 0.22UF/10V

12

C7038 0.22UF/10V

12

C7037 0.22UF/10V

12

C7040 0.22UF/10V

12

C7039 0.22UF/10V

12

C7042 0.22UF/10V

12

C7041 0.22UF/10V

12

C7047 0.22UF/10V

12

C7043 0.22UF/10V

12

C7049 0.22UF/10V

12

C7048 0.22UF/10V

12

C7051 0.22UF/10V

12

C7050 0.22UF/10V

4

PEX_RST

R7009
100KOhm

/DGPU

/DGPU

/DGPU

/DGPU

/DGPU

/DGPU

/DGPU

/DGPU

/DGPU

/DGPU

/DGPU

/DGPU

/DGPU

/DGPU

/DGPU

/DGPU

/DGPU

/EGL

/EGL

/EGL

/EGL

/EGL

/EGL

/EGL

/EGL

/EGL

/EGL

/EGL

/EGL

/EGL

/EGL

/EGL

/EGL

+3VS_VGA

12

PEX_TX0+
PEX_TX0-

PEX_TX1+
PEX_TX1-

PEX_TX2+
PEX_TX2-

PEX_TX3+
PEX_TX3-

PEX_TX4+
PEX_TX4-

PEX_TX5+
PEX_TX5-

PEX_TX6+
PEX_TX6-

PEX_TX7+
PEX_TX7-

PEX_TX8+
PEX_TX8-PEG_RXN8

PEX_TX9+
PEX_TX9-

PEX_TX10+
PEX_TX10-PEG_RXN10

PEX_TX11+
PEX_TX11-PEG_RXN11

PEX_TX12+
PEX_TX12-PEG_RXN12

PEX_TX13+
PEX_TX13-PEG_RXN13

PEX_TX14+
PEX_TX14-PEG_RXN14

PEX_TX15+
PEX_TX15-PEG_RXN15

C7053

0.1UF/10V

10%
@

PEX_RST 74

U7001A

AJ11

PEX_WAKE_N

AJ12

PEX_RST_N

AK12

PEX_CLKREQ_N

AL13

PEX_REFCLK

AK13

PEX_REFCLK_N

AK14

PEX_TX0

AJ14

PEX_TX0_N

AN12

PEX_RX0

AM12

PEX_RX0_N

AH14

PEX_TX1

AG14

PEX_TX1_N

AN14

PEX_RX1

AM14

PEX_RX1_N

AK15

PEX_TX2

AJ15

PEX_TX2_N

AP14

PEX_RX2

AP15

PEX_RX2_N

AL16

PEX_TX3

AK16

PEX_TX3_N

AN15

PEX_RX3

AM15

PEX_RX3_N

AK17

PEX_TX4

AJ17

PEX_TX4_N

AN17

PEX_RX4

AM17

PEX_RX4_N

AH17

PEX_TX5

AG17

PEX_TX5_N

AP17

PEX_RX5

AP18

PEX_RX5_N

AK18

PEX_TX6

AJ18

PEX_TX6_N

AN18

PEX_RX6

AM18

PEX_RX6_N

AL19

PEX_TX7

AK19

PEX_TX7_N

AN20

PEX_RX7

AM20

PEX_RX7N

AK20

PEX_TX8

AJ20

PEX_TX8_N

AP20

PEX_RX8

AP21

PEX_RX8_N

AH20

PEX_TX9

AG20

PEX_TX9_N

AN21

PEX_RX9

AM21

PEX_RX9_N

AK21

PEX_TX10

AJ21

PEX_TX10_N

AN23

PEX_RX10

AM23

PEX_RX10_N

AL22

PEX_TX11

AK22

PEX_TX11_N

AP23

PEX_RX11

AP24

PEX_RX11_N

AK23

PEX_TX12

AJ23

PEX_TX12_N

AN24

PEX_RX12

AM24

PEX_RX12_N

AH23

PEX_TX13

AG23

PEX_TX13_N

AN26

PEX_RX13

AM26

PEX_RX13_N

AK24

PEX_TX14

AJ24

PEX_TX14_N

AP26

PEX_RX14

AP27

PEX_RX14_N

AL25

PEX_TX15

AK25

PEX_TX15_N

AN27

PEX_RX15

AM27

PEX_RX15_N

N14P-GT1

1/19 PCI_EXPRESS

/DGPU

3

PEX_IOVDD1
PEX_IOVDD2
PEX_IOVDD3
PEX_IOVDD4
PEX_IOVDD5
PEX_IOVDD6

PEX_IOVDDQ1
PEX_IOVDDQ2
PEX_IOVDDQ3
PEX_IOVDDQ4
PEX_IOVDDQ5
PEX_IOVDDQ6
PEX_IOVDDQ7
PEX_IOVDDQ8

PEX_IOVDDQ9
PEX_IOVDDQ10
PEX_IOVDDQ11
PEX_IOVDDQ12
PEX_IOVDDQ13
PEX_IOVDDQ14

PEX_PLL_HVDD

PEX_SVDD_3V3

VDD_SENSE

GND_SENSE

NC12

PEX_TSTCLK_OUT

PEX_TSTCLK_OUT_N

PEX_PLLVDD

TESTMODE

PEX_TERMP

3

GPU BOM Optional Definition

@ => Unmount.

/DGPU => Optimus SKU.

/EGL => When N14E-GL is mounted, we need to mount this optional.

/PGV => When N14P-GV is mounted, we need to mount this optional.

/EGL_PGV => When N14E-GL or N14P-GV are mounted, we need to mount this optional.

AG19
AG21
AG22
AG24
AH21
AH25

AG13
AG15
AG16
AG18
AG25
AH15
AH18
AH26
AH27
AJ27
AK27
AL27
AM28
AN28

AH12

AG12

L4

L5

P8

AJ26
AK26

AG26

AK11

AP29

+PEX_PLLVDD

GPU_TESTMODE

PEX_TERMP

12

12

C7002

C7001

1UF/6.3V

1UF/6.3V

/DGPU

12

12

C7008

1UF/6.3V

/DGPU

PLACE UNDER BGA PLACE BETWEEN BGA AND POWER SUPPLY

0.2 mm

0.2 mm

PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#

R7004 10KOhm/DGPU

R7003 2.49KOhm/DGPU

1 2

/DGPU

C7006

1UF/6.3V

1 2

/DGPU

PLACE NEAR BGA

PLACE NEAR BGA

NVDD_SENSE 87

NVDD_GND_SENSE 87

1 2

R7007 200Ohm@ 1%

1 2

1 2

C7003

4.7UF/6.3V

/DGPU

C7007

4.7UF/6.3V

/DGPU

12

C7016

0.1UF/16V

/DGPU

12

C7009

10UF/6.3V

/DGPU

12

C7013

10UF/6.3V

/DGPU

C7017

4.7UF/6.3V

1 2

/DGPU

12

PLACE NEAR BALL

2

+3VS_VGA

C7052

0.1UF/16V

/DGPU

2

1 2

12

C7004

10UF/6.3V

/DGPU

12

C7011

10UF/6.3V

/DGPU

C7015

4.7UF/6.3V

/DGPU

12

C7005

22UF/6.3V

/DGPU

12

C7012

22UF/6.3V

/DGPU

12

C7044

1UF/6.3V

/DGPU

PLACE NEAR BGA

12

12

+1.05VS_VGA

C7010

22UF/6.3V

/DGPU

C7014

22UF/6.3V

/DGPU

C7045

4.7UF/6.3V

1 2

/DGPU

1

+1.05VS_VGA
+3VS_VGA

R7022 0Ohm/DGPU

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

12

P/N

P/N

P/N

+1.05VS_VGA 63,71,72,91
+3VS_VGA 63,71,72,74,75,87,91

+1.05VS_VGA

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

VA70_HW

VA70_HW

VA70_HW

1

N14xxx-PCIE

N14xxx-PCIE

N14xxx-PCIE

Panda_Wang

Panda_Wang

Panda_Wang

70 99Friday , January 18, 2013

70 99Friday , January 18, 2013

70 99Friday , January 18, 2013

Rev

Rev

Rev

1.3

1.3

1.3

5

FBAD[0..63]76,77

FBA_DBI[0..7]76,77
FBA_EDC[0..7]76,77
FBA_CMD[0..31]76,77

FBBD[0..63]78,79

FBB_DBI[0..7]78,79
FBB_EDC[0..7]78,79
FBB_CMD[0..31]78,79

4

3

2

+1.05VS_VGA
+1.35VS_VGA
+3VS_VGA

1

+1.05VS_VGA 63,70,72,91
+1.35VS_VGA 63,75,76,77,78,79,84
+3VS_VGA 63,70,72,74,75,87,91

U7001B

2/19 FBA

U7001C

3/19 FBB

BOT SIDE

L28

T7101

FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBAD32
FBAD33
FBAD34
FBAD35
FBAD36
FBAD37
FBAD38
FBAD39
FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63

FBA_DBI0
FBA_DBI1
FBA_DBI2
FBA_DBI3
FBA_DBI4
FBA_DBI5
FBA_DBI6
FBA_DBI7

FBA_EDC0
FBA_EDC1
FBA_EDC2
FBA_EDC3
FBA_EDC4
FBA_EDC5
FBA_EDC6
FBA_EDC7

FBA_D0

M29

FBA_D1

L29

FBA_D2

M28

FBA_D3

N31

FBA_D4

P29

FBA_D5

R29

FBA_D6

P28

FBA_D7

J28

FBA_D8

H29

FBA_D9

J29

FBA_D10

H28

FBA_D11

G29

FBA_D12

E31

FBA_D13

E32

FBA_D14

F30

FBA_D15

C34

FBA_D16

D32

FBA_D17

B33

FBA_D18

C33

FBA_D19

F33

FBA_D20

F32

FBA_D21

H33

FBA_D22

H32

FBA_D23

P34

FBA_D24

P32

FBA_D25

P31

FBA_D26

P33

FBA_D27

L31

FBA_D28

L34

FBA_D29

L32

FBA_D30

L33

FBA_D31

AG28

FBA_D32

AF29

FBA_D33

AG29

FBA_D34

AF28

FBA_D35

AD30

FBA_D36

AD29

FBA_D37

AC29

FBA_D38

AD28

FBA_D39

AJ29

FBA_D40

AK29

FBA_D41

AJ30

FBA_D42

AK28

FBA_D43

AM29

FBA_D44

AM31

FBA_D45

AN29

FBA_D46

AM30

FBA_D47

AN31

FBA_D48

AN32

FBA_D49

AP30

FBA_D50

AP32

FBA_D51

AM33

FBA_D52

AL31

FBA_D53

AK33

FBA_D54

AK32

FBA_D55

AD34

FBA_D56

AD32

FBA_D57

AC30

FBA_D58

AD33

FBA_D59

AF31

FBA_D60

AG34

FBA_D61

AG32

FBA_D62

AG33

FBA_D63

P30

FBA_DQM0

F31

FBA_DQM1

F34

FBA_DQM2

M32

FBA_DQM3

AD31

FBA_DQM4

AL29

FBA_DQM5

AM32

FBA_DQM6

AF34

FBA_DQM7

M31

FBA_DQS_WP0

G31

FBA_DQS_WP1

E33

FBA_DQS_WP2

M33

FBA_DQS_WP3

AE31

FBA_DQS_WP4

AK30

FBA_DQS_WP5

AN33

FBA_DQS_WP6

AF33

FBA_DQS_WP7

M30

FBA_DQS_RN0

H30

FBA_DQS_RN1

E34

FBA_DQS_RN2

M34

FBA_DQS_RN3

AF30

FBA_DQS_RN4

AK31

FBA_DQS_RN5

AM34

FBA_DQS_RN6

AF32

FBA_DQS_RN7

H26

1

FB_VREF

N14P-GT1

/DGPU

FBA_CMD_RFU0
FBA_CMD_RFU1

FBA_WCK01_N

FBA_WCK23_N

FBA_WCK45_N

FBA_WCK67_N

FBA_WCKB01_N

FBA_WCKB23_N

FBA_WCKB45_N

FBA_WCKB67_N

FBA_PLL_AVDD

Place Close to BALL

D D

C C

B B

A A

FB_CLAMP

FB_DLL_AVDD

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8

FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31

FBA_DEBUG0
FBA_DEBUG1

FBA_CLK0

FBA_CLK0_N

FBA_CLK1

FBA_CLK1_N

FBA_WCK01

FBA_WCK23

FBA_WCK45

FBA_WCK67

FBA_WCKB01

FBA_WCKB23

FBA_WCKB45

FBA_WCKB67

E1

FB_CLAMP_R

K27

+FB_DLL_AVDD_R

50mA

C7115

0.1UF/10V

10%
/DGPU

R7121 0Ohm/DGPU

R7130 10KOhm/DGPU

12

FB_DLL_AVDD

EGL

1.05V

PGV

20121212(Eli)
FB_DLL_AVDD table follow NV
SPEC DG_06246_001_V04
Page121

U30

FBA_CMD0

T31

FBA_CMD1

U29

FBA_CMD2

R34

FBA_CMD3

R33

FBA_CMD4

U32

FBA_CMD5

U33

FBA_CMD6

U28

FBA_CMD7FBA_CMD7

V28

FBA_CMD8

V29

FBA_CMD9FBA_CMD9

V30

FBA_CMD10

U34

FBA_CMD11

U31

FBA_CMD12

V34

FBA_CMD13

V33

FBA_CMD14

Y32

FBA_CMD15

AA31

FBA_CMD16

AA29

FBA_CMD17

AA28

FBA_CMD18

AC34

FBA_CMD19

AC33

FBA_CMD20

AA32

FBA_CMD21

AA33

FBA_CMD22

Y28

FBA_CMD23

Y29

FBA_CMD24

W31

FBA_CMD25FBA_CMD25

Y30

FBA_CMD26

AA34

FBA_CMD27

Y31

FBA_CMD28FBA_CMD28

Y34

FBA_CMD29

Y33

FBA_CMD30

V31

FBA_CMD31

R32
AC32

R28

FBA_DEBUG0

AC28

R30
R31
AB31
AC31

K31
L30
H34
J34
AG30
AG31
AJ34
AK34

J30
J31
J32
J33
AH31
AJ31
AJ32
AJ33

U27

120mA 120mA

R7101 60.4Ohm 1%@

FBA_DEBUG1 FBC_DEBUG1

R7102 60.4Ohm 1%@

12

C7109

0.1UF/10V

/DGPU

12

FB_CLAMP

12

GND

FB_CLAMP 30,74,84

/DGPU

L7102 30Ohm/100Mhz

12

C7121
22UF/6.3V

/DGPU

+1.05VS_VGA

21

GDDR5 CMD Mappi ng Table

50mA

35mA

<0..31> <32..63>

12

15

5

0

8

10

11

FBA_CMD14

FBA_CMD30

R7124 10KOhm/D GPU

R7123 10KOhm/D GPU

+1.35VS_VGA

12

12

2

FBA_CMD29

FBA_CMD13

R7125 10KOhm/D GPU

R7126 10KOhm/D GPU

12

12

GND

1

3

4

7

6

9

14

13

+1.35VS_VGA

1 2
1 2

FBA_CLK0 76
FBA_CLK0# 76
FBA_CLK1 77
FBA_CLK1# 77

FBA_WCK01 76
FBA_WCK01# 76
FBA_WCK23 76
FBA_WCK23# 76
FBA_WCK45 77
FBA_WCK45# 77
FBA_WCK67 77
FBA_WCK67# 77

+FB_PLL_AVDD +FB_PLL_AVDD

12

C7119
22UF/6.3V

/DGPU

+FB_PLL_AVDD

FBx_PLL_AVDD

EGL

3.3V

PGV

1.05V

Place Close to BGA

12

C7112
1UF/6.3V

10%
/DGPU

120mA

62mA

30Ohm/100Mhz

30Ohm/100Mhz

20121214(Eli)
R7129 change to bead type
30ohm(ESR=0.01ohm) follow
NV FAE recommend

28

31

21

16

24

26

27

18

17

19

20

23

22

25

30

29

L7101

/PGV

L7103

/EGL

MEMORY

RAS*

CAS*

WE*

CS*

ABI*

A0_A10

A1_A9

A2_BA0

A3_BA3

A4_BA2

A5_BA1

A6_A11

A7_A8

A12_RFU

CKE*

RESET*

+1.05VS_VGA

21

12

C7113
1UF/6.3V

10%

/PGV

+3VS_VGA

21

12

C7122
1UF/6.3V

10%

/EGL

FBBD0
FBBD1
FBBD2
FBBD3
FBBD4
FBBD5
FBBD6
FBBD7
FBBD8
FBBD9
FBBD10
FBBD11
FBBD12
FBBD13
FBBD14
FBBD15
FBBD16
FBBD17
FBBD18
FBBD19
FBBD20
FBBD21
FBBD22
FBBD23
FBBD24
FBBD25
FBBD26
FBBD27
FBBD28
FBBD29
FBBD30
FBBD31
FBBD32
FBBD33
FBBD34
FBBD35
FBBD36
FBBD37
FBBD38
FBBD39
FBBD40
FBBD41
FBBD42
FBBD43
FBBD44
FBBD45
FBBD46
FBBD47
FBBD48
FBBD49
FBBD50
FBBD51
FBBD52
FBBD53
FBBD54
FBBD55
FBBD56
FBBD57
FBBD58
FBBD59
FBBD60
FBBD61
FBBD62
FBBD63

FBB_DBI0
FBB_DBI1
FBB_DBI2
FBB_DBI3
FBB_DBI4
FBB_DBI5
FBB_DBI6
FBB_DBI7

FBB_EDC0
FBB_EDC1
FBB_EDC2
FBB_EDC3
FBB_EDC4
FBB_EDC5
FBB_EDC6
FBB_EDC7

G9
E9
G8
F9

F11

G11

F12

G12

G6
F5
E6
F6
F4
G4
E2
F3
C2
D4
D3
C1
B3
C4
B5

C5
A11
C11
D11
B11

D8

A8

C8

B8
F24

G23

E24

G24

D21
E21

G21

F21

G27

D27

G26

E27
E29
F29
E30
D30
A32
C31
C32
B32
D29
A29
C29
B29
B21
C23
A21
C21
B24
C24
B26
C26

E11

E3

A3

C9
F23
F27
C30
A24

D10

D5

C3

B9
E23
E28
B30
A23

D9

E4

B2

A9
D22
D28
A30
B23

FBB_D0
FBB_D1
FBB_D2
FBB_D3
FBB_D4
FBB_D5
FBB_D6
FBB_D7
FBB_D8
FBB_D9
FBB_D10
FBB_D11
FBB_D12
FBB_D13
FBB_D14
FBB_D15
FBB_D16
FBB_D17
FBB_D18
FBB_D19
FBB_D20
FBB_D21
FBB_D22
FBB_D23
FBB_D24
FBB_D25
FBB_D26
FBB_D27
FBB_D28
FBB_D29
FBB_D30
FBB_D31
FBB_D32
FBB_D33
FBB_D34
FBB_D35
FBB_D36
FBB_D37
FBB_D38
FBB_D39
FBB_D40
FBB_D41
FBB_D42
FBB_D43
FBB_D44
FBB_D45
FBB_D46
FBB_D47
FBB_D48
FBB_D49
FBB_D50
FBB_D51
FBB_D52
FBB_D53
FBB_D54
FBB_D55
FBB_D56
FBB_D57
FBB_D58
FBB_D59
FBB_D60
FBB_D61
FBB_D62
FBB_D63

FBB_DQM0
FBB_DQM1
FBB_DQM2
FBB_DQM3
FBB_DQM4
FBB_DQM5
FBB_DQM6
FBB_DQM7

FBB_DQS_WP0
FBB_DQS_WP1
FBB_DQS_WP2
FBB_DQS_WP3
FBB_DQS_WP4
FBB_DQS_WP5
FBB_DQS_WP6
FBB_DQS_WP7

FBB_DQS_RN0
FBB_DQS_RN1
FBB_DQS_RN2
FBB_DQS_RN3
FBB_DQS_RN4
FBB_DQS_RN5
FBB_DQS_RN6
FBB_DQS_RN7

N14P-GT1

/DGPU

FBB_CMD0
FBB_CMD1
FBB_CMD2
FBB_CMD3
FBB_CMD4
FBB_CMD5
FBB_CMD6
FBB_CMD7
FBB_CMD8

FBB_CMD9
FBB_CMD10
FBB_CMD11
FBB_CMD12
FBB_CMD13
FBB_CMD14
FBB_CMD15
FBB_CMD16
FBB_CMD17
FBB_CMD18
FBB_CMD19
FBB_CMD20
FBB_CMD21
FBB_CMD22
FBB_CMD23
FBB_CMD24
FBB_CMD25
FBB_CMD26
FBB_CMD27
FBB_CMD28
FBB_CMD29
FBB_CMD30
FBB_CMD31

FBB_CMD_RFU0
FBB_CMD_RFU1

FBB_DEBUG0
FBB_DEBUG1

FBB_CLK0

FBB_CLK0_N

FBB_CLK1

FBB_CLK1_N

FBB_WCK01

FBB_WCK01_N

FBB_WCK23

FBB_WCK23_N

FBB_WCK45

FBB_WCK45_N

FBB_WCK67

FBB_WCK67_N

FBB_WCKB01

FBB_WCKB01_N

FBB_WCKB23

FBB_WCKB23_N

FBB_WCKB45

FBB_WCKB45_N

FBB_WCKB67

FBB_WCKB67_N

FBB_PLL_AVDD

D13
E14
F14
A12
B12
C14
B14
G15
F15
E15
D15
A14
D14
A15
B15
C17
D18
E18
F18
A20
B20
C18
B18
G18
G17
F17
D16
A18
D17
A17
B17
E17

C12
C20

G14
G20

D12
E12
E20
F20

F8
E8
A5
A6
D24
D25
B27
C27

D6
D7
C6
B6
F26
E26
A26
A27

H17

FBB_CMD0
FBB_CMD1
FBB_CMD2
FBB_CMD3
FBB_CMD4
FBB_CMD5
FBB_CMD6
FBB_CMD7
FBB_CMD8
FBB_CMD9
FBB_CMD10
FBB_CMD11
FBB_CMD12
FBB_CMD13
FBB_CMD14
FBB_CMD15
FBB_CMD16
FBB_CMD17
FBB_CMD18
FBB_CMD19
FBB_CMD20
FBB_CMD21
FBB_CMD22
FBB_CMD23
FBB_CMD24
FBB_CMD25
FBB_CMD26
FBB_CMD27
FBB_CMD28
FBB_CMD29
FBB_CMD30
FBB_CMD31

FBC_DEBUG0

C7120

0.1UF/10V

10%
/DGPU

Place Close to BALLPlace Close to BGA

+1.35VS_VGA

FBB_CMD30

R7119 10KOhm/D GPU

FBB_CMD14

R7122 10KOhm/D GPU

FBB_CMD29

R7120 10KOhm/D GPU

FBB_CMD13

R7127 10KOhm/D GPU

1 2

R7103 60.4Ohm 1%@

1 2

R7104 60.4Ohm 1%@

FBB_CLK0 78
FBB_CLK0# 78
FBB_CLK1 79
FBB_CLK1# 79

FBB_WCK01 78
FBB_WCK01# 78
FBB_WCK23 78
FBB_WCK23# 78
FBB_WCK45 79
FBB_WCK45# 79
FBB_WCK67 79
FBB_WCK67# 79

12

12

12

12

12

+1.35VS_VGA

GND

N14xxx BUFFER

N14xxx BUFFER

N14xxx BUFFER

Title :

Title :

Title :

Engineer:

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

C

C

C

P/N

P/N

P/N

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

VA70_HW

VA70_HW

VA70_HW

1

Panda_Wang

Panda_Wang

Panda_Wang

71 99Friday , January 18, 2013

71 99Friday , January 18, 2013

71 99Friday , January 18, 2013

Rev

Rev

Rev

1.3

1.3

1.3

5

4

3

2

1

+1.05VS_VGA

VGA

D D

RN7201B

2.2KOhm

/DGPU

3 4

+3VS_VGA

RN7201A

2.2KOhm

/DGPU

1 2

20120731(Eli)
follow NV SPEC DG_06246_001_V03 page171
DAC didn't use

1.DACA_VDD floating

2.DAC I/O Pins floating

U7001N

20121214(Eli)
Modify RN7201 optional from @ to /DGPU and remove R7201
follow NV FAE recommend

C C

AG10

AP9

AP8

4/19 DACA

DACA_VDD

DACA_VREF

DACA_RSET

N14P-GT1 /DGPU

I2CA_SCL
I2CA_SDA

DACA_HSYNC

DACA_VSYNC

DACA_RED

DACA_GREEN

DACA_BLUE

R4
R5

AM9
AN9

AK9

AL10

AL9

DDC_CLK_VGA
DDC_DATA_VGA

+3VS_VGA

+1.05VS_VGA 63,70,71,91
+3VS_VGA 63,70,71,74,75, 87,91

X'TAL

B B

A A

5

+1.05VS_VGA

L7202 30Ohm/100Mhz

/DGPU

+1.05VS_VGA

L7203 180Ohm/100Mhz

/DGPU

21

21

12

C7211
22UF/6.3V

/DGPU

4

12

1 2

C7207
22UF/6.3V

/DGPU

C7209

4.7UF/6.3V

/DGPU

12

C7208

0.1UF/16V

/DGPU

12

12

C7210

0.1UF/16V

/DGPU

Place Close to BALLS

C7215

0.1UF/16V

/DGPU

+PLL_VDD

+SP_PLLVDD

34

RN7203B
10KOhm

/DGPU

U7001O

78 mA

71 mA

41 mA

12/19 XTAL_PLL

AD8

PLLVDD

AE8

SP_PLLVDD

AD7

VID_PLLVDD

H1

XTAL_SSIN

H3

XTAL_IN

N14P-GT1 /DGPU

VGA_XTALIN VGA_XTALOUT

C7212

8.2PF/50V

1AV200000082
/DGPU

STUFF PDs on XTALSSIN and
XTALOUTBUFF WHEN EXT_SS IS NOT USED

3

1 3

2

4

XTAL_OUTBUFF

X7201
27MHZ

/DGPU

XTAL_OUT

J4

XTAL_OUTBXTALSSIN

H2

C7213

8.2PF/50V

1AV200000082
/DGPU

2

12

RN7203A
10KOhm

/DGPU

N14xxx_RGB,XTAL

N14xxx_RGB,XTAL

N14xxx_RGB,XTAL

Title :

Title :

Title :

Engineer:

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

C

C

C

P/N

P/N

P/N

Date: Sheet

Date: Sheet of

Date: Sheet of

Engineer:

VA70_HW

VA70_HW

VA70_HW

1

Panda_Wang

Panda_Wang

Panda_Wang

of

72 99Friday , January 18, 2013

72 99Friday , January 18, 2013

72 99Friday , January 18, 2013

Rev

Rev

Rev

1.3

1.3

1.3

5

LVDS

U7001J

6/19 IFPAB

AJ8

IFPAB_RSET

D D

C C

AH8

AG8

AG9

AF8

AF7

IFPAB_PLLVDD

IFPA_IOVDD

IFPB_IOVDD

IFPAB

N14P-GT1

/DGPU

U7001K

7/19 IFPC

IFPC_RSET

IFPC_PLLVDD

HDMI

IFPC

B B

AF6

IFPC_IOVDD

N14P-GT1

/DGPU

eDP

U7001L

8/19 IFPD

4

IFPA_TXC_N

IFPA_TXC

IFPA_TXD0_N

IFPA_TXD0

IFPA_TXD1_N

IFPA_TXD1

IFPA_TXD2_N

IFPA_TXD2

IFPA_TXD3_N

IFPA_TXD3

IFPB_TXC_N

IFPB_TXC

IFPB_TXD4_N

IFPB_TXD4

IFPB_TXD5_N

IFPB_TXD5

IFPB_TXD6_N

IFPB_TXD6

IFPB_TXD7_N

IFPB_TXD7

GPIO14

IFPC_AUX_I2CW_SDA_N

IFPC_AUX_I2CW_SCL

IFPC_L3_N

IFPC_L3

IFPC_L2_N

IFPC_L2

IFPC_L1_N

IFPC_L1

IFPC_L0_N

IFPC_L0

GPIO15

20121214(Eli)
Remove R7303, R7304, R7305, R7306, R7308, R7309, R7310,
R7312, RN7301, RN7302 follow NV FAE recommend

AN6
AM6

AN3
AP3

AM5
AN5

AK6
AL6

AH6
AJ6

AH9
AJ9

AP5
AP6

AL7
AM7

AM8
AN8

AL8
AK8

N4

AG2
AG3

AG4
AG5

AH4
AH3

AJ2
AJ3

AJ1
AK1

P2

3

AB8

AD6

AC7

AC8

DVI

U7001M

9/19 IFPEF

IFPEF_PLLVDD

IFPEF_RSET

IFPE_IOVDD

IFPF_IOVDD

N14P-GT1

/DGPU

2

IFPE

IFPF

1

+3VS_VGA

IFPE_L3_N

IFPE_L3

IFPE_L2_N

IFPE_L2

IFPE_L1_N

IFPE_L1

IFPE_L0_N

IFPE_L0

GPIO18

IFPF_L3_N

IFPF_L3

IFPF_L2_N

IFPF_L2

IFPF_L1_N

IFPF_L1

IFPF_L0_N

IFPF_L0

GPIO19

AB4
AB3

AC5
AC4

AC3
AC2

AC1
AD1

AD3
AD2

R1

AF2
AF3

AF1
AG1

AD5
AD4

AF5
AF4

AE4
AE3

P3

IFPE_AUX_I2CY_SDA_N

IFPE_AUX_I2CY_SCL

IFPF_AUX_I2CZ_SDA_N

IFPF_AUX_I2CZ_SCL

20121221(Eli)

Remove T7301, T7302, T7303, T7304 follow NV FAE recommend

+3VS_VGA 63,70,71,72,74,75,87,91

IFPX channel

IFPA

IFPB

IFPC

IFPD

IFPE

IFPF

N14E-GL
Standard Mode

LVDS

LVDS

DP/HDMI

DP/eDP

DP/DVI

DP/DVI

N14P-GV
Combined Mode

LVDS(DP/DVI)

LVDS(DP/DVI)

DP/HDMI

DP/eDP

X

X

AN2

IFPD_RSET

AG7

IFPD_PLLVDD

IFPD_AUX_I2CX_SDA_N

IFPD_AUX_I2CX_SCL

IFPD

A A

AG6

IFPD_IOVDD

N14P-GT1

/DGPU

5

4

IFPD_L3_N

IFPD_L3

IFPD_L2_N

IFPD_L2

IFPD_L1_N

IFPD_L1

IFPD_L0_N

IFPD_L0

GPIO17

AK2
AK3

AK5
AK4

AL4
AL3

AM4
AM3

AM2
AM1

M6

3

GPIO14

GPIO15

GPIO17

GPIO18

GPIO19

NV SPEC
Standard mode
DG_06246_001_V03

IFPAB_HPD(LVDS)

IFPC_HPD(HDMI)

IFPD_HPD(eDP)

IFPE_HPD(DVI)

IFPF_HPD(DVI)

2

GPIO Definition

VA70_HW

NC

NC

NC

NC

NC

Title :

Title :

Title :

Engineer:

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

C

C

C

P/N

P/N

P/N

Date: Sheet

Date: Sheet of

Date: Sheet of

Engineer:

VA70_HW

VA70_HW

VA70_HW

1

N14xxx_LVDS_HDMI

N14xxx_LVDS_HDMI

N14xxx_LVDS_HDMI

Panda_Wang

Panda_Wang

Panda_Wang

73 99Friday , January 18, 2013

73 99Friday , January 18, 2013

73 99Friday , January 18, 2013

Rev

Rev

Rev

1.3

1.3

1.3

of

5

12

R7459

D D

U7001P

13/19 MISC2

ROM_CS_N

ROM_SI

11/19 MISC1

THERMDN

THERMDP

JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST_N

5

ROM_SO

ROM_SCLK

BUFRST_N

CEC

J2

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

STRAP_REFG ND

C C

R7401

40.2KOhm

1%

1 2

/DGPU

B B

T7420

T7421

T7422
T7423
T7424
T7425
T7426

A A

1

1

1
1
1
1
1

STRAP0

J7

STRAP1

J6

STRAP2

J5

STRAP3

J3

STRAP4

J1

MULTI_STRAP_REF0_GND

N14P-GT1

/DGPU

VGA_THERMD N

VGA_THERMD P

VGA_JTAG_TC K
VGA_JTAG_TMS
VGA_JTAG_TD I
VGA_JTAG_TD O
VGA_JTAG_TR ST_N

R7440
10KOhm

/DGPU

1 2

AM10
AP11
AM11

AP12
AN11

K4

K3

U7001Q

N14P-GT1

/DGPU

1KOhm

/EGL

VGA_ROM_CS_R
ROM_SO
VGA_WP#

H6

ROM_CS_N

H5

ROM_SI

H7

ROM_SO

H4

ROM_SCLK VGA_ROM_SCLK _R

10/17 Change R7402 optional from /DGPU to @
(NV FAE confirmed)(Panda)

L2

VGA_BUFRST _N

L3

VGA_CEC

+3VS_VGA

T4

I2CS_SCL

T3

I2CS_SDA

R2

I2CC_SCL

R3

I2CC_SDA

R7

I2CB_SCL

R6

I2CB_SDA

P6

GPIO0

M3

GPIO1

L6

GPIO2

P5

GPIO3

P7

GPIO4

L7

GPIO5

M7

GPIO6

N8

GPIO7

M1

GPIO8

M2

GPIO9

L1

GPIO10

M5

GPIO11

N3

GPIO12

M4

GPIO13

R8

GPIO16

P4

GPIO20

P1

GPIO21

12

R7455
10KOhm

/EGL

U7402

1

CE#

2

SO

3

WP#

4

GND

PM25LD010C-SC E

/EGL

1

T7402

12

R7442

2.2KOhm

/DGPU

SMB_CLK_VGA
SMB_DAT_VGA

2.2KOhm

2.2KOhm

2.2KOhm

2.2KOhm

12

12

12

12

34

/DGPU

12

/DGPU

34

/DGPU

12

/DGPU

1

R7444 0Ohm/DGPU

R7454 33Ohm/EGL

R7452 33Ohm/EGL

R7453 33Ohm/EGL

R7402 10KOhm@

12

R7441

2.2KOhm

/DGPU

RN7423B
RN7423A

RN7415B
RN7415A

FB_CLAMP_MON

GPIO5_PWM_VID_BO OT_EN FB_CLAMP_MON
FB_CLAMP_TGL_R EQ_R

VGA_OVERTEMP #_R
VGA_THERM_A LERT#
GPIO10_FBVREF_A LTV
VGA_VID
AC_BATT#
VGA_DPRSLPVR _GPIO16

4

+3VS_VGA+3VS_VGA+3VS_VGA +3 VS_VGA

12

R7460

C7401

12

1KOhm

0.1UF/16V

/EGL

/EGL

8

VCC

7

VGA_HOLD#

HOLD#

6

VGA_ROM_SCLK _R

SCK

5

VGA_ROM_SI_R

SIO

(2 Mb)

VGA_ROM_CS_R

VGA_ROM_SI_R

+3VS_VGA

Q7405A
UM6K1N

2

/DGPU

61

34

UM6K1N

+3VS_VGA

+3VS_VGA

+3VS_VGA +3VS_VG A

12

R7448
10KOhm

T7427

GPIO10_FBVREF_A LTV 76,77,78,79
VGA_VID 87

/DGPU

12

4

5

Q7405B

/DGPU

+3VS_VGA

R7457 0Ohm/DGPU

R7458 0Ohm@

Q7406
2N7002

1

/DGPU

G

3

2

D

S

VGA_PSI#

+3VS_VGA

12

12

FB_CLAMP_TGL_R EQ# 30

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

ROM_SI
ROM_SO
ROM_SCLK

SMB1_CLK 28,30,49
SMB1_DAT 28,30,49

PEX_RST 70,74

+3VS_VGA

12

+3VS_VGA

1 2

1 2

+3VS_VGA

1 2

1 2

R7443
10KOhm

/DGPU

R7410

45.3KOhm

1%
/DGPU

R7411

45.3KOhm

1%
@

R7404

5.1KOhm

1%
@

R7407

34.8KOhm

1%
/DGPU

R7412

34.8KOhm

1%
@

1 2

12

R7413

4.99KOhm

1%

/EGL_PGV

VGA_OVERTEMP #_R

VGA_THERM_A LERT#

VGA_PSI# 87

1 2

1 2

R7414
30KOhm

1%
@

1 2

R7415
20KOhm

1%

/EGL_PGV

1 2

R7405

4.99KOhm

1%
/DGPU

R7408
10KOhm

1%
@

3

R7417

45.3KOhm

1%
@

1 2

12

R7416

4.99KOhm

1%
/DGPU

R7406

4.99KOhm

1%

/PGV

1 2

R7409

34.8KOhm

1%

/EGL

1 2

+3VS_VGA

12

34

RN7422A

RN7422B

10KOhm

10KOhm

/DGPU

/DGPU

R7461 0Ohm@

AC_BATT#

R7462 0Ohm/DGPU

12/19 Add R7461, R7462 reserved for
protect battery(Eli)

R7450 0Ohm

SN74LVC1G08DC KR

R7451
10KOhm

@

1 2

GPIO10_FBVREF_A LTV

12/12 Change R7456 from 10K to 100K follow NV
SPEC DG_06246_001_V04 Page185 (NV FAE confirmed)(Panda)

+3VS_VGA

R7421
10KOhm

/DGPU

1 2

AC_BATT#

3

Q7401B

34

UM6K1N

@

5

5

+3VS_VGA

1 2

61

12

12

@

U7401

VCC

GND

Y

/DGPU

R7456 100KO hm/DGPU

R7423
10KOhm

@

Q7401A
UM6K1N

@

2

R7418

45.3KOhm

1%
@

1 2

R7419

45.3KOhm

1%
/DGPU

1 2

VGA_THERM_A LERT#_Q

12

A

1

B

2

34

1 2

SUB_VRNDOR

2

+3VS_VGA

+3VS_VGA 63,7 0,71,72,75,87,91

GPU DEVICE ID

N14E-GL N14P-GV

0x11E3

0x1294

VRAM CFG--ROM_SI

64Mx32

HYNIX

N14E-GL/P-GV Multi-Level Mode Strapping

Resistor Values Bit3

STRAP0

STRAP1

STRAP2

STRAP3

STRAP4

ROM_SCLK

ROM_SI

ROM_SO

N14E-GL N14P-GV

1

1

Q7403

G

2N7002

3

2

/DGPU

D

S

S

D

3

2

G

/DGPU

1

2N7002
Q7402

+3VS_VGA

FB_CLAMP 30,71,84

DGPU_EN_PW R 84,87,91,93

AC_IN_OC 30,88,9 0

0x6

Bit2

USER[3] USER[2]

3GIO_PADCFG[2]3GIO_PADCFG[3]

PCI_DEVID[2]PCI_DEVID[3]

SOR3_EXPOSED SOR2_EXPOSED

PCIE_SPEED_CHANGE_GEN3RESERVED

PCI_DEVICE[4] SUB_VENDOR

RAM_CFG[2]RAM_CFG[3]

FB[1] FB[0]

0

No Video BIOS ROMBIOS ROM is present

PEX_RST 70,74

VGA_OVERTEMP # 47

THERM_ALER T#_EC 30

2

1

N14E-GL/P-GV Strap Resistance Mapping to Hex Values

Resistor Values

4.99K

Pull-up to VDD33

1000 0000

10.0K

15.0K

20.0K

1011 0011

24.9K

30.1K

1101 0101

34.8K

45.3K

1111 0111

Bit1 Bit0

USER[1]

3GIO_PADCFG[1]

PCI_DEVID[1]

PCI_DEVID[5] PEX_PLL_EN_TERM

B build

DEVICE ID

STRAP1

STRAP2

STRAP3

STRAP4

ROM_SCLK

ROM_SI

ROM_SO

N14E-GL

0x11E3

45K PUSTRAP0

5K PD

20K PD

5K PD

45K PD

35K PD

35K PD

5K PU

GPIO Definition

NV SPEC
Standard mode
DG_06246_001_V03

GPIO0

FB_CLAMP_MON

GPIO1

MEM_VDD_CTL

GPIO2

LCD_BL_PWM

GPIO3

LCD_VCC

GPIO4

LCD_BLEN

GPIO5

Reserved

GPIO6

FB_CLAMP_TGL_REQ

GPIO7

3DVision

GPIO8

OVERT

GPIO9

ALERT

GPIO10

MEM_VREF_CTL

GPIO11

PWM_VID

GPIO12

PWR_LEVEL

GPIO13

PSI

GPIO16

FRM_LCK

GPIO20

Reserved

GPIO21

Reserved

PEGATRON C OMPUTER INC

PEGATRON C OMPUTER INC

PEGATRON C OMPUTER INC

Size Project Name

Size Project Name

Size Project Name

A2

A2

A2

P/N

P/N

P/N

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

Pull-down to GND

00011001

00101010

01001100

01101110

USER[0]

3GIO_PADCFG[0]

PCI_DEVID[0]

SOR0_EXPOSEDSOR1_EXPOSED

DP_PLL_VDD33VPCIE_MAX_SPEED

RAM_CFG[0]RAM_CFG[1]

VGA_DEVICESMB_ALT_ADDR

N14P-GV

0x1294

45K PU

45K PD

25K PD

5K PD

45K PD

5K PU

35K PD

5K PU

VA70_HW

FB_CLAMP_MON

NC

NC

NC

NC

Reserved

FB_CLAMP_TGL_REQ#

NC

VGA_OVERTEMP#

VGA_THERM_ALERT#

MEM_VREF_CTL

VGA_VID

AC_BATT#

VGA_PSI#

NC

NC

NC

Title :

N14xxx_GPIO,STRAP

Title :

N14xxx_GPIO,STRAP

Title :

N14xxx_GPIO,STRAP

Engineer:

Panda_Wang

Engineer:

Panda_Wang

Engineer:

Panda_Wang

VA70_HW

VA70_HW

VA70_HW

Rev

Rev

Rev

1.3

1.3

1.3

74 99Friday, Jan uary 18, 2013

74 99Friday, Jan uary 18, 2013

74 99Friday, Jan uary 18, 2013

5

4

3

2

1

+3VS_VGA
+1.35VS_VGA
+VGA_VCORE

+VGA_VCORE

U7001E

14/19 NVVDD

AA12

VDD1

AA14

VDD2

AA16

VDD3

AA19

VDD4

AG11

N19

N2
N21
N23
N28
N30
N32
N33

N5

N7
P13
P15
P17
P18
P20
P22
R12
R14
R16
R19
R21
R23
T13
T15
T17
T18

T2
T20
T22

VDD5
VDD6
VDD7
VDD8

VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
VDD35
VDD36
VDD37
VDD38
VDD39
VDD40
VDD41
VDD42
VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
VDD52
VDD53
VDD54
VDD55
VDD56
VDD57
VDD58
VDD59
VDD60
VDD61
VDD62
VDD63
VDD64
VDD65
VDD66
VDD67
VDD68
VDD69
VDD70
VDD71
VDD72

U7001I

GND143
GND144
GND145
GND146
GND147
GND148
GND149
GND150
GND151
GND152
GND153
GND154
GND155
GND156
GND157
GND158
GND159
GND160
GND161
GND162
GND163
GND164
GND165
GND166
GND167
GND168
GND169
GND170
GND171

GND34

N14P-GT1

/DGPU

AA21
AA23
AB13
AB15
AB17
AB18
AB20
AB22
AC12
AC14
AC16
AC19
AC21
AC23
M12
M14
M16
M19
M21
M23
N13
N15
N17
N18
N20
N22
P12
P14
P16
P19
P21
P23
R13
R15
R17
R18
R20
R22
T12
T14
T16
T19
T21
T23
U13
U15
U17
U18
U20
U22
V13
V15
V17
V18
V20
V22
W12
W14
W16
W19
W21
W23
Y13
Y15
Y17
Y18
Y20
Y22

17/19 GND_2/2

Optional CMD GNDs (2)

NC for 4-Lyr cards

D D

C C

N14P-GT1

/DGPU

B B

A A

GND

GND172
GND173
GND174
GND175
GND176
GND177
GND178
GND179
GND180
GND181
GND182
GND183
GND184
GND185
GND186
GND187
GND188
GND189
GND190
GND191
GND192
GND193
GND194
GND195
GND196
GND197
GND198
GND199
GND200

GND_OPT1
GND_OPT2

5

PLACE UNDER GPU

12

12

12

12

12

PLACE NEAR GPU

T28
T32
T5
T7
U12
U14
U16
U19
U21
U23
V12
V14
V16
V19
V21
V23
W13
W15
W17
W18
W20
W22
W28
Y12
Y14
Y16
Y19
Y21
Y23

AH11

GND36

C16
W32

C7511

0.1UF/16V

/DGPU

C7518

4.7UF/6.3V

/DGPU

C7525

4.7UF/6.3V

/DGPU

C7531

4.7UF/6.3V

/DGPU

C7547

4.7UF/6.3V

@

12

12

12

A2

12

12

C7512

0.1UF/16V

/DGPU

C7521

4.7UF/6.3V

/DGPU

C7528

4.7UF/6.3V

/DGPU

12

C7535

4.7UF/6.3V

/DGPU

12

C7568
22UF/6.3V

@

U7001G

GND1
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND2
GND15
GND16
GND17
GND18
GND19
GND20
GND21
GND22
GND23
GND24
GND3
GND25
GND26
GND27
GND28
GND29
GND30
GND31
GND32
GND33
GND35
GND4
GND37
GND38
GND39
GND40
GND41
GND42
GND43
GND44
GND45
GND46
GND47
GND48
GND49
GND50
GND51
GND52
GND53
GND54
GND55
GND56
GND57
GND58
GND59
GND60
GND61
GND62
GND63
GND64
GND65
GND66
GND67
GND68
GND69
GND70
GND71
GND72

N14P-GT1

/DGPU

12

12

12

16/19 GND_1/2

C7510

C7513

0.1UF/16V

0.1UF/16V

/DGPU

/DGPU

12

12

12

C7520

C7519

4.7UF/6.3V

4.7UF/6.3V

/DGPU

/DGPU

12

C7527

C7526

4.7UF/6.3V

4.7UF/6.3V

/DGPU

/DGPU

12

12

C7532

C7533

4.7UF/6.3V

4.7UF/6.3V

/DGPU

/DGPU

12

12

GND

C7567

C7566

22UF/6.3V

22UF/6.3V

@

@

AA17
AA18
AA20
AA22
AB12
AB14
AB16
AB19

AB2

AB21

A33
AB23
AB28
AB30
AB32

AB5

AB7
AC13
AC15
AC17
AC18
AA13
AC20
AC22

AE2
AE28
AE30
AE32
AE33

AE5

AE7
AH10
AA15
AH13
AH16
AH19

AH2
AH22
AH24
AH28
AH29
AH30
AH32
AH33

AH5

AH7

AJ7

AK10

AK7

AL12
AL14
AL15
AL17
AL18

AL2
AL20
AL21
AL23
AL24
AL26
AL28
AL30
AL32
AL33

AL5

AM13
AM16
AM19
AM22

GND GND

C7515

0.1UF/16V

/DGPU

C7522

4.7UF/6.3V

/DGPU

C7529

4.7UF/6.3V

/DGPU

12

C7534

4.7UF/6.3V

/DGPU

12

C7569
22UF/6.3V

@

GND73
GND74
GND75
GND76
GND77
GND78
GND79
GND80
GND81
GND82
GND83
GND84
GND85
GND86
GND87
GND88
GND89
GND90
GND91
GND92
GND93
GND94
GND95
GND96
GND97
GND98

GND99
GND100
GND101
GND102
GND103
GND104
GND105
GND106
GND107
GND108
GND109
GND110
GND111
GND112
GND113
GND114
GND115
GND116
GND117
GND118
GND119
GND120
GND121
GND122
GND123
GND124
GND125
GND126
GND127
GND128
GND129
GND130
GND131
GND132
GND133
GND134
GND135
GND136
GND137
GND138
GND139
GND140
GND141
GND142

4

12

12

12

C7514

0.1UF/16V

/DGPU

C7523

4.7UF/6.3V

/DGPU

C7536

4.7UF/6.3V

/DGPU

12

C7552
22UF/6.3V

/DGPU

12

C7570
22UF/6.3V

@

AM25
AN1
AN10
AN13
AN16
AN19
AN22
AN25
AN30
AN34
AN4
AN7
AP2
AP33
B1
B10
B22
B25
B28
B31
B34
B4
B7
C10
C13
C19
C22
C25
C28
C7
D2
D31
D33
E10
E22
E25
E5
E7
F28
F7
G10
G13
G16
G19
G2
G22
G25
G28
G3
G30
G32
G33
G5
G7
K2
K28
K30
K32
K33
K5
K7
M13
M15
M17
M18
M20
M22
N12
N14
N16

GND

12

12

C7517

C7516

0.1UF/16V

0.1UF/16V

/DGPU

/DGPU

GND

12

12

C7524

C7530

4.7UF/6.3V

4.7UF/6.3V

/DGPU

/DGPU

GND

12

C7537

4.7UF/6.3V

/DGPU

12

GND

12

GND

CE7501

C7553

330UF/2V

47UF/4V

/DGPU

@

C7571
22UF/6.3V

@

+1.35VS_VGA +1.35VS_VGA

AA27
AA30
AB27
AB33
AC27
AD27
AE27
AF27
AG27

W27
W30
W33

B13
B16
B19
E13
E16

E19
H10
H11
H12
H13
H14
H15
H16
H18
H19
H20
H21
H22
H23
H24

H8
H9

L27
M27
N27

P27
R27

T27

T30

T33

V27

Y27

U7001F

AC6

NC1

AJ28

NC2

AJ4

NC3

AJ5

NC4

AL11

NC5

C15

NC6

D19

NC7

D20

NC8

D23

NC9

D26

NC10

H31

NC11

T8

NC13

V32

NC14

N14P-GT1

/DGPU

U7001D

15/19 FBVDDQ

FBVDDQ1
FBVDDQ2
FBVDDQ3
FBVDDQ4
FBVDDQ5
FBVDDQ6
FBVDDQ7
FBVDDQ8
FBVDDQ9
FBVDDQ10
FBVDDQ11
FBVDDQ12
FBVDDQ13
FBVDDQ14
FBVDDQ15
FBVDDQ16
FBVDDQ17
FBVDDQ18
FBVDDQ19
FBVDDQ20
FBVDDQ21
FBVDDQ22
FBVDDQ23
FBVDDQ24
FBVDDQ25
FBVDDQ26
FBVDDQ27
FBVDDQ28
FBVDDQ29
FBVDDQ30
FBVDDQ31
FBVDDQ32
FBVDDQ33
FBVDDQ34
FBVDDQ35
FBVDDQ36
FBVDDQ37
FBVDDQ38
FBVDDQ39
FBVDDQ40
FBVDDQ41
FBVDDQ42
FBVDDQ43
FBVDDQ44

FB_CAL_TERM_GND

N14P-GT1

/DGPU

18/19 NC/VDD33

FB_VDDQ_SENSE

FB_CAL_PD_VDDQ

FB_CAL_PU_GND

3V3MISC_1
3V3MISC_2

VDD33_1
VDD33_2

FB_GND_SENSE

85mA

+VDD33_GPU

12

12

C7501

0.1UF/16V

/DGPU

12

C7504

0.1UF/16V

/DGPU

C7507

J8
K8

0.1UF/16V

L8

/DGPU
M8

Place near BALLs Place near BGA

12

12

12

C7539

0.1UF/16V

/DGPU

12

12

C7551

0.1UF/16V

/DGPU

Place Close to BALLs Place Close to BGA

12

12

C7563

@

0.1UF/16V

Add C7563,C7564,C7565 (0.1uF) at

+1.35VS_VGA (EMI Recommend)

Check with NV

F1

FBVDDQ_SENSE

F2

FBVDDQ_GND_SENSE

J27

+FB_CAL_PD_VDDQ

H27

+FB_CAL_PU_GND

H25

+FB_CAL_TERM_GND

C7559

0.1UF/16V

/DGPU

C7556

0.1UF/16V

/DGPU

C7564

@

0.1UF/16V

1

1

C7544

1UF/6.3V

/DGPU

12

C7545

1UF/6.3V

/DGPU

Place Under to BGA

12

C7565

@

0.1UF/16V

GND

T7508

T7509

12

C7502

1UF/6.3V

/DGPU

GND

12

C7538

1UF/6.3V

1 2

/DGPU

12

C7560

1UF/6.3V

1 2

/DGPU

1 2

R7507 40.2Ohm/DGPU 1%

1 2

R7509 40.2Ohm/DGPU 1%

R7510 60.4Ohm/DGPU

Place Close to BALLs

3

C7503

4.7UF/6.3V

1 2

/DGPU

C7574

4.7UF/6.3V

/DGPU

C7575

4.7UF/6.3V

/DGPU

R7501 0Ohm/DGPU

C7555

4.7UF/6.3V

1 2

/DGPU

C7562

4.7UF/6.3V

1 2

/DGPU

+1.35VS_VGA

GND

2

12

12

C7554

10UF/6.3V

/DGPU

C7550

10UF/6.3V

/DGPU

12

CALIBRATION PIN

FB_CALx_PD_VDDQ

FB_CALx_PU_GND

FB_CALx_TERM_GND

+3VS_VGA

12

C7541

22UF/6.3V

/DGPU

GND

12

C7557

22UF/6.3V

/DGPU

GND

DDR3

GDDR5

40

40.2

42.2

40.2

51.1

60.4

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

C

C

C

P/N

P/N

P/N

Date: Sheet of

Date: Sheet of

Date: Sheet of

+3VS_VGA 63,70,71,72,74,87,91
+1.35VS_VGA 63,71,76,77,78,79,84
+VGA_VCORE 63,87

XVDD

EGL

PGV NC

U7001H

10/19 XVDD

CONFIGURABLE
POWER
CHANNELS

XVDD_1
XVDD_2
XVDD_3
XVDD_4
XVDD_5
XVDD_6
XVDD_7
XVDD_8

XVDD_9
XVDD_10
XVDD_11
XVDD_12
XVDD_13
XVDD_14
XVDD_15
XVDD_16

XVDD_17
XVDD_18
XVDD_19
XVDD_20
XVDD_21
XVDD_22

XVDD_23
XVDD_24
XVDD_25
XVDD_26
XVDD_27
XVDD_28
XVDD_29
XVDD_30

XVDD_31
XVDD_32
XVDD_33
XVDD_34
XVDD_35
XVDD_36
XVDD_37
XVDD_38

N14P-GT1

/DGPU

N14xxx_Power,GND

N14xxx_Power,GND

N14xxx_Power,GND

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

VA70_HW

VA70_HW

VA70_HW

1

Panda_Wang

Panda_Wang

Panda_Wang

floating

U1
U2
U3
U4
U5
U6
U7
U8

V1
V2
V3
V4
V5
V6
V7
V8

W2
W3
W4
W5
W7
W8

Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8

AA1
AA2
AA3
AA4
AA5
AA6
AA7
AA8

75 99Friday , January 18, 2013

75 99Friday , January 18, 2013

75 99Friday , January 18, 2013

Rev

Rev

Rev

1.3

1.3

1.3

5

71,77

FBAD[0..63]
FBA_CMD[0..31]
FBA_DBI[0..7]
FBA_EDC[0..7]

Byte 0 Byte 2

U7601A

A4

FBAD0
FBAD1
FBAD2
FBAD3

D D

FBA_WCK0171, 76
FBA_WCK01#71,76

GND

C C

FBAD4
FBAD5
FBAD6
FBAD7

FBA_EDC0 FBA_EDC2
FBA_DBI0 FBA_DBI2

FBA_WCK01
FBA_WCK01#

DQ0

A2

DQ1

B4

DQ2

B2

DQ3

E4

DQ4

E2

DQ5

F4

DQ6

F2

DQ7

C2

EDC0

D2

DBI0#

A11

DQ8

A13

DQ9

B11

DQ10

B13

DQ11

E11

DQ12

E13

DQ13

F11

DQ14

F13

DQ15

C13

EDC1

D13

DBI1#

D4

WCK01

D5

WCK01#

H5GQ2H24MFR-T2C

/DGPU

VREFD1

A10

FBA_VREFD_L

12

C7663
820PF/50V

MLCC/+/-10%
/DGPU

GND

FBA_WCK2371, 76
FBA_WCK23#71,76

FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23

FBA_WCK23
FBA_WCK23#

GPIO10_FBVREF_ALTV74,77,78,79

U7601B

U11

DQ16

U13

DQ17

T11

DQ18

T13

DQ19

N11

DQ20

N13

DQ21

M11

DQ22

M13

DQ23

R13

EDC2

P13

DBI2#

U4

DQ24

U2

DQ25

T4

DQ26

T2

DQ27

N4

DQ28

N2

DQ29

M4

DQ30

M2

DQ31

R2

EDC3

P2

DBI3#

P4

WCK23

P5

WCK23#

H5GQ2H24MFR-T2C

/DGPU

4

VREFD2

U10

12

GND GND

Q7601
2N7002

/DGPU

0.4 mm

FBA_VREFD_L

C7664
820PF/50V

MLCC/+/-10%
/DGPU

3

D

1

G

2

GND

3

FBA-Lower Half

FBA_CMD12
FBA_CMD15
FBA_CMD5
FBA_CMD0

FBA_CMD8

FBA_CMD10

C7665
820PF/50V

/DGPU

1 2

R7645

40.2Ohm

1%
/DGPU

1 2

FBA_CMD11
FBA_CMD2
FBA_CMD1
FBA_CMD3
FBA_CMD4
FBA_CMD7
FBA_CMD6
FBA_CMD9

FBA_CMD13
FBA_CMD14

FBA_ZQ0

R7608
121OHM

1%
/DGPU

1 2

12

GND

R7646

40.2Ohm

1%
/DGPU

C7603

0.01UF/50V

10%
/DGPU

0.4 mm

1 2

GNDGND

FBA_SEN0

+1.35VS_VGA

R7602
549Ohm

1%
/DGPU

1 2

R7601

R7603

1.33KOhm

931OHM

1%

1%

/DGPU

/DGPU

1 2

1 2

+1.35VS_VGA

FBA_VREF_FET_L

S

1 2

1 2

R7604
549Ohm

1%
/DGPU

R7606
931OHM

1%
/DGPU

FBA_CLK071,76
FBA_CLK0#71,76

R7605

1.33KOhm

1%
/DGPU

1 2

GND GND

FBA_VREFC0

12

MLCC/+/-10%

R7607
1KOhm

5%
/DGPU

U7601C

G3

RAS#

L3

CAS#

L12

WE#

G12

CS#

J4

ABI#

H4

A10/A0

H5

A9/A1

H11

BA0/A2

H10

BA3/A3

K11

BA2/A4

K10

BA1/A5

K5

A11/A6

K4

A8/A7

J5

A12/RFU/NC

J2

RESET#

J3

CKE#

J12

CK

J11

CK#

A5

VPP/NC1

U5

VPP/NC2

J14

VREFC

J13

ZQ

J10

SEN

H5GQ2H24MFR-T2C

/DGPU

2

+1.35VS_VGA

U7601D

R7609
1KOhm

5%
/DGPU

GND

J1

MF

B10

VSS1

B5

VSS2

D10

VSS3

G10

VSS4

G5

VSS5

H1

VSS6

H14

VSS7

K1

VSS8

K14

VSS9

L10

VSS10

L5

VSS11

P10

VSS12

T10

VSS13

T5

VSS14

A1

VSSQ1

A12

VSSQ2

A14

VSSQ3

A3

VSSQ4

C1

VSSQ5

C11

VSSQ6

C12

VSSQ7

C14

VSSQ8

C3

VSSQ9

C4

VSSQ10

E1

VSSQ11

E12

VSSQ12

E14

VSSQ13

E3

VSSQ14

F10

VSSQ15

F5

VSSQ16

H13

VSSQ17

H2

VSSQ18

K13

VSSQ19

K2

VSSQ20

M10

VSSQ21

M5

VSSQ22

N1

VSSQ23

N12

VSSQ24

N14

VSSQ25

N3

VSSQ26

R1

VSSQ27

R11

VSSQ28

R12

VSSQ29

R14

VSSQ30

R3

VSSQ31

R4

VSSQ32

U1

VSSQ33

U12

VSSQ34

U14

VSSQ35

U3

VSSQ36

H5GQ2H24MFR-T2C

/DGPU

FBA_SOE0

1 2

GND

1

+1.35VS_VGA 63,71,75,77,78,79,84

C10

VDD1

C5

VDD2

D11

VDD3

G1

VDD4

G11

VDD5

G14

VDD6

G4

VDD7

L1

VDD8

L11

VDD9

L14

VDD10

L4

VDD11

P11

VDD12

R10

VDD13

R5

VDD14

B1

VDDQ1

B12

VDDQ2

B14

VDDQ3

B3

VDDQ4

D1

VDDQ5

D12

VDDQ6

D14

VDDQ7

D3

VDDQ8

E10

VDDQ9

E5

VDDQ10

F1

VDDQ11

F12

VDDQ12

F14

VDDQ13

F3

VDDQ14

G13

VDDQ15

G2

VDDQ16

H12

VDDQ17

H3

VDDQ18

K12

VDDQ19

K3

VDDQ20

L13

VDDQ21

L2

VDDQ22

M1

VDDQ23

M12

VDDQ24

M14

VDDQ25

M3

VDDQ26

N10

VDDQ27

N5

VDDQ28

P1

VDDQ29

P12

VDDQ30

P14

VDDQ31

P3

VDDQ32

T1

VDDQ33

T12

VDDQ34

T14

VDDQ35

T3

VDDQ36

+1.35VS_VGA

+1.35VS_VGA

+1.35VS_VGA

R7610
1KOhm

U7602C

RAS#
CAS#
WE#
CS#

ABI#

A10/A0
A9/A1
BA0/A2
BA3/A3
BA2/A4
BA1/A5
A11/A6
A8/A7
A12/RFU/NC

RESET#
CKE#

CK
CK#

VPP/NC1
VPP/NC2

VREFC

ZQ

SEN

H5GQ2H24MFR-T2C

/DGPU

Mirrored
CAS#
RAS#
CS#
WE#

ABI#

A8/A7
A11/A6
BA2/A4
BA1/A5
BA0/A2
BA3/A3
A9/A1
A10/A0
A12/RFU

3

FBA_CMD15
FBA_CMD12
FBA_CMD0
FBA_CMD5

FBA_CMD8

FBA_CMD6

B B

FBA_CMD7
FBA_CMD3
FBA_CMD4
FBA_CMD2
FBA_CMD1
FBA_CMD11
FBA_CMD10
FBA_CMD9

G3

L3

L12

G12

J4

H4

H5
H11
H10

K11
K10

K5
K4
J5

Byte 3 Byte 1

U7602A

A4

FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31

FBA_EDC3

A A

FBA_WCK23
FBA_WCK23#

FBA_WCK2371, 76
FBA_WCK23#71,76

GND

5

DQ0

A2

DQ1

B4

DQ2

B2

DQ3

E4

DQ4

E2

DQ5

F4

DQ6

F2

DQ7

C2

EDC0

D2

DBI0#

A11

DQ8

A13

DQ9

B11

DQ10

B13

DQ11

E11

DQ12

E13

DQ13

F11

DQ14

F13

DQ15

C13

EDC1

D13

DBI1#

D4

WCK01

D5

WCK01#

H5GQ2H24MFR-T2C

/DGPU

VREFD1

A10

FBA_WCK0171, 76
FBA_WCK01#71,76

FBA_VREFD_L

FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15

FBA_EDC1
FBA_DBI1FBA_DBI3

FBA_WCK01
FBA_WCK01#

U7602B

U11

DQ16

U13

DQ17

T11

DQ18

T13

DQ19

N11

DQ20

N13

DQ21

M11

DQ22

M13

DQ23

R13

EDC2

P13

DBI2#

U4

DQ24

U2

DQ25

T4

DQ26

T2

DQ27

N4

DQ28

N2

DQ29

M4

DQ30

M2

DQ31

R2

EDC3

P2

DBI3#

P4

WCK23

P5

WCK23#

H5GQ2H24MFR-T2C

/DGPU

VREFD2

0.4 mm

FBA_SEN0

J2
J3

J12
J11

A5

U5

J14

J13

J10

FBA_CMD13

FBA_VREFC0

R7613
121OHM

1%
/DGPU

1 2

GND

FBA_CMD14

FBA_ZQ1

FBA_CLK071,76
FBA_CLK0#71,76

U10

FBA_VREFD_L

0.4 mm

4

5%
/DGPU

1 2

FBA_SOE1

GND

U7602D

J1

MF

B10

VSS1

B5

VSS2

D10

VSS3

G10

VSS4

G5

VSS5

H1

VSS6

H14

VSS7

K1

VSS8

K14

VSS9

L10

VSS10

L5

VSS11

P10

VSS12

T10

VSS13

T5

VSS14

A1

VSSQ1

A12

VSSQ2

A14

VSSQ3

A3

VSSQ4

C1

VSSQ5

C11

VSSQ6

C12

VSSQ7

C14

VSSQ8

C3

VSSQ9

C4

VSSQ10

E1

VSSQ11

E12

VSSQ12

E14

VSSQ13

E3

VSSQ14

F10

VSSQ15

F5

VSSQ16

H13

VSSQ17

H2

VSSQ18

K13

VSSQ19

K2

VSSQ20

M10

VSSQ21

M5

VSSQ22

N1

VSSQ23

N12

VSSQ24

N14

VSSQ25

N3

VSSQ26

R1

VSSQ27

R11

VSSQ28

R12

VSSQ29

R14

VSSQ30

R3

VSSQ31

R4

VSSQ32

U1

VSSQ33

U12

VSSQ34

U14

VSSQ35

U3

VSSQ36

H5GQ2H24MFR-T2C

/DGPU

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8

VDD9
VDD10
VDD11
VDD12
VDD13
VDD14

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
VDDQ19
VDDQ20
VDDQ21
VDDQ22
VDDQ23
VDDQ24
VDDQ25
VDDQ26
VDDQ27
VDDQ28
VDDQ29
VDDQ30
VDDQ31
VDDQ32
VDDQ33
VDDQ34
VDDQ35
VDDQ36

+1.35VS_VGA

C10
C5
D11
G1
G11
G14
G4
L1
L11
L14
L4
P11
R10

+1.35VS_VGA

R5

B1
B12
B14
B3
D1
D12
D14
D3
E10
E5
F1
F12
F14
F3
G13
G2
H12
H3
K12
K3
L13
L2
M1
M12
M14
M3
N10
N5
P1
P12
P14
P3
T1
T12
T14
T3

2

+1.35VS_VGA

12

12

C7623

C7619

0.1UF/10V

0.1UF/10V

10%

10%

/DGPU

/DGPU

12

12

C7615

C7614

0.1UF/10V

0.1UF/10V

10%

10%

/DGPU

/DGPU

12

12

C7660

C7655

0.1UF/10V

0.1UF/10V

10%

10%

@

@

PLACE NEAR U7601/U7602

12

C7616

0.1UF/10V

10%
/DGPU

12

C7618

0.1UF/10V

10%
/DGPU

12

C7657

0.1UF/10V

10%
@

PEGATRON CORPORATION

PEGATRON CORPORATION

PEGATRON CORPORATION

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

12

12

12

C7659

0.1UF/10V

10%
/DGPU

C7617

0.1UF/10V

10%
/DGPU

C7658

0.1UF/10V

10%
@

12

12

12

C7656

0.1UF/10V

10%
/DGPU

C7620

0.1UF/10V

10%
/DGPU

C7654

0.1UF/10V

10%
@

1

12

C7662
1UF/10V

10%
/DGPU

12

C7621
1UF/10V

10%
/DGPU

12

C7653

0.1UF/10V

10%
@

GND

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

VA70_HW

VA70_HW

VA70_HW

12

C7661
1UF/10V

10%
/DGPU

12

C7622
1UF/10V

10%
/DGPU

N14xxx_FBA LOWER

N14xxx_FBA LOWER

N14xxx_FBA LOWER

Panda Wang

Panda Wang

Panda Wang

12

C7601
10UF/6.3V

10%
/DGPU

GND

12

C7602
10UF/6.3V

10%
/DGPU

GND

Rev

Rev

Rev

1.3

1.3

76 99Friday , January 18, 2013

76 99Friday , January 18, 2013

76 99Friday , January 18, 2013

1.3

5

FBAD[0..63]71,76
FBA_CMD[0..31]71,76
FBA_DBI[0..7]71,76
FBA_EDC[0..7]71,76

Byte 4 Byte 6

U7701A

A4

FBAD32

D D

FBA_WCK4571, 77
FBA_WCK45#71,77

GND

C C

FBAD33
FBAD34
FBAD35
FBAD36
FBAD37
FBAD38
FBAD39

FBA_EDC4 FBA_EDC6

FBA_WCK45
FBA_WCK45#

DQ0

A2

DQ1

B4

DQ2

B2

DQ3

E4

DQ4

E2

DQ5

F4

DQ6

F2

DQ7

C2

EDC0

D2

DBI0#

A11

DQ8

A13

DQ9

B11

DQ10

B13

DQ11

E11

DQ12

E13

DQ13

F11

DQ14

F13

DQ15

C13

EDC1

D13

DBI1#

D4

WCK01

D5

WCK01#

H5GQ2H24MFR-T2C

/DGPU

VREFD1

A10

FBA_VREFD_H

12

C7716
820PF/50V

MLCC/+/-10%
/DGPU

GND

FBA_WCK6771, 77
FBA_WCK67#71,77

FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55

FBA_DBI6FBA_DBI4

FBA_WCK67
FBA_WCK67#

GPIO10_FBVREF_ALTV74,76,78,79

4

U7701B

U11

DQ16

U13

DQ17

T11

DQ18

T13

DQ19

N11

DQ20

N13

DQ21

M11

DQ22

M13

DQ23

R13

EDC2

P13

DBI2#

U4

DQ24

U2

DQ25

T4

DQ26

T2

DQ27

N4

DQ28

N2

DQ29

M4

DQ30

M2

DQ31

R2

EDC3

P2

DBI3#

P4

WCK23

P5

WCK23#

H5GQ2H24MFR-T2C

/DGPU

VREFD2

U10

12

GND GND

Q7701
2N7002

/DGPU

3

FBA-Upper Half

+1.35VS_VGA

R7701
549Ohm

R7709

1.33KOhm

1%
/DGPU

1 2

1%
/DGPU

1 2

R7702
931OHM

1%
/DGPU

1 2

FBA_VREF_FET_H

+1.35VS_VGA

1 2

1 2

R7704
549Ohm

1%
/DGPU

R7707
931OHM

1%
/DGPU

FBA_CLK171,77
FBA_CLK1#71,77

R7706

1.33KOhm

1%
/DGPU

1 2

GND GND

0.4 mm

FBA_VREFD_H

C7723
820PF/50V

MLCC/+/-10%
/DGPU

1

G

GND

3

D

S

2

FBA_VREFC1

12

C7720
820PF/50V

MLCC/+/-10%
/DGPU

1 2

R7712

40.2Ohm

1%
/DGPU

1 2

0.4 mm

FBA_ZQ2

R7708
121OHM

1%
/DGPU

FBA_CMD28
FBA_CMD31
FBA_CMD21
FBA_CMD16

FBA_CMD24

FBA_CMD26
FBA_CMD27
FBA_CMD18
FBA_CMD17
FBA_CMD19
FBA_CMD20
FBA_CMD23
FBA_CMD22
FBA_CMD25

FBA_CMD29
FBA_CMD30

R7713

40.2Ohm

1%
/DGPU

1 2

12

C7701

0.01UF/50V

10%
/DGPU

GND

1 2

GNDGND

FBA_SEN2

R7710
1KOhm

5%
/DGPU

U7701C

G3

RAS#

L3

CAS#

L12

WE#

G12

CS#

J4

ABI#

H4

A10/A0

H5

A9/A1

H11

BA0/A2

H10

BA3/A3

K11

BA2/A4

K10

BA1/A5

K5

A11/A6

K4

A8/A7

J5

A12/RFU/NC

J2

RESET#

J3

CKE#

J12

CK

J11

CK#

A5

VPP/NC1

U5

VPP/NC2

J14

VREFC

J13

ZQ

J10

SEN

H5GQ2H24MFR-T2C

/DGPU

2

+1.35VS_VGA

U7701D

R7705
1KOhm

5%
/DGPU

GND

J1

MF

B10

VSS1

B5

VSS2

D10

VSS3

G10

VSS4

G5

VSS5

H1

VSS6

H14

VSS7

K1

VSS8

K14

VSS9

L10

VSS10

L5

VSS11

P10

VSS12

T10

VSS13

T5

VSS14

A1

VSSQ1

A12

VSSQ2

A14

VSSQ3

A3

VSSQ4

C1

VSSQ5

C11

VSSQ6

C12

VSSQ7

C14

VSSQ8

C3

VSSQ9

C4

VSSQ10

E1

VSSQ11

E12

VSSQ12

E14

VSSQ13

E3

VSSQ14

F10

VSSQ15

F5

VSSQ16

H13

VSSQ17

H2

VSSQ18

K13

VSSQ19

K2

VSSQ20

M10

VSSQ21

M5

VSSQ22

N1

VSSQ23

N12

VSSQ24

N14

VSSQ25

N3

VSSQ26

R1

VSSQ27

R11

VSSQ28

R12

VSSQ29

R14

VSSQ30

R3

VSSQ31

R4

VSSQ32

U1

VSSQ33

U12

VSSQ34

U14

VSSQ35

U3

VSSQ36

H5GQ2H24MFR-T2C

/DGPU

FBA_SOE2

1 2

GND

1

+1.35VS_VGA 63,71,75,76,78,79,84

C10

VDD1

C5

VDD2

D11

VDD3

G1

VDD4

G11

VDD5

G14

VDD6

G4

VDD7

L1

VDD8

L11

VDD9

L14

VDD10

L4

VDD11

P11

VDD12

R10

VDD13

R5

VDD14

B1

VDDQ1

B12

VDDQ2

B14

VDDQ3

B3

VDDQ4

D1

VDDQ5

D12

VDDQ6

D14

VDDQ7

D3

VDDQ8

E10

VDDQ9

E5

VDDQ10

F1

VDDQ11

F12

VDDQ12

F14

VDDQ13

F3

VDDQ14

G13

VDDQ15

G2

VDDQ16

H12

VDDQ17

H3

VDDQ18

K12

VDDQ19

K3

VDDQ20

L13

VDDQ21

L2

VDDQ22

M1

VDDQ23

M12

VDDQ24

M14

VDDQ25

M3

VDDQ26

N10

VDDQ27

N5

VDDQ28

P1

VDDQ29

P12

VDDQ30

P14

VDDQ31

P3

VDDQ32

T1

VDDQ33

T12

VDDQ34

T14

VDDQ35

T3

VDDQ36

+1.35VS_VGA

+1.35VS_VGA

+1.35VS_VGA

U7702C

0.4 mm

FBA_SEN2

G3

L3

L12

G12

J4

H4

H5
H11
H10

K11
K10

K5
K4
J5

J2
J3

J12
J11

A5

U5

J14

J13

J10

H5GQ2H24MFR-T2C

/DGPU

FBA_CMD31
FBA_CMD28
FBA_CMD16

FBA_VREFC1

R7703
121OHM

1%
/DGPU

1 2

GND

FBA_ZQ3

FBA_CMD21

FBA_CMD24

FBA_CMD22
FBA_CMD23
FBA_CMD19
FBA_CMD20
FBA_CMD18
FBA_CMD17
FBA_CMD27
FBA_CMD26
FBA_CMD25

FBA_CMD29
FBA_CMD30

B B

Byte 5Byte 7

FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47

U7702B

U11

DQ16

U13

DQ17

T11

DQ18

T13

DQ19

N11

DQ20

N13

DQ21

M11

DQ22

M13

DQ23

R13

EDC2

P13

DBI2#

U4

DQ24

U2

DQ25

T4

DQ26

T2

DQ27

N4

DQ28

N2

DQ29

M4

DQ30

M2

DQ31

R2

EDC3

P2

DBI3#

P4

WCK23

P5

WCK23#

H5GQ2H24MFR-T2C

/DGPU

VREFD2

FBA_CLK171,77
FBA_CLK1#71,77

U10

FBA_VREFD_H

0.4 mm

4

U7702A

A4

FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63

FBA_EDC7
FBA_DBI7

A A

FBA_WCK6771, 77
FBA_WCK67#71,77

GND

FBA_WCK67
FBA_WCK67#

5

DQ0

A2

DQ1

B4

DQ2

B2

DQ3

E4

DQ4

E2

DQ5

F4

DQ6

F2

DQ7

C2

EDC0

D2

DBI0#

A11

DQ8

A13

DQ9

B11

DQ10

B13

DQ11

E11

DQ12

E13

DQ13

F11

DQ14

F13

DQ15

C13

EDC1

D13

DBI1#

D4

WCK01

D5

WCK01#

H5GQ2H24MFR-T2C

/DGPU

VREFD1

A10

FBA_WCK4571,77
FBA_WCK45#71,77

FBA_VREFD_H

FBA_EDC5
FBA_DBI5

FBA_WCK45
FBA_WCK45#

RAS#
CAS#
WE#
CS#

ABI#

A10/A0
A9/A1
BA0/A2
BA3/A3
BA2/A4
BA1/A5
A11/A6
A8/A7
A12/RFU/NC

RESET#
CKE#

CK
CK#

VPP/NC1
VPP/NC2

VREFC

ZQ

SEN

Mirrored
CAS#
RAS#
CS#
WE#

ABI#

A8/A7
A11/A6
BA2/A4
BA1/A5
BA0/A2
BA3/A3
A9/A1
A10/A0
A12/RFU

3

R7711
1KOhm

5%
/DGPU

1 2

FBA_SOE3

GND

U7702D

J1

MF

B10

VSS1

B5

VSS2

D10

VSS3

G10

VSS4

G5

VSS5

H1

VSS6

H14

VSS7

K1

VSS8

K14

VSS9

L10

VSS10

L5

VSS11

P10

VSS12

T10

VSS13

T5

VSS14

A1

VSSQ1

A12

VSSQ2

A14

VSSQ3

A3

VSSQ4

C1

VSSQ5

C11

VSSQ6

C12

VSSQ7

C14

VSSQ8

C3

VSSQ9

C4

VSSQ10

E1

VSSQ11

E12

VSSQ12

E14

VSSQ13

E3

VSSQ14

F10

VSSQ15

F5

VSSQ16

H13

VSSQ17

H2

VSSQ18

K13

VSSQ19

K2

VSSQ20

M10

VSSQ21

M5

VSSQ22

N1

VSSQ23

N12

VSSQ24

N14

VSSQ25

N3

VSSQ26

R1

VSSQ27

R11

VSSQ28

R12

VSSQ29

R14

VSSQ30

R3

VSSQ31

R4

VSSQ32

U1

VSSQ33

U12

VSSQ34

U14

VSSQ35

U3

VSSQ36

H5GQ2H24MFR-T2C

/DGPU

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8

VDD9
VDD10
VDD11
VDD12
VDD13
VDD14

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
VDDQ19
VDDQ20
VDDQ21
VDDQ22
VDDQ23
VDDQ24
VDDQ25
VDDQ26
VDDQ27
VDDQ28
VDDQ29
VDDQ30
VDDQ31
VDDQ32
VDDQ33
VDDQ34
VDDQ35
VDDQ36

+1.35VS_VGA

+1.35VS_VGA

2

+1.35VS_VGA

12

C7710

0.1UF/10V

10%
/DGPU

12

C7707

0.1UF/10V

10%
/DGPU

12

C7724

0.1UF/10V

10%
@

PLACE NEAR U7701/U7702

12

12

12

C7708

0.1UF/10V

10%
/DGPU

C7709

0.1UF/10V

10%
/DGPU

C7717

0.1UF/10V

10%
@

12

12

C7713

0.1UF/10V

10%
/DGPU

12

C7706

0.1UF/10V

10%
/DGPU

12

C7726

0.1UF/10V

10%
@

PEGATRON CORPORATION

PEGATRON CORPORATION

PEGATRON CORPORATION

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

12

12

C7705

0.1UF/10V

10%
/DGPU

C7715

0.1UF/10V

10%
/DGPU

C7714

0.1UF/10V

10%
@

12

12

12

C7711

0.1UF/10V

10%
/DGPU

C7725

0.1UF/10V

10%
/DGPU

C7722

0.1UF/10V

10%
@

12

C7704
1UF/10V

10%
/DGPU

12

C7719
1UF/10V

10%
/DGPU

12

C7721

0.1UF/10V

10%
@

GND

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

VA70_HW

VA70_HW

VA70_HW

1

12

12

C7712

C7702

1UF/10V

10UF/6.3V

10%

10%

/DGPU

/DGPU

GND

12

12

C7718

C7703

1UF/10V

10UF/6.3V

10%

10%

/DGPU

/DGPU

GND

N14xxx_FBA UPPER

N14xxx_FBA UPPER

N14xxx_FBA UPPER

PANDA WANG

PANDA WANG

PANDA WANG

77 99Friday , January 18, 2013

77 99Friday , January 18, 2013

77 99Friday , January 18, 2013

Rev

Rev

Rev

1.3

1.3

1.3

C10
C5
D11
G1
G11
G14
G4
L1
L11
L14
L4
P11
R10
R5

B1
B12
B14
B3
D1
D12
D14
D3
E10
E5
F1
F12
F14
F3
G13
G2
H12
H3
K12
K3
L13
L2
M1
M12
M14
M3
N10
N5
P1
P12
P14
P3
T1
T12
T14
T3

FBBD[0..63]71,79
FBB_CMD[0..31]71,79
FBB_DBI[0..7]71,79
FBB_EDC[0..7]71,79

D D

FBB_WCK0171, 78
FBB_WCK01#71,78

GND

C C

5

Byte 0 Byte 2

U7801A

A4

FBBD0
FBBD1
FBBD2
FBBD3
FBBD4
FBBD5
FBBD6
FBBD7

FBB_EDC0 FBB_EDC2
FBB_DBI0 FBB_DBI2

FBB_WCK01
FBB_WCK01#

DQ0

A2

DQ1

B4

DQ2

B2

DQ3

E4

DQ4

E2

DQ5

F4

DQ6

F2

DQ7

C2

EDC0

D2

DBI0#

A11

DQ8

A13

DQ9

B11

DQ10

B13

DQ11

E11

DQ12

E13

DQ13

F11

DQ14

F13

DQ15

C13

EDC1

D13

DBI1#

D4

WCK01

D5

WCK01#

H5GQ2H24MFR-T2C

/EGL

VREFD1

A10

FBB_VREFD_L

12

C7824
820PF/50V

MLCC/+/-10%

/EGL

GND

FBB_WCK2371, 78
FBB_WCK23#71,78

4

FBBD16
FBBD17
FBBD18
FBBD19
FBBD20
FBBD21
FBBD22
FBBD23

FBB_WCK23
FBB_WCK23#

GPIO10_FBVREF_ALTV74,76,77,79

U7801B

U11

DQ16

U13

DQ17

T11

DQ18

T13

DQ19

N11

DQ20

N13

DQ21

M11

DQ22

M13

DQ23

R13

EDC2

P13

DBI2#

U4

DQ24

U2

DQ25

T4

DQ26

T2

DQ27

N4

DQ28

N2

DQ29

M4

DQ30

M2

DQ31

R2

EDC3

P2

DBI3#

P4

WCK23

P5

WCK23#

H5GQ2H24MFR-T2C

/EGL

VREFD2

0.4 mm

U10

12

GND GND

FBB_VREFD_L

C7826
820PF/50V

MLCC/+/-10%

/EGL

Q7801
2N7002

/EGL

1

3

G3

FBB_CMD12

L3

FBB_CMD15

L12

FBB_CMD5

G12

FBB_CMD0

J4

FBB_CMD8

H4

FBB_CMD10

H5

FBB_CMD11

H11

FBB_CMD2

H10

FBB_CMD1

K11

FBB_CMD3

K10

FBB_CMD4

K5

FBB_CMD7

K4

FBB_CMD6

J5

FBB_CMD9

+1.35VS_VGA

1 2

1 2

R7804
549Ohm

1%

/EGL

R7807
931OHM

1%

/EGL

FBB_CLK071,78
FBB_CLK0#71,78

R7806

1.33KOhm

1%

/EGL

1 2

GND GND

FBB_VREFC0

12

C7825
820PF/50V

MLCC/+/-10%

/EGL

1 2

R7812

40.2Ohm

1%

/EGL

1 2

0.4 mm

FBB_ZQ0

R7808
121OHM

1%

/EGL

1 2

12

GND

R7801
549Ohm

1%

/EGL

1 2

R7809

R7802

1.33KOhm

931OHM

1%

1%

/EGL

/EGL

1 2

1 2

+1.35VS_VGA

FBB_VREF_FET_L

3

D

G

S

2

GND

FBB_CMD13
FBB_CMD14

R7813

40.2Ohm

1%

/EGL

C7801

0.01UF/50V

10%

/EGL

FBB_SEN0

R7810
1KOhm

5%

/EGL

1 2

GNDGND

J2
J3

J12
J11

A5

U5

J14

J13

J10

U7801C

RAS#
CAS#
WE#
CS#

ABI#

A10/A0
A9/A1
BA0/A2
BA3/A3
BA2/A4
BA1/A5
A11/A6
A8/A7
A12/RFU/NC

RESET#
CKE#

CK
CK#

VPP/NC1
VPP/NC2

VREFC

ZQ

SEN

H5GQ2H24MFR-T2C

/EGL

2

FBB_SOE0

R7805
1KOhm

5%

/EGL

1 2

GND

GND

U7801D

J1

MF

B10

VSS1

B5

VSS2

D10

VSS3

G10

VSS4

G5

VSS5

H1

VSS6

H14

VSS7

K1

VSS8

K14

VSS9

L10

VSS10

L5

VSS11

P10

VSS12

T10

VSS13

T5

VSS14

A1

VSSQ1

A12

VSSQ2

A14

VSSQ3

A3

VSSQ4

C1

VSSQ5

C11

VSSQ6

C12

VSSQ7

C14

VSSQ8

C3

VSSQ9

C4

VSSQ10

E1

VSSQ11

E12

VSSQ12

E14

VSSQ13

E3

VSSQ14

F10

VSSQ15

F5

VSSQ16

H13

VSSQ17

H2

VSSQ18

K13

VSSQ19

K2

VSSQ20

M10

VSSQ21

M5

VSSQ22

N1

VSSQ23

N12

VSSQ24

N14

VSSQ25

N3

VSSQ26

R1

VSSQ27

R11

VSSQ28

R12

VSSQ29

R14

VSSQ30

R3

VSSQ31

R4

VSSQ32

U1

VSSQ33

U12

VSSQ34

U14

VSSQ35

U3

VSSQ36

H5GQ2H24MFR-T2C

/EGL

+1.35VS_VGA

1

+1.35VS_VGA 63,71,75,76,77,79,84

C10

VDD1

C5

VDD2

D11

VDD3

G1

VDD4

G11

VDD5

G14

VDD6

G4

VDD7

L1

VDD8

L11

VDD9

L14

VDD10

L4

VDD11

P11

VDD12

R10

VDD13

R5

VDD14

B1

VDDQ1

B12

VDDQ2

B14

VDDQ3

B3

VDDQ4

D1

VDDQ5

D12

VDDQ6

D14

VDDQ7

D3

VDDQ8

E10

VDDQ9

E5

VDDQ10

F1

VDDQ11

F12

VDDQ12

F14

VDDQ13

F3

VDDQ14

G13

VDDQ15

G2

VDDQ16

H12

VDDQ17

H3

VDDQ18

K12

VDDQ19

K3

VDDQ20

L13

VDDQ21

L2

VDDQ22

M1

VDDQ23

M12

VDDQ24

M14

VDDQ25

M3

VDDQ26

N10

VDDQ27

N5

VDDQ28

P1

VDDQ29

P12

VDDQ30

P14

VDDQ31

P3

VDDQ32

T1

VDDQ33

T12

VDDQ34

T14

VDDQ35

T3

VDDQ36

+1.35VS_VGA

+1.35VS_VGA

+1.35VS_VGA

R7811
1KOhm

5%

/EGL

U7802C

FBB_CMD13
FBB_CMD14

0.4 mm

FBB_SEN0

G3

L3

L12

G12

J4

H4

H5
H11
H10
K11
K10

K5
K4
J5

J2
J3

J12
J11

A5

U5

J14

J13

J10

H5GQ2H24MFR-T2C

/EGL

FBB_CMD15
FBB_CMD12
FBB_CMD0
FBB_CMD5

FBB_CLK071,78
FBB_CLK0#71,78

0.4 mm

FBB_VREFC0

FBB_ZQ1

1 2

GND

FBB_CMD8

FBB_CMD6
FBB_CMD7
FBB_CMD3
FBB_CMD4
FBB_CMD2
FBB_CMD1
FBB_CMD11
FBB_CMD10
FBB_CMD9

R7803
121OHM

1%

/EGL

B B

Byte 3 Byte 1

U7802A

A4

FBBD24
FBBD25
FBBD26
FBBD27
FBBD28
FBBD29
FBBD30
FBBD31

FBB_EDC3
FBB_DBI3

A A

FBB_WCK2371, 78
FBB_WCK23#71,78

GND

FBB_WCK23
FBB_WCK23#

DQ0

A2

DQ1

B4

DQ2

B2

DQ3

E4

DQ4

E2

DQ5

F4

DQ6

F2

DQ7

C2

EDC0

D2

DBI0#

A11

DQ8

A13

DQ9

B11

DQ10

B13

DQ11

E11

DQ12

E13

DQ13

F11

DQ14

F13

DQ15

C13

EDC1

D13

DBI1#

D4

WCK01

D5

WCK01#

H5GQ2H24MFR-T2C

/EGL

VREFD1

A10

FBB_VREFD_LFBB_VREFD_L FBB_VREFD_L

FBB_WCK0171, 78
FBB_WCK01#71,78

FBBD8
FBBD9
FBBD10
FBBD11
FBBD12
FBBD13
FBBD14
FBBD15

FBB_EDC1
FBB_DBI1

FBB_WCK01
FBB_WCK01#

U7802B

U11

DQ16

U13

DQ17

T11

DQ18

T13

DQ19

N11

DQ20

N13

DQ21

M11

DQ22

M13

DQ23

R13

EDC2

P13

DBI2#

U4

DQ24

U2

DQ25

T4

DQ26

T2

DQ27

N4

DQ28

N2

DQ29

M4

DQ30

M2

DQ31

R2

EDC3

P2

DBI3#

P4

WCK23

P5

WCK23#

H5GQ2H24MFR-T2C

/EGL

VREFD2

U10

RAS#
CAS#
WE#
CS#

ABI#

A10/A0
A9/A1
BA0/A2
BA3/A3
BA2/A4
BA1/A5
A11/A6
A8/A7
A12/RFU/NC

RESET#
CKE#

CK
CK#

VPP/NC1
VPP/NC2

VREFC

ZQ

SEN

Mirrored
CAS#
RAS#
CS#
WE#

ABI#

A8/A7
A11/A6
BA2/A4
BA1/A5
BA0/A2
BA3/A3
A9/A1
A10/A0
A12/RFU

1 2

FBB_SOE1

GND

U7802D

J1

MF

B10

VSS1

B5

VSS2

D10

VSS3

G10

VSS4

G5

VSS5

H1

VSS6

H14

VSS7

K1

VSS8

K14

VSS9

L10

VSS10

L5

VSS11

P10

VSS12

T10

VSS13

T5

VSS14

A1

VSSQ1

A12

VSSQ2

A14

VSSQ3

A3

VSSQ4

C1

VSSQ5

C11

VSSQ6

C12

VSSQ7

C14

VSSQ8

C3

VSSQ9

C4

VSSQ10

E1

VSSQ11

E12

VSSQ12

E14

VSSQ13

E3

VSSQ14

F10

VSSQ15

F5

VSSQ16

H13

VSSQ17

H2

VSSQ18

K13

VSSQ19

K2

VSSQ20

M10

VSSQ21

M5

VSSQ22

N1

VSSQ23

N12

VSSQ24

N14

VSSQ25

N3

VSSQ26

R1

VSSQ27

R11

VSSQ28

R12

VSSQ29

R14

VSSQ30

R3

VSSQ31

R4

VSSQ32

U1

VSSQ33

U12

VSSQ34

U14

VSSQ35

U3

VSSQ36

H5GQ2H24MFR-T2C

/EGL

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8

VDD9
VDD10
VDD11
VDD12
VDD13
VDD14

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
VDDQ19
VDDQ20
VDDQ21
VDDQ22
VDDQ23
VDDQ24
VDDQ25
VDDQ26
VDDQ27
VDDQ28
VDDQ29
VDDQ30
VDDQ31
VDDQ32
VDDQ33
VDDQ34
VDDQ35
VDDQ36

+1.35VS_VGA

+1.35VS_VGA

+1.35VS_VGA

12

C7810

0.1UF/10V

10%

/EGL

12

C7807

0.1UF/10V

10%

/EGL

12

C7821

0.1UF/10V

10%
@

PLACE NEAR U7801/U7802

12

12

C7808

C7813

0.1UF/10V

0.1UF/10V

10%

10%

/EGL

/EGL

12

12

C7809

C7806

0.1UF/10V

0.1UF/10V

10%

10%

/EGL

/EGL

12

12

C7815

C7823

0.1UF/10V

0.1UF/10V

10%

10%

@

@

PEGATRON CORPORATION

PEGATRON CORPORATION

PEGATRON CORPORATION

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

12

12

12

C7805

0.1UF/10V

10%

/EGL

C7816

0.1UF/10V

10%

/EGL

C7814

0.1UF/10V

10%
@

12

C7812

0.1UF/10V

10%

/EGL

12

C7822

0.1UF/10V

10%

/EGL

12

C7820

0.1UF/10V

10%
@

12

C7804
1UF/10V

10%

/EGL

12

C7818
1UF/10V

10%

/EGL

12

C7819

0.1UF/10V

10%
@

GND

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

VA70_HW

VA70_HW

VA70_HW

12

12

C7811

C7802

1UF/10V

10UF/6.3V

10%

10%

/EGL

/EGL

GND

12

12

C7817

C7803

1UF/10V

10UF/6.3V

10%

10%

/EGL

/EGL

GND

N14xxx_FBB LOWER

N14xxx_FBB LOWER

N14xxx_FBB LOWER

PANDA WANG

PANDA WANG

PANDA WANG

78 99Friday , January 18, 2013

78 99Friday , January 18, 2013

78 99Friday , January 18, 2013

Rev

Rev

Rev

1.3

1.3

1.3

C10
C5
D11
G1
G11
G14
G4
L1
L11
L14
L4
P11
R10
R5

B1
B12
B14
B3
D1
D12
D14
D3
E10
E5
F1
F12
F14
F3
G13
G2
H12
H3
K12
K3
L13
L2
M1
M12
M14
M3
N10
N5
P1
P12
P14
P3
T1
T12
T14
T3

FBBD[0..63]
FBB_CMD[0..31]
FBB_DBI[0..7]
FBB_EDC[0..7]

D D

FBB_WCK4571, 79
FBB_WCK45#71,79

5

Byte 4 Byte 6

U7901A

A4

FBBD32
FBBD33
FBBD34
FBBD35
FBBD36
FBBD37
FBBD38
FBBD39

FBB_EDC4 FBB_EDC6

FBB_WCK45
FBB_WCK45#

DQ0

A2

DQ1

B4

DQ2

B2

DQ3

E4

DQ4

E2

DQ5

F4

DQ6

F2

DQ7

C2

EDC0

D2

DBI0#

A11

DQ8

A13

DQ9

B11

DQ10

B13

DQ11

E11

DQ12

E13

DQ13

F11

DQ14

F13

DQ15

C13

EDC1

D13

DBI1#

D4

WCK01

D5

WCK01#

H5GQ2H24MFR-T2C

/EGL

VREFD1

A10

FBB_VREFD_H

12

C7901
820PF/50V

MLCC/+/-10%

/EGL

GND

FBB_WCK6771, 79
FBB_WCK67#71,79

C C

GND

4

FBBD48
FBBD49
FBBD50
FBBD51
FBBD52
FBBD53
FBBD54
FBBD55

FBB_DBI6FBB_DBI4

FBB_WCK67
FBB_WCK67#

U11
U13
T11
T13
N11
N13
M11
M13

R13
P13

U4
U2
T4
T2
N4
N2
M4
M2

R2
P2

P4
P5

GPIO10_FBVREF_ALTV74,76,77,78

U7901B

DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23

EDC2
DBI2#

VREFD2

DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

EDC3
DBI3#

WCK23
WCK23#

H5GQ2H24MFR-T2C

/EGL

0.4 mm

U10

FBB_VREFD_H

12

GND GND

C7904
820PF/50V

MLCC/+/-10%

/EGL

Q7901
2N7002

/EGL

3

U7901C

G3

FBB_CMD28
FBB_CMD31
FBB_CMD21
FBB_CMD16

FBB_CMD24

FBB_CMD26
FBB_CMD27
FBB_CMD18
FBB_CMD17
FBB_CMD19
FBB_CMD20
FBB_CMD23
FBB_CMD22
FBB_CMD25

+1.35VS_VGA

1 2

1 2

R7904
549Ohm

1%

/EGL

R7908
931OHM

1%

/EGL

FBB_CLK171,79
FBB_CLK1#71,79

R7906

1.33KOhm

1%

/EGL

1 2

GND GND

FBB_VREFC1

12

C7902
820PF/50V

MLCC/+/-10%

/EGL

R7902
549Ohm

1%

/EGL

1 2

R7911

R7903

1.33KOhm

931OHM

1%

1%

/EGL

/EGL

1 2

1 2

+1.35VS_VGA

FBB_VREF_FET_H

3

D

1

G

S

2

GND

1 2

R7907

40.2Ohm

1%

/EGL

1 2

0.4 mm

FBB_ZQ2

R7909
121OHM

1%

/EGL

1 2
12

GND

FBB_CMD29
FBB_CMD30

R7910

40.2Ohm

1%

/EGL

C7903

0.01UF/50V

10%

/EGL

FBB_SEN2

1 2

GNDGND

R7912
1KOhm

5%

/EGL

RAS#

L3

CAS#

L12

WE#

G12

CS#

J4

ABI#

H4

A10/A0

H5

A9/A1

H11

BA0/A2

H10

BA3/A3

K11

BA2/A4

K10

BA1/A5

K5

A11/A6

K4

A8/A7

J5

A12/RFU/NC

J2

RESET#

J3

CKE#

J12

CK

J11

CK#

A5

VPP/NC1

U5

VPP/NC2

J14

VREFC

J13

ZQ

J10

SEN

H5GQ2H24MFR-T2C

/EGL

2

+1.35VS_VGA

U7901D

R7905
1KOhm

5%

/EGL

GND

J1

MF

B10

VSS1

B5

VSS2

D10

VSS3

G10

VSS4

G5

VSS5

H1

VSS6

H14

VSS7

K1

VSS8

K14

VSS9

L10

VSS10

L5

VSS11

P10

VSS12

T10

VSS13

T5

VSS14

A1

VSSQ1

A12

VSSQ2

A14

VSSQ3

A3

VSSQ4

C1

VSSQ5

C11

VSSQ6

C12

VSSQ7

C14

VSSQ8

C3

VSSQ9

C4

VSSQ10

E1

VSSQ11

E12

VSSQ12

E14

VSSQ13

E3

VSSQ14

F10

VSSQ15

F5

VSSQ16

H13

VSSQ17

H2

VSSQ18

K13

VSSQ19

K2

VSSQ20

M10

VSSQ21

M5

VSSQ22

N1

VSSQ23

N12

VSSQ24

N14

VSSQ25

N3

VSSQ26

R1

VSSQ27

R11

VSSQ28

R12

VSSQ29

R14

VSSQ30

R3

VSSQ31

R4

VSSQ32

U1

VSSQ33

U12

VSSQ34

U14

VSSQ35

U3

VSSQ36

H5GQ2H24MFR-T2C

/EGL

FBB_SOE2

1 2

GND

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8

VDD9
VDD10
VDD11
VDD12
VDD13
VDD14

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
VDDQ19
VDDQ20
VDDQ21
VDDQ22
VDDQ23
VDDQ24
VDDQ25
VDDQ26
VDDQ27
VDDQ28
VDDQ29
VDDQ30
VDDQ31
VDDQ32
VDDQ33
VDDQ34
VDDQ35
VDDQ36

1

+1.35VS_VGA 63,71,75,76,77,78,84

+1.35VS_VGA

C10
C5
D11
G1
G11
G14
G4
L1
L11
L14
L4
P11
R10

+1.35VS_VGA

R5

B1
B12
B14
B3
D1
D12
D14
D3
E10
E5
F1
F12
F14
F3
G13
G2
H12
H3
K12
K3
L13
L2
M1
M12
M14
M3
N10
N5
P1
P12
P14
P3
T1
T12
T14
T3

+1.35VS_VGA

R7913
1KOhm

5%

U7902C

FBB_CMD29
FBB_CMD30

0.4 mm

FBB_SEN2

G3

L3

L12

G12

J4

H4

H5
H11
H10
K11
K10

K5
K4
J5

J2
J3

J12
J11

A5

U5

J14

J13

J10

H5GQ2H24MFR-T2C

/EGL

FBB_CMD31
FBB_CMD28
FBB_CMD16
FBB_CMD21

FBB_CMD24

FBB_VREFC1

FBB_ZQ3

1 2

GND

R7901
121OHM

1%

/EGL

FBB_CMD22
FBB_CMD23
FBB_CMD19
FBB_CMD20
FBB_CMD18
FBB_CMD17
FBB_CMD27
FBB_CMD26
FBB_CMD25

B B

Byte 7 Byte 5

U7902A

A4

FBBD56
FBBD57
FBBD58
FBBD59
FBBD60
FBBD61
FBBD62
FBBD63

FBB_EDC7
FBB_DBI7

A A

FBB_WCK6771, 79
FBB_WCK67#71,79

GND

FBB_WCK67
FBB_WCK67#

DQ0

A2

DQ1

B4

DQ2

B2

DQ3

E4

DQ4

E2

DQ5

F4

DQ6

F2

DQ7

C2

EDC0

D2

DBI0#

A11

DQ8

A13

DQ9

B11

DQ10

B13

DQ11

E11

DQ12

E13

DQ13

F11

DQ14

F13

DQ15

C13

EDC1

D13

DBI1#

D4

WCK01

D5

WCK01#

H5GQ2H24MFR-T2C

/EGL

VREFD1

A10

FBB_VREFD_H FBB_VREFD_H

FBB_WCK4571,79
FBB_WCK45#71,79

FBBD40
FBBD41
FBBD42
FBBD43
FBBD44
FBBD45
FBBD46
FBBD47

FBB_EDC5
FBB_DBI5

FBB_WCK45
FBB_WCK45#

U7902B

U11

DQ16

U13

DQ17

T11

DQ18

T13

DQ19

N11

DQ20

N13

DQ21

M11

DQ22

M13

DQ23

R13

EDC2

P13

DBI2#

U4

DQ24

U2

DQ25

T4

DQ26

T2

DQ27

N4

DQ28

N2

DQ29

M4

DQ30

M2

DQ31

R2

EDC3

P2

DBI3#

P4

WCK23

P5

WCK23#

H5GQ2H24MFR-T2C

/EGL

VREFD2

FBB_CLK171,79
FBB_CLK1#71,79

U10

0.4 mm

RAS#
CAS#
WE#
CS#

ABI#

A10/A0
A9/A1
BA0/A2
BA3/A3
BA2/A4
BA1/A5
A11/A6
A8/A7
A12/RFU/NC

RESET#
CKE#

CK
CK#

VPP/NC1
VPP/NC2

VREFC

ZQ

SEN

Mirrored
CAS#
RAS#
CS#
WE#

ABI#

A8/A7
A11/A6
BA2/A4
BA1/A5
BA0/A2
BA3/A3
A9/A1
A10/A0
A12/RFU

/EGL

1 2

FBB_SOE3

GND

U7902D

J1

MF

B10

VSS1

B5

VSS2

D10

VSS3

G10

VSS4

G5

VSS5

H1

VSS6

H14

VSS7

K1

VSS8

K14

VSS9

L10

VSS10

L5

VSS11

P10

VSS12

T10

VSS13

T5

VSS14

A1

VSSQ1

A12

VSSQ2

A14

VSSQ3

A3

VSSQ4

C1

VSSQ5

C11

VSSQ6

C12

VSSQ7

C14

VSSQ8

C3

VSSQ9

C4

VSSQ10

E1

VSSQ11

E12

VSSQ12

E14

VSSQ13

E3

VSSQ14

F10

VSSQ15

F5

VSSQ16

H13

VSSQ17

H2

VSSQ18

K13

VSSQ19

K2

VSSQ20

M10

VSSQ21

M5

VSSQ22

N1

VSSQ23

N12

VSSQ24

N14

VSSQ25

N3

VSSQ26

R1

VSSQ27

R11

VSSQ28

R12

VSSQ29

R14

VSSQ30

R3

VSSQ31

R4

VSSQ32

U1

VSSQ33

U12

VSSQ34

U14

VSSQ35

U3

VSSQ36

H5GQ2H24MFR-T2C

/EGL

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8

VDD9
VDD10
VDD11
VDD12
VDD13
VDD14

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
VDDQ19
VDDQ20
VDDQ21
VDDQ22
VDDQ23
VDDQ24
VDDQ25
VDDQ26
VDDQ27
VDDQ28
VDDQ29
VDDQ30
VDDQ31
VDDQ32
VDDQ33
VDDQ34
VDDQ35
VDDQ36

+1.35VS_VGA

+1.35VS_VGA

+1.35VS_VGA

12

12

C7917

0.1UF/10V

10%

/EGL

12

12

C7909

0.1UF/10V

10%

/EGL

12

12

C7923

0.1UF/10V

10%
@

PLACE NEAR U7901/U7902

12

12

12

C7908

0.1UF/10V

10%

/EGL

C7911

0.1UF/10V

10%

/EGL

C7906

0.1UF/10V

10%
@

12

C7919

0.1UF/10V

10%

/EGL

12

C7925

0.1UF/10V

10%

/EGL

12

C7921

0.1UF/10V

10%
@

12

C7912

C7924

0.1UF/10V

0.1UF/10V

10%

10%

/EGL

/EGL

12

C7913

C7907

0.1UF/10V

0.1UF/10V

10%

10%

/EGL

/EGL

12

C7926

C7910

0.1UF/10V

0.1UF/10V

10%

10%

@

@

PEGATRON CORPORATION

PEGATRON CORPORATION

PEGATRON CORPORATION

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

12

C7905
1UF/10V

10%

/EGL

12

C7915
1UF/10V

10%

/EGL

12

C7920

0.1UF/10V

10%
@

GND

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

VA70_HW

VA70_HW

VA70_HW

12

12

C7918

C7916

1UF/10V

10UF/6.3V

10%

10%

/EGL

/EGL

GND

12

12

C7914

C7922

1UF/10V

10UF/6.3V

10%

10%

/EGL

/EGL

GND

N14xxx_FBB UPPER

N14xxx_FBB UPPER

N14xxx_FBB UPPER

PANDA WANG

PANDA WANG

PANDA WANG

79 99Friday , January 18, 2013

79 99Friday , January 18, 2013

79 99Friday , January 18, 2013

Rev

Rev

Rev

1.3

1.3

1.3

C10
C5
D11
G1
G11
G14
G4
L1
L11
L14
L4
P11
R10
R5

B1
B12
B14
B3
D1
D12
D14
D3
E10
E5
F1
F12
F14
F3
G13
G2
H12
H3
K12
K3
L13
L2
M1
M12
M14
M3
N10
N5
P1
P12
P14
P3
T1
T12
T14
T3

5

Shark bay

CPU_VRON_PWR93

VR_IMON30,92

Close to phase1 Mosfet

C8054

@

1000PF/50V

1 2

10%

SR8012

1 2

R0402

CPU_VRON30

VRM_PWRGD30,92

VR_HOT#4

1 2

12

R8006

3.83KOhm

1 2

VRM_COMP

R8012

4.02KOhm

10V220000069

C8039
3300PF/25V

1AV200000030

SR8013

1 2

R0402

SR8014

1 2

R0402

SR8004

1 2

R0402

C8001Change to 0.01uF

+1.05VS

SR8005

1 2

R0402

R8004
470KOHM

1 2

1%@

R8005

1%

27.4KOhm

1 2

@

121017

1 2

1KOhm

10V220000002

For DC LL 1.5mOHM Check 3.01KOHM OK

1 2

R8010
2KOhm

1% @

C8040
56PF/50V

1 2

5%
1AV200000047

121017

R8001
100KOhm

1 2

C8001

0.01UF/16V

1 2
1AV200000019

5%@

R8007

1 2

1.65KOhm

10V220000276

1 2

R8009

1%

R8003
499Ohm

C8003
390PF/50V

1AV200000080
1 2

C8006
330PF/50V

@

1%@

MLCC/+/-10%

121017

12

For IFDIM

T8095

1

T8096

1

T8094

1

VRM_SCLK
VRM_ON
VRM_PWRGD
VRM_IMON
VRM_HOT#
VRM_NTC

VRM_FB

1 2

R8014

5.9KOHM

10V220000244

VSUM-

12

10V220000001

+VCORE

C8013

0.1UF/10V

10%
1AV200000024

R8025
100Ohm

@

1%

1 2

121017

C8008

0.22UF/16V

1 2

C8009

0.22UF/16V

1 2

C8011

0.22UF/16V

1 2

1 2

R8017
100Ohm

1 2

R8018
100Ohm

VRM_FB

VSSSENSE8

VCCSENSE6

D D

VR_SVID_DATA6

VR_SVID_ALERT#6

VR_SVID_CLK6

C C

121017

B B

Check

1
2
3
4
5
6
7
8

VRM_FB2

1%

VRM_FB2_R

@

1AV200000091

MLCC/+/-10%

1AV200000091

MLCC/+/-10%

1AV200000091

C8016

0.01UF/50V

1 2

C8015
390PF/50V
MLCC/+/-10%

1 2

SCLK
VR_ON
PGOOD
IMON
VR_HOT#
NTC
COMP
FB

06V070000048

R8015
0Ohm

10%

12

@

@

VRM_FB2_R

R8028
102KOhm

10V220000007

33

12

4

1 2

VRM_ALERT#

VRM_SDA

VRM_PROG1

VRM_PROG3

32

31

30

SDA

GND

ALERT#

SLOPE/PROG1

FB2/VSEN9ISEN310ISEN211ISEN112RTN13ISUMN14ISUMP15VDD

ISEN3

ISEN2

ISEN1

VRM_RTN

1AV200000021

R8027

3.24KOhm

10V220000057

VRM_PROG2

VRM_BST2

28

27

PROG329PROG2

VRM_HG2

VRM_LX2

26

25

BOOT2

UGATE2

16

VRM_ISUMN

R8026

49.9KOhm

10V220000078

1 2

PHASE2

LGATE2

VDDP
PWM3

LGATE1
PHASE1
UGATE1

BOOT1

VRM_VDD

VSUM+

Ri

set OCP=120A

C8018

12

2200PF/50V

1AV200000026

U8000A
ISL95812HRTZ

24
23
22
21
20
19
18
17

VIN

C8019

0.22UF/10V

10%
1AV200000050

R8020
499Ohm

10V220000076

1 2

1 2

+VCORE

121017

Disable PWM3 R8029 上上 Pull high to 5V

121017

VRM_LG2

VRM_PWM3
VRM_LG1
VRM_LX1
VRM_HG1
VRM_BST1VRM_COMP
VRM_VIN

R8019

2KOhm

10V220000035

12

C8024

0.1UF/25V

10%
1AV300000007

12

+AC_BAT_SYS

SR8007
R0603

Ci

C8020

12

0.022UF/16V

R8030
0Ohm

10V240000001

1AV200000027

1 2

12

C8023

R8024

1UF/6.3V

1Ohm

10%

T8005
TPC28T

1

R8021
11KOhm

1%

1 2

1

T8006
TPC28T

121017

T8002

T8003

T8001

T8000
TPC28T

T8064
TPC28T

TPC28T

1

1

T8042
TPC28T

1

1

TPC28T

T8043
TPC28T

T8004

TPC28T

TPC28T

1

1

T8044

T8045

TPC28T

TPC28T

1

1

R8029
0Ohm

1 2

+5VS_VRM

C8025

1UF/6.3V

10%

1%

VSUM+

R8022

2.61KOhm

1%

1 2

R8023

5%

10KOHM

1 2

VSUM-

10VS40000002

R8023 Close to phase1 L8001

1

1

3

54

Q8003

876

5
D

SIRA14DP-T1-GE3

07V040000100

S

G

1 2

C8026

0.22UF/16V

MLCC/+/-10%
1AV200000091

1 2

MLCC/+/-10%

123

54

54

Q8004

876

5

@

D

S

G

G

SIRA10DP-T1-GE3

123

54

Q8000

876

5
D

SIRA14DP-T1-GE3

07V040000100

S

G

123

54

54

Q8002

Q8001

5

876

5

D

D

S

G

G

SIRA10DP-T1-GE3

123

VRM_HG1

VRM_LX1

1 2

VRM_BST1_R

SR8006

R0603

1 2

VRM_BST1

12

+5VS

VRM_HG2

VRM_LX2

1 2

VRM_LG2

R8050
0Ohm

10V340000001

VRM_LG1

R8051
0Ohm

10V340000001

VRM_BST2_RVRM_BST2

C8027

0.22UF/16V

1AV200000091

2

C8051

12

10UF/25V

MLCC/+/-10%
1AV500000015

TPC28T

1

1 2

T8091
TPC28T

1

1 2

L8001

0.24uH

Irat=25A

DCR=1.0mohm

09V030000069

JP8000

SHORT_PIN

C8052

12

10UF/25V

MLCC/+/-10%
1AV500000015

L8002

0.24uH

Irat=25A

DCR=1.0mohm

09V030000069

JP8002

SHORT_PIN

12

+

CE8000
100UF/25V
@

21

1 2

21

1 2

12

C8031
1000PF/50V

Q8005

R8047

876

5

2.2Ohm

0.05

D

1 2

VRM_RC1

S

12

C8012

SIRA10DP-T1-GE3

0.1UF/25V

123

1AV300000007
10%

12

C8034
1000PF/50V

R8048

876

2.2Ohm

@

0.05

1 2

VRM_RC2

S

12

C8010

SIRA10DP-T1-GE3

0.1UF/25V

123

1AV300000007

@

@

@

10%@

10UF/25V

MLCC/+/-10%
1AV500000015

ISEN1

VSUM+

VSUM-

T8008
TPC28T

1

12

ISEN2

VSUM+

VSUM-

C8033
10UF/25V

MLCC/+/-10%
1AV500000015

10UF/25V

MLCC/+/-10%
1AV500000015

R8032
10KOhm

1 2

R8033

3.65KOhm

1 2

R8034
1Ohm

1 2

12

R8037
10KOhm 1%

1 2

R8038

3.65KOhm

1 2

R8039
1Ohm

1 2

T8092

1%

1%

1%

C8032
10UF/25V

MLCC/+/-10%
1AV500000015

1%

1%

C8029

C8030

12

12

JP8001

SHORT_PIN

R8035
10KOhm

1 2

R8036
10KOhm

1 2

12

+

CE8006
100UF/25V

JP8003

SHORT_PIN

R8040
10KOhm

1 2

R8041
10KOhm

1 2

1% @

1% @

@

1%@

1%@

Icc_TDC:
SV-QC 27A
SV-DC 21A

+AC_BAT_SYS

ISEN2

ISEN3

+AC_BAT_SYS

ISEN1

ISEN3

1

Icc_Max
SV-QC 95A
SV-DC 55A

CE8002
560UF/2.5V

1BV090000002

ESR=16mOHM

12

+

CE8005
330UF/2V

1BV080000033

ESR=9mOHM

22UF/6.3V total 需需30pcs

+VCORE

12

12

12

12

C8043

C8041

C8042

C8044

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

12

12

12

12

C8047

C8048

C8046

C8050

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

@

@

@

@

12

C8045

22UF/6.3V

12

C8049

22UF/6.3V

U8000B

34

38

GND1

GND5

35

39

GND2

GND6

36

40

GND3

GND7

37

41

GND4

GND8

ISL95812HRTZ

06V070000048

A A

<Variant Name>

<Variant Name>

<Variant Name>

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

1

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

VP70HW

VP70HW

VP70HW

POWER_VCORE

POWER_VCORE

POWER_VCORE

Alex

Alex

Alex

80 94Friday, January 18, 2013

80 94Friday, January 18, 2013

80 94Friday, January 18, 2013

Rev

Rev

Rev

1.2

1.2

1.2

5

4

3

2

1

+5VO & +3VO POWER SUPPLY

T8108

JP8114
SHORT_PIN

L8100

3.3UH

Irat=6.6A

TPC28T

1

C8143

12

10UF/25V

vx_c0805_h57_small
MLCC/+/-10%

21

12

R8126

2.2Ohm
vx_r0805_h24_small

0.05

5V_RC

12

C8145

0.1UF/25V
vx_c0603_small
10%

1AV300000007

Input Current 5.46 A

C8148

12

10UF/25V
vx_c0805_h57_small
MLCC/+/-10%
@

@

@

7

Q8100
IRFHS8342TRPBF

07V040000087

256

D

G

S

4 1

Q8102
IRFHS8342TRPBF
07V040000087

3

@

12

C8134

0.1UF/25V
vx_c0603_small
10%

5V_FB_R

@

7

7

256

D

G

S

4 1

256

D

G

S

4 1

Q8101
IRFHS8342TRPBF

07V040000087

+5VA

(0.1A)

C8142

0.1UF/25V

1 2

5V_BST_R 5V_BST
5V_LX

Enable1

5V_LG

1 2

121108

3

3

D D

+AC_BAT_SYS

+5VO

+5VO= 6.263A

12

C8155
10UF/6.3V

1AV300000018

+

CE8100
220UF/6.3V

EL/Lf_T=2000hrs_105c/+/-20%
1BV090000003

12

JP8113
SHORT_PIN

12

C8146

0.1UF/25V
@

1 2

C C

SIR166 RDSON=4mOHM

61

R8134
1KOhm

2

Q8109A
UM6K1N

5%

D8104

1

3

2

12

0.8V/0.2mA
R8128

07V030000001

560KOhm

5%

FORCE_OFF_PWR

T8145
TPC28T

USBCHG_EN30,52

34

R8143
1KOhm

1 2

@

5%

5

D8111

1.2V/0.1A

1 2

D8112

1.2V/0.1A

1 2

@

Q8109B
UM6K1N

12

R8112
560KOhm

vx_r0402_small 5%

FORCE_OFF_PWR[32,92]

VSUS_ON_EN

B B

IOAC_EN[ 30,53]

1

VSUS_ON_EN

1 2

Enable2Enable1

SR8105

SR8104

R0402

R0402

1 2

1 2

1 2

C8130

10%

@

0.1UF/25V
vx_c0603_small

+3VA

T8152
TPC28T

VCLK

1

20mil

JP8110
1MM_OPEN_M1M2

112

SR8103
R0603

1 2

R8119

15.4KOHM

vx_r0402_small

1%

1 2

C8149
39PF/50V
vx_c0402_small

JP8111
1MM_OPEN_M1M2

2

+5VO_1_1

12

C8147

0.1UF/25V

12

C8136

0.1UF/25V

+5VO_2_2

2

VCLK

TPS51225CRUKR

06V950000017

5V_FB

@

10%

112

3

3

T8114
TPC28T

1

12

10V220000227

D8100
1V/0.2A

D8103
1V/0.2A

+5VAO

C8150
1UF/6.3V

vx_c0402_small
10%

U8100A

16

DRVH1

17

VBST1

18

SW1

19

VCLK

20

EN1

21

GND

R8103

130KOHM

R8106
10KOhm

vx_r0402_small
1%

+3VAO

12

C8140
1UF/6.3V

vx_c0402_small
10%

1

2

1

2

T8118
TPC28T

1

15

DRVL1

CS11VFB12VREG33VFB24CS2

20mil

+10VO

20mil

14

VO1

1 2

T8143
TPC28T

12

13

VREG5

PGOOD

1 2

1

12

C8135
1UF/25V

vx_c0603_small
10%

11

VIN

DRVL2

DRVH2

VBST2

SW2

EN2

5

R8122
130KOHM

10V220000227

3V_FB

R8105
10KOhm

vx_r0402_small
1%

T8117
TPC28T

1
12

T8144
TPC28T

1

T8150
TPC28T

+12VO

1
12

10
9

3V_BST

8
7
6

C8131

@

0.1UF/25V
vx_c0603_small
1AV300000007

12

C8151

0.1UF/25V

C8132

0.1UF/25V

1 2

121015

+5VO

10%

JP8106
1MM_OPEN_M1M2

2

112

3V_LG

SR8102

3V_HG

R0603

3V_BST_R

3V_LX

R8118

6.65KOHM

vx_r0402_small
1%

1 2

C8137

10%
39PF/50V
vx_c0402_small

T8120

T8119

TPC28T

TPC28T

1

11.47V-14.37V

C8138

1 2

0.1UF/25V

SUS_PWRGD 30,92

Enable2

12

@

1 2

C8144

0.1UF/25V
vx_c0603_small

T8121
TPC28T

1

1

10%

+AC_BAT_SYS

T8111
TPC28T

1

Q8104
IRFHS8342TRPBF

07V040000087

@
1AV300000007

+12VSUS

(0.01A)

T8151
TPC28T

Input Current 2.34A

1

C8118

12

10UF/25V

vx_c0805_h57_small
MLCC/+/-10%

2 5 6

Q8111

D

IRFHS8342TRPBF

G

3

3

G

3V_FB_R

07V040000087

S

7

4 1

2 5 6

D

S

7

4 1

IRFHS8342 RDSON=25mOHM

U8100B

22

GND1

23

GND2

TPS51225CRUKR

06V950000017

T8149
TPC28T

1

12

R8121

2.2Ohm
vx_r0805_h24_small

0.05

3V_RC

12

C8133

0.1UF/25V
vx_c0603_small
10%
1AV300000007

L8101

3.3UH

Irat=6.6A

@

SHORT_PIN

@

+AC_BAT_SYS

12

12

R8133

5%

560KOhm
@

R8127

5%

1KOhm

VSUS_ON30,91,93

1 2

21

JP8112

R8132
110KOHM

vx_r0402_small

@

12

C8154

0.1UF/25V
1AV300000007

12

C8139

0.1UF/25V
vx_c0603_small
10%

1 2

1%

+5VA

VSUS_ON_EN

@

+AC_BAT_SYS

@

+3VO=5.585A

12

C8156
10UF/6.3V

1AV300000018

+3VO

R8142

1%

100KOhm
@

1 2

34

5

+

CE8103
220UF/6.3V

1BV090000004

2

Q8112B
UM6K1N
@

+3VO

JP8107
1MM_OPEN_M1M2

2

112

C8141

@

0.1UF/25V

121108

1 2

Q8110
SSM3K315T

+3VSUS

@

S

D

3

2

G

1

61

Q8112A
UM6K1N
@

12

C8152
1500PF/50V
@

12

C8153

0.1UF/25V
@

1AV300000007

+3VSUS

0.954A

Support ACOC =>AOAC_@
nonsupport AOAC=>nonAOAC_@

A A

5

4

上上上上上上上上

nonAOAC_@

上上上上上上上上

3

AOAC_@

不不不不上上上上上上上上

不不不不上上上上上上上上

T8122

T8123

T8124

TPC28T

TPC28T

T8125
TPC28T

1

T8128
TPC28T

1

TPC28T

1

1

1

T8126

T8127

TPC28T

TPC28T

1

1

T8130

T8129

TPC28T

TPC28T

1

1

+5VO

+5VA

+3VA

T8133
TPC28T

T8131
TPC28T

T8138
TPC28T

T8134

T8135

TPC28T

TPC28T

1

1

1

T8137

T8136

TPC28T

TPC28T

1

1

1

T8140

T8139

TPC28T

TPC28T

1

1

1

2

+3VSUS

+3VO

T8132
TPC28T

1

T8146
TPC28T

1

T8141
TPC28T

1

T8147
TPC28T

1

T8142
TPC28T

1

T8148
TPC28T

1

<Variant Name>

<Variant Name>

<Variant Name>

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

VP70HW

VP70HW

VP70HW

POWER_SYSTEM

POWER_SYSTEM

POWER_SYSTEM

Alex

Alex

Alex

81 99Friday, January 18, 2013

81 99Friday, January 18, 2013

81 99Friday, January 18, 2013

Rev

Rev

Rev

1.1

1.1

1.1

5

4

3

2

1

+1.05VS POWER SUPPLY

SR8200

1.05V_L X

R0402

10%

12

12

C8235

0.1UF/25V

(0603) X7 R 10%

12

+5VO

TPS51362

TPS51367

TPS51367

Input Current 0.75A

12

C8234

@
1500PF/5 0V
MLCC/+/-10%

10%

C8225
10UF/25V

MLCC/+/-10%

1

1 2

1.05V_RC

12

TRIP

GND

5V

Float

T8234
TPC28T

R8201

2.2Ohm
@

C8231
1500PF/5 0V
@

12

C8222
10UF/25V

OCL

8A

12A

16A

1.05V_G SNS

L8200

0.68UH

+AC_BAT_SYS

12

C8223
10UF/25V

@

21

JP8202
SHORT_PIN

1 2

1.05V_V SNS

JP8200
SHORT_PIN

1 2

+1.05VO

12

C8204

22UF/6.3V

JP8201

112

3mm_open _5mil_m1m 2

C8201

22UF/6.3V

2

+1.05VS

(3.328A)

(5.993A)

12

12

12

C8205

C8202

22UF/6.3V

22UF/6.3V

@

@

@

12

12

C8200

C8203

22UF/6.3V

22UF/6.3V

1.05V_V DD

12

C8206

D D

8/7 +1.05VO ena ble from Susb c hange to Vsus_o n;
+1.05VUSU&PGD i s for intel XDP /debug

D8200

@

1.2V/0.1 A

12

SUSB#_P WR4 6,82,84,91 ,93

C C

1 2

R8200
10KOhm 1%

12

C8217

0.1UF/25V

1AV3000 00007

R8208
0Ohm

+1.05VS_ PWRGD10,92

1 2

Vref = 2.0V

REFIN = GND , V out = 1.05V

REFIN = FLOAT , Vout = 1.2V

R8203
0Ohm

1 2

R8204
0Ohm

@

1 2

12

1AV2000 00024

+5VO

C8207

10%

0.1UF/10V

vx_c0402_sm all

C8208

0.01UF/50 V

vx_c0402_sm all
1AV2000 00021

24
25
26
27
28
29

R8202
0Ohm

@

1 2

MODE

GND

Float

5V

10%

22

23

GSNS

REFIN2
REFIN
VREF
RA
EN
GND2

PGOOD1LP#2MODE3NC4BST5SW16SW27SW38SW4

12

20

21

TRIP

VSNS

SLEW

Fsw

400KHz

800KHz

1MHz

17V518

19

GND1

1 2

1.05V_BST

2.2UF/6.3 V

vx_c0603_sm all
1AV3000 00020

VIN115VIN216VIN3

PGND5
PGND4
PGND3
PGND2
PGND1

9

R8209

4.7Ohm

10V3400 00013

U8200A
TPS51363 RVET_7VIA

14
13
12
11
10

1.05V_B ST_R

U8200B

30
31
32
33

B B

A A

5

4

3

GND3

GND9

GND4

GND8

GND5

GND7

GND6

TPS51363 RVET_7VIA

36
35
34

T8201

T8203

T8202

TPC28T

TPC28T

TPC28T

1

1

1

T8209

T8210

T8211

TPC28T

TPC28T

TPC28T

1

1

1

GND

2

+1.05VO+1.05V S

GND

<Variant Name>

<Variant Name>

<Variant Name>

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

T8205
TPC28T

1

T8213
TPC28T

1

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

VP70HW

VP70HW

VP70HW

1

T8206
TPC28T

1

T8214
TPC28T

1

T8207
TPC28T

1

T8215
TPC28T

1

POWER_+1.05VS

POWER_+1.05VS

POWER_+1.05VS

Alex

Alex

Alex

82 94Friday, January 18, 2013

82 94Friday, January 18, 2013

82 94Friday, January 18, 2013

Rev

Rev

Rev

1.1

1.1

1.1

5

4

3

2

1

DDR & VTT POWER SUPPLY

R8303
68KOhm 1%

12

10%

GND_TPS51216

21

20

GND2

1 2

1 2

120KOhm 1%

DDR_MODE

DDR_TRIP

S3

19

18S317S516

TRIP

MODE

PGOOD

VREF6GND17REFIN8VDDQSNS9PGND

DDR_FB

DDR_REFIN

R8304

S5

10

F=300KHz

+1.35V

+0.675VS

GND_TPS51216

VBST

DRVH

SW

V5IN

DRVL

1 2

15
14
13
12
11

SR8303
R0603

T8314
TPC28T

1

T8302
TPC28T

1

DDR_BST
DDR_HG
DDR_LX
DDR_VDD
DDR_LG

GND_TPS51216

T8313
TPC28T

1

T8301
TPC28T

1

1 2

SR8300

12

C8309
1UF/6.3V

vx_c0402_small
10%

SR8301
R0603

1 2

U8300B

TPS51216RUKR

22

GND3

23

GND4

T8309
TPC28T

1

T8303
TPC28T

1

3

C8310

0.1UF/25V

1 2

DDR_BST_R

10%
vx_c0603_small
1AV300000007

+5VSUS

T8308
TPC28T

1

T8315
TPC28T

1

D

G

3

S

4 1

D

G

3

S

4 1

RDSon=25mOHM

T8305

T8310

TPC28T

TPC28T

1

1

T8306

T8311

TPC28T

TPC28T

1

1

Q8300
IRFHS8342TRPBF

2 5 6

07V040000087

7

Q8302
IRFHS8342TRPBF

2 5 6

07V040000087

7

Q8303
IRFHS8342TRPBF

2 5 6

07V040000087

D

G

3

S

7

4 1

2

D D

+0.675VO

(Max:1.2A)

JP8303

12

C8301
10UF/6.3V

vx_c0603_small

20%

D8300

1.2V/0.1A
vx_sod323_h37

1 2

R8305
39KOhm

vx_r0402_small
1%

D8301

1.2V/0.1A
vx_sod323_h37

1 2

R8306
10KOhm

vx_r0402_small
1%

1 2

SHORT_PIN

12

C8302
10UF/6.3V
vx_c0603_small
20%

12

@

12

@

12

C8314

0.1UF/25V

vx_c0603_small
10%
1AV300000007

12

C8315

0.1UF/25V

vx_c0603_small
10%
1AV300000007

JP8301

@

1MM_OPEN_M1M2

+0.675VS

(Max:1.2A)

C C

B B

A A

2

112

SR8302

SUSB#_PWR82,84,86,91,93

SUSC#_PWR91,93

1 2

1 2

R8307
0Ohm
vx_r0402_small
@

5

@

M_VREF

S3

S5

DDR_PWRGD92

+1.35V

12

C8303

0.1UF/25V
vx_c0603_small
10%
1AV300000007

1 2

@

1 2

SR8305
R0603

vx_c0402_small

GND_TPS51216

R0603

SR8304

T8304
TPC28T

1

DDR_VTTSNS

VLDOIN

12

C8300

@
10UF/6.3V
vx_c0603_small
20%

12

C8304

0.22UF/16V

DDR_REF

Close Pin 6

12

R8300
10KOhm

1%

R8301

32.4KOhm

vx_c0603_small

12

C8306

0.01UF/50V

10%
1AV200000021

EN/DEM Function

VDD

Diode-emulation

GND

4

GND_TPS51216

TPS51216RUKR

C8305

0.1UF/25V

GND_TPS51216

CCM

1
2
3
4
5

U8300A

VTTSNS
VLDOIN
VTT
VTTGND
VTTREF

Input Current 1.42A

12

C8316

@
1500PF/50V
vx_c0402_small
MLCC/+/-10%
1AV200000095

T8307
TPC28T

L8300

1.5UH 09V030000030

1

12

R8302

@

2.2Ohm
vx_r0805_h24_small

0.05
10V440000006

DDR_RC

12

C8307

@

0.1UF/25V
vx_c0603_small
10%
1AV300000007

12

C8311

0.1UF/25V
vx_c0603_small
10%
1AV300000007

12

DDR_FB

12

@

21

12

JP8302

SHORT_PIN

C8313

C8312

10UF/25V

10UF/25V

vx_c0805_h57_small

vx_c0805_h57_small

MLCC/+/-10%

MLCC/+/-10%

@

1AV500000015

(9.1A)

12

+

12

CE8300
560UF/2.5V

1BV090000002

<Variant Name>

<Variant Name>

<Variant Name>

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

C8317
10UF/6.3V

20%

C8318
10UF/6.3V

20%

+AC_BAT_SYS

12

12

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

VP70HW

VP70HW

VP70HW

1

+DDR_O

JP8305

112

3mm_open_5mil_m1m2

JP8300

112

3mm_open_5mil_m1m2

JP8304

112

3mm_open_5mil_m1m2

C8308
1UF/6.3V
10% @

POWER_DDR & VTT

POWER_DDR & VTT

POWER_DDR & VTT

Alex

Alex

Alex

83 94Friday, January 18, 2013

83 94Friday, January 18, 2013

83 94Friday, January 18, 2013

2

2

+1.35V

9.1A

2

Rev

Rev

Rev

1.1

1.1

1.1

5

4

3

2

1

+1.35VS POWER SUPPLY

SR8402

R0402

10%

1.35V_LX

12

12

C8409

0.1UF/25V

(0603) X7R 10%

12

/VGA

U8400B

30

GND3

31

GND4

32

GND5

33

GND6

TPS51362RVET_7VIA

/VGA

+5VO

TPS51362

TPS51367

TPS51367

Input Current 0.94A

12

GND9
GND8
GND7

C8416

@

10UF/25V

MLCC/+/-10%

/VGA

36
35
34

C8410
1500PF/50V
MLCC/+/-10%

10%

TRIP

GND

5V

Float

T8409
TPC28T

1

R8401

2.2Ohm
@

1.35V_RC

1 2
12

C8412
1500PF/50V
@

1.35V_GSNS

12

C8413
10UF/25V

/VGA

OCL

8A

12A

16A

L8400

0.68UH

/VGA

+AC_BAT_SYS

12

C8404
10UF/25V

/N14E-GL

21

JP8402
SHORT_PIN

1 2

1.35V_VSNS

12

/N14E-GL

JP8400
SHORT_PIN

1 2

+1.35VS_VGA

(8A)

C8408

/N14E-GL

12

12

22UF/6.3V

12

C8405

C8403

/VGA

C8402

22UF/6.3V

22UF/6.3V

22UF/6.3V

/VGA

/VGA

12

12

C8406

C8411

22UF/6.3V

22UF/6.3V

/N14E-GL

1.35V_VDD

12

/VGA

C8401

2.2UF/6.3V

D D

Vref = 2.0V

REFIN = GND , Vout = 1.05V

REFIN = FLOAT ,Vout = 1.2V

T8414
TPC28T

1

R8408

47.5KOhm

10V220000250

/VGA

12

12

1AV200000024

R8402

R8414

+3VO

R8415

1 2

+5VA

560KOhm

12

5%

/VGA

R8416
560KOhm

5%

/VGA

D8400

/VGA

C C

FB_CLAMP87

DGPU_EN_PWR87

1

2

0.8V/0.2mA

07V030000001

3

12

82KOhm

34

/VGA

5

Q8400B
UM6K1N

/VGA

61

Q8400A

2

UM6K1N

/VGA

12

C8407

0.1UF/25V

/VGA

1AV300000007

1 2

105KOhm

10V220000008

/VGA

+5VO

121226

C8414

10%

0.1UF/10V

vx_c0402_small

/VGA

C8415

/VGA

0.01UF/50V

vx_c0402_small
1AV200000021

24
25
26
27
28
29

R8407
0Ohm
@

1 2

MODE

GND

Float

5V

REFIN2
REFIN
VREF
RA
EN
GND2

/VGA

10%

23

12

17V518

19

20

21

22

TRIP

GND1

VSNS

SLEW

GSNS

PGND5
PGND4
PGND3
PGND2
PGND1

PGOOD1LP#2MODE3NC4BST5SW16SW27SW38SW4

R8409

1 2

1.5V_BST

4.7Ohm

10V340000013

/VGA

Fsw

400KHz

800KHz

1MHz

vx_c0603_small
1AV300000020

U8400A
TPS51362RVET_7VIA

VIN115VIN216VIN3

14
13
12
11
10

9

1.35V_BST_R

T8407

T8406

TPC28T

1

T8408

TPC28T

TPC28T

1

1

GND

<Variant Name>

<Variant Name>

<Variant Name>

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

T8403
TPC28T

1

T8404
TPC28T

1

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

1

T8405
TPC28T

1

VP70HW

VP70HW

VP70HW

POWER_1.5VS

POWER_1.5VS

POWER_1.5VS

Alex

Alex

Alex

84 94Friday , January 18, 2013

84 94Friday , January 18, 2013

84 94Friday , January 18, 2013

Rev

Rev

Rev

1.1

1.1

1.1

D8401

1.2V/0.1A

1 2

R8404
30KOhm 1%

vx_r0402_small

1 2

R8411
0Ohm

vx_r0402_small

12

@

12

C8420

0.1UF/25V 10%

vx_c0603_small
1AV300000007

+5VO

12

R8413

2.2Ohm

0.05
vx_r0805_h24_small

1.5V_LDO_VDD

12

C8417
1UF/25V

vx_c0603_small
10%

+3VO

Input current=0.353A

12

C8419
10UF/6.3V

vx_c0603_small
20%

4

4

VDD

3

VIN

2

EN

1

PGOOD

U8401
RT9042-25GSP

Vref=0.8V

VOUT

GND1
GND2

+1.35VS_VGA

+1.5VO_LDO

12

12

12

C8418
10UF/6.3V

vx_c0603_small
20%

3

12

C8421
10UF/6.3V
vx_c0603_small
20%

@

C8400

R8410

9.31KOhm

5

NC

ADJ

vx_r0402_small

6

1%

7

10V220000171

8

12

9

R8412

10.5KOHM

vx_r0402_small

GND

1%
10V220000238

@
56PF/50V
vx_c0402_small
5%

T8411
TPC26T

1

T8413
TPC26T

1

JP8403
1MM_OPEN_M1M2

2

112

+1.5VS

T8410
TPC26T

1

0.353A

T8412
TPC26T

1

+1.5VS

2

B B

A A

+1.5VS_PWRGD92

SUSB#_PWR82,83,86,91,93

5

5

4

3

2

1

VGA_CORE POWER SUPPLY

+3VS_VGA

R8724

@

100Ohm 1%
vx_r0402_small

12

R8725
100Ohm

vx_r0402_small

C8701

/VGA

0.22UF/16V

vx_c0402_small

1 2

12

C8709

1AV300000025

VGA_HG2

C8704

/VGA

0.22UF/16V

vx_c0402_small

1 2

12

@

1%

121024

MLCC/+/-10%

1 2

/VGA

1UF/10V

MLCC/+/-10%

R8710

/VGA

0Ohm

0

vx_r0603_h28_small

121009

Q8701

SIRA14DP-T1-G E3

07V040000100

/VGA

T8709
TPC28T

1

+5VS

Q8704

SIRA14DP-T1-G E3

07V040000100

/VGA

54

876

5
D

S

G

123

54

Q8702

5
D

S

G

54

5
D

S

G

123

54

Q8705

5
D

G

VGA_PSI#

R8708

/VGA

0Ohm

0

vx_r0603_h28_small

1 2

/VGA

VGA_VRON

VGA_HG1

VGA_BST1

1

2EN3

4

5

PSI

VID

BOOT1

UGATE1

GND

6

REFADJ

PHASE1

7

REFIN

LGATE1

8

VREF

PVCC

9

TON

LGATE2

10

RGND

PHASE2

@

SS11VSNS12PGOOD13UGATE214BOOT2

15

12

12

C8711

390PF/50V

@

12

10%

U8700A

/VGA

RT8812AGQW

21
20
19
18
17
16

130115

R8711
0Ohm

vx_r0603_h28_small

1 2

/VGA

VGA_BST1_R

0

VGA_LX1
VGA_LG1
VGA_VDD
VGA_LG2
VGA_LX2

12

R8727
15KOhm

/VGA

10V220000023

VGA_BST2_RVGA_BST2

VGA Input current=9.37A

+AC_BAT_SYS

12

C8710

0.1UF/25V
@

C8718

12

10UF/25V

MLCC/+/-10%
1AV500000015

/VGA

G

54

5
D

876

S

123

Q8706
SIRA14DP-T1-G E3
07V040000100
@

12

C8702
1500PF/50V
1AV200000095

C8717

12

10UF/25V

MLCC/+/-10%
1AV500000015

@

/VGA

121015

T8711

TPC28T

L8701

0.36UH

1

12

R8705

12

R8715

2.2Ohm

10V440000006

/VGA

C8705
1500PF/50V

1AV200000095

/VGA

2.2Ohm

10V440000006

/VGA

VGA_RC1

12

C8712
1500PF/50V

1AV200000095

C8715
1500PF/50V
1AV200000095

@

/VGA

54

Q8703

876

123

876

S

876

5
D

S

G

SIRA10DP-T1-GE3

/VGA

876

123

G

SIRA10DP-T1-GE3

54

5
D

G

/VGA

876

S

123

54

Q8707

5
D

S

SIRA10DP-T1-GE3

123

/N14E-GL

Q8708
SIRA14DP-T1-G E3
07V040000100
@

121015

876

/N14E-GL

SIRA10DP-T1-GE3

123

TPC28T

1

12

VGA_RC2

12

T8712

Irat=24A

/VGA

21

121016

+VGA_VCORE _O

CE8701

@

330UF/2V

1BV080000033

CE8700
560UF/2.5V

1BV090000002

/VGA

12

C8727
10UF/6.3V

20%

/VGA

12

C8728
10UF/6.3V

20%

/VGA

+VGA_VCORE

EDP=50A

OCP:60A

TDC=35A

+AC_BAT_SYS

12

C8714

0.1UF/25V
@

L8700

0.36UH

Irat=24A

/VGA

C8719

12

10UF/25V

MLCC/+/-10%
1AV500000015

/VGA

21

C8716

12

10UF/25V

MLCC/+/-10%
1AV500000015

/VGA

12

C8725
10UF/6.3V

20%

/VGA

12

C8726
10UF/6.3V

20%

/VGA

CE8702
560UF/2.5V

1BV090000002

/VGA

R8723

/VGA

20KOhm 1%

vx_r0402_small

12

/VGA

/VGA

1%

1 2

nb_r0402_short_5m il_small

+AC_BAT_SYS

121030

12

SR8705

1 2

GND_RT8812A

SR8703

NB_R0402_20MIL_SMALL

VGA_VREF

VGA_REFADJ

VGA_REFIN

D8700

1.2V/0.1A

1 2

R8722
10KOhm

/VGA

1 2

12

R8723
R8721
R8716
R8713
C8703 >1.8nF 2.7nF

Vmin
Vmax
Vboot

optional
naming

12

1%

/VGA

R8728

1 2

43KOhm

@

@

121016

VGA_REFADJ
VGA_REFIN
VGA_VREF

@

R8700
499KOhm 1%

vx_r0402_small

R8729

80.6KOhm
10V220000098

121206

one
phase

39K
30K

3K 2K

0.65V 0.6V

1.15V 1.2V

0.9V 0.9V

12

121030

12

12

C8721

/VGA

0.1UF/10V

vx_c0402_small

10%

GND_RT8812A

two
phase

20K
20K

18K27K

/N14P-GV2/N14M-GL

121017

C8713

0.1UF/10V

1AV200000024

C8703
2700PF/50V
MLCC/+/-10%
vx_c0402_small

R8730

16KOHM

@

C8724

@

4700PF/25V

12

R8721

/VGA

20KOhm 1%

vx_r0402_small

nb_r0402_short_5m il_small

vx_c0402_small

SR8700

1 2

12

1 2

GND_RT8812AGND_RT8812A

SR8701

1 2

R8718
100Ohm 1%

vx_r0402_small

C8723
100PF/50V

R8720
100Ohm 1%

vx_r0402_small

R8716
2KOhm 1%

vx_r0402_small

R8713
18KOhm

vx_r0402_small

/VGA

12

/VGA

5%

12

/VGA

D D

121030

12

C8720
2700PF/50V

X7R/+/-10%

/VGA

vx_c0402_small

91

DGPU_EN_PW R

C C

VGA_PSI#

VGA_VID

NVDD_GND _SENSE

VGA_PSI# VO_action

~ 0.8V

1.2 ~ 1.8V

2.4V ~

B B

1 Phase DEM

1 Phase FCCM

2 Phase FCCM

91,92

DGPU_PW ROK

NVDD_SENS E

+VGA_VCORE

nb_r0402_short_5m il_small

T8707
TPC28T

T8701
TPC28T

T8708

TPC28T

1

1

+VGA_VCORE

T8702
TPC28T

1

1

<Variant Name>

<Variant Name>

<Variant Name>

Title :

POWER_VGACORE

Title :

POWER_VGACORE

Title :

POWER_VGACORE

Alex

Alex

Alex

Engineer:

Engineer:

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

4

3

2

Date: Sheet of

Engineer:

VA70HW

VA70HW

VA70HW

1

Rev

Rev

Rev

1.1

1.1

1.1

87 99Friday, January 18, 2013

87 99Friday, January 18, 2013

87 99Friday, January 18, 2013

T8703

U8700B

/VGA

22

GND1

23

GND2

RT8812AGQW

A A

5

TPC28T

1

T8704
TPC28T

1

5

4

3

2

1

BATTERY CHARGER

Adapter 120W=6.32A

D D

+A/D_DOCK_ IN60

+A/D_DOCK_ IN

4/24

C C

Adapter 90W=4.74A
Adapter 65W=3.42A

T8818
TPC28T

1

C8830
10UF/25V
MLCC/+/-10%
@

T8814

T8815

TPC28T

TPC28T

1

1

R8801

2.2ohm

RES FILM 2 .2 ohm 1/2W 1206 5%

12

1 2

12

C8801

2.2UF/25V

MLCC/+/-10%
MLCC 2.2UF /25V (1206) X 7R 10%

+BAT

T8816

T8817

TPC28T

TPC28T

1

1

12

C8802

2200PF/5 0V

R8803
432KOhm

10V2200 00320

1 2

AC_IN_OC30,74,90

R8804

C8825

68KOhm

0.1UF/10V

1 2

RES 68K OHM 1/16W (0402) 1%

10V2200 00168

1 2

1

2

D8801

0.8V/0.2 mA

1AV2000 00024

3

CHG_VCC_R

Q8800

1

8

SD

2

7

3

6
5

4

G

IRF8707P BF

07V0400 00099

ACG

CHG_LDO

R8813
10KOhm

1/16W (0402) 1%

1 2

R8814

12.4KOHM

1%

RES 12.4 K OHM 1/16W (0402) 1%

1 2

10V2200 00278

R8817

1 2

CHG_VCC

22Ohm

RES 22 O HM 1/8W(08 05)5%
10V4400 00007

+A/D_DOCK_ IN_Q

C8803

0.1UF/25V

1 2

MLCC 0.1UF /25V(0603) X 7R 10%
1AV3000 00007

R8802

4.02KOh m

RES 4.02 K OHM 1/10W (0603)1%
10V3200 00061

1 2

1%

+3VA

R8815
560KOhm

5%

RES 560K OHM 1/16W (0402)5%

1 2

10V2400 00037

R8816

@

150KOhm

RES 150K OHM 1/16W (0402)1%

1%

1 2

Q8802

1
2
3
4

IRF8707P BF

07V0400 00099

R8806

4.02KOh m

RES 4.02 K OHM 1/10W (0603)1%
10V3200 00061

1 2

1%

ACDRV

AD_IINP 30

SMB0_DAT30,60

SMB0_CLK30,60

12

C8821

0.01UF/50 V
@

10%

1AV2000 00021

S D

G

8
7
6
5

1 2

BATG

C8820
100PF/50 V

(0402) NPO 5%

R0603
SR8802

1 2

R0603
SR8803

1 2

+A/D_DOCK_ IN_Q_Q

C8814

0.1UF/25V

1 2

MLCC 0.1UF /25V(0603) X 7R 10%
1AV3000 00007

3

4

5

ACOK

ACDRV

CMSRC

6

ACDET

7

IOUT

8

SDA

9

SCL

10

ILIM

BATDRV11SRN12SRP13GND114LODRV

R8809

12

4.02KOh m

RES 4.02 K OHM 1/10W (0603)1%
10V3200 00061

R8808

RES 10m OHM 1W (12 06) 1%

1 2

10mOhm

SR8804
R0603

1 2

C8806

1 2

0.1UF/25V

MLCC 0.1UF /25V(0603) X 7R 10%
1AV3000 00007

CHG_ACP

U8800A
BQ24735 RGRR

06V3700 00005

1

2

ACP

ACN

21

GND2

20

VCC

19

PHASE

18

HIDRV

17

CHG_BST

BTST

16

REGN

C8824
1UF/25V

(0603) X5 R 10%

15

CHG_LG

CGH_SRP

SR8805
R0603

1 2

CHG_ACN

12

C8819

0.47UF/25 V

MLCC 0.47 UF/25V (0603 ) X5R 10%
1AV3000 00032

1 2

SR8801
R0603

12

CHG_LDO

CGH_SRN

C8828

1500PF/5 0V

1 2

1AV2000 00095

@

C8805

0.1UF/25V

1 2

MLCC 0.1UF /25V(0603) X 7R 10%
1AV3000 00007

CHG_VCC

CHG_HG

3

2

12

C8810

10%

0.047UF/1 6V

1AV2000 00048

D8800

0.8V/0.2 mA
T8826 TPC28T

1

CHG_BST_R

1

Q8806

8
7
6
5

IRF8707P BF

C8813

1500PF/5 0V

1 2

MLCC 1500 PF/50V(0402 ) X7R 10%
1AV2000 00095

@

T8825
TPC28T

1

CHG_LX

07V0400 00099

EMI Request,Close Q8806

567

8

Q8804
IRF8707P BF

G

07V0400 00099

S D

123

4

567

8

Q8805
IRF8707P BF

G

07V0400 00099

S D

123

4

MLCC 0.1UF /25V(0603) X 7R 10%
1AV3000 00007

1

SD

2
3
4

G

1500PF/5 0V

1AV2000 00095

121015

12

R8819

2.2Ohm
10V4400 00006

CHG_RC

12

C8826

0.1UF/25V
1AV3000 00007

C8822

L8800

4.7UH

Irat=5.5A

@

@

C8808

0.1UF/25V

BATG

12

12

C8817
10UF/25V

MLCC/+/-10%

21

1 2

+BAT_R

12

JP8802
SHORT_PIN

MLCC 0.1UF /25V(0603) X 7R 10%

CHG_SRP_ R

12

SR8806

1 2

R0603

1 2

1AV2000 00021

12

C8818
10UF/25V
MLCC/+/-10%
@

R2.0

R8810

10mOhm

(1206) 1%

C8807

1 2

0.1UF/25V

1AV3000 00007

SR8807

C8816

0.01UF/50 V

R0603

R8818
560KOhm
10V2400 00037
@

1 2

+AC_BAT_SYS

12

C8823

@

0.1UF/25V
10%
1AV3000 00007

12

12

JP8803
SHORT_PIN

CHG_SRN_R

12

C8809

0.1UF/25V

1 2

MLCC 0.1UF /25V(0603) X 7R 10%
1AV3000 00007

+BAT+AC_BAT_SYS

@

C8827

1500PF/5 0V

1 2

MLCC 1500 PF/50V(0402 ) X7R 10%
1AV2000 00095

EMI Request,Close Q8806

+AC_BAT_SYS

12

C8811

C8812

10UF/25V

10UF/25V

MLCC/+/-10%

MLCC/+/-10%

12

C8815
10UF/25V
MLCC/+/-10%

JP8800
3MM_OPEN _5MIL

112

JP8801
3MM_OPEN _5MIL

112

+BAT

+BAT

@

2

2

1

1

T8808
TPC28T

1

1

T8800
TPC28T

T8804
TPC28T

T8822
TPC28T

T8809
TPC28T

1

T8801
TPC28T

1

T8805
TPC28T

1

T8821
TPC28T

1

+BAT_CON

TPC28T
T8810

1

TPC28T1T8803
T8802

TPC28T
T8806

1

T8811
TPC28T

1

TPC28T
T8820

1

+BAT_CON

T8813

TPC28T

TPC28T

1

1

T8807

T8812

TPC28T

TPC28T

1

1

T8819
TPC28T

1

T8823

T8824

TPC28T

TPC28T

1

1

+BAT_CON

+BAT

+AC_BAT_SYS

B B

AC_IN_OC

12

R8820
100KOhm

1%

5%

12

R8805
1MOhm

3

D

Q8803

1

2N7002

G

S

2

5%

1 2

R2.0

R8807
2MOHM

(0402)5%

ACDRV

RES 1M OH M 1/16W (0 402) 5%

A A

5

12

C8829

0.022UF/1 6V

10%
1AV2000 00027

SR8808

1 2

R0402

BAT_LEARN

4

U8800B

BQ24735 RGRR

06V3700 00005

3

GND6
GND5
GND4
GND3

25

1 2
24
23
22

SR8800
R0603

<Variant Name>

<Variant Name>

<Variant Name>

POWER_CHARGER

POWER_CHARGER

POWER_CHARGER

Title :

Title :

Title :

Engineer:

Engineer:

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Engineer:

1

VP70HW

VP70HW

VP70HW

Alex

Alex

Alex

88 15Friday, January 18, 2 013

88 15Friday, January 18, 2 013

88 15Friday, January 18, 2 013

Rev

Rev

Rev

1.1

1.1

1.1

5

4

3

2

1

P.90

ADAPTER IN DETECT

D D

AC_IN_OC30,74,88

BATTERY IN DETECT

12

JP9024
SHORT_PIN

C C

B B

BAT1_IN_OC# 30TS1#60

AC_IN_OC#

TPC28T
T9018

1

Q9006

PMBS3904

3
C

E
2

12

R9008
100KOhm

C9001

0.1UF/25V
10%

1 2

@

@
1AV300000007

@

B

1

A A

<Variant Name>

<Variant Name>

<Variant Name>

POWER_DETECT

POWER_DETECT

POWER_DETECT

Title :

Title :

Title :

Alex

Alex

Alex

Engineer:

Engineer:

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

VP70HW

VP70HW

VP70HW

1

Rev

Rev

Rev

1.1

1.1

90 99Friday, January 18, 2013

90 99Friday, January 18, 2013

90 99Friday, January 18, 2013

1.1

5

SUSB#_PWR POWER

S

+3VO

12

C9100
47PF/50V
vx_c0402_small
5%

D D

+5VO

12

C9116
47PF/50V
vx_c0402_small
5%

+12VSUS

+5VO

SUSB#_PWR

C C

@

@

D

3

Q9100
IRFML8244TRPBF

D

3

Q9101
IRFML8244TRPBF

T9142
TPC28T

1

2

VGS= 4.5V , Rdson = 41mOhm

G

1

VGS= 10V , Rdson = 24mOhm

+3VS_SW_R

12

C9101

0.1UF/25V

vx_c0603_small
10%
1AV300000007

S

2

VGS= 4.5V , Rdson = 41mOhm

G

1

VGS= 10V , Rdson = 24mOhm

+5VS_SW_R

12

C9107

0.033UF/16V

vx_c0402_small
10%

R9126

5%

560KOhm

1 2

R9125

1 2

61

560KOhm

5%

2

R9105
47KOhm

vx_r0402_small
1%

R9106
47KOhm

vx_r0402_small
1%

5

Q9107A
UM6K1N

34

12

12

Q9107B
UM6K1N

4

T9101
TPC26T

1
12

C9108

0.1UF/25V

vx_c0603_small
10%
1AV300000007

T9119
TPC26T

1
12

C9103

0.1UF/25V

vx_c0603_small
10%
1AV300000007

T9108
TPC26T

1

T9115
TPC26T

1

T9123
TPC26T

1

T9124
TPC26T

1

T9106
TPC26T

1

T9102
TPC26T

1

T9111
TPC26T

1

+3VS

(Max:3.973A)

+5VS

(Max:2.263A)

+12VS

(Max:0.01A)

3

SUSC#_PWR POWER

+3VO

12

C9109

@
47PF/50V
vx_c0402_small
5%

D

3

Q9103

@

IRFML8244TRPBF

2

S

2

VGS= 4.5V , Rdson = 41mOhm

G

1

VGS= 10V , Rdson = 24mOhm

+3V_SW_1

C9115

@

0.1UF/25V
vx_c0603_small
10%
1AV300000007

12

12

R9104
22KOhm
vx_r0402_small
1%

@

T9103
TPC26T

1
12

C9114

0.1UF/25V
vx_c0603_small
10%
1AV300000007

T9107
TPC26T

1

@

T9121
TPC26T

1

1

+3V

(Max:1.3875A)

121015

T9117

T9114

T9113

TPC26T

TPC26T

TPC26T

1

1

1

@

34

5

Q9106B
UM6K1N
@

61

Q9106A
UM6K1N
@

+12V

(Max:0.005A)

SUSC#_PWR

+5VO

+12VSUS

T9120
TPC26T

1

1 2

R9124
560KOhm
vx_r0402_small
5%

@

1 2

R9103
560KOhm
vx_r0402_small
5%

2

DSC#_PWR POWER(dGPU)

Q9116

8

1
2

7

S

6

3

D

5

+1.05VO

+3VO

VSUS_ON POWER

JP9101

2

112

3mm_open_5mil _m1m2

Q9112

@

B B

A A

+5VO

12

C9128
47PF/50V
vx_c0402_small
5%

SUSB_EC#22,23,30,57,92 SUSC_EC#30,50 ,57

SUSB#_PWR82,83,84,86,93 SUSC#_PWR83,93

DSC_VGA_PWR POWER Control

R1.0 0103

VGA_PWRON

DGPU_EN_PWR87

5

IRFML8244TRPBF

S

D

3

2

@

G

1

VGS= 4.5V , Rdson = 22mOhm
VGS= 10V , Rdson = 17mOhm

+5VSUS_SW_R

12

C9129

@

R9115

0.1UF/25V
vx_c0402_small
10%

T9122
TPC26T

1

T9118
TPC26T

1

TPC26T
T9135

1

TPC26T
T9149

1

1 2

R0603(1KOhm)

1KOhm
vx_r0402_small
1%

@

+5VA

VSUS_ON30,57,81,93

SP9100@
nb_r0402_short_5mil_sm all

SR9123

1 2

+12VSUS

1 2

T9139
TPC26T

1
12

C9127

0.1UF/25V
vx_c0402_small
10%

R9128
560KOhm
vx_r0402_small
5%

4

T9141
TPC26T

1

@

1 2

R9129
560KOhm
vx_r0402_small
5%

@

61

2

T9140
TPC26T

1

@

5

@

Q9113A
UM6K1N

+5VSUS

(Max:4A)

121206

34

@

Q9113B
UM6K1N

T9109
TPC26T

1

T9116
TPC26T

1

SP9101@
nb_r0402_short_5mil_sm all

1 2

3

5 4

SIRA10DP-T1-GE3

/VGA

VGS= 10V , Rdson = 3.2mOhm

Q9115
IRFML8244TRPBF

D

3

DGPU_EN_PWR87

/VGA

1

G

S

2

G

+12VSUS

DGPU_EN_PWR

121016

Q9111

1 2 3

68@-5mA/Vceo=+/-50V

/VGA

12

C9119

0.1UF/25V

vx_c0402_small
10%

/VGA

12

C9118

0.1UF/25V

vx_c0402_small
10%

/VGA

ECC

47K

47K

47K

E

2

B B

D9102 1.2V/0.1A /VGA

1 2

R9113

1 2

200KOhm

10V220000037

R9114

10KOhm

46

10K

/VGA

10V220000003

121028

/VGA

12

121023

<Variant Name>

<Variant Name>

<Variant Name>

Size Project Nam e

Size Project Nam e

Size Project Nam e

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

R9111
10KOhm

10V220000003

1 2

/VGA

T9130

T9129

TPC26T

TPC26T

1

1

12

C9102

0.1UF/25V
10%

T9132

T9126

TPC26T

TPC26T

1

1
12

C9122

0.1UF/25V
10%

T9125

T9143

TPC26T

TPC26T

1

1

121028

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

VP70HW

VP70HW

VP70HW

1

T9136
TPC26T

1

+1.05VS_VGA

@

(Max:2.665A)

T9138
TPC26T

1

+3VS_VGA

@

(Max:0.543A)

T9144
TPC26T

1

+12VS_VGA

(Max:0.01A)

POWER_LOAD SWITCH

POWER_LOAD SWITCH

POWER_LOAD SWITCH

Alex

Alex

Alex

91 94Friday, January 18, 2013

91 94Friday, January 18, 2013

91 94Friday, January 18, 2013

Rev

Rev

Rev

1.1

1.1

1.1

5

4

3

2

1

+3VS

12

POWER GOOD DETECTER

R9205
100KOhm

1%

D D

+1.5VS_PWRGD84

DDR_PWRGD83

+1.05VS_PWRGD82

C C

DGPU_PWROK87,91

T9203
TPC28T

1

T9202
TPC28T

1

T9210
TPC28T

1

T9207
TPC26T

1

1 2

SR9204
R0402

1 2

SR9200
R0402

1 2

SR9201
R0402

1 2

R9208

@
0Ohm
vx_r0402_small

1 2

SR9203
R0402

A

1

VCC

B

2

3 4

GND

Y

@

U9200
Vcc=2~5.5

+3VSUS

5

T9200
TPC28T

1

1 2

R9202
0Ohm

T9204
TPC28T

1

@

ALL_SYSTEM_PWRGD 10,30

PM_PWROK 10,22,30

+3VSUS

12

R9206

T9206
TPC28T

SUS_PWRGD30,81

B B

1

100KOhm

1%

D9201

1.2V/0.1A

12

1 2

SR9202
R0402

+3VS

Change to 1.91K

T9208
TPC28T

A A

VRM_PWRGD30,80

5

1

1 2

D9202

1.2V/0.1A

12

R9204
100KOhm

1%

ALL_SYSTEM_PWRGD

A

1

B

2

3 4

GND

U9201
Vcc=2~5.5

4

VCC

+3VSUS

5

Y

@

SUSB_EC#22,23,30,57,91

3

SUSB_EC#

12

D9200

1.2V/0.1A

1 2

61

Q9200A

2

UM6K1N

R9201
560KOhm

5%

12

C9200

4.7UF/6.3V

10%

T9201
TPC28T

1

34

5

Q9200B
UM6K1N

2

DELAY_VR_AND_ALL_SYS 22

FORCE_OFF# 32,50,81

FORCE_OFF_PWR 81

<Variant Name>

<Variant Name>

<Variant Name>

POWER_PROTECT

POWER_PROTECT

Title :

Title :

Title :

Engineer:

Engineer:

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Engineer:

POWER_PROTECT

Alex

Alex

Alex

VP70HW

VP70HW

VP70HW

92 94Friday, January 18, 2013

92 94Friday, January 18, 2013

92 94Friday, January 18, 2013

1

Rev

Rev

Rev

1.1

1.1

1.1

5

4

3

2

1

+AC_BAT_SYS

D D

C C

+BAT_CON

+5VA

+3VA

+5VO

+3VO

+1.05VS

+1.05VO

+12VSUS

+5VSUS

+3VSUS

+12V

+3V

+12VS

+5VS

+3VS

+AC_BAT_SYS 45,80,81,82,83,86,87,88

+BAT_CON 60,88

+5VA 50,52,81,91

+3VA 20,27,30,52,56,57,65,81,88

+5VO 81,84,91

+3VO 37,81,84,91

+1.05VS 86,91

+1.05VO 82,91

+12VSUS 22,28,53,81,91

+5VSUS 22,25,52,53,81,82,83,86,91

+3VSUS 4,10,22,23,27,28,30,33,53,81,92

+12V 91

+3V 4,23,31,40,55,57,91

+12VS 20,28,48,91

+5VS 25,30,31,36,37,46,48,50,51,56,57,58,80,87,91

+3VS 16,17,20,21,22,23,25,26,27,28,30,32,33,36,37,44,45,46,48,50,51,53,57,58,91,92

+3VA

FOR POWER TEST

JP9300

SGL_JUMP

112

JP9301

SGL_JUMP

112

JP9302

SGL_JUMP

112

JP9303

SGL_JUMP

112

JP9304

SGL_JUMP

112

@

2

@

2

@

2

@

2

@

2

T9300
TPC28T

1

T9301
TPC28T

1

T9302
TPC28T

1

T9303
TPC28T

1

T9304
TPC28T

1

CPU_VRON_PWR 80

SUSB#_PWR 82,83,84,86,91

SUSC#_PWR 83,91

VSUS_ON 30,81,91

DGPU_EN_PWR 84,87,91

B B

A A

5

+1.5VS

+1.05VS

+VCORE

4

+1.5VS 20,21,22,24,26,27,53,57,84,86,91

+1.05VS 4,10,26,27,57,82,87

+VCORE 6,9,57,80

<Variant Name>

<Variant Name>

<Variant Name>

POWER_SIGNAL

POWER_SIGNAL

Title :

Title :

Title :

Engineer:

Engineer:

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

Engineer:

POWER_SIGNAL

Alex

Alex

Alex

VP70HW

VP70HW

VP70HW

1

Rev

Rev

Rev

1.1

1.1

93 94Friday, January 18, 2013

93 94Friday, January 18, 2013

93 94Friday, January 18, 2013

1.1