Pegatron VA70 BA52HR, Aspire V3-771, Aspire V3-771G, VA70 BA52CR Schematic

5

4

3

2

1

VA70 BLOCK DIAGRAM

CPU

D D

dGPU

PCIE X 16

Sandy Bridge Ivy Bridge

DDR3 1333/1600 MHz channel A

DDR3 1333/1600 MHz channel B

N13P GS/GL/GT

PAGE 70~79

HDMI

PAGE 39

CRT

PAGE 38

LVDS/eDP

PAGE 37

Head Phone (Combo Jack)

C C

MIC

FAN

K/B

T/P

PAGE 58

PAGE 48

PAGE 49

Azalia Codec RTK/ALC271 (VB6)

PAGE 41 42

EC

PAGE 30

IT8518E

Azalia

LPC

HSPI

FDI x 4

PCH

Cougar Point Panther Point

HM77

SPI ROM 4MB (BIOS/EC)

PAGE 30

SPI ROM 2MB (ME)

B B

PAGE 28

SPI

SATA

PAGE 3-10

DMI x 4

PAGE 13-19

PCIE *1

SATA HDD

PAGE 60

SATA HDD

PAGE 60

PCIE *1

SATA 3.0

SATA ODD

PAGE 60

USB2.0

USB3.0

USB2.0

USB3.0

PCIE *1

USB2.0

USB30 IC FL1009

DDR-III SO-DIMM*2

Camera

USB PORT9

USB PORT3

USB20 PORT1 USB30 PORT2

USB20 PORT0 USB30 PORT1

MiniCard WLAN/WMAX

BT combo

PAGE 51

Giga LAN AR8151/AR8152

Card Reader RTS5209

mSATA/SSD

PAGE 58

PAGE 61

PAGE 55

PAGE 33

PAGE 40

PAGE 53

PAGE 16

PAGE 17

RJ45

PAGE 34

POWER

CPU VCORE

SYSTEM, +3V, +5V

+VCCP & +VCCP_VT

DDR & VTT

2.5V & 1.5VS &1.1VS

SMART CHARGER

POWER DETECT

LOAD SWITCH

POWER PROTECT

Power Rails

Sleep State

S0 ON

S3 OFFON ON ONON

PCIe Port

PCIE_P1

PCIE_P2

PCIE_P3

PCIE_P4

PCIE_P5

PCIE_P6

USB20 PORT

USB P00

USB P01

USB P02

USB P03

USB P04

USB P05

USB P08

USB P09

USB P10

USB P11

USB P12

USB P13

PAGE 80

PAGE 81

PAGE 82

PAGE 83

PAGE 84

PAGE 88

PAGE 90

PAGE 91

PAGE 92

RTC VA VSUS

ON ON

CARDREADER

Mini CARD (WLAN)

mSATA

USB30

LAN

External MB

External DB

BT

Camera

External DB

SSD

VGA POWER

GPU VCORE

+1.05VS_VGA

+1.5VS_VGA

+3VS_VGA

+12VS_VGA

LOAD SWITCH

POWER PROTECT

ON

PAGE 80

PAGE 91

PAGE 92

V VS

ON

OFFS4 ON OFFONON

OFFON ON OFFONS5/ AC

OFFS5/ DC ON OFFOFFON

SATA PORT

IO BOARD

USB PORT3

A A

USB PORT9

5

HP_OUT

MIC IN

4

TP BT BOARD

Touch PAD Button

LID SW

POWER Button

POWER LED

LID SW

3

2

PWR BOARD

SATA P0 HDD 1

SATA P1

HDD 2

ODD 3

SATA P2

SATA P3

mSATA

SATA P4

SATA P5

BLOCK DIAGRAM

Title :

Wing_Cheng

Engineer:

BU1-RD Div.1-HW RD Dept.1

Size Project Name

Custom

Date: Sheet of

Engineer:

BA52HR/CR

1

Rev

1.0

1 77Friday, February 03, 2012

1.0

5

4

3

2

1

RemarkBOM optional

For

N/A

/ABCT For ABCT

D D

/niAMT

/HOME For

/HR

/Non_HSPI For ROM SETTING

Entry

Main For

/USB20

上上上上上上上上

，，，，上上上上上上上上

For no iAMT

，，，，上上上上上上上上

上上上上上上上上

For Huron River

For

上上上上上上上上上上上上上上上上

For USB 2.0

，，，，上上上上上上上上

/HSPI For

C C

/HDMI

/TP1_AUD

/TP1_BT For power control

/TP1_CAMERA

/TP1_CR

/TP1_LAN

/TP1_ODD

/TP1_WLAN

/THERM For Palm Rest

B B

/usb30

/ZPODD For ODD battery saving

@

@/MP For debug port, MP

/BT270

/COMBO_BT

/SATA+

不不不不上上上上上上上上

For HDMI

For power control

用用用用，，，，不不不不上上上上上上上上

，，，，不不不不上上上上上上上上，，，，不不不不上上上上上上上上

For power control

，，，，不不不不上上上上上上上上，，，，不不不不上上上上上上上上，，，，不不不不上上上上上上上上，，，，不不不不上上上上上上上上，，，，不不不不上上上上上上上上

溫溫溫溫溫溫溫溫，，，，不不不不上上上上上上上上

For USB 3.0

For

不不不不上上上上上上上上

，，，，不不不不上上上上上上上上

不不不不上上上上上上上上

視視視視

keypat list

視視視視

keypat list

而而而而而而而而而而而而而而而而

For Sata Repeater, SR

使使使使用用用用

Mount R5108

先先先先上上上上上上上上

，，，，不不不不上上上上上上上上

A A

Title :

Engineer:

PEGATRON COMPUTER INC

Size Project Name

A

Date: Sheet of

5

4

3

Date: Sheet of

BA52HR/CR

2

Engineer:

System Setting

Wing_Cheng

2 94Friday, February 03, 2012

1

Rev

1.0

5

4

3

2

1

+VCCP

D D

C C

DP Compensation

B B

+VCCP 4,6,7,25,26,27, 37,47,63,82

FDI_TXN[7:0]22

FDI_TXP[7:0]22

+VCCP

DP_HPD#_PCH37

DP_AUXP_PCH37 DP_AUXN_PCH37

DP_TXP0_PCH37 DP_TXP1_PCH37

DP_TXN0_PCH37 DP_TXN1_PCH37

12

T0301T0301 T0302T0302

T0303T0303 T0304T0304

U0301A

FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7

FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7

DP_TXP2_PCH DP_TXP3_PCH

DP_TXN2_PCH DP_TXN3_PCH

B27 B25 A25 B24

B28 B26 A24 B23

G21 E22 F21 D21

G22 D22 F20 C21

A21 H19 E19 F18 B21 C20 D18 E17

A22 G19 E20 G18 B20 C19 D19 F17

J18 J17

H20

J19 H17

A18 A17 B16

C15 D15

C17 F16 C16 G15

C18 E16 D16 F15

DMI_RX#[0] DMI_RX#[1] DMI_RX#[2] DMI_RX#[3]

DMI_RX[0] DMI_RX[1] DMI_RX[2] DMI_RX[3]

DMI_TX#[0] DMI_TX#[1] DMI_TX#[2] DMI_TX#[3]

DMI_TX[0] DMI_TX[1] DMI_TX[2] DMI_TX[3]

FDI0_TX#[0] FDI0_TX#[1] FDI0_TX#[2] FDI0_TX#[3] FDI1_TX#[0] FDI1_TX#[1] FDI1_TX#[2] FDI1_TX#[3]

FDI0_TX[0] FDI0_TX[1] FDI0_TX[2] FDI0_TX[3] FDI1_TX[0] FDI1_TX[1] FDI1_TX[2] FDI1_TX[3]

FDI0_FSYNC FDI1_FSYNC

FDI_INT

FDI0_LSYNC FDI1_LSYNC

eDP_COMPIO eDP_ICOMPO eDP_HPD

eDP_AUX eDP_AUX#

eDP_TX[0] eDP_TX[1] eDP_TX[2] eDP_TX[3]

eDP_TX#[0] eDP_TX#[1] eDP_TX#[2] eDP_TX#[3]

SOCKET989

12V013ISM000

DMI_TXN022 DMI_TXN122 DMI_TXN222 DMI_TXN322

DMI_TXP022 DMI_TXP122 DMI_TXP222 DMI_TXP322

DMI_RXN022 DMI_RXN122 DMI_RXN222 DMI_RXN322

DMI_RXP022 DMI_RXP122 DMI_RXP222 DMI_RXP322

FDI_FSYNC022 FDI_FSYNC122

FDI_INT22

FDI_LSYNC022 FDI_LSYNC122

DP_COMP

R030224.9Ohm 1% R030224.9Ohm 1%

1 1

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6]

DMI

PEG_RX#[7] PEG_RX#[8]

PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]

PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]

PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4]

Intel(R) FDI

PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]

PEG_TX#[10] PEG_TX#[11]

PCI EXPRESS* - GRAPHICS

PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

eDP

PEG_TX[8]

PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]

1201-006D000 - 988B for Huron River

J22 J21 H22

K33 M35 L34 J35 J32 H34 H31 G33 G30 F35 E34 E32 D33 D31 B33 C32

J33 L35 K34 H35 H32 G34 G31 F33 F30 E35 E33 F32 D34 E31 C33 B32

M29 M32 M31 L32 L29 K31 K28 J30 J28 H29 G27 E29 F27 D28 F26 E25

M28 M33 M30 L31 L28 K30 K27 J29 J27 H28 G28 E28 F28 D27 E26 D25

PEG_COMP

PCIENB_RXN15 PCIENB_RXN14 PCIENB_RXN13 PCIENB_RXN12 PCIENB_RXN11 PCIENB_RXN10 PCIENB_RXN9 PCIENB_RXN8 PCIENB_RXN7 PCIENB_RXN6 PCIENB_RXN5 PCIENB_RXN4 PCIENB_RXN3 PCIENB_RXN2 PCIENB_RXN1 PCIENB_RXN0

PCIENB_RXP15 PCIENB_RXP14 PCIENB_RXP13 PCIENB_RXP12 PCIENB_RXP11 PCIENB_RXP10 PCIENB_RXP9 PCIENB_RXP8 PCIENB_RXP7 PCIENB_RXP6 PCIENB_RXP5 PCIENB_RXP4 PCIENB_RXP3 PCIENB_RXP2 PCIENB_RXP1 PCIENB_RXP0

PCIENB_TXN0 PCIENB_TXN1 PCIENB_TXN2 PCIENB_TXN3 PCIENB_TXN4 PCIENB_TXN5 PCIENB_TXN6 PCIENB_TXN7 PCIENB_TXN8 PCIENB_TXN9 PCIENB_TXN10 PCIENB_TXN11 PCIENB_TXN12 PCIENB_TXN13 PCIENB_TXN14 PCIENB_TXN15

PCIENB_TXP0 PCIENB_TXP1 PCIENB_TXP2 PCIENB_TXP3 PCIENB_TXP4 PCIENB_TXP5 PCIENB_TXP6 PCIENB_TXP7 PCIENB_TXP8 PCIENB_TXP9 PCIENB_TXP10 PCIENB_TXP11 PCIENB_TXP12 PCIENB_TXP13 PCIENB_TXP14 PCIENB_TXP15

R0301 24.9Ohm1%R0301 24.9Ohm1%

1 2

PCIENB_RXN[15:0] 70

PCIENB_RXP[15:0] 70

CX0301 0.22UF/10V /DGPUCX0301 0.22UF/10V /DGPU

12

CX0302 0.22UF/10V /DGPUCX0302 0.22UF/10V /DGPU

12

CX0303 0.22UF/10V /DGPUCX0303 0.22UF/10V /DGPU

12

CX0304 0.22UF/10V /DGPUCX0304 0.22UF/10V /DGPU

12

CX0305 0.22UF/10V /DGPUCX0305 0.22UF/10V /DGPU

12

CX0306 0.22UF/10V /DGPUCX0306 0.22UF/10V /DGPU

12

CX0307 0.22UF/10V /DGPUCX0307 0.22UF/10V /DGPU

12

CX0308 0.22UF/10V /DGPUCX0308 0.22UF/10V /DGPU

12

CX0309 0.22UF/10V /DGPUCX0309 0.22UF/10V /DGPU

12

CX0310 0.22UF/10V /DGPUCX0310 0.22UF/10V /DGPU

12

CX0311 0.22UF/10V /DGPUCX0311 0.22UF/10V /DGPU

12

CX0312 0.22UF/10V /DGPUCX0312 0.22UF/10V /DGPU

12

CX0313 0.22UF/10V /DGPUCX0313 0.22UF/10V /DGPU

12

CX0314 0.22UF/10V /DGPUCX0314 0.22UF/10V /DGPU

12

CX0315 0.22UF/10V /DGPUCX0315 0.22UF/10V /DGPU

12

CX0316 0.22UF/10V /DGPUCX0316 0.22UF/10V /DGPU

12

CX0317 0.22UF/10V /DGPUCX0317 0.22UF/10V /DGPU

12

CX0318 0.22UF/10V /DGPUCX0318 0.22UF/10V /DGPU

12

CX0319 0.22UF/10V /DGPUCX0319 0.22UF/10V /DGPU

12

CX0320 0.22UF/10V /DGPUCX0320 0.22UF/10V /DGPU

12

CX0321 0.22UF/10V /DGPUCX0321 0.22UF/10V /DGPU

12

CX0322 0.22UF/10V /DGPUCX0322 0.22UF/10V /DGPU

12

CX0323 0.22UF/10V /DGPUCX0323 0.22UF/10V /DGPU

12

CX0324 0.22UF/10V /DGPUCX0324 0.22UF/10V /DGPU

12

CX0325 0.22UF/10V /DGPUCX0325 0.22UF/10V /DGPU

12

CX0326 0.22UF/10V /DGPUCX0326 0.22UF/10V /DGPU

12

CX0327 0.22UF/10V /DGPUCX0327 0.22UF/10V /DGPU

12

CX0328 0.22UF/10V /DGPUCX0328 0.22UF/10V /DGPU

12

CX0329 0.22UF/10V /DGPUCX0329 0.22UF/10V /DGPU

12

CX0330 0.22UF/10V /DGPUCX0330 0.22UF/10V /DGPU

12

CX0331 0.22UF/10V /DGPUCX0331 0.22UF/10V /DGPU

12

CX0332 0.22UF/10V /DGPUCX0332 0.22UF/10V /DGPU

12

If Support PCIE Gen3, change AC Cap to 0.22uF

+VCCP

PCIEG_RXN15 PCIEG_RXN14 PCIEG_RXN13 PCIEG_RXN12 PCIEG_RXN11 PCIEG_RXN10 PCIEG_RXN9 PCIEG_RXN8 PCIEG_RXN7 PCIEG_RXN6 PCIEG_RXN5 PCIEG_RXN4 PCIEG_RXN3 PCIEG_RXN2 PCIEG_RXN1 PCIEG_RXN0

PCIEG_RXP15 PCIEG_RXP14 PCIEG_RXP13 PCIEG_RXP12 PCIEG_RXP11 PCIEG_RXP10 PCIEG_RXP9 PCIEG_RXP8 PCIEG_RXP7 PCIEG_RXP6 PCIEG_RXP5 PCIEG_RXP4 PCIEG_RXP3 PCIEG_RXP2 PCIEG_RXP1 PCIEG_RXP0

PEG Compensation

Enable PCIE Lane Reversal Need to PD CFG[2]

PCIEG_RXN[15:0] 70

PCIEG_RXP[15:0] 70

A A

Title :

CPU(1)_DMI,PEG,FDI,CLK,MISC

Wing_Cheng

Engineer:

PEGATRON COMPUTER INC

Size Project N ame

C

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

BA52HR/CR

1

Wing_Cheng

3 94Friday, February 03, 2012

Rev

1.0

Select the termination voltage of DMI and FDI Tx/Rx (PCH Strap) H_SNB_IVB# connected to DF_TVS via 1Kohm DF_TVS needs PU via 2.2Kohm to +1.8VS

do not remove because POWER removed thier PU R. Joyoung0613

D D

+VCCP

R1.0 1229

PM_DRAM_PWRGD22

C C

PM_DRAM_PWRGD

R1.1 change to short pin 0726

5

H_SNB_IVB#25

T0401T0401

1

T0402T0402

1

H_PECI25

H_THRMTRIP#25,47

H_PM_SYNC22

H_CPUPWRGD25

PM_SYS_PWRGD is the power good for +1.5V_VCCDDQ

H_PROCHOT#

+1.5V_VCCDDQ

R0449

R0449 200Ohm

200Ohm

1%

12

SP0406R0402 SP0406R0402

R0450

R0450 1KOhm

1KOhm

@

@ 1%

1%

R040462Ohm R040462Ohm

12

R0403

56Ohm

12

R040810KOhm R040810KOhm

+3VSUS +3V

12

1.57 Volt

12

R0452

12

1.1KOhm

@

1%

12

SP0401R0402 SP0401R0402

12

SP0402R0402 SP0402R0402

12

SP0403R0402 SP0403R0402

12

R0409130Ohm R0409130Ohm

C0405

0.22UF/10V

@

5

TP_SKTOCC#_R

TP_CATERR#_R

H_PROCHOT#_D

H_THRMTRIP#_R

H_PM_SYNC_R

H_CPUPWRGD_RH_CPUPWRGD_R

VDDPWRGOOD_R

BUF_CPU_RST#

U0404

VCC

GND

Y

Vcc=1.65~5.5

A

B

@

U0301B

C26

SNB_IVB#

AN34

SKTOCC#

AL33

CATERR#

AN33

PECI

AL32

PROCHOT#

AN32

THERMTRIP#

AM34

PM_SYNC

AP33

UNCOREPWRGOOD

V8

SM_DRAMPWROK

AR33

RESET#

SOCKET989

12V013ISM000

12

R0453

R0453 10KOhm

3

C

E

E 2

2

10KOhm

@

Q0403

Q0403 PMBS3904

PMBS3904

B

0.22UF/10V

1

2

34

1

C0404

4

CLK_EXP_P_R

A28

BCLK

CLK_EXP_N_R

A27

BCLK#

CLK_DP_P_R

MISCTHERMALPWR MANAGEMENT

+1.5V_VCCDDQ

R0454

1%R0454

@

1%

24.3KOhm

1 2

@

12

R0455

R0455 47KOhm

47KOhm

@

@ 1%

1%

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

CLOCKS

SM_DRAMRST#

DDR3

MISC

DDR3

MISC

JTAG & BPM

A16

CLK_DP_N_R

A15

DDR3 DRAM Reset.

R8

SM_RCOMP_0

AK1

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

SM_RCOMP_1

A5

SM_RCOMP_2

A4

AP29

PRDY#

AP27

PREQ#

AR26

TCK

AR27

TMS

AP30

TRST#

AR28

TDI

AP26

TDO

AL35

DBR#

AT28

BPM#[0]

AR29

BPM#[1]

AR30

BPM#[2]

AT30

BPM#[3]

AP32

BPM#[4]

AR31

BPM#[5]

AT31

BPM#[6]

AR32

BPM#[7]

If don't support S3 power reduction

1. Unmount R0450, R0452, U0404, R0453, Q0403, C0404, R0455, R0454, C0405

2. Change R0449 to 200ohm from 1kohm, change R0409 to 130ohm from 0ohm - Design Guide 1.0 page 106

3. Unmount Q0501, C0501, R0506, R0504, R0507

4. Mount R0501, change r0508 to 0ohm from 1kohm

5 Unmount Q0701, R0703, R0705, Q0702

6. Mount R0702 and short JP0701

7. Unmount R2232, R2231, Q2203

XDP_PRDY# XDP_PREQ#

XDP_TCK XDP_TMS XDP_TRST#

XDP_TDI_R XDP_TDO_R

H_DBR#_R

XDP_BPM0_R XDP_BPM1_R XDP_BPM2_R XDP_BPM3_R XDP_BPM4_R XDP_BPM5_R XDP_BPM6_R XDP_BPM7_R

SP0404 R0402SP0404 R0402 SP0405 R0402SP0405 R0402

1 2 1 2

1 2

R0431 1KOhm

@

R0430 1KOhm

1 2

@

R0418 140Ohm1%R0418 140Ohm1%

1 2

R0419 25.5Ohm1%R0419 25.5Ohm1%

1 2

R0420 200Ohm1%R0420 200Ohm1%

1 2

T0403T0403

1

T0404T0404

1

T0405T0405

1

T0406T0406

1

T0407T0407

1

T0408T0408

1

T0409T0409

1

T0410T0410

1

T0411T0411

1

T0412T0412

1

T0413T0413

1

T0414T0414

1

T0415T0415

1

T0416T0416

1

T0417T0417

1

T0418T0418

1

3

CLK_EXP_P 21 CLK_EXP_N 21

RN0401B

3 4

0Ohm

+VCCP

0Ohm

RN0401A

1 2

0Ohm

CPUDRAMRST# 5

System Memory Impedance Compensation Huron River platform Design Guide 436735 P.88 Table 37. Eric Fang to Alan Chien 11/15/2010

Huron River platform Design Guide Update 440484 SM_RCOMP_1 use 26ohm 1%

CLK_DP_P 21 CLK_DP_N 21

2

+1.5V_VCCDDQ

+3VS

+3VSUS

+VCCP

+3V

1

+1.5V_VCCDDQ 7

+3VS 16,17, 20,21,22,23,24,25,26,27,28,30,37,38,39,40,41,47,48,49,53,55,60,63,66,69,91,92

+3VSUS 22,24,27,28,30,33,65,81,85,92

+VCCP 3,6,7,25,26,27, 37,47,63,82

+3V 24, 37,51,63,65,91

R1.0 PU/PD for JTAG signals

+VCCP

XDP_TMS

XDP_TDI_R

XDP_TDO_R

XDP_PREQ#

XDP_TCK

XDP_TRST#

R0401 51OhmR0401 51Ohm

1 2

R0402 51OhmR0402 51Ohm

1 2

R0410 51Ohm@R 0410 51Ohm@

1 2

R0406 51Ohm@R 0406 51Ohm@

1 2

R0407 51OhmR0407 51Ohm

1 2

R0405 51OhmR0405 51Ohm

1 2

Reserve S3 power reduction schematic

Power good for +1.5V_VCCDDQ (delay > 100ns)

B B

+VCCP

12

R0413

R0413 75Ohm

U0402

@

U0402

@

NC

1

A

PLT_RST#24

2 3 4

GND

Vcc=1.65~5.5

+3VS

@

5

VCC

Y

@

1 2

C0402 0.1UF/16V

BUFO_CPU_RST# BUF_CPU_RST#

Check Frank remove or not??

R0416 1.5KOhmR0416 1.5KOhm

1 2

A A

5

R1.0 0119

12

Sandy Bridge:R0417 = 750 ohm (10V220000093)

R0417

R0417 750Ohm

750Ohm

Ivy Bridge:R0417 = 680 ohm (10V240000041)

1%

Frank 0506 EVERST check

75Ohm

@

1 2

R0414 43Ohm@R0414 43Ohm@

4

R0486 0Ohm@R0486 0Ohm@

VR_HOT#80

12

R0415

R0415 0Ohm

0Ohm

@

R1.0 0224 Intel Comments

3

1 2

H_PROCHOT#

47PF/50V

C0401

3

D

Q0401

1 2

@

Q0401 2N7002

2N7002

1

THRO_CPU

G

S

2

THRO_CPU 30

Title :

CPU(1)_DMI,PEG,FDI,CLK,MISC

Wing_Cheng

Engineer:

PEGATRON COMPUTER INC

Size Project N ame

C

Date: Sheet of

2

Date: Sheet of

Engineer:

BA52HR/CR

1

Wing_Cheng

4 94Friday, February 03, 2012

Rev

1.0

5

U0301C

4

+1.5V

+1.5V 7,16,51,63,83

3

U0301D

2

1

M_A_DQ[63:0]16

D D

C C

B B

M_A_DQ0

C5

AP11 AN11 AL12 AM12 AM11 AL11 AP12 AN12 AJ14 AH14 AL15 AK15 AL14 AK14 AJ15 AH15

AE10 AF10

F10

G10

N10

M10

AG6 AG5 AK6 AK5 AH5 AH6 AJ5 AJ6 AJ8 AK8 AJ9 AK9 AH8 AH9 AL9 AL8

AE8 AD9 AF9

D5 D3 D2 D6 C6 C2 C3

F8

G9

F9

F7 G8 G7

K4

K5

K1

J1

J5

J4

J2

K2 M8

N8 N7

M9 N9 M7

V6

SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

SA_BS[0] SA_BS[1] SA_BS[2]

SA_CAS# SA_RAS# SA_WE#

SOCKET989

12V013ISM000

DDR SYSTEM MEMORY A

M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

M_A_BS016 M_A_BS116 M_A_BS216

M_A_CAS#16 M_A_RAS#16 M_A_WE#16

SA_CLK[0]

SA_CLK#[0]

SA_CKE[0]

SA_CLK[1]

SA_CLK#[1]

SA_CKE[1]

SA_CLK[2]

SA_CLK#[2]

SA_CKE[2]

SA_CLK[3]

SA_CLK#[3]

SA_CKE[3]

SA_CS#[0] SA_CS#[1] SA_CS#[2] SA_CS#[3]

SA_ODT[0] SA_ODT[1] SA_ODT[2] SA_ODT[3]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]

SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

AB6 AA6 V9

AA5 AB5 V10

AB4 AA4 W9

AB3 AA3 W10

AK3 AL3 AG1 AH1

AH3 AG3 AG2 AH2

C4 G6 J3 M6 AL6 AM8 AR12 AM15

D4 F6 K3 N6 AL5 AM9 AR11 AM14

AD10 W1 W2 W7 V3 V2 W3 W6 V1 W5 AD8 V4 W4 AF8 V5 V7

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_DIM0_CLK_DDR0 16 M_A_DIM0_CLK_DDR#0 16 M_A_DIM0_CKE0 16

M_A_DIM0_CLK_DDR1 16 M_A_DIM0_CLK_DDR#1 16 M_A_DIM0_CKE1 16

M_A_DIM0_CLK_DDR2 16 M_A_DIM0_CLK_DDR#2 16 M_A_DIM0_CKE2 16

M_A_DIM0_CLK_DDR3 16 M_A_DIM0_CLK_DDR#3 16 M_A_DIM0_CKE3 16

M_A_DIM0_CS#0 16 M_A_DIM0_CS#1 16 M_A_DIM0_CS#2 16 M_A_DIM0_CS#3 16

M_A_DIM0_ODT0 16 M_A_DIM0_ODT1 16 M_A_DIM0_ODT2 16 M_A_DIM0_ODT3 16

M_A_DQS#[7:0] 16

M_A_DQS[7:0] 16

M_A_A[15:0] 16

M_B_DQ[63:0]17

M_B_DQ0

C9

AH11

AH12 AT11 AN14 AR14 AT14 AT12 AN15 AR15 AT15

AA10

D10

K10

AM5 AM6 AR3 AP3 AN3 AN2 AN1 AP2 AP5 AN9 AT5 AT6 AP6 AN8 AR6 AR5 AR9

AJ11

AT8 AT9

AR8

AJ12

AA9 AA7

AB8 AB9

A7

C8 A9 A8 D9 D8 G4 F4 F1 G1 G5 F5 F2 G2

J7 J8

K9

J9

J10

K8 K7 M5 N4 N2 N1 M4 N5 M2 M1

R6

SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]

SB_BS[0] SB_BS[1] SB_BS[2]

SB_CAS# SB_RAS# SB_WE#

SOCKET989

12V013ISM000

DDR SYSTEM MEMORY B

M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_BS017 M_B_BS117 M_B_BS217

M_B_CAS#17 M_B_RAS#17 M_B_WE#17

SB_CLK[0]

SB_CLK#[0]

SB_CKE[0]

SB_CLK[1]

SB_CLK#[1]

SB_CKE[1]

SB_CLK[2]

SB_CLK#[2]

SB_CKE[2]

SB_CLK[3]

SB_CLK#[3]

SB_CKE[3]

SB_CS#[0] SB_CS#[1] SB_CS#[2] SB_CS#[3]

SB_ODT[0] SB_ODT[1] SB_ODT[2] SB_ODT[3]

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

AE2 AD2 R9

AE1 AD1 R10

AB2 AA2 T9

AA1 AB1 T10

AD3 AE3 AD6 AE6

AE4 AD4 AD5 AE5

D7 F3 K6 N3 AN5 AP9 AK12 AP15

C7 G3 J6 M3 AN6 AP8 AK11 AP14

AA8 T7 R7 T6 T2 T4 T3 R2 T5 R3 AB7 R1 T1 AB10 R5 R4

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_DIM0_CLK_DDR0 17 M_B_DIM0_CLK_DDR#0 17 M_B_DIM0_CKE0 17

M_B_DIM0_CLK_DDR1 17 M_B_DIM0_CLK_DDR#1 17 M_B_DIM0_CKE1 17

M_B_DIM0_CLK_DDR2 17 M_B_DIM0_CLK_DDR#2 17 M_B_DIM0_CKE2 17

M_B_DIM0_CLK_DDR3 17 M_B_DIM0_CLK_DDR#3 17 M_B_DIM0_CKE3 17

M_B_DIM0_CS#0 17 M_B_DIM0_CS#1 17 M_B_DIM0_CS#2 17 M_B_DIM0_CS#3 17

M_B_DIM0_ODT0 17 M_B_DIM0_ODT1 17 M_B_DIM0_ODT2 17 M_B_DIM0_ODT3 17

M_B_DQS#[7:0] 17

M_B_DQS[7:0] 17

M_B_A[15:0] 17

R1.0 S3 circuit:- DRAM_RST# to memory should be high during S3

+1.5V

R0507

R0507 1KOhm

1KOhm

@

R1.0 0209 Change R0508 to 1K ohm R0508 close to DIMM

DDR3_DRAMRST#16,17 CPUDRAMRST# 4

DRAMRST_CNTRL_PCH9,21

A A

Reserve S3 power reduction schematic

If don't support S3 power reduction

1. Unmount R0450, R0452, U0404, R0453, Q0403, C0404, R0455, R0454, C0405

2. Change R0449 to 200ohm from 1kohm, change R0409 to 130ohm from 0ohm - Design Guide 1.0 page 106

3. Unmount Q0501, C0501, R0506, R0504, R0507

4. Mount R0501, change r0508 to 0ohm from 1kohm

5 Unmount Q0701, R0703, R0705, Q0702

6. Mount R0702 and short JP0701

7. Unmount R2232, R2231, Q2203

R0508 1KOhmR0508 1KOhm

5

1 2

0614-change Q0501 from UM6K1N to 2N7002

R0501 0OhmR0501 0Ohm

CPUDRAMRST#_R

0.047UF/16V

C0501

@C0501

@

2N7002

3

Q0501

D

12

S

2

G

1

R0506 4.99KOhm

@R0506 4.99KOhm

@

12

4

1%

1 2

Title :

CPU(2)_DDR3

Wing_Cheng

Engineer:

PEGATRON COMPUTER INC

Size Project N ame

C

Date: Sheet of

3

2

Date: Sheet of

Engineer:

BA52HR/CR

1

Wing_Cheng

5 94Friday, February 03, 2012

Rev

1.0

5

Voltage for the memory controller and

Vcc for processor core Voltage range: 0.3 - 1.52V

U0301F

AG35 AG34 AG33 AG32 AG31 AG30 AG29 AG28 AG27 AG26 AF35 AF34 AF33 AF32 AF31 AF30 AF29 AF28 AF27 AF26 AD35 AD34 AD33 AD32 AD31 AD30 AD29 AD28 AD27 AD26 AC35 AC34 AC33 AC32 AC31 AC30 AC29 AC28 AC27 AC26 AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26

U0301F

Y35 Y34 Y33 Y32 Y31 Y30 Y29 Y28 Y27 Y26 V35 V34 V33 V32 V31 V30 V29 V28 V27 V26 U35 U34 U33 U32 U31 U30 U29 U28 U27 U26 R35 R34 R33 R32 R31 R30 R29 R28 R27 R26 P35 P34 P33 P32 P31 P30 P29 P28 P27 P26

SV-QC ICCMAX 94A SV-DC ICCMAX 53A

D D

+VCORE

C C

B B

POWER

Check net name??

VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 VCC72 VCC73 VCC74 VCC75 VCC76 VCC77 VCC78 VCC79 VCC80 VCC81 VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90 VCC91 VCC92 VCC93 VCC94 VCC95 VCC96 VCC97 VCC98 VCC99 VCC100

CORE SUPPLY

PEG AND DDR

SENSE LINES SVID

shared cache defined at the motherboard VCCIO_SENSE and VSS_SENSE_VCCIO

ICCMAX_VCCIO 8.5A

AH13

VCCIO1

AH10

VCCIO2

AG10

VCCIO3

AC10

VCCIO4

Y10

VCCIO5

U10

VCCIO6

P10

VCCIO7

L10

VCCIO8

J14

VCCIO9

J13

VCCIO10

J12

VCCIO11

J11

VCCIO12

H14

VCCIO13

H12

VCCIO14

H11

VCCIO15

G14

VCCIO16

G13

VCCIO17

G12

VCCIO18

F14

VCCIO19

F13

VCCIO20

F12

VCCIO21

F11

VCCIO22

E14

VCCIO23

E12

VCCIO24

E11

VCCIO25

D14

VCCIO26

D13

VCCIO27

D12

VCCIO28

D11

VCCIO29

C14

VCCIO30

C13

VCCIO31

C12

VCCIO32

C11

VCCIO33

B14

VCCIO34

B12

VCCIO35

A14

VCCIO36

A13

VCCIO37

A12

VCCIO38

A11

VCCIO39

J23

VCCIO40

R1.0 0126 Intel Comments

H_CPU_SVIDALRT#

AJ29

VIDALERT#

VIDSCLK

VIDSOUT

VCC_SENSE

VSS_SENSE

VCCIO_SENSE VSSIO_SENSE

H_CPU_SVIDCLK

AJ30

H_CPU_SVIDDAT

AJ28

VCC_SENSE_R

AJ35

VSS_SENSE_R

AJ34

B10 A10

R1.0 0126 Intel Comments

+VCCP

R1.0 0126 Intel Comments

4

R0602 43OhmR0602 43Ohm

1 2

Frank

SP0604 R0402SP0604 R0402 SP0605 R0402SP0605 R0402

20110602 check pull up/pull down reserve power schematic or not.

1 2 1 2

Frank 20110516 Remove R0601 and R0604, because Power is already reserved

@

12

3

12

C0634

C0634 22UF/6.3V

22UF/6.3V

@

12

C0645

C0645 22UF/6.3V

22UF/6.3V

12

C0656

C0656 22UF/6.3V

22UF/6.3V

C0602

C0602 10UF/6.3V

10UF/6.3V

C0613

C0613 22UF/6.3V

22UF/6.3V

C0614

C0614 22UF/6.3V

22UF/6.3V

R0605

54.9Ohm

1%

1 2

0614-Remove C0641 and nostuff C0651,C0647,C0658

12

C0635

C0635 22UF/6.3V

22UF/6.3V

12

C0646

C0646 22UF/6.3V

22UF/6.3V

12

C0657

C0657 22UF/6.3V

22UF/6.3V

12

C0604

C0604 10UF/6.3V

10UF/6.3V

12

C0615

C0615 22UF/6.3V

22UF/6.3V

12

C0626

C0626 22UF/6.3V

22UF/6.3V

VR_SVID_CLK 80

12

C0636

C0637

22UF/6.3V

12

C0648

C0647

22UF/6.3V

0622-Remove CE0603(powre schematic reserve)

12

C0659

C0658

22UF/6.3V

12

C0605

C0622

10UF/6.3V

@

12

C0617

C0616

22UF/6.3V

12

C0628

C0608

22UF/6.3V

@

0622-Remove CE0601(powre schematic reserve)

Close to CPU Close to VRClose to VRClose to CPU

@

12

1 2

C0638

C0638 22UF/6.3V

22UF/6.3V

C0649

C0649 22UF/6.3V

22UF/6.3V

12

C0607

C0607 10UF/6.3V

10UF/6.3V

12

C0618

C0618 22UF/6.3V

22UF/6.3V

12

C0629

C0629 22UF/6.3V

22UF/6.3V

R0607

R0607 130Ohm

130Ohm

1%

12

C0639

C0639 22UF/6.3V

22UF/6.3V

12

C0650

C0650 22UF/6.3V

22UF/6.3V

@

12

C0627

10UF/6.3V

12

C0619

C0619 22UF/6.3V

22UF/6.3V

12

C0630

C0630 22UF/6.3V

22UF/6.3V

1 2

SP0602 R0402SP0602 R0402

C0640

C0640 22UF/6.3V

22UF/6.3V

C0651

C0651 22UF/6.3V

22UF/6.3V

12

+VCCP

+VCORE

12

C0601

C0601 10UF/6.3V

10UF/6.3V

12

C0612

C0612 22UF/6.3V

22UF/6.3V

+VCCP +VCCP +VCCP +VCCP

12

R0603

R0603 75Ohm

75Ohm

1%

VR_SVID_ALERT# 80

1 2

SP0601 R0402SP0601 R0402



VCCSENSE VSSSENSE

VCCP_SENSE 82 VSSP_SENSE 82

VCCSENSE 80 VSSSENSE 80



Frank 20110516 Change VCCP_SENSE to VCCIO_SENSE and change VSSP_SENSE to VSSIO_SENSE for meet power schematic.



C0609

C0609 10UF/6.3V

10UF/6.3V

C0620

C0620 22UF/6.3V

22UF/6.3V

2

@

1 2

12

C0652

C0652 22UF/6.3V

22UF/6.3V

12

@

12

@

R0608

R0608 130Ohm

130Ohm

1%

C0610

C0610 10UF/6.3V

10UF/6.3V

C0621

C0621 22UF/6.3V

22UF/6.3V

+VCCP

+VCORE

12

C0611

C0611 10UF/6.3V

10UF/6.3V

12

C0606

C0606 22UF/6.3V

22UF/6.3V

VR_SVID_DATA 80

1

+VCCP 3,4, 7,25,26,27,37,47,63,82

+VCORE 63,80

Check net name??

HR_Decoupling guide from Intel (POWER + EE) +VCCP 22uF * 19pcs (7 nostuff)

330uF * 3pcs

EIH31/30 (EE)

+VCCP 10uF * 19pcs (2pcs no stuff) 22uF* 10 pcs (total no stuff) 330 uF *1pcs Power support

CR_Decoupling guide from Intel (POWER + EE)

+VCCP 22uF * 19pcs (7 nostuff) 330uF * 3pcs

Decoupling guide for Everest (EE)

+VCCP 22uF * 19pcs (7 no stuff) 330uF * 1pcs (1 no stuff)=>JE31HR/CR power support

HR_Decoupling guide from Intel (POWER + EE)

+VCC_CORE 22uF * 16pcs 10uF * 10pcs 470uF * 4pcs

EIH31/30 +VCC_CORE 22uF * 14pcs(6pcs unmount)

10uF * 16pcs (4pcs unmount) 470uF * 2pcs (Power support)

CR_Decoupling guide from Intel (POWER + EE)

+VCC_CORE 22uF * 16pcs 10uF * 10pcs 470uF * 4pcs

Decoupling guide for Everest (EE)

+VCC_CORE 22uF * 16pcs (8 nostuff) 10uF * 10pcs (3 nostuff) 470uF * 1pcs=>JE31HR/CR power support

SOCKET989

A A

SOCKET989

12V013ISM000

Title :

CPU(4)_PWR

Wing_Cheng

Engineer:

PEGATRON COMPUTER INC

Size Project N ame

C

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

BA52HR/CR

1

Wing_Cheng

6 94Friday, February 03, 2012

Rev

1.0

5

SV-QC ICCMAX_VAXG 33A SV-DC ICCMAX_VAXG 33A

+VGFX_CORE

D D

@

0622-Remove CE0705(powre schematic reserve)

C C

@

HR_Decoupling guide from Intel (POWER + EE)

+VGFX_CORE 22uF * 12pcs 470uF * 2pcs

EIH31/30

+VCCP 22uF* 16 pcs (6 unmount) 330uF * 1pcs (power support) 470uF *1pcs (EIH31 Del 470uF For Layout)

CR_Decoupling guide from Intel (POWER + EE)

+VGFX_CORE 22uF * 12pcs 470uF * 2pcs

Decoupling guide for Everest (EE)

+VGFX_CORE 22uF * 12pcs (2 nostuff) 470uF * 1pcs (JE31HR/CR power support)

Graphics core voltage Voltage range: 0 - 1.52V

12

C0704

C0703

22UF/6.3V

12

C0712

C0711

22UF/6.3V

PLL supply voltage (DC + AC specification)

@

12

C0705

C0705 22UF/6.3V

22UF/6.3V

C0713

C0713 22UF/6.3V

22UF/6.3V

@

12

C0706

C0706 22UF/6.3V

22UF/6.3V

C0714

C0714 22UF/6.3V

22UF/6.3V

12

C0707

C0707 22UF/6.3V

22UF/6.3V

C0715

C0715 22UF/6.3V

22UF/6.3V

ICCMAX_VCCPLL 1.2A

+1.8VS

12

C0717

C0717 10UF/6.3V

10UF/6.3V

12

+

CE0701

CE0701 220UF/6.3V

220UF/6.3V

1BV090000003

HR_Decoupling guide from Intel (POWER + EE)

+1.8VS 1uF * 2pcs 10uF * 1pcs 330uF * 1pcs

B B

EIH31/30

+1.8VS 1uF * 2pcs 10uF * 1pcs

2.2uF*1pcs

4.7uF*1pcs 22uF * 1pcs (un-mount)

CR_Decoupling guide from Intel (POWER + EE)

+1.8VS 1uF * 2pcs 10uF * 1pcs 330uF * 1pcs

Decoupling guide from Everest (EE)

+1.8VS 1uF * 2pcs 10uF * 1pcs 100uF * 1pcs

C0718

C0718 1UF/6.3V

1UF/6.3V

4

POWER

U0301G

AT24

VAXG1

AT23

VAXG2

C0719

C0719 1UF/6.3V

1UF/6.3V

AT21 AT20 AT18

AT17 AR24 AR23 AR21 AR20 AR18 AR17

AP24

AP23

AP21

AP20

AP18

AP17 AN24 AN23 AN21 AN20 AN18 AN17 AM24 AM23 AM21 AM20 AM18 AM17

AL24

AL23

AL21

AL20

AL18

AL17

AK24

AK23

AK21

AK20

AK18

AK17

AJ24

AJ23

AJ21

AJ20

AJ18

AJ17 AH24 AH23 AH21 AH20 AH18 AH17

B6 A6 A2

SOCKET989

12V013ISM000

VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36 VAXG37 VAXG38 VAXG39 VAXG40 VAXG41 VAXG42 VAXG43 VAXG44 VAXG45 VAXG46 VAXG47 VAXG48 VAXG49 VAXG50 VAXG51 VAXG52 VAXG53 VAXG54

VCCPLL1 VCCPLL2 VCCPLL3

12

C0708

C0708 22UF/6.3V

22UF/6.3V

@

12

C0716

C0716 22UF/6.3V

22UF/6.3V

12

POWER

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

VREFMISC

GRAPHICS

DDR3 -1.5V RAILS

SA RAIL

1.8V RAIL

VAXG_SENSE

VCCSA_SENSE

VCCSA_VID1

3

R1.0 Add net name. Joyoung 0621

VCCGT_SENSE_R

AK35

VSSGT_SENSE_R

AK34

+V_SM_REF 10mil

+V_SM_VREF_CNT

AL1

SM_VREF

AF7

VDDQ1

AF4

VDDQ2

AF1

VDDQ3

AC7

VDDQ4

AC4

VDDQ5

AC1

VDDQ6

Y7

VDDQ7

Y4

VDDQ8

Y1

VDDQ9

U7

VDDQ10

U4

VDDQ11

U1

VDDQ12

P7

VDDQ13

P4

VDDQ14

P1

VDDQ15

M27

VCCSA1

M26

VCCSA2

L26

VCCSA3

J26

VCCSA4

J25

VCCSA5

J24

VCCSA6

H26

VCCSA7

H25

VCCSA8

H23

C22

FC_C22

C24

R1.0 0209 Intel Comments

VCCSA_SEL0

VCCSA_SEL1

0614-Add SP0701,SP0702

SP0701 R0402SP0701 R0402 SP0702 R0402SP0702 R0402

12 12

Close to CPU

R0702 0OhmR0702 0Ohm

1 2

S

2

G

Q0701

1

12

R0703

R0703 100KOhm

100KOhm

@

12

C0725

C0725 10UF/6.3V

10UF/6.3V

C0724

C0724 10UF/6.3V

10UF/6.3V

ICCMAX_VCCSA 6A

Voltage for the System Agent and VCCSA_SENSE

12

C0729

C0729 10UF/6.3V

10UF/6.3V

@

1 2

R0704 0Ohm

+VCCP

R0708

R0708 1KOhm

1KOhm

@

1 2

R0706

R0706 1KOhm

1KOhm

1 2

1

SI2308DS-T1-E3

12

C0723

C0723 10UF/6.3V

10UF/6.3V

N/A

0614-Remove C0728

12

C0727

C0727 10UF/6.3V

10UF/6.3V

VCCSA_SENSE 85

Close to CPU

VCCSA_SEL0 85 VCCSA_SEL1 85

R1.0 0101

R0709

R0709 1KOhm

1KOhm

@

1 2

R0707

R0707 1KOhm

1KOhm

1 2

2

VCCGT_SENSE 80 VSSGT_SENSE 80

DDR3 Reference Voltage

D

3

@

12

C0722

C0722 10UF/6.3V

10UF/6.3V

12

C0721

C0721 10UF/6.3V

10UF/6.3V

N/A

+V_SM_VREF

12

C0720

C0720 10UF/6.3V

10UF/6.3V

N/A

Reserve S3 power reduction schematic

+1.5V_VCCDDQ

12

+

CE0702

220UF/6.3V

0614-Change JP(3MM_OPEN_5MIL)

+VCCSA

12

+

C0726

C0726 10UF/6.3V

10UF/6.3V

N/A

HR_Decoupling guide from Intel (POWER + EE)

+VCCSA 10uF * 3pcs 330uF * 1pcs

EIH31/30

+VCCSA 10uF * 4pcs (2 nostuff) 100uF * 1pcs

CR_Decoupling guide from Intel (POWER + EE)

+VCCSA 10uF * 3pcs 330uF * 1pcs

Decoupling guide for Everest (EE)

+VCCSA 10uF * 3pcs (1 nostuff) 100uF * 1pcs

CE0703

100UF/6.3V

+VCCSA_SEL0 +VCCSA_SEL1

L

H

L

H

L

>100 ns

VCCSA

0.9V

0.8V

0.725V

0.675VH H

1

+VCCP

+VCCSA

+1.8VS

+VGFX_CORE

+1.5V_VCCDDQ

+V_SM_VREF

PS_S3CNTRL_1.5V_R

4

G S

1 2 3

Q0702

@

SI4336DY_T1_E3

112

3MM_OPEN_5MIL

3MM_OPEN_5MIL JP0701

JP0701

> 0 SUSB_EC#

HR_Decoupling guide from Intel (POWER + EE)

+VDDQ 10uF * 6pcs 330uF * 1pcs

CR_Decoupling guide from Intel (POWER + EE)

+VDDQ 10uF * 6pcs 330uF * 1pcs

Decoupling guide for Everest (EE) +VDDQ 10uF * 6pcs (3 nostuff)

220uF * 1pcs

C0730 470PF/50V

5

D

2

EIH31

+VDDQ 10uF * 6pcs (3 nostuff) 220uF * 1pcs

+VCCP 3,4, 6,25,26,27,37,47,63,82

+1.5V

+1.5V 5,16,51,63,83

+VCCSA 85

+1.8VS 25,26,63,84

+VGFX_CORE 63,80

+1.5V_VCCDDQ 4

+V_SM_VREF 18

@

12

R07050Ohm

1 2

@

+1.5V

ICCMAX_VDDQ 5A

Reduce to 5A (EDS R2.1)

Processor I/O supply voltage for DDR3 (DC + AC specification)

Joyoung 0613

+1.5V_VCCDDQ

+1.5V_VCCDDQ Power Good (U0404 pin 4)

+0.75VS

PS_S3CNTRL_1.5V 22

R1.3

A A

Title :

CPU(4)_PWR

Wing_Cheng

Engineer:

PEGATRON COMPUTER INC

Size Project N ame

C

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

BA52HR/CR

1

Wing_Cheng

7 94Friday, February 03, 2012

Rev

1.0

5

U0301H

AT35

VSS1

AT32

VSS2

AT29

VSS3

AT27

VSS4

AT25

VSS5

AT22

VSS6

AT19

VSS7

AT16

VSS8

AT13

VSS9

AT10

VSS10

AT7

VSS11

AT4

VSS12

D D

C C

AR25 AR22 AR19 AR16 AR13 AR10

AP34 AP31 AP28 AP25 AP22 AP19 AP16 AP13 AP10

AN30 AN27 AN25 AN22 AN19 AN16 AN13 AN10

AM29 AM25 AM22 AM19 AM16 AM13 AM10

AL34 AL31 AL28 AL25 AL22 AL19 AL16 AL13 AL10

AK33 AK30 AK27 AK25 AK22 AK19 AK16 AK13 AK10

AJ25

AT3

VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19

AR7

VSS20

AR4

VSS21

AR2

VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31

AP7

VSS32

AP4

VSS33

AP1

VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42

AN7

VSS43

AN4

VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51

AM7

VSS52

AM4

VSS53

AM3

VSS54

AM2

VSS55

AM1

VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65

AL7

VSS66

AL4

VSS67

AL2

VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77

AK7

VSS78

AK4

VSS79 VSS80

VSS

VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160

AJ22 AJ19 AJ16 AJ13 AJ10 AJ7 AJ4 AJ3 AJ2 AJ1 AH35 AH34 AH32 AH30 AH29 AH28 AH26 AH25 AH22 AH19 AH16 AH7 AH4 AG9 AG8 AG4 AF6 AF5 AF3 AF2 AE35 AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE9 AD7 AC9 AC8 AC6 AC5 AC3 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 Y9 Y8 Y6 Y5 Y3 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 U9 U8 U6 U5 U3 U2

4

R1.0

TP_VSSG_DIE_SENSE

3

U0301I

T35

VSS161

T34

VSS162

T33

VSS163

T32

VSS164

T31

VSS165

T30

VSS166

T29

VSS167

T28

VSS168

T27

VSS169

T26

VSS170

P9

VSS171

P8

VSS172

P6

VSS173

P5

VSS174

1

T0801T0801

P3

VSS175

P2

VSS176

N35

VSS177

N34

VSS178

N33

VSS179

N32

VSS180

N31

VSS181

N30

VSS182

N29

VSS183

N28

VSS184

N27

VSS185

N26

VSS186

M34

VSS187

L33

VSS188

L30

VSS189

L27

VSS190

L9

VSS191

L8

VSS192

L6

VSS193

L5

VSS194

L4

VSS195

L3

VSS196

L2

VSS197

L1

VSS198

K35

VSS199

K32

VSS200

K29

VSS201

K26

VSS202

J34

VSS203

J31

VSS204

H33

VSS205

H30

VSS206

H27

VSS207

H24

VSS208

H21

VSS209

H18

VSS210

H15

VSS211

H13

VSS212

H10

VSS213

H9

VSS214

H8

VSS215

H7

VSS216

H6

VSS217

H5

VSS218

H4

VSS219

H3

VSS220

H2

VSS221

H1

VSS222

G35

VSS223

G32

VSS224

G29

VSS225

G26

VSS226

G23

VSS227

G20

VSS228

G17

VSS229

G11

VSS230

F34

VSS231

F31

VSS232

F29

VSS233

VSS

VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285

F22 F19 E30 E27 E24 E21 E18 E15 E13 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 D35 D32 D29 D26 D20 D17 C34 C31 C28 C27 C25 C23 C10 C1 B22 B19 B17 B15 B13 B11 B9 B8 B7 B5 B3 B2 A35 A32 A29 A26 A23 A20 A3

2

1

SOCKET989

12V013ISM000

B B

A A

12V013ISM000

5

4

SOCKET989

12V013ISM000

Title :

CPU(3)_CFG,RSVD,GND

Wing_Cheng

Engineer:

PEGATRON COMPUTER INC

Size Project N ame

C

Date: Sheet of

3

2

Date: Sheet of

Engineer:

BA52HR/CR

1

Wing_Cheng

8 94Friday, February 03, 2012

Rev

1.0

5

CFG strapping information:

CFG[2]: PCIE Static Numbering Lane Reversal- CFG[2] is for the 16x

- 1: (Default) Normal Operation, Lane # definition matches sockect pin map definition

- 0: Lane Numbers Reversed 15 -> 0, 14 -> 1, ...

CFG[4]: Embedded DisplayPort Detection

D D

- 1: (Default) Disabled ; No Physical Display Port attached to Embedded DisplayPort

- 0: Enabled ; An external Display Port device is connected to the Embedded Display Port

CFG[6:5]: PCI Express Port Bifurcation Straps

- 11 : (Default) x 1 6

- 10 : x 8 , x 8

- 01 : Reserved

- 00 : x 8 , x 4 , x 4

CFG[7]: PEG DEFER TRAINING

- 1: (Default) PEG Train immediately following xxRESETB de assertion

- 0: PEG Wait for BIOS training

CFG2

CFG4

CFG5

CFG6

CFG7

C C

1%

1 2

R0902 1KOhm

/DGPUR0902 1KOhm

/DGPU

1%

1 2

R0903 1KOhm

1%

1 2

R0904 1KOhm@

1%

1 2

R0905 1KOhm@

1%

1 2

R0906 1KOhm@

This model is UMA, unmount R0902(use Default)

Power schematic reserve 1.0V or not??

+VCCIO_SEL

1 1.05V

IVB VCCIO for Mobile and Desktop is changed from

1.0v to 1.05v, same as PPT VCCIO. (461017 WW23'11)

1.00V0

4

R1.0

dd CFG0

A

T0918TPC26T T0918TPC26T T0917TPC26T T0917TPC26T T0916TPC26T T0916TPC26T T0915TPC26T T0915TPC26T T0914TPC26T T0914TPC26T T0913TPC26T T0913TPC26T T0912TPC26T T0912TPC26T T0911TPC26T T0911TPC26T T0910TPC26T T0910TPC26T T0909TPC26T T0909TPC26T T0908TPC26T T0908TPC26T T0907TPC26T T0907TPC26T T0906TPC26T T0906TPC26T T0905TPC26T T0905TPC26T T0904TPC26T T0904TPC26T T0903TPC26T T0903TPC26T T0902TPC26T T0902TPC26T T0901TPC26T T0901TPC26T

T0953TPC26T T0953TPC26T T0952TPC26T T0952TPC26T T0951TPC26T T0951TPC26T T0950TPC26T T0950TPC26T

DDR_WR_VREF01 DDR_WR_VREF02

Frank 0516 Remove CFGO to XDP

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

1 1 1 1

R1.0 0126

DIMM0_VREF_DQ_R Pull Down 1k ohm DIMM1_VREF_DQ_R Pull Down 1k ohm Design Guide 1.0 P.89 Figure 44 (436735)

R1.0 0111

Delete VCCIO_SEL. Joyoung0614



Frank 20110516 Change VCCP_SEL to VCCIO_SEL for meeting Power schematic defined

T0955TPC26T T0955TPC26T

VAXG_VAL_SENSE VSSAXG_VAL_SENSE VCC_VAL_SENSE VSS_VAL_SENSE

R09091KOhm

12

1%

@

VCCIO_SEL_R

1

CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17

@

3

U0301E

L7

RSVD28

AG7

AK28

CFG[0]

AK29

CFG[1]

AL26

CFG[2]

AL27

CFG[3]

AK26

CFG[4]

AL29

CFG[5]

AL30

CFG[6]

AM31

CFG[7]

AM32

CFG[8]

AM30

CFG[9]

AM28

CFG[10]

AM26

CFG[11]

AN28

CFG[12]

AN31

CFG[13]

AN26

CFG[14]

AM27

CFG[15]

AK31

CFG[16]

AN29

CFG[17]

AJ31

RSVD1

AH31

RSVD2

AJ33

RSVD3

AH33

RSVD4

AJ26

RSVD5

B4

RSVD6

D1

RSVD7

F25

RSVD8

R09101KOhm

F24

12

RSVD9

F23

RSVD10

D24

RSVD11

G25

RSVD12

G24

RSVD13

E23

RSVD14

D23

RSVD15

C30

RSVD16

A31

RSVD17

B30

RSVD18

B29

RSVD19

D30

RSVD20

B31

RSVD21

A30

RSVD22

C29

RSVD23

J20

RSVD24

B18

RSVD25

A19

RSVD26

J15

RSVD27

RSVD29

AE7

RSVD30

AK2

RSVD31

W8

RSVD32

AT26

RSVD33

AM33

RSVD34

AJ27

RSVD35

T8

RSVD37

J16

RSVD38

H16

RSVD39

G16

RSVD40

AR35

RSVD41

AT34

RSVD42

AT33

RSVD43

AP35

RSVD44

AR34

RSVD45

B34

RSVD46

A33

RSVD47

A34

RSVD48

B35

RSVD49

C35

RSVD50

RESERVED

RSVD51 RSVD52

RSVD53

RSVD54 RSVD55

RSVD56 RSVD57 RSVD58

KEY

AJ32 AK32

AH27

AN35 AM35

AT2 AT1 AR1

B1

TP_VCCG_DIE_SENSE

1

2

T0954 TPC26TT0954 TPC26T

1

PROCESSOR DRIVEN Vref PATH WAS STUFFED BY DEFAULT:

SOCKET989

R0911 0Ohm@R 0911 0Ohm@

1 2

O0901A

@

UM6K1N

DDR_WR_VREF01

DRAMRST_CNTRL_PCH5,21

B B

DDR_WR_VREF02

UM6K1N

R0912 0Ohm@R 0912 0Ohm@

1 2

O0901B

@

UM6K1N

61

2

M3 Path:0 Ohm at Page18

34

5

DIMM0_VREF_DQ 18

DIMM1_VREF_DQ 18

SOCKET989

12V013ISM000

Reserve S3 power reduction schematic

M3: Processor Generated SO-DIMM VREFDQ – New Requirement

Sandy Bridge CPU Only: M1 Implementation Sandy Bridge/Ivy Bridge CPU: M1 and M3 Implementation

A A

Title :

CPU(3)_CFG,RSVD,GND

Wing_Cheng

Engineer:

PEGATRON COMPUTER INC

Size Project N ame

C

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

BA52HR/CR

1

Wing_Cheng

9 94Friday, February 03, 2012

Rev

1.0

5

4

3

2

1

+VTT_PCH_ORG

+3VSUS

+VCCP

D D

+VTT_PCH_ORG 22,26,27

+3VSUS 4,22,24,27,28,30,33,65,81,85,92

+VCCP 3,4, 6,7,25,26,27,37,47,63,82

+3VS

+3VS 4,16,17,20,21,22,23,24,25,26,27,28,30,37,38,39,40,41,47,48,49,53,55,60, 63,66,69,91,92

CPU XDP connector

C C

PCH XDP connector

B B

A A

Title :

NB(3)_****

Wing_Cheng

Engineer:

PEGATRON COMPUTER INC

Size Project N ame

C

Date: Sheet

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

BA52HR/CR

1

Wing_Cheng

of

10 99Friday, February 03, 2012

Rev

1.0

5

M_A_DIM0 _CLK_D DR0

12

R1620

C1650

150Ohm

D D

C C

C1650

10PF/50 V

@

M_A_DIM0 _CLK_D DR#0

@

M_A_DIM0 _CLK_D DR1

12

R1621

C1651

10PF/50 V

@

M_A_DIM0 _CLK_D DR#1

@

M_A_DQS [7:0]5

M_A_DQS #[7:0]5

M_A_DQS 0 M_A_DQS 1

M_A_DQS 3 M_A_DQS 4 M_A_DQS 5 M_A_DQS 6 M_A_DQS 7 M_A_DQS #0 M_A_DQS #1 M_A_DQS #2 M_A_DQS #3 M_A_DQS #4 M_A_DQS #5 M_A_DQS #6 M_A_DQS #7

M_A_DIM0 _CLK_D DR15

M_A_DIM0 _CLK_D DR#15

M_A_DIM0 _CLK_D DR05

M_A_DIM0 _CLK_D DR#05

M_A_DIM0 _CS#15 M_A_DIM0 _CS#05

M_A_DIM0 _ODT15 M_A_DIM0 _ODT05

M_A_DIM0 _CKE15 M_A_DIM0 _CKE05

SMBus Slave Address: A0H

DM should connect to GND directly Design Guide 0.9 p86 (436735)

SMB_CLK _S17,28,48,53 ,55 SMB_DAT _S17,28,48,53,5 5

M_A_A[15 :0]5

M_A_WE #5 M_A_RAS #5 M_A_CAS #5

M_A_BS25 M_A_BS15 M_A_BS05

1 2

10KOhm

3 4

10KOhm

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

RN1601A

RN1601A RN1601B

RN1601B

M_A_DQS 7 M_A_DQS #7 M_A_DQS 6M_A_DQS 2 M_A_DQS #6 M_A_DQS 5 M_A_DQS #5 M_A_DQS 4 M_A_DQS #4 M_A_DQS 2 M_A_DQS #2 M_A_DQS 3 M_A_DQS #3 M_A_DQS 0 M_A_DQS #0 M_A_DQS 1 M_A_DQS #1

H:5.2mm

CON1601 A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

102

CK1

104

CK1#

101

CK0

103

CK0#

121

S1#

114

S0#

120

ODT1

116

ODT0

113

WE#

110

RAS#

115

CAS#

79

BA2

108

BA1

109

BA0

74

CKE1

73

CKE0

201

SA1

197

SA0

188

DQS7

186

DQS#7

171

DQS6

169

DQS#6

154

DQS5

152

DQS#5

137

DQS4

135

DQS#4

64

DQS3

62

DQS#3

47

DQS2

45

DQS#2

29

DQS1

27

DQS#1

12

DQS0

10

DQS#0

187

DM7

170

DM6

153

DM5

136

DM4

63

DM3

46

DM2

28

DM1

11

DM0

202

SCL

200

SDA

DDR3_D IMM_204P

12V02G WSM000

M_A_DQ1 1

5

DQ0

M_A_DQ1 2

7

DQ1

M_A_DQ8

15

DQ2

M_A_DQ9

17

DQ3

M_A_DQ1 4

4

DQ4

M_A_DQ1 0

6

DQ5

M_A_DQ1 5

16

1

DQ6

M_A_DQ1 3

18

DQ7

M_A_DQ4

21

DQ8

M_A_DQ1

23

DQ9

M_A_DQ2

33

DQ10

M_A_DQ7

35

DQ11

M_A_DQ0

22

DQ12

M_A_DQ5

24

DQ13

M_A_DQ3

34

0

DQ14

M_A_DQ6

36

DQ15

M_A_DQ2 9

39

DQ16

M_A_DQ3 0

41

DQ17

M_A_DQ2 7

51

DQ18

M_A_DQ3 1

53

DQ19

M_A_DQ2 8

40

DQ20

M_A_DQ2 5

42

3

DQ21

M_A_DQ2 4

50

DQ22

M_A_DQ2 6

52

DQ23

M_A_DQ1 9

57

DQ24

M_A_DQ1 8

59

DQ25

M_A_DQ2 2

67

DQ26

M_A_DQ2 3

69

DQ27

M_A_DQ2 0

56

DQ28

M_A_DQ2 1

58

2

DQ29

M_A_DQ1 7

68

DQ30

M_A_DQ1 6

70

DQ31

M_A_DQ3 3

129

DQ32

M_A_DQ3 6

131

DQ33

M_A_DQ3 7

141

DQ34

M_A_DQ3 4

143

DQ35

M_A_DQ3 8

130

DQ36

M_A_DQ3 2

132

DQ37

M_A_DQ3 5

140

4

DQ38

M_A_DQ3 9

142

DQ39

M_A_DQ4 4

147

DQ40

M_A_DQ4 0

149

DQ41

M_A_DQ4 6

157

DQ42

M_A_DQ4 5

159

DQ43

M_A_DQ4 3

146

DQ44

M_A_DQ4 7

148

DQ45

M_A_DQ4 2

158

5

DQ46

M_A_DQ4 1

160

DQ47

M_A_DQ4 9

163

DQ48

M_A_DQ4 8

165

DQ49

M_A_DQ5 1

175

DQ50

M_A_DQ5 4

177

DQ51

M_A_DQ5 3

164

DQ52

M_A_DQ5 0

166

DQ53

M_A_DQ5 2

174

6

DQ54

M_A_DQ5 5

176

DQ55

M_A_DQ5 8

181

DQ56

M_A_DQ6 1

183

DQ57

M_A_DQ6 3

191

DQ58

M_A_DQ5 7

193

DQ59

M_A_DQ6 0

180

DQ60

M_A_DQ5 6

182

DQ61

M_A_DQ6 2

192

7

DQ62

M_A_DQ5 9

194

DQ63

30

RESET#

ok

4

M_A_DQ[6 3:0] 5

DDR3_D RAMRST# 5 ,17

JP1601

2

112

3MM_OPEN_5 MIL

+1.5V_DD R3

12

C1605

C1606

0.1UF/16V

Layout Note: Place th ese caps near SO DIM M 0

PM_EXTT S#0_DI M_A

T1601T1601

1

Reserve

+V_VREF _CA_D IMM0

12

C1623

C1624

2.2UF/6.3V

0.1UF/16V

@

+V_VREF _DQ_D IMM0

12

C1625

C1622

0.1UF/16V

2.2UF/6.3V

@

3

+1.5V

+1.5V 5 ,7,51,63 ,83

+0.75VS

+0.75VS 17,6 3,83

+3VS

+1.5V_DD R3+ 1.5V

CON1601 B

75

VDD1 VDD381VDD4 VDD587VDD6 VDD793VDD8

99

VDD9

105

VDD11

111

VDD13

117

VDD15

123

VDD17

2

VSS1

8

VSS3

13

VSS5

19

VSS7

25

VSS9

31

VSS11

37

VSS13

43

VSS15

48

VSS17

54

VSS19

60

VSS21

65

VSS23

71

VSS25

127

VSS27

133

VSS29

138

VSS31

144

VSS33

150

VSS35

155

VSS37

161

VSS39

167

VSS41

172

VSS43

178

VSS45

184

VSS47

189

VSS49

195

VSS51

198

EVENT#

125

TEST

77

NC1

122

NC2

126

VREFCA

1

VREFDQ

DDR3_D IMM_204P

12V02G WSM000

+3VS 4,17,20,21,22 ,23,24,25 ,26,27,2 8,30,37,3 8,39,40,4 1,47,48 ,49,53,55 ,60,63,6 6,69,91,9 2

+1.5V_DD R3

+1.5V_DD R3 17,18

76

VDD2

82 88

12

C1607

12

C1615

0.1UF/16V

+0.75VS

C1607

0.1UF/16V

NP_NC1 NP_NC2

VDDSPD

94 100

VDD10

106

VDD12

112

VDD14

118

VDD16

124

VDD18

3

VSS2

9

VSS4

14

VSS6

20

VSS8

26

VSS10

32

VSS12

38

VSS14

44

VSS16

49

VSS18

55

VSS20

61

VSS22

66

VSS24

72

VSS26

128

VSS28

134

VSS30

139

VSS32

145

VSS34

151

VSS36

156

VSS38

162

VSS40

168

VSS42

173

VSS44

179

VSS46

185

VSS48

190

VSS50

196

VSS52

207

GND1

208

GND2

205 206

203

VTT1

204

VTT2

199

+1.5V_DD R3

12

C1608

0.1UF/16V

+1.5V PWR: 22UF*3PCS EE:10UF*9PCS

+1.5V_DD R3

Layout Note: Place th ese caps near SO DIM M 0

12

+0.75VS

12

C1609

C1610

10UF/6.3V

@

12

C1617

C1616

1UF/6.3V

12

+

@

CE1601

220UF/2V

+3VS

12

C1614

2.2UF/6.3V

@

12

C1612

C1611

10UF/6.3V

12

C1619

C1618

1UF/6.3V

@

12

C1613

C1613 10UF/6.3V

10UF/6.3V

@

2

12

C1620

C1620 10UF/6.3V

10UF/6.3V

@

C1646

C1646 1UF/6.3V

1UF/6.3V

12

C1645

C1645 1UF/6.3V

1UF/6.3V

C1648

C1648 1UF/6.3V

1UF/6.3V

12

C1647

C1647 1UF/6.3V

1UF/6.3V

1

M_A_DIM0 _CLK_D DR2

12

R1623

C1653

R1622

@

12

@

C1653

10PF/50 V

M_A_DIM0 _CLK_D DR#2

@

M_A_DIM0 _CLK_D DR3

12

C1652

10PF/50 V

M_A_DIM0 _CLK_D DR#3

@

SMBus Slave Address: A2H

M_A_DIM0 _CLK_D DR35

M_A_DIM0 _CLK_D DR#35

M_A_DIM0 _CLK_D DR25

M_A_DIM0 _CLK_D DR#25

M_A_DIM0 _CS#35 M_A_DIM0 _CS#25

M_A_DIM0 _ODT35 M_A_DIM0 _ODT25

M_A_DIM0 _CKE35 M_A_DIM0 _CKE25

+3VS

DM should connect to GND directly Design Guide 0.9 p86 (436735)

SMB_DAT _S

5

M_A_WE # M_A_RAS # M_A_CAS #

M_A_BS2 M_A_BS1 M_A_BS0

1 2 3 4

10KOhm

10KOhm 10KOhm

10KOhm

150Ohm

B B

A A

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

RN1602A

RN1602A RN1602B

RN1602B

M_A_DQS 7 M_A_DQS #7 M_A_DQS 6 M_A_DQS #6 M_A_DQS 5 M_A_DQS #5 M_A_DQS 4 M_A_DQS #4 M_A_DQS 2 M_A_DQS #2 M_A_DQS 3 M_A_DQS #3 M_A_DQS 0 M_A_DQS #0 M_A_DQS 1 M_A_DQS #1

H:9.2mm

CON1602 A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

102

CK1

104

CK1#

101

CK0

103

CK0#

121

S1#

114

S0#

120

ODT1

116

ODT0

113

WE#

110

RAS#

115

CAS#

79

BA2

108

BA1

109

BA0

74

CKE1

73

CKE0

201

SA1

197

SA0

188

DQS7

186

DQS#7

171

DQS6

169

DQS#6

154

DQS5

152

DQS#5

137

DQS4

135

DQS#4

64

DQS3

62

DQS#3

47

DQS2

45

DQS#2

29

DQS1

27

DQS#1

12

DQS0

10

DQS#0

187

DM7

170

DM6

153

DM5

136

DM4

63

DM3

46

DM2

28

DM1

11

DM0

202

SCL

200

SDA

DDR3_D IMM_204P

12V02G BSM000

M_A_DQ1 1

5

DQ0

M_A_DQ1 2

7

DQ1

M_A_DQ8

15

DQ2

M_A_DQ9

17

DQ3

M_A_DQ1 4

4

DQ4

M_A_DQ1 0

6

DQ5

M_A_DQ1 5

16

DQ6

M_A_DQ1 3

18

0

DQ7

M_A_DQ4

21

DQ8

M_A_DQ1

23

DQ9

M_A_DQ2

33

DQ10

M_A_DQ7

35

DQ11

M_A_DQ0

22

DQ12

M_A_DQ5

24

DQ13

M_A_DQ3

34

DQ14

M_A_DQ6

36

1

DQ15

M_A_DQ2 9

39

DQ16

M_A_DQ3 0

41

DQ17

M_A_DQ2 7

51

DQ18

M_A_DQ3 1

53

DQ19

M_A_DQ2 8

40

DQ20

M_A_DQ2 5

42

DQ21

M_A_DQ2 4

50

DQ22

M_A_DQ2 6

52

2

DQ23

M_A_DQ1 9

57

DQ24

M_A_DQ1 8

59

DQ25

M_A_DQ2 2

67

DQ26

M_A_DQ2 3

69

DQ27

M_A_DQ2 0

56

DQ28

M_A_DQ2 1

58

DQ29

M_A_DQ1 7

68

DQ30

M_A_DQ1 6

70

3

DQ31

M_A_DQ3 3

129

DQ32

M_A_DQ3 6

131

DQ33

M_A_DQ3 7

141

DQ34

M_A_DQ3 4

143

DQ35

M_A_DQ3 8

130

DQ36

M_A_DQ3 2

132

DQ37

M_A_DQ3 5

140

DQ38

M_A_DQ3 9

142

4

DQ39

M_A_DQ4 4

147

DQ40

M_A_DQ4 0

149

DQ41

M_A_DQ4 6

157

DQ42

M_A_DQ4 5

159

DQ43

M_A_DQ4 3

146

DQ44

M_A_DQ4 7

148

DQ45

M_A_DQ4 2

158

DQ46

M_A_DQ4 1

160

5

DQ47

M_A_DQ4 9

163

DQ48

M_A_DQ4 8

165

DQ49

M_A_DQ5 1

175

DQ50

M_A_DQ5 4

177

DQ51

M_A_DQ5 3

164

DQ52

M_A_DQ5 0

166

DQ53

M_A_DQ5 2

174

DQ54

M_A_DQ5 5

176

6

DQ55

M_A_DQ5 8

181

DQ56

M_A_DQ6 1

183

DQ57

M_A_DQ6 3

191

DQ58

M_A_DQ5 7

193

DQ59

M_A_DQ6 0

180

DQ60

M_A_DQ5 6

182

DQ61

M_A_DQ6 2

192

DQ62

M_A_DQ5 9

194

7

DQ63

DDR3_D RAMRST#SMB_CLK _S

30

RESET#

4

Layout Note: Place th ese caps near SO DIM M 0

+1.5V_DD R3

T1602T1602

Reserve

+V_VREF _CA_D IMM0

+V_VREF _DQ_D IMM0

12

C1635

0.1UF/16V

PM_EXTT S#0_DI M_A

1

12

C1643

2.2UF/6.3V

@

12

C1626

2.2UF/6.3V

@

12

C1629

0.1UF/16V

12

C1637

0.1UF/16V

12

C1630

0.1UF/16V

CON1602 B

75

VDD1 VDD381VDD4 VDD587VDD6 VDD793VDD8

99

VDD9

105

VDD11

111

VDD13

117

VDD15

123

VDD17

2

VSS1

8

VSS3

13

VSS5

19

VSS7

25

VSS9

31

VSS11

37

VSS13

43

VSS15

48

VSS17

54

VSS19

60

VSS21

65

VSS23

71

VSS25

127

VSS27

133

VSS29

138

VSS31

144

VSS33

150

VSS35

155

VSS37

161

VSS39

167

VSS41

172

VSS43

178

VSS45

184

VSS47

189

VSS49

195

VSS51

198

EVENT#

125

TEST

77

NC1

122

NC2

126

VREFCA

1

VREFDQ

DDR3_D IMM_204P

12V02G BSM000

NP_NC1 NP_NC2

VDDSPD

C1644

0.1UF/16V

+0.75VS

12

C1636

0.1UF/16V

+1.5V_DD R3

12

C1632

0.1UF/16V

+3VS

12

C1633

2.2UF/6.3V

@

+1.5V_DD R3

76

VDD2

82 88 94 100

VDD10

106

VDD12

112

VDD14

118

VDD16

124

VDD18

3

VSS2

9

VSS4

14

VSS6

20

VSS8

26

VSS10

32

VSS12

38

VSS14

44

VSS16

49

VSS18

55

VSS20

61

VSS22

66

VSS24

72

VSS26

128

VSS28

134

VSS30

139

VSS32

145

VSS34

151

VSS36

156

VSS38

162

VSS40

168

VSS42

173

VSS44

179

VSS46

185

VSS48

190

VSS50

196

VSS52

207

GND1

208

GND2

205 206

203

VTT1

204

VTT2

199

12

3

+1.5V PWR: 22UF*3PCS EE:10UF*9PCS

Layout Note: Place th ese caps near SO DIM M 0

+0.75VS

12

C1627

C1627 10UF/6.3V

10UF/6.3V

C1634

C1634 1UF/6.3V

1UF/6.3V

12

C1640

C1621

10UF/6.3V

@

12

C1631

C1631 1UF/6.3V

1UF/6.3V

C1628

C1628 1UF/6.3V

1UF/6.3V

@

12

C1639

C1639 1UF/6.3V

1UF/6.3V

@

12

C1641

C1641 10UF/6.3V

10UF/6.3V

12

2

C1642

C1642 10UF/6.3V

10UF/6.3V

@

12

C1638

C1638 10UF/6.3V

10UF/6.3V

@

C1654

C1654 1UF/6.3V

1UF/6.3V

12

C1649

C1649 1UF/6.3V

1UF/6.3V

C1656

C1656 1UF/6.3V

1UF/6.3V

C1655

C1655 1UF/6.3V

1UF/6.3V

Title :

DDR3(1)_SO-DIMM0

Engineer:

Ahren_chen

Engineer:

Ahren_chen

Engineer:

BG1-CSC -HW R&D D ept.5

Size Project Name

D

PLFG

Date: Sheet o f

1

Ahren_chen

16 99Friday, February 03 , 2012

Rev

1.0

12

5

H:4MM

CON1701 A

M_B_A0

98

A0

M_B_WE #5 M_B_RAS #5 M_B_CAS #5

M_B_BS25 M_B_BS15 M_B_BS05

M_B_WE # M_B_RAS # M_B_CAS #

M_B_BS2 M_B_BS1 M_B_BS0

1 2

10KOhm

3 4

10KOhm

1 2

10KOhm

3 4

10KOhm

M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_DQS 7 M_B_DQS #7 M_B_DQS 6 M_B_DQS #6 M_B_DQS 5 M_B_DQS #5 M_B_DQS 4 M_B_DQS #4 M_B_DQS 3 M_B_DQS #3 M_B_DQS 2 M_B_DQS #2 M_B_DQS 1 M_B_DQS #1 M_B_DQS 0 M_B_DQS #0

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_DQS 7 M_B_DQS #7 M_B_DQS 6 M_B_DQS #6 M_B_DQS 5 M_B_DQS #5 M_B_DQS 4 M_B_DQS #4 M_B_DQS 3 M_B_DQS #3 M_B_DQS 2 M_B_DQS #2 M_B_DQS 1 M_B_DQS #1 M_B_DQS 0 M_B_DQS #0

RN1701A

RN1701A RN1701B

RN1701B

RN1702A

RN1702A RN1702B

RN1702B

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

102

CK1

104

CK1#

101

CK0

103

CK0#

121

S1#

114

S0#

120

ODT1

116

ODT0

113

WE#

110

RAS#

115

CAS#

79

BA2

108

BA1

109

BA0

74

CKE1

73

CKE0

201

SA1

197

SA0

188

DQS7

186

DQS#7

171

DQS6

169

DQS#6

154

DQS5

152

DQS#5

137

DQS4

135

DQS#4

64

DQS3

62

DQS#3

47

DQS2

45

DQS#2

29

DQS1

27

DQS#1

12

DQS0

10

DQS#0

187

DM7

170

DM6

153

DM5

136

DM4

63

DM3

46

DM2

28

DM1

11

DM0

202

SCL

200

SDA

DDR3_D IMM_204P

12V02G IRM001

H:8MM

CON1702 A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

102

CK1

104

CK1#

101

CK0

103

CK0#

121

S1#

114

S0#

120

ODT1

116

ODT0

113

WE#

110

RAS#

115

CAS#

79

BA2

108

BA1

109

BA0

74

CKE1

73

CKE0

201

SA1

197

SA0

188

DQS7

186

DQS#7

171

DQS6

169

DQS#6

154

DQS5

152

DQS#5

137

DQS4

135

DQS#4

64

DQS3

62

DQS#3

47

DQS2

45

DQS#2

29

DQS1

27

DQS#1

12

DQS0

10

DQS#0

187

DM7

170

DM6

153

DM5

136

DM4

63

DM3

46

DM2

28

DM1

11

DM0

202

SCL

200

SDA

DDR3_D IMM_204P

12V02G BRM001

1202-000R000

12V02GIRM001)

(

M_B_DIM0 _CLK_D DR0

12

R1720

C1750

@

R1721

@

M_B_DQS [7:0]5

M_B_DQS #[7:0]5

R1722

150Ohm

R1723

150Ohm

C1750

10PF/50 V

@

12

C1751

10PF/50 V

@

12

@

12

@

SMBus Slave Address: A6H

M_B_DIM0 _CLK_D DR#0

M_B_DIM0 _CLK_D DR1

M_B_DIM0 _CLK_D DR#1

SMBus Slave Address: A4H

M_B_DQS 0 M_B_DQS 1 M_B_DQS 2 M_B_DQS 3 M_B_DQS 4 M_B_DQS 5 M_B_DQS 6 M_B_DQS 7 M_B_DQS #0 M_B_DQS #1 M_B_DQS #2 M_B_DQS #3 M_B_DQS #4 M_B_DQS #5 M_B_DQS #6 M_B_DQS #7

SMB_CLK _S16,28,48,53 ,55 SMB_DAT _S16,28,48,53,5 5

M_B_DIM0 _CLK_D DR2

C1752

10PF/50 V

M_B_DIM0 _CLK_D DR#2

M_B_DIM0 _CLK_D DR3

C1753

10PF/50 V

M_B_DIM0 _CLK_D DR#3

M_B_DIM0 _CLK_D DR15 M_B_DIM0 _CLK_D DR#15 M_B_DIM0 _CLK_D DR05 M_B_DIM0 _CLK_D DR#05

M_B_DIM0 _CS#15 M_B_DIM0 _CS#05

M_B_DIM0 _ODT15 M_B_DIM0 _ODT05

M_B_DIM0 _CKE15 M_B_DIM0 _CKE05

+3VS

DM should connect to GND directly Design Guide 0.9 p86 (436735)

M_B_DIM0 _CLK_D DR35

M_B_DIM0 _CLK_D DR#35

M_B_DIM0 _CLK_D DR25

M_B_DIM0 _CLK_D DR#25

M_B_DIM0 _CS#35 M_B_DIM0 _CS#25

M_B_DIM0 _ODT35 M_B_DIM0 _ODT25

M_B_DIM0 _CKE35 M_B_DIM0 _CKE25

+3VS

DM should connect to GND directly Design Guide 0.9 p86 (436735)

SMB_CLK _S SMB_DAT _S

150Ohm

D D

150Ohm

C C

B B

A A

M_B_DQ1

5

DQ0

M_B_DQ5

7

DQ1

M_B_DQ4

15

DQ2

M_B_DQ0

17

DQ3

M_B_DQ2

4

DQ4

M_B_DQ7

6

DQ5

M_B_DQ3

16

0

DQ6

M_B_DQ6

18

DQ7

M_B_DQ1 2

21

DQ8

M_B_DQ1 3

23

DQ9

M_B_DQ1 5

33

DQ10

M_B_DQ1 4

35

DQ11

M_B_DQ9

22

DQ12

M_B_DQ8

24

DQ13

M_B_DQ1 1

34

1

DQ14

M_B_DQ1 0

36

DQ15

M_B_DQ1 6

39

DQ16

M_B_DQ1 7

41

DQ17

M_B_DQ2 2

51

DQ18

M_B_DQ1 9

53

DQ19

M_B_DQ2 1

40

DQ20

M_B_DQ2 0

42

DQ21

M_B_DQ1 8

50

2

DQ22

M_B_DQ2 3

52

DQ23

M_B_DQ3 0

57

DQ24

M_B_DQ2 6

59

DQ25

M_B_DQ2 5

67

DQ26

M_B_DQ2 9

69

DQ27

M_B_DQ2 8

56

DQ28

M_B_DQ2 4

58

DQ29

M_B_DQ2 7

68

3

DQ30

M_B_DQ3 1

70

DQ31

M_B_DQ3 3

129

DQ32

M_B_DQ3 2

131

DQ33

M_B_DQ3 8

141

DQ34

M_B_DQ3 4

143

DQ35

M_B_DQ3 6

130

DQ36

M_B_DQ3 7

132

DQ37

M_B_DQ3 5

140

4

DQ38

M_B_DQ3 9

142

DQ39

M_B_DQ4 4

147

DQ40

M_B_DQ4 1

149

DQ41

M_B_DQ4 3

157

DQ42

M_B_DQ4 7

159

DQ43

M_B_DQ4 5

146

DQ44

M_B_DQ4 0

148

5

DQ45

M_B_DQ4 6

158

DQ46

M_B_DQ4 2

160

DQ47

M_B_DQ5 0

163

DQ48

M_B_DQ5 2

165

DQ49

M_B_DQ5 5

175

DQ50

M_B_DQ5 4

177

DQ51

M_B_DQ4 8

164

DQ52

M_B_DQ5 3

166

DQ53

M_B_DQ4 9

174

6

DQ54

M_B_DQ5 1

176

DQ55

M_B_DQ6 0

181

DQ56

M_B_DQ5 8

183

DQ57

M_B_DQ6 3

191

DQ58

M_B_DQ6 1

193

DQ59

M_B_DQ5 7

180

DQ60

M_B_DQ5 6

182

DQ61

M_B_DQ6 2

192

7

DQ62

M_B_DQ5 9

194

DQ63

30

5 7 15 17 4 6 16 18

M_B_DQ1 2

21

M_B_DQ1 3

23

M_B_DQ1 5

33

M_B_DQ1 4

35

M_B_DQ9

22

M_B_DQ8

24

M_B_DQ1 1

34

M_B_DQ1 0

36 39 41 51 53 40 42 50 52

M_B_DQ3 0

57

M_B_DQ2 6

59

M_B_DQ2 5

67

M_B_DQ2 9

69

M_B_DQ2 8

56

M_B_DQ2 4

58

M_B_DQ2 7

68

M_B_DQ3 1

70 129 131 141 143 130 132 140 142

M_B_DQ4 4

147

M_B_DQ4 1

149

M_B_DQ4 3

157

M_B_DQ4 7

159

M_B_DQ4 5

146

M_B_DQ4 0

148

M_B_DQ4 6

158

M_B_DQ4 2

160 163 165 175 177 164 166 174 176

M_B_DQ6 0

181

M_B_DQ5 8

183

M_B_DQ6 3

191

M_B_DQ6 1

193

M_B_DQ5 7

180

M_B_DQ5 6

182

M_B_DQ6 2

192

M_B_DQ5 9

194

DDR3_D RAMRST#

30

M_B_DQ1 M_B_DQ5 M_B_DQ4 M_B_DQ0 M_B_DQ2 M_B_DQ7 M_B_DQ3 M_B_DQ6

M_B_DQ1 6 M_B_DQ1 7 M_B_DQ2 2 M_B_DQ1 9 M_B_DQ2 1 M_B_DQ2 0 M_B_DQ1 8 M_B_DQ2 3

M_B_DQ3 3 M_B_DQ3 2 M_B_DQ3 8 M_B_DQ3 4 M_B_DQ3 6 M_B_DQ3 7 M_B_DQ3 5 M_B_DQ3 9

M_B_DQ5 0 M_B_DQ5 2 M_B_DQ5 5 M_B_DQ5 4 M_B_DQ4 8 M_B_DQ5 3 M_B_DQ4 9 M_B_DQ5 1

DDR3_D RAMRST# 5 ,16

RESET#

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5

0

DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13

1

DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21

2

DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29

3

DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37

4

DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44

5

DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53

6

DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61

7

DQ62 DQ63

RESET#

4

M_B_DQ[6 3:0] 5M_B_A[15 :0]5

ok

+1.5V_DD R3

12

C1706

C1705

0.1UF/16V

Layout Note: Place th ese caps near SO DIM M 1

PM_EXTT S#0_DI M_B

T1701

1

N/A

Reserve

+V_VREF _CA_D IMM1

12

C1724

2.2UF/6.3V

@

+V_VREF _DQ_D IMM1

12

C1722

2.2UF/6.3V

@

+1.5V_DD R3

12

C1730

C1743

0.1UF/16V

Layout Note: Place th ese caps near SO DIM M 1

PM_EXTT S#0_DI M_B

T1702

1

N/A

Reserve

+V_VREF _CA_D IMM1

12

C1732

2.2UF/6.3V

@

+V_VREF _DQ_D IMM1

12

C1741

2.2UF/6.3V

@

C1723

0.1UF/16V

C1725

0.1UF/16V

C1729

0.1UF/16V

C1727

0.1UF/16V

CON1701 B

75

VDD1 VDD381VDD4 VDD587VDD6 VDD793VDD8

99

VDD9

105

VDD11

111

VDD13

117

VDD15

123

VDD17

2

VSS1

8

VSS3

13

VSS5

19

VSS7

25

VSS9

31

VSS11

37

VSS13

43

VSS15

48

VSS17

54

VSS19

60

VSS21

65

VSS23

71

VSS25

127

VSS27

133

VSS29

138

VSS31

144

VSS33

150

VSS35

155

VSS37

161

VSS39

167

VSS41

172

VSS43

178

VSS45

184

VSS47

189

VSS49

195

VSS51

198

EVENT#

125

TEST

77

NC1

122

NC2

126

VREFCA

1

VREFDQ

DDR3_D IMM_204P

12V02G IRM001

CON1702 B

75

VDD1 VDD381VDD4 VDD587VDD6 VDD793VDD8

99

VDD9

105

VDD11

111

VDD13

117

VDD15

123

VDD17

2

VSS1

8

VSS3

13

VSS5

19

VSS7

25

VSS9

31

VSS11

37

VSS13

43

VSS15

48

VSS17

54

VSS19

60

VSS21

65

VSS23

71

VSS25

127

VSS27

133

VSS29

138

VSS31

144

VSS33

150

VSS35

155

VSS37

161

VSS39

167

VSS41

172

VSS43

178

VSS45

184

VSS47

189

VSS49

195

VSS51

198

EVENT#

125

TEST

77

NC1

122

NC2

126

VREFCA

1

VREFDQ

DDR3_D IMM_204P

12V02G BRM001

NP_NC1 NP_NC2

VDDSPD

NP_NC1 NP_NC2

VDDSPD

3

+1.5V

+1.5V 5 ,7,16,51 ,63,83

+0.75VS

+0.75VS 16,6 3,83

+3VS

+3VS 4,16,20,21,22 ,23,24,25 ,26,27,2 8,30,37,3 8,39,40,4 1,47,48 ,49,53,55 ,60,63,6 6,69,91,9 2

+1.5V_DD R3

+1.5V_DD R3 16,18

+1.5V PWR: 22UF*3PCS EE:10UF*9PCS

+1.5V_DD R3

Layout Note: Place th ese caps near SO DIM M 1

12

+0.75VS

12

+1.5V_DD R3

+0.75VS

C1709

C1709 10UF/6.3V

10UF/6.3V

C1716

C1716 1UF/6.3V

1UF/6.3V

12

C1733

C1733 10UF/6.3V

10UF/6.3V

12

C1736

C1736 1UF/6.3V

1UF/6.3V

12

C1710

C1711

10UF/6.3V

@

12

+1.5V PWR: 22UF*3PCS EE:10UF*9PCS

C1717

C1717 1UF/6.3V

1UF/6.3V

C1718

C1718 1UF/6.3V

1UF/6.3V

@

12

C1719

C1719 1UF/6.3V

1UF/6.3V

@

Layout Note: Place th ese caps near SO DIM M 1

12

C1738

C1739

10UF/6.3V

@

12

C1731

C1735

1UF/6.3V

@

BG1-CSC -HW R&D D ept.5

Size Project Name

D

PLFG

Date: Sheet o f

12

C1721

C1721 1UF/6.3V

1UF/6.3V

@

Title :

Engineer:

12

+0.75VS

12

+0.75VS

C1707

0.1UF/16V

12

C1715

0.1UF/16V

C1728

0.1UF/16V

12

C1744

0.1UF/16V

+1.5V_DD R3

12

C1708

0.1UF/16V

+3VS

12

+1.5V_DD R3

12

C1720

0.1UF/16V

+3VS

12

C1714

2.2UF/6.3V

@

C1742

2.2UF/6.3V

@

12

+

@

CE1701

220UF/2V

76

VDD2

82 88 94 100

VDD10

106

VDD12

112

VDD14

118

VDD16

124

VDD18

3

VSS2

9

VSS4

14

VSS6

20

VSS8

26

VSS10

32

VSS12

38

VSS14

44

VSS16

49

VSS18

55

VSS20

61

VSS22

66

VSS24

72

VSS26

128

VSS28

134

VSS30

139

VSS32

145

VSS34

151

VSS36

156

VSS38

162

VSS40

168

VSS42

173

VSS44

179

VSS46

185

VSS48

190

VSS50

196

VSS52

207

GND1

208

GND2

205 206

203

VTT1

204

VTT2

199

76

VDD2

82 88 94 100

VDD10

106

VDD12

112

VDD14

118

VDD16

124

VDD18

3

VSS2

9

VSS4

14

VSS6

20

VSS8

26

VSS10

32

VSS12

38

VSS14

44

VSS16

49

VSS18

55

VSS20

61

VSS22

66

VSS24

72

VSS26

128

VSS28

134

VSS30

139

VSS32

145

VSS34

151

VSS36

156

VSS38

162

VSS40

168

VSS42

173

VSS44

179

VSS46

185

VSS48

190

VSS50

196

VSS52

207

GND1

208

GND2

205 206

203

VTT1

204

VTT2

199

C1712

C1712 10UF/6.3V

10UF/6.3V

12

C1740

C1740 10UF/6.3V

10UF/6.3V

2

12

C1726

C1713

10UF/6.3V

@

12

C1734

C1734 10UF/6.3V

10UF/6.3V

@

DDR3(2)_SO-DIMM1

Ahren_chen

17 99Friday, February 03 , 2012

Rev

1.0

C1737

C1737 10UF/6.3V

10UF/6.3V

@

1

12

C1746

C1746 1UF/6.3V

1UF/6.3V

12

C1749

C1749 1UF/6.3V

1UF/6.3V

C1747

C1747 1UF/6.3V

1UF/6.3V

12

C1756

C1756 1UF/6.3V

1UF/6.3V

12

C1748

C1748 1UF/6.3V

1UF/6.3V

12

C1755

C1755 1UF/6.3V

1UF/6.3V

12

C1745

C1745 1UF/6.3V

1UF/6.3V

12

C1754

C1754 1UF/6.3V

1UF/6.3V

5

4

3

2

1

5

4

3

2

1

DDR3 Vref

M_VREF

R1809 0Ohm

M_VREF83

D D

M1: Fixed SO-DIMM VREF_DQ

12

+1.5V_DDR3

C1801

0.1UF/16V

R1807

R1807 1KOhm

1KOhm

1 2

12

R1808

R1808 1KOhm

1KOhm

1 2

@

M1Default

C C

+V_VREF_DDR3

For DDR3_VREF command & address.

1 2

SP1801 R0402SP1801 R0402

1 2

SP1802 R0402SP1802 R0402

SP1803 R0402SP1803 R0402

1 2

R1801 0OhmR1801 0Ohm

1 2

R1804 0OhmR1804 0Ohm

1 2

R1.0 1231

R1805 0OhmR1805 0Ohm

DIMM0_VREF_DQ9

DIMM1_VREF_DQ9

1 2

R1806 0OhmR1806 0Ohm

1 2

M3

M3: Processor Generated SO-DIMM VREFDQ

– New Requirement

If support M1 :(Sandy Bridge CPU Only)

1. Un mount R1802,R1803,R1805,R1806,R1810,R1811,C1802

CA

+V_VREF_CA_DIMM0

+V_VREF_CA_DIMM1

+V_SM_VREF

+V_VREF_DQ_DIMM0

D

Q

+V_VREF_DQ_DIMM1

R1.0 0121 For M3 test only

R1802 0Ohm

1 2

@

R1803 0Ohm

1 2

@

12

C1802

0.1UF/16V

+V_VREF_CA_DIMM0

+V_VREF_DQ_DIMM0

+V_VREF_CA_DIMM1

+V_VREF_DQ_DIMM1

+1.5V_DDR3

R1811

R1811 1KOhm

1KOhm

1 2

@

12

R1810

R1810 1KOhm

1KOhm

@

M1

+1.5V_DDR3

+V_SM_VREF

+1.5V_DDR3 16,17

+V_VREF_CA_DIMM0 16

+V_VREF_DQ_DIMM0 16

+V_VREF_CA_DIMM1 17

+V_VREF_DQ_DIMM1 17

+V_SM_VREF 7

2. Mount R1801,R1804 ==>CA and DQ are the same path

If support M1 and M3 :(Sandy Bridge/Ivy Bridge CPU)

1. Mount R1802,R1803,R1805,R1806,R1810,R1811,C1802

2. Un mount R1801,R1804 ==> CA and DQ are separate path

Sandy Bridge CPU Only: M1 Implementation Sandy Bridge/Ivy Bridge CPU: M1 and M3 Implementation

B B

A A

Title :

DDR3(3)_CA/DQ Voltage

Wing_Cheng

Engineer:

PEGATRON COMPUTER INC

Size Project N ame

C

Date: Sheet

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

BA52HR/CR

1

Wing_Cheng

of

18 94Friday, February 03, 2012

Rev

1.0

5

D D

C C

4

3

2

1

B B

A A

R1.4--2

Title :

VID Controller

Wing_Cheng

Engineer:

PEGATRON COMPUTER INC

Size Project N ame

C

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

BA52HR/CR

1

Wing_Cheng

19 94Friday, February 03, 2012

Rev

1.0

5

4

3

2

1

RTC battery

D D

+VCC_RTC

RTCRST# RC delay should be 18ms~25ms

R2003 20KOhmR2003 20KOhm

1 2

R2004 20KOhmR2004 20KOhm

1 2

R2005

1MOhm

1 2

C C

B B

HDA_DKEN : Flash Descriptor Security Overide H = Disabled (Default) L = Enabled

Note : Rising edge of PWROK

HDA_DOCK_EN#

3 4

GND

GND GND

TPM Settings

Clear ME RTC

Registers Keep ME RTC Registers

+RTCBAT

R2001 1KOhmR2001 1KOhm

12

J2001

J2001 BATT_HOLDER_2P

BATT_HOLDER_2P

12V20GBSM000

12

C2004

C2004 1UF/6.3V

1UF/6.3V

12

C2005

C2005 1UF/6.3V

1UF/6.3V

GNDGND

JRST2002

Shunt

Open (Default)

1MM_OPEN_M1M2

1

2

1

JRST2002

1

2

SGL_JUMP

2

@

+RTC_BAT

12

R1.0 0110

增增增增增增增增增增增增增增增增增增增增

Connector Type 1217-001L000

Request by CSC for CMOS clear function

CMOS Settings

JRST2001

1

2

SGL_JUMP

@

INTVRMEN: Integrated SUS 1.05V VRM Enables Low: Enable External VRs High:Enable Internal VRs

PCH_INTVRMEN

JRST3

R2008 1KOhmR2008 1KOhm

2

112

R1.0 add JRST3 to follow BIC 50. Joyoung 06 28

A A

D2001

1

2

1V/0.2A

Clear CMOS

Keep CMOS

12

+VCC_RTC+3VA

3

12

C2003

C2003 1UF/6.3V

1UF/6.3V

GND

JRST2001

Shunt Open (Default)

R2030 200KOhm

@R2030 200KOhm

@

1 2

1%

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

LDRQ0#

SERIRQ

SATA0RXN SATA0RXP SATA0TXN SATA0TXP

SATA1RXN SATA1RXP SATA1TXN SATA1TXP

SATA2RXN SATA2RXP SATA2TXN SATA2TXP

SATA3RXN SATA3RXP SATA3TXN SATA3TXP

SATA4RXN SATA4RXP SATA4TXN SATA4TXP

SATA5RXN SATA5RXP SATA5TXN SATA5TXP

SATALED#

R1.0 Delete +RTCBAT

C38 A38 B37 C37

D36

SNN_PCH_DRQ#0

E36

SNN_LPC_DRQ#1

K36

Serial Interrupt Request

V5

AM3 AM1 AP7 AP5

AM10 AM8 AP11 AP10

AD7 AD5 AH5 AH4

AB8 AB10 AF3 AF1

Y7 Y5 AD3 AD1

Y3 Y1 AB3 AB1

Y11

SATA_COMP

Y10

AB12

SATA3_COMP

AB13

RBIAS_SATA3

AH1

R2025 10KOhm

P3

V14

P1

VCCVRAM use +1.5VS in mobile

R2025 10KOhm

SATA0GP

BBS_BIT0_R

R2020 1KOhm@R2020 1KOhm@

1 2

R2034 1KOhm@R2034 1KOhm@

1 2

R2036 1KOhmR2036 1KOhm

1 2

T2032T2032

1

T2033T2033

1

R2007 37.4Ohm1%R2007 37.4Ohm1%

1 2

R2047 49.9Ohm1%R2047 49.9Ohm1%

1 2

R2048 750Ohm1%R2048 750Ohm1%

1 2

@

1 2

SATA_LED#

SP2003 R0402SP2003 R0402

12

+3VS

+3VSUS_ORG

LPC_AD0 30,65 LPC_AD1 30,65 LPC_AD2 30,65 LPC_AD3 30,65

LPC_FRAME# 30,65

INT_SERIRQ 30,65

SATA_RXN0 60 SATA_RXP0 60 SATA_TXN0 60 SATA_TXP0 60

SATA_RXN1 53 SATA_RXP1 53 SATA_TXN1 53 SATA_TXP1 53

SATA_RXN2 60 SATA_RXP2 60 SATA_TXN2 60 SATA_TXP2 60

SATA_RXN3 60 SATA_RXP3 60 SATA_TXN3 60 SATA_TXP3 60

+VTT_PCH_VCCIO

GND

+3VS

SATA_LED# 66

BBS_BIT0 24

HDD1

0928

mSATA

Pull High

ODD

0928

HDD2

INT_SERIRQ

SATA0GP

1 2

R2026 10KOhmR2026 10KOhm

1 2

R2027 10KOhmR2027 10KOhm

+3VS

+3VSUS_ORG

+1.05VM_ORG

+VTT_PCH_VCCIO

U2001A

A20

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

C36

HDA_DOCK_EN#/GPIO33

N32

HDA_DOCK_RST#/GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

COUGAR_POINT_ES1

02V000000001

+VCC_RTC

ACZ_BCLK_AUD

12

C2010

10PF/50V

EMI solution

C2001

RTC_X1_C

12

GND

15PF/50V

GND

T2015T2015

1

T2011T2011

1

T2012T2012

+VCC_RTC

ACZ_BCLK_AUD41

ACZ_SYNC_AUD41

GND

ACZ_RST#_AUD41,42

ACZ_SDIN0_AUD41

PCH_FLASH_DESCRIPTOR30

ACZ_SDOUT_AUD41

MEFLSH_EN#30

PCH_SPICLK28,30

PCH_SPICS0#28

PCH_SPICS1#28,30

C2002 15PF/50VC2002 15PF/ 50V

GND

1

SB_SPKR41

T2002T2002

T2024T2024

1

T2025T2025

1

T2026T2026

1

T2027T2027

1

PCH_SPISI28, 30

PCH_SPISO28,30

12

R2050 0Ohm@R2050 0Ohm@

PCH_SPICS1#

SP2005

1 2

R0402

14

X2001

2

32.768KHZ

3

12

R2051

1 2

R2052

1 2

R2055

1 2

R2053 0OhmR2053 0Ohm

1 2

R2054 0Ohm@R2054 0Ohm@

1 2

1

R2006330KOhm 1% R2006330KOhm 1%

33Ohm

10MOhm

12

R2002

R2050 near R2008

RTC_X1

RTC_X2

RTC_RST#

SRTC_RST#

SM_INTRUDER#

PCH_INTVRMEN

ACZ_BCLK

ACZ_SYNC

ACZ_RST#

Remove TP

ACZ_SDOUT

HDA_DOCK_EN#

CARDREADER_RESET

PCH_JTAG_TCK_BUF

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

0200-00HU000 C.S 907552 A1 QMVY BGA942 INTEL/COUGAR POINT PCH

Strap information:

SB_SPKR: No reboot strap Low: Disable (Default) High:Enable

ACZ_SDOUT:

1.Flash descriptor security: Sampled Low: in effect. Sampled High: override

2.ACZ_SDOUTwhich sample high on the rising edge of PWROK Will also disable Intel ME.

ACZ_SYNC: On Die PLL VR voltage selector Low: 1.8V (Default) High: 1.5V note : CRB has no strap Hrron River Platform Schematic Design Checklist (438390 page 48)

+VCC_RTC 22,27

+3VA

+3VA 27,30,48,63,65,81,88,93

+3VS

+3VS 4,16,17,21,22,23,24,25,26,27,28,30,37,38,39,40,41,47,48,49,53,55,60,63, 66,69,91,92

+3VSUS_ORG 21,22,24,25,27

+1.05VM_ORG 27

+VTT_PCH_VCCIO 26,27

LPC

FWH4/LFRAME#

LDRQ1#/GPIO23

RTCIHDA

SATA 6G

SATA

SATAICOMPO

SATAICOMPI

JTAG

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SPI

SATA0GP/GPIO21

SATA1GP/GPIO19

SB_SPKR

ACZ_SDOUT

ACZ_SYNC

Title :

PCH(1)_SATA,IHDA,RTC,LPC

Wing_Cheng

Engineer:

PEGATRON COMPUTER INC

Size Project N ame

C

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

BA52HR/CR

1

Wing_Cheng

20 94Friday, February 03, 2012

Rev

1.0

5

PCIE_RXN1_CR40

D D

PCIE_RXN6_LAN33

PCIE_RXP6_LAN33 PCIE_TXN6_LAN33 PCIE_TXP6_LAN33

C C

CLK_PCIE_WLAN#_PCH55

CLK_PCIE_WLAN_PCH55

CLK_REQ2_WLAN#55

CLK_PCIE_mSATA#_PCH53

CLK_PCIE_mSATA_PCH53

CLK_REQ3_PCIE_mSATA#53

4.USB3.0

B B

CLK_PCIE_LAN#33

CLK_PCIE_LAN33

CLK_REQ6_LAN#33

PCIE_RXP1_CR40 PCIE_TXN1_CR40 PCIE_TXP1_CR40

PCIE_RXN2_WLAN55

PCIE_RXP2_WLAN55 PCIE_TXN2_WLAN55 PCIE_TXP2_WLAN55

PCIE_RXN3_mSATA53

PCIE_RXP3_mSATA53 PCIE_TXN3_mSATA53 PCIE_TXP3_mSATA53

PCIE_RXN_USB3051

PCIE_RXP_USB3051 PCIE_TXN_USB3051 PCIE_TXP_USB3051

CLK_PCIE_CR#_PCH40 CLK_PCIE_CR_PCH40

CLK_REQ1_CR#40

SP2101 R0402SP2101 R0402 SP2102 R0402SP2102 R0402

SP2103 R0402SP2103 R0402

CLK_PCIE_USB#_PCH51 CLK_PCIE_USB_PCH51

CLK_REQ_USB30#51

SP2107 R0402SP2107 R0402 SP2108 R0402SP2108 R0402

SP2109 R0402SP2109 R0402

C2107 0.1UF/16VC2107 0.1UF/16V C2114 0.1UF/16VC2114 0.1UF/16V

C2103 0.1UF/16VC2103 0.1UF/16V

1 2

C2104 0.1UF/16VC2104 0.1UF/16V

1 2

C2106 0.1UF/16V

1 2

C2105 0.1UF/16V

1 2

@

@ @

@

C2108 0.1UF/16V

1 2

C2113 0.1UF/16V

1 2

/FL1009

/FL1009 /FL1009

/FL1009

C2110 0.1UF/16VC2110 0.1UF /16V

1 2

C2111 0.1UF/16VC2111 0.1UF /16V

1 2

T2110T2110

1

T2111T2111

1

T2103T2103

1

SP2117SP2117 SP2118SP2118

SP2112SP2112

1 2 1 2

1 2

SP2104 R0402SP2104 R0402

1 2

SP2105 R0402SP2105 R0402

1 2

SP2106 R0402SP2106 R0402

1 2

SP2119SP2119 SP2120SP2120

SP2113SP2113

T2125T2125

1

T2126T2126

1

T2127T2127

1

T2116T2116

1

T2117T2117

1

T2112T2112

1

1 2 1 2

1 2

T2123T2123

1

T2124T2124

1

T2118T2118

1

1 2 1 2

PCIE_TXN1_CR_C PCIE_TXP1_CR_C

PCIE_TXN2_WLAN_C PCIE_TXP2_WLAN_C

PCIE_TXN3_mSATA_C PCIE_TXP3_mSATA_C

PCIE_TXN4_USB30_C PCIE_TXP4_USB30_C

PCIE_TXN6_GLAN_C PCIE_TXP6_GLAN_C

CLK_PCH_SRC0_N CLK_PCH_SRC0_P

CLK_REQ0#

12 12

12

CLK_PCH_SRC2_N CLK_PCH_SRC2_P

CLK_REQ2#

CLK_PCH_SRC3_N CLK_PCH_SRC3_P

CLK_REQ3#

12 12

12

CLK_PCH_SRC5_N CLK_PCH_SRC5_P

CLK_REQ5#

CLK_PCH_PEG_B_N CLK_PCH_PEG_B_P

CLK_REQ_PEG_B#

CLK_PCH_SRC6_N CLK_PCH_SRC6_P

CLK_REQ6#

CLK_PCH_SRC7_N CLK_PCH_SRC7_P

CLK_REQ7#

CLK_PCH_SRC1_N CLK_PCH_SRC1_P

CLK_REQ1#

CLK_PCH_SRC4_N CLK_PCH_SRC4_P

CLK_REQ4#

R1.0 Remove PCIE_CLK_XDP 0602

BG34

AV32 AU32

BE34

BB32 AY32

BG36

AV34 AU34

BE36 AY34 BB34

BG37 BH37 AY36 BB36

BG38 AU36 AV36

BG40

AY40 BB40

BE38 BC38

AW38

AY38

AB49 AB47

AA48 AA47

AB42 AB40

AK14 AK13

BF34

BJ36

BF36

BJ38

BJ40

BJ34

Y40 Y39

J2

M1

V10

Y37 Y36

A8

Y43 Y45

L12

V45 V46

L14

E6

V40 V42

T13

V38 V37

K12

4

U2001B

PERn1 PERp1 PETn1 PETp1

PERn2 PERp2 PETn2 PETp2

PERn3 PERp3 PETn3 PETp3

PERn4 PERp4 PETn4 PETp4

PERn5 PERp5 PETn5 PETp5

PERn6 PERp6 PETn6 PETp6

PERn7 PERp7 PETn7 PETp7

PERn8 PERp8 PETn8 PETp8

CLKOUT_PCIE0N CLKOUT_PCIE0P

PCIECLKRQ0#/GPIO73

CLKOUT_PCIE1N CLKOUT_PCIE1P

PCIECLKRQ1#/GPIO18

CLKOUT_PCIE2N CLKOUT_PCIE2P

PCIECLKRQ2#/GPIO20

CLKOUT_PCIE3N CLKOUT_PCIE3P

PCIECLKRQ3#/GPIO25

CLKOUT_PCIE4N CLKOUT_PCIE4P

PCIECLKRQ4#/GPIO26

CLKOUT_PCIE5N CLKOUT_PCIE5P

PCIECLKRQ5#/GPIO44

CLKOUT_PEG_B_N CLKOUT_PEG_B_P

PEG_B_CLKRQ#/GPIO56

CLKOUT_PCIE6N CLKOUT_PCIE6P

PCIECLKRQ6#/GPIO45

CLKOUT_PCIE7N CLKOUT_PCIE7P

PCIECLKRQ7#/GPIO46

CLKOUT_ITPXDP_N CLKOUT_ITPXDP_P

02V000000001

PCI-E*

100MHz

COUGAR_POINT_ES1

100MHz

SMBUSController

SML1ALERT#/PCHHOT#/GPIO74

Link

PEG_A_CLKRQ#/GPIO47

100MHz

CLOCKS

20MHz

1

100MHz

96MHz

100MHz

14.31818MHz

33MHz

CLKIN_PCILOOPBACK

CLKOUTFLEX0/GPIO64

CLKOUTFLEX1/GPIO65

CLKOUTFLEX2/GPIO66

CLKOUTFLEX3/GPIO67

FLEX CLOCKS

SMBALERT#/GPIO11

SMBCLK

SMBDATA

SML0ALERT#/GPIO60

SML0CLK

SML0DATA

SML1CLK/GPIO58

SML1DATA/GPIO75

CL_CLK1

CL_DATA1

CL_RST1#

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKOUT_DP_N CLKOUT_DP_P

CLKIN_DMI_N

CLKIN_DMI_P

CLKIN_GND1_N CLKIN_GND1_P

CLKIN_DOT_96N

CLKIN_DOT_96P

CLKIN_SATA_N

CLKIN_SATA_P

REFCLK14IN

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

E12

H14

C9

DRAMRST_CNTRL_PCH

A12

SML0_CLK

C8

SML0_DAT

G12

SML1ALERT#

C13

SML1_CLK

E14

SML1_DAT

M16

M7

T11

P10

CLK_REQ_PEG_A#

M10

CLK_PCIE_PEG#_PCH_L

AB37

CLK_PCIE_PEG_PCH_L

AB38

AV22 AU22

CLK_DP_N

AM12

CLK_DP_P

AM13

CLK_BUF_EXP_N

BF18

CLK_BUF_EXP_P

BE18

CLK_BUF_CPYCLK_N

BJ30

CLK_BUF_CPYCLK_P

BG30

CLK_BUF_DOT96_N

G24

CLK_BUF_DOT96_P

E24

CLK_BUF_CKSSCD_N

AK7

CLK_BUF_CKSSCD_P

AK5

CLK_BUF_REF14

K45

H45

XTAL25_IN

V47

XTAL25_OUT

V49

XCLK_COMP

Y47

DGPU_EDID_SELECT#

K43

CLK_OUT1

F47

CLK_OUT2

H47

DGPU_PRSNT#

K49

EXT_SCI#

SCL_3A

SDA_3A

3

T2121T2121

1

SP2114 R0402SP2114 R0402

1 2

SP2115 R0402SP2115 R0402

1 2

SP2116 R0402SP2116 R0402

1 2

R2106 90.9OhmR2106 90.9Ohm

1 2

1

T2122T2122

T2141T2141

T2139T2139

T2140T2140

EXT_SCI# 30

SCL_3A 28

SDA_3A 28

DRAMRST_CNTRL_PCH 5,9

T2133T2133

1

T2134T2134

1

SML1_CLK 28

SML1_DAT 28

T2135T2135

1

T2136T2136

1

T2137T2137

1

CLKREQ_PEG# 70

CLK_PCIE_PEG#_PCH 70 CLK_PCIE_PEG_PCH 70

CLK_EXP_N 4 CLK_EXP_P 4

CLK_DP_N 4 CLK_DP_P 4

CLK_PCI_FB 24

+VCCDIFFCLKN

+VTT_PCH_ORG

+3VSUS_ORG

1 2

2

+3VS

+3VS 4,16, 17,20,22,23,24,25,26,27,28,30,37,38,39,40,41,47,48,49,53,55,60,63,66,69,91,92

+VTT_PCH_ORG 22,26,27

+3VSUS_ORG 20,22,24,25,27

CLK_BUF_CPYCLK_N CLK_BUF_CPYCLK_P

CLK_BUF_EXP_N CLK_BUF_EXP_P CLK_BUF_DOT96_N CLK_BUF_DOT96_P CLK_BUF_CKSSCD_N CLK_BUF_CKSSCD_P

CLK_BUF_REF14

EXT_SCI#

SCL_3A

SDA_3A

DRAMRST_CNTRL_PCH

SML0_CLK

SML0_DAT

SML1_CLK

SML1_DAT

SML1ALERT#

DGPU_EDID_SELECT#

DGPU_PRSNT#

PCH CLKREQ Setting: Not connected to device.

R1.0 0118

CLK_REQ6_LAN#

CLK_REQ0#

CLK_REQ3#

R1.0 CLK_REQ3# is change to +3VSUS 0609

GND

CLK_REQ4#

CLK_REQ5#

CLK_REQ7#

GND

CLK_REQ_PEG_B#

CLK_REQ_PEG_A#

GND

Connected to device.

CLK_REQ2_WLAN#

CLK_REQ1#

R21421MOhm R21421MOhm

1 2

R0402

R0402 SP2111

SP2111

XTAL25_OUT_C

C2101

1 2

10PF/50V

4

2

X2103

X2103 25MHZ

25MHZ

1 3

C2102

1 2

10PF/50V

1

RN2108B

10KOhm

10KOhm 10KOhm

10KOhm

10KOhm 10KOhm

10KOhm

1 2

2.2KOhm

1 2

RN2108B RN2108A

RN2108A

RN2109A

RN2109A RN2109B

RN2109B RN2110A

RN2110A RN2110B

RN2110B RN2111B

RN2111B RN2111A

RN2111A

34

12

RN2104B

RN2104A

RN2105B

RN2105A

3 4 1 2

1 2 3 4 1 2 3 4 3 4 1 2

R2116 10KOhmR2116 10KOhm

CLOCK TERMINATION for FCIM Default power-on mode is ICC.

R2117 10KOhmR2117 10KOhm

RN2103B 2.2KOhmRN2103B 2.2KOhm

RN2103A 2.2KOhmRN2103A 2.2KOhm

R2120 1KOhmR2120 1KOhm

3 4

1 2

3 4

1 2

R2125 10KOhmR2125 10KOhm

R2144 10KOhm@R2144 10KOhm@

R2126 10KOhm/UMAR2126 10KOhm/UMA

R2134 10KOhm/DGPUR2134 10KOhm/ DGPU

R2149 10KOhmR2149 10KOhm

R2154 10KOhmR2154 10KOhm

R2156 10KOhm@R2156 10KOhm@

R2157 10KOhmR2157 10KOhm

R2158 10KOhmR2158 10KOhm

R2159 10KOhmR2159 10KOhm

R2160 10KOhmR2160 10KOhm

R2161 10KOhmR2161 10KOhm

R2133 10KOhm@R2133 10KOhm@

R2155 10KOhm@R2155 10KOhm@

GND

+3VSUS_ORG

+3VS

GND

+3VSUS_ORG

+3VS

CLK_REQ4#

CLK_REQ6_LAN#

CLK_REQ2_WLAN#

CLK_REQ3#

A A

5

4

3

2

CLK_REQ1#

R2145 10KOhm@R2145 10KOhm@

1 2

R2143 10KOhm@R2143 10KOhm@

1 2

R2138 10KOhmR2138 10KOhm

1 2

R2162 10KOhmR2162 10KOhm

1 2

R2166 10KOhmR2166 10KOhm

1 2

GND

Title :

PCH(2)_PCIE,CLK,SMB,PEG

Wing_Cheng

Engineer:

PEGATRON COMPUTER INC

Size Project N ame

C

Date: Sheet of

Date: Sheet

Engineer:

BA52HR/CR

1

Wing_Cheng

21 94Friday, February 03, 2012

Rev

1.0

of

5

DMI_RXN03 DMI_RXN13 DMI_RXN23 DMI_RXN33

DMI_RXP03 DMI_RXP13 DMI_RXP23

D D

C C

PM_RSMRST# has pull down 10k ohm in EC

DMI_RXP33

DMI_TXN03 DMI_TXN13 DMI_TXN23 DMI_TXN33

DMI_TXP03 DMI_TXP13 DMI_TXP23 DMI_TXP33

+VTT_PCH_ORG

GND

SUS_PWR_ACK_R

T2208T2208

SUSACK# SUSACK#_RSUSACK#_R

1

+3VS

PM_PWROK30,92

PM_DRAM_PWRGD4

PM_RSMRST#30

ME_SUSPWRDNACK30

PM_PWRBTN#30

ME_AC_PRESENT30

T2201T2201

T2202T2202

R2201 49.9Ohm1%R2201 49.9Ohm1%

R2202 750Ohm1%R2202 750Ohm1%

SP2216 R0402SP2216 R0402 R2203 0Ohm@R 2203 0Ohm@

R2205 10KOhmR2205 10KOhm

SYS_PWROK SYS_PWROK_R

SP2217 R0402SP2217 R0402

R1.0

SP2212 R0402SP2212 R0402

SP2221 R0402SP2221 R0402

SP2213 R0402SP2213 R0402

SP2218 R0402SP2218 R0402

SP2214 R0402SP2214 R0402

SP2219 R0402SP2219 R0402

1

1 2

4

U2001C

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_COMP_R

12

RBIAS_CPY

12

SUSACK#_RSUSACK#_R

12

D22011.2V/0.1A @ D22011.2V/0.1A @

PM_SYSRST#_RPM_SYSRST#_R

PM_PCH_PWROK_R

PM_APWROK_R

PM_RSMRST_R

SUS_PWR_ACK_R

AC_PRESENT_R

BATLOW#

RI#

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN#/SUSPWRDNACK/GPIO30

E20

PWRBTN#

H20

ACPRESENT/GPIO31

E10

BATLOW#/GPIO72

A10

RI#

02V000000001

COUGAR_POINT_ES1

DMI

System Power Management

3

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6

FDI

FDI_RXP7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

CLKRUN#/GPIO32

SUS_STAT#/GPIO61

SUSCLK/GPIO62

SLP_S5#/GPIO63

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

SLP_LAN#/GPIO29

BJ14 AY14 BE14 BH13 BC12 BJ12 BG10 BG9

BG14 BB14 BF14 BG13 BE12 BG12 BJ10 BH9

AW16

AV12

BC10

AV14

BB10

A18

E22

B9

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

R1.0 0121

FDI_INT_R

FDI_FSYNC0_R

FDI_FSYNC1_R

FDI_LSYNC0_R

FDI_LSYNC1_R

DSWODVREN

PCH_DPROK

SUS_STAT

SUS_CLK

SLP_S5#

SLP_S4#_R

SLP_S3#_R

ME_PM_SLP_A#_R

SLP_SUS#_R

ME_PM_SLP_LAN#_R

SP2201 R0402SP2201 R0402

1 2

SP2202 R0402SP2202 R0402

1 2

SP2203 R0402SP2203 R0402

1 2

SP2204 R0402SP2204 R0402

1 2

SP2205 R0402SP2205 R0402

1 2

R2215 330KOhm@R2215 330KOhm@

1 2

R2214 330KOhmR2214 330KOhm

1 2

SP2220 R0402SP2220 R0402

1 2

T2206T2206

1

Remove SUSCLK signal for TPM 0906

SP2206 R0402SP2206 R0402

1 2

SP2207 R0402SP2207 R0402

1 2

R2216 0Ohm@R 2216 0Ohm@

R2217

R2218 0Ohm@R 2218 0Ohm@

12

0Ohm@

12

R1.0 cut trace. Joyoung 0614

GND

PM_RSMRST_R

T2205T2205

1

T2204T2204

1

2

+VTT_PCH_ORG

FDI_TXN0 3 FDI_TXN1 3 FDI_TXN2 3 FDI_TXN3 3 FDI_TXN4 3 FDI_TXN5 3 FDI_TXN6 3 FDI_TXN7 3

FDI_TXP0 3 FDI_TXP1 3 FDI_TXP2 3 FDI_TXP3 3 FDI_TXP4 3 FDI_TXP5 3 FDI_TXP6 3 FDI_TXP7 3

FDI_INT 3

FDI_FSYNC0 3

FDI_FSYNC1 3

FDI_LSYNC0 3

FDI_LSYNC1 3

DSWODVREN - On Die DSW VR Enable HIGH - Enabled(DEFAULT) ; LOW-Disabled

+VCC_RTC

PCIE_WAKE# 33,51,53

PM_CLKRUN# 30

+3VSUS_ORG

+VCC_RTC

+3VSUS

+5VSUS

+12VSUS

+3VSUS_ORG 20,21,24,25,27

+3VS

+3VS 4,16,17,20,21,23,24,25,26,27,28,30,37,38,39,40,41,47,48,49,53,55,60,63, 66,69,91,92

+VTT_PCH_ORG 26,27

+3VA

+3VA 20,27,30,48,63,65,81,88,93

+VCC_RTC 20,27

+3VSUS 4,24,27,28,30,33,65,81,85,92

+5VSUS 27,30,60,61,63,65,66,82,83,84,85,91

+12VSUS 28,60,81,91

R1.1 Remove SUS_CLK signal 0809

R1.0 delete SP2215 for unuse. Joyoung 0617

PM_SUSC# 30

PM_SUSB# 30

R1.0 0110

SLP_SUS# 30

H_PM_SYNC 4

ME_PM_SLP_LAN# 30

R1.0 0121

i-AMT

1

ME_PM_SLP_A# 30

i-AMT

SYS_PWROK for PCH

R2204 0Ohm@R 2204 0Ohm@

B B

DELAY_VR_AND_ALL_SYS92

A A

SUSB_EC#24,30,63,91,92

PM_SUSB#

5

PM_PWROK

SP2211 R0402SP2211 R0402

1 2

R2241 0Ohm

12

@

R2230

10KOhm

R2206 0OhmR2206 0Ohm

12

@

Q2203A

UM6K1N

@

2

GND GND

U2201

A

1

B

2

3 4

GND

Vcc=2~5.5

@

12

R2232

R2232 10KOhm

10KOhm

@

61

12

+3VSUS

5

VCC

Q2203B

UM6K1N

SYS_PWROK

+3VSUS_ORG

RI#

R2223 10KOhmR2223 10KOhm

1 2

+12VSUS+3VSUS +5VSUS

5%

R2231

R2231 100KOhm

100KOhm

@

1 2

PS_S3CNTRL_1.5V 7

34

@

5

4

R1.0 0120

PM_CLKRUN#

PM_PWROK

R2220 10KOhmR2220 10KOhm

1 2

R2221 10KOhmR2221 10KOhm

1 2

3

+3VS

GND

BATLOW#

R1.0 0120

PCIE_WAKE#

ME_PM_SLP_A#_R

ME_SUSPWRDNACK

ME_AC_PRESENT

ME_PM_SLP_LAN#_R

R2224 10KOhmR2224 10KOhm

R2225 1KOhmR2225 1KOhm

R2226 10KOhm@R2226 10KOhm@

R2227 10KOhmR2227 10KOhm

R2228 10KOhmR2228 10KOhm

R2229 10KOhm@R2229 10KOhm@

2

1 2

Title :

PCH(3)_FDI,DMI,SYS PWR

Wing_Cheng

Engineer:

PEGATRON COMPUTER INC

Size Project N ame

C

Date: Sheet of

Engineer:

BA52HR/CR

1

Wing_Cheng

22 94Friday, February 03, 2012

Rev

1.0

Y

12

5

+3VS

+3VS 4,16, 17,20,21,22,24,25,26,27,28,30,37,38,39,40,41,47,48,49,53,55,60,63,66,69,91,92

L_CTRL_CLK

L_CTRL_DATA

D D

C C

DDC2BC_PCH

DDC2BD_PCH

Frank 0506 Pull up 2.2k ohm in DDC bus for CRT and LVDS .

Frank 0426 modify CR T net name.

DAC_B_PCH38 DAC_G_PCH38 DAC_R_PCH38

CRT_B_PCH CRT_G_PCH CRT_R_PCH

1 2

2.2KOhm

3 4

2.2KOhm

1 2

2.2KOhm

3 4

2.2KOhm

JP2301 SHORT _PINJP2301 SHORT _PIN

50 ohm 50 ohm 50 ohm

Close to CPU

+3VS

RN2301A

RN2301B

RN2303A

RN2303B

12

JP2302 SHORT _PINJP2302 SHORT _PIN

LVDS_DDCDAT_PCH37

R1.0 0119 Use eDP panel ,L_DDC_DADA is NC Un mount R2307

12

JP2303 SHORT_PINJP2303 SHOR T_PIN

12

4

R1.0 Direct link. Joyoung 0614

37.5 ohm

12

/UMA

/UMA GND

R2306

150Ohm

/UMA

12

R2304

150Ohm

/UMA

R2305

150Ohm

3

U2001D

SP2301 R0402SP2301 R0402

LCD_BACKEN_PCH37 LCD_VDD_EN_PCH37

LCD_BL_PWM_PCH37

LVDS_DDCCLK_PCH37

T2301T2301 T2302T2302

LVDSA_LCLKN_PCH37 LVDSA_LCLKP_PCH37

LVDSA_L0N_PCH37 LVDSA_L1N_PCH37 LVDSA_L2N_PCH37

LVDSA_L0P_PCH37 LVDSA_L1P_PCH37 LVDSA_L2P_PCH37

LVDSB_LCLKN_PCH37 LVDSB_LCLKP_PCH37

LVDSB_L0N_PCH37 LVDSB_L1N_PCH37 LVDSB_L2N_PCH37

LVDSB_L0P_PCH37 LVDSB_L1P_PCH37 LVDSB_L2P_PCH37

DDC2BD_PCH38

DAC_HSYNC_PCH38 DAC_VSYNC_PCH38

GND

DDC2BC_PCH38

GND

1 2

SP2302 R0402SP2302 R0402

1 2

L_CTRL_CLK

1

L_CTRL_DATA

1

R2301 2.37KOhmR2301 2.37KOhm R2302 0Ohm@R 2302 0Ohm@

SP2303 R0402SP2303 R0402

12 12

1 2

B_PCH G_PCH R_PCH

SP2304 R0402SP2304 R0402

1 2

SP2305 R0402SP2305 R0402

1 2

R2303 1KOhm0.5%R2303 1KOhm0.5%

12

U2001D

J47

L_BKLTEN

M45

L_VDD_EN

P45

L_BKLTCTL

T40

L_DDC_CLK

K47

L_DDC_DATA

T45

L_CTRL_CLK

P39

L_CTRL_DATA

AF37

LVD_IBG

AF36

LVD_VBG

AE48

LVD_VREFH

AE47

LVD_VREFL

AK39

LVDSA_CLK#

AK40

LVDSA_CLK

AN48

LVDSA_DATA#0

AM47

LVDSA_DATA#1

AK47

LVDSA_DATA#2

AJ48

LVDSA_DATA#3

AN47

LVDSA_DATA0

AM49

LVDSA_DATA1

AK49

LVDSA_DATA2

AJ47

LVDSA_DATA3

AF40

LVDSB_CLK#

AF39

LVDSB_CLK

AH45

LVDSB_DATA#0

AH47

LVDSB_DATA#1

AF49

LVDSB_DATA#2

AF45

LVDSB_DATA#3

AH43

LVDSB_DATA0

AH49

LVDSB_DATA1

AF47

LVDSB_DATA2

AF43

LVDSB_DATA3

N48

CRT_BLUE

P49

CRT_GREEN

T49

CRT_RED

T39

CRT_DDC_CLK

M40

CRT_DDC_DATA

M47

CRT_HSYNC

M49

CRT_VSYNC

T43

DAC_IREF

T42

CRT_IRTN

COUGAR_POINT_ES1

02V000000001

SDVO_STALLN SDVO_STALLP

SDVO_INTN SDVO_INTP

DDPB_AUXN DDPB_AUXP

DDPB_HPD

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_AUXN DDPC_AUXP

DDPC_HPD

DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P

DDPD_AUXN DDPD_AUXP

DDPD_HPD

DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

AP43 AP45

AM42 AM40

AP39 AP40

P38 M39

AT49 AT47 AT40

AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49

P46 P42

AP47 AP49 AT38

AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49

M43 M36

AT45 AT43 BH41

BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42

SDVO_TVCLKINN SDVO_TVCLKINP

SDVO_CTRLCLK

SDVO_CTRLDATA

LVDS

DDPC_CTRLCLK

DDPC_CTRLDATA

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

CRT

DDPD_AUXN DDPD_AUXP

2

HDMI_DDC_CLK_PCH 39 HDMI_DDC_DATA_PCH 39

T2303T2303

1

T2304T2304

1

HDMI_HPD_PCH 39

HDMI_TXN2_PCH 39 HDMI_TXP2_PCH 39 HDMI_TXN1_PCH 39 HDMI_TXP1_PCH 39 HDMI_TXN0_PCH 39 HDMI_TXP0_PCH 39 HDMI_CLKN_PCH 39 HDMI_CLKP_PCH 39

1

SDVO

Display Port BDisplay Port C

Display Port D

CRT Disable: (For discrete graphic)

1. NC:

CRT_RED,CRT_GREEN,CRT_BLUE

CRT_HSYCN,CRT_VSYNC

2. 1-kΩ ±0.5% pull-down to GND:

DAC_IREF

3. Connected to GND:

B B

A A

CRT_ITRN

4. Connect to +V3.3:

VCCADAC

5

DisPlay Port Disable: (For discrete graphic)

1. NC:

ALL

4

LVDS Disable: (For discrete graphic)

1. NC:

L

VDSA_DATA [3:0], LVDSA_DATA# [3:0],

LVDSA_CLK, LVDSA_CLK#, LVDSB_DATA [3:0],

LVDSB_DATA# [3:0], LVDSB_CLK, LVDSB_CLK#

L_VDD_EN, L_BKLTEN, L_BKLTCTL, LVD_VREFH

LVD_VREFL, LVD_IBG, LVD_VBG

2. Connected to GND:

VccALVDS,VccTX_LVDS

3

Title :

PCH(4)_DP,LVDS,CRT

Wing_Cheng

Engineer:

PEGATRON COMPUTER INC

Size Project N ame

C

Date: Sheet

Date: Sheet of

2

Date: Sheet of

Engineer:

BA52HR/CR

1

Wing_Cheng

of

23 94Friday, February 03, 2012

Rev

1.0

5

+3VS

12

R2430

R2430 10KOhm

10KOhm

@

U2402

R2413 0OhmR2413 0Ohm

SATA_ODD_DA#

EXTTS_SNI_DRV1_PCH

DGPU_SELECT# INT_PIRQA#

MPC_PWR_CTRL#

INT_PIRQB# INT_PIRQC# INT_PIRQD#

DGPU_PWR_EN

5

A

VCC

B

4

GND3Y

SN74LVC1G08DCKR

@

1 2

10KOhm

10KOhm 10KOhm

10KOhm

R242010KOhm @ R242010KOhm @

12

R242110KOhm R242110KOhm

12

R242210KOhm /DGPU R242210KOhm /DGPU

12

R24231KOhm

12

1 2

RN2403A

RN2403B

RN2403B RN2403C

RN2403C RN2403D

RN2403D

12 34 56 78

+3VSUS

DGPU_PWM_SELECT#

EXTTS_SNI_DRV0_PCH

DGPU_HOLD_RST#_R

RN2407A

RN2407A RN2407B

RN2407B RN2407C

RN2407C RN2407D

RN2407D

R2414 0Ohm@R 2414 0Ohm@

1 2 3 4 5 6 7 8

10KOhm

10KOhm 10KOhm

10KOhm

/DGPU

VGA_PWRON91

D D

C C

+3VS

B B

R2415 0Ohm@R 2415 0Ohm@

1 2

GND

1 2

SUSB_EC# 22,30,63,91,92

DGPU_HOLD_RST#70

DGPU_PWR_EN63

4

DGPU_PWR_EN

SATA_ODD_DA#60

PLT_RST#4

CLK_PCI_FB21

CLK_KBCPCI_PCH30

CLK_DEBUG65

DGPU_PWR_EN is active high

USB3_RX1_N61 USB3_RX2_N61

USB3_RX1_P61 USB3_RX2_P61

USB3_TX1_N61 USB3_TX2_N61

USB3_TX1_P61 USB3_TX2_P61

DGPU_PWR_EN

T2401T2401

3

U2001E

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

TP6

AH37

TP7

AK43

TP8

AK45

TP9

C18

TP10

N30

TP11

H3

TP12

AH12

TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18

AB46

TP19

AB45

TP20

RSVD

33MHz

RSVD

PCI

B21

TP21

M20

TP22

AY16

TP23

BG46

TP24

BE28

TP25

BC30

TP26

BE32

TP27

BJ32

TP28

BC28

TP29

BE30

TP30

BF32

TP31

BG32

TP32

AV26

TP33

BB26

TP34

AU28

TP35

AY30

TP36

AU26

TP37

AY26

TP38

AV28

TP39

AW30

TP40

INT_PIRQA# INT_PIRQB# INT_PIRQC# INT_PIRQD#

SP2403 R0402SP2403 R0402

1 2

T2406T2406

T2404T2404

1

R2405 1KOhm@R2405 1KOhm@

1 2

T2402T2402

T2405T2405

C2403

C2403 10PF/50V

10PF/50V

@

1 2

1

GND

1

GND

DGPU_HOLD_RST#_R DGPU_SELECT#

1

BBS_BIT1 DGPU_PWM_SELECT# STP_A16OVR

MPC_PWR_CTRL# SATA_ODD_DA# EXTTS_SNI_DRV0_PCH EXTTS_SNI_DRV1_PCH

PCI_PME#

PLT_RST#

A15:R2409=100ohm for EA .

CLKOUT_PCI0_R CLK_PCI_FB_R

R240922Ohm R240922Ohm

12

CLK_KBCPCI_PCH_R

R241022Ohm R241022Ohm

12

CLK_DEBUG_R

R241122Ohm R241122Ohm

12

CLK_DBG_R

R1.0 0103

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

C46

REQ1#/GPIO50

C44

REQ2#/GPIO52

E40

REQ3#/GPIO54

D47

GNT1#/GPIO51

E42

GNT2#/GPIO53

F46

GNT3#/GPIO55

COUGAR_POINT_ES1

G42

PIRQE#/GPIO2

G40

PIRQF#/GPIO3

C42

PIRQG#/GPIO4

D44

PIRQH#/GPIO5

K10

PME#

C6

PLTRST#

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4

02V000000001

USB

RSVD1 RSVD2 RSVD3 RSVD4

RSVD5 RSVD6

RSVD7 RSVD8

RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22

RSVD23 RSVD24

RSVD25

RSVD26 RSVD27

RSVD28 RSVD29

USBP0N

USBP0P

USBP1N

USBP1P

USBP2N

USBP2P

USBP3N

USBP3P

USBP4N

USBP4P

USBP5N

USBP5P

USBP6N

USBP6P

USBP7N

USBP7P

USBP8N

USBP8P

USBP9N

USBP9P

USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P

USBRBIAS#

USBRBIAS

OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43

OC5#/GPIO9 OC6#/GPIO10 OC7#/GPIO14

AY7 AV7 AU3 BG4

AT10 BC8

AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6

AV5 AV10

AT8

AY5 BA2

AT12 BF3

C24 A24 C25 B25 C26 A26 K28 H28 E28 D28 C28 A28 C29 B29 N28 M28 L30 K30 G30 E30 C30 A30 L32 K32 G32 E32 C32 A32

C33

B33

A14 K20 B17 C16 L16 A16 D14 C14

NV_RCOMP

USB_PN0 USB_PP0 USB_PN1 USB_PP1

USB_PN3 USB_PP3 USB_PN4 USB_PP4 USB_PN5 USB_PP5

USB_PN7 USB_PP7 USB_PN8 USB_PP8 USB_PN9 USB_PP9 USB_PN10 USB_PP10 USB_PN11 USB_PP11 USB_PN12 USB_PP12

USB_BIAS

OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43 OC5#/GPIO9 OC6#/GPIO10 OC7#/GPIO14

2

+3VSUS

+3VSUS_ORG

+12VS

+1.8VS

R2427 32.4Ohm1%

1 1

R2424 22.6Ohm1%R2424 22.6Ohm1%

+3VSUS 4,22,27,28,30,33,65,81,85,92

+3VS

+3VS 4,16, 17,20,21,22,23,25,26,27,28,30,37,38,39,40,41,47,48,49,53,55,60,63,66,69,91,92

+3V

+3V 4, 37,51,63,65,91

+3VSUS_ORG 20,21,22,25,27

+12VS 28,39,41,91

+1.8VS 7,25,26,63,84

1 2

T2426T2426 T2427T2427

T2422T2422 T2423T2423

T2424T2424 T2425T2425

T2416T2416 T2417T2417

1 2

@

GND

USB_PN0 61 USB_PP0 61 USB_PN1 61 USB_PP1 61

USB_PN3 61 USB_PP3 61

USB_PN5 55 USB_PP5 55

USB_PN8 37 USB_PP8 37 USB_PN9 61 USB_PP9 61

USB_PN11 53 USB_PP11 53

GND

RN2402A

1 2

10KOhm

RN2402D

7 8

10KOhm

RN2401C

5 6

10KOhm

RN2401D

7 8

10KOhm

RN2402C

5 6

10KOhm

RN2401A

1 2

10KOhm

RN2401B

3 4

10KOhm

RN2402B

3 4

10KOhm

SP2401 R0402SP2401 R0402

1 2

SP2402 R0402SP2402 R0402

1 2

Place within 500 mils of PCH

USB_OC0# 61

USB_OC1# 61

+3VSUS_ORG

1

USB PORT

USB P00

USB P01

USB P02

USB P03

USB P04

USB P05

USB P07

USB P08

USB P09

USB P10

USB P11

USB P12

USB P13

External 2.0/3.0

External 2.0

WiFi

Camera

External 2.0

BT

PCIE/mSATA

+3V

BBS_BIT0,BBS_BIT1 : Boot BIOS Strap

Boot BIOS Strap

BBS_BIT0BBS_BIT1 Boot BIOS Location

0 0

0 1

1 0

1 1 SPI

A A

Sampled on rising edge of PWROK.

BBS_BIT020

BBS_BIT0

BBS_BIT1

5

R2417 1KOhm@R2417 1KOhm@

R2418 1KOhm@R2418 1KOhm@

1 2

LPC

Reserved (NAND)

Reserved

(PCH)

GND

STP_A16OVR: A16 swap override Strap/ Top-Block swap override jumper

Low=Enabled A16 swap override/ Top-Block swap override

High=Default

STP_A16OVR

R2419 1KOhm@R2419 1KOhm@

1 2

GND

4

U2401

@U2401

@

1

5

A

PLT_RST#

3

2

B GND3Y

SN74LVC1G08DCKR

GND

1 2

R2425 0OhmR2425 0Ohm

VCC

4

12

GND

R2426

R2426 10KOhm

10KOhm

2

BUF_PLT_RST# 30,33,40,47,51,53,55,70

Title :

PCH(5)_PCI,NVRAM,USB

Wing_Cheng

Engineer:

PEGATRON COMPUTER INC

Size Project N ame

C

Date: Sheet of

Date: Sheet

Engineer:

BA52HR/CR

1

Wing_Cheng

24 94Friday, February 03, 2012

Rev

1.0

of

5

PCB_ID0PCB_ID1

A

B

D D

C C

B B

A A

C

MP

L L

HL

H

+3VS

12

R2525

@

10KOhm

12

R2526

10KOhm

@

GND

Frank 0502 Modify PCB_ID

EXT_SMI#

USB30_EXT_SMI#

PM_LANPHY_EN

PCH_GPIO24

R1.0 mount R2541 for LAN_LPWR 0615

RCIN# has pull high at EC side

DGPU_HPD_INTR#

PCH_ALERT#

DGPU_PWROK

eDP_ON#

Unused GPIO

GSENSOR_INT1_PCH

GPIO1

STP_PCI#

SATA_DET#4

GPIO27

#438390 Checklist

R1.0 REMOVE DGPU_PWROK schematic 0602

DGPU_PWROK

R2540 10KOhm@R2540 10KOhm@

L

+3VS

12

R2527

@

10KOhm

12

R2528

10KOhm

@

GND

R2529 1KOhmR2529 1KOhm

1 2

R2531 10KOhmR 2531 10KOhm

R2538 10KOhm/niAMTR2538 10KOhm/niAMT

R2541 10KOhmR2541 10KOhm

R2534 10KOhmR2534 10KOhm

R2535 10KOhmR 2535 10KOhm

R2539 10KOhmR2539 10KOhm

R2547 10KOhmR2547 10KOhm

R2536 10KOhmR2536 10KOhm

R2545 10KOhm@R2545 10KOhm@

R2537 10KOhmR 2537 10KOhm

R2546 10KOhmR2546 10KOhm

R2548 10KOhmR2548 10KOhm

12

PCB_ID0

PCB_ID1 PCH_GPIO24

12

R1.0

Add PCH_GPIO0_R.

Delete ICC_EN#.

Add PM_LANPHY_EN

Add HOST_ALERT#1_R.

Add SATA_DET#4_R.

DGPU_PWROK has 100 ms software delay , no hardware delay requirement

Reserve PCH_GPIO24

Add PLL_ODVR_EN.

Add PSATA_PWR_EN#1_R.

Add SATA_ODD_PRSNT#_R and FDI_OVRVLTG.

Add CRIT_TEMP_REP#_R.

+3VSUS_ORG

R1.0 0126 Intel Comments

R1.0 0120

+3VS

R1.0 0119

+3VS GND

GND

+3VS

GND

4

GSENSOR_INT1_PCH69

eDP_ON#37

USB30_EXT_SMI#51

WLAN_RST#_PCH53,55

EXT_SMI#30,65

DGPU_PWROK87,91,92

WLAN_LED66

T2509T2509

SATA_ODD_PRSNT#60

BT_ON_PCH55

PCH_ALERT#30

T2508T2508

WLAN_ON53,55

Q2501B

Q2501B UM6K1N

UM6K1N

@

R2518 1KOhm1%

1 2

@

FDI TERMINATION VOLTAGE OVERRIDE

- GPIO37 (FDI_OVRVLTG) LOW - TX, RX terminated to same voltage (DC Couplong Mode) DEFAULT

R2520 200KOhm1%R2520 200KOhm1%

1 2

DMI TERMINATION VOLTAGE OVERRIDE

- GPIO36 (SATA_ODD_PRSNT#) LOW - TX, RX terminated to same voltage (DC Couplong Mode) DEFAULT

WLAN_ON_R

R1.0 Change net name for single net. Joyoung 0621

FDI_OVRVLTG

SATA_ODD_PRSNT#_R

R2521 1KOhm@R2521 1KOhm@

1 2

R2501 100Ohm@R 2501 100Ohm@

1 2

eDP_ON#

SP2502 R0402SP2502 R0402

1 2

SP2501 R0402SP2501 R0402

1 2

DGPU_PWROK

LAN_LPWR

SP2504 R0402SP2504 R0402

SP2503 R0402SP2503 R0402

1 2

12

R2549

R2550

R2550 10KOhm

10KOhm

5

61

Q2501A

Q2501A UM6K1N

UM6K1N

1 2

PLL ON DIE VR ENABLE HIGH - DISABLED (DEFAULT)

GND

LOW - ENABLED

1 2

T2510T2510

@

1

SP2505 R0402SP2505 R0402

1

+3VS +3VS

12

@

34

@

GND GND

R2519 100KOhmR2519 100KOhm

2

T2503T2503

1

CRIT_TEMP_REP#_R

WLAN_ON_R

3

PCH_GPIO0_R

GPIO1

DGPU_HPD_INTR#

1

USB30_EXT_SMI#

PM_LANPHY_EN

HOST_ALERT#1_R

SATA_DET#4

WLAN_LED

GPIO27

WLAN_ON_R

STP_PCI#

SATA_PWR_EN#1_R

SATA_ODD_PRSNT#_R

FDI_OVRVLTG

PCB_ID0

PCB_ID1

BT_LED

U2001F

T7

BMBUSY#/GPIO0

A42

TACH1/GPIO1

H36

TACH2/GPIO6

E38

TACH3/GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL/GPIO12

G2

GPIO15

U2

SATA4GP/GPIO16

D40

TACH0/GPIO17

T5

SCLOCK/GPIO22

E8

GPIO24/MEM_LED

E16

GPIO27

P8

GPIO28

K1

STP_PCI#/GPIO34

K4

GPIO35

V8

SATA2GP/GPIO36

M5

SATA3GP/GPIO37

N2

SLOAD/GPIO38

M3

SDATAOUT0/GPIO39

V13

SDATAOUT1/GPIO48

V3

SATA5GP/GPIO49

D6

GPIO57

A4

Vss_NCTF1

A44

Vss_NCTF2

A45

Vss_NCTF3

A46

Vss_NCTF4

A5

Vss_NCTF5

A6

Vss_NCTF6

B3

Vss_NCTF7

B47

Vss_NCTF8

BD1

Vss_NCTF9

BD49

Vss_NCTF10

BE1

Vss_NCTF11

BE49

Vss_NCTF12

BF1

Vss_NCTF13

BF49

Vss_NCTF14

COUGAR_POINT_ES1

GPIO

02V000000001

NCTF

TACH4/GPIO68

TACH5/GPIO69

TACH6/GPIO70

TACH7/GPIO71

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

INIT3_3V#

DF_TVS

CPU/MISC

TS_VSS1

TS_VSS2

TS_VSS3

TS_VSS4

NC_1

Vss_NCTF15

Vss_NCTF16

Vss_NCTF17

Vss_NCTF18

Vss_NCTF19

Vss_NCTF20

Vss_NCTF21

Vss_NCTF22

Vss_NCTF23

Vss_NCTF24

Vss_NCTF25

Vss_NCTF26

Vss_NCTF27

Vss_NCTF28

Vss_NCTF29

Vss_NCTF30

Vss_NCTF31

Vss_NCTF32

+3VSUS

+3VSUS_ORG

C40

B41

C41

A40

P4

AU16

P5

AY11

AY10

T14

AY1

AH8

AK11

AH10

AK10

P37

BG2

BG48

BH3

BH47

BJ4

BJ44

BJ45

BJ46

BJ5

BJ6

C2

C48

D1

D49

E1

E49

F1

F49

2

+3VS

+3VS 4,16,17,20,21,22,23,24,26,27,28,30,37,38,39,40,41,47,48,49,53,55,60,63, 66,69,91,92

+3VSUS 4,22,24,27,28,30,33,65,81,85,92

+3VSUS_ORG 20,21,22,24,27

R2511 1.5KOhm1%R2511 1.5KOhm1%

1 2

R2512 1.5KOhm1%R2512 1.5KOhm1%

1 2

R2513 1.5KOhm1%R2513 1.5KOhm1%

1 2

H_PECI_R

PM_THRMTRIP#

INIT3_3V#

NV_CLE

T2504T2504

1

R2502 1KOhmR2502 1KOhm

TS Signal Disable Guideline TS_VSS[1:4] should pull down to GND Design Guide 0.9 (436735)

GND

1 2

GND

+3VS

R25140Ohm @ R25140Ohm @

R2516390Ohm 1% R2516390Ohm 1%

R2517 56Ohm

R2503 2.2KOhmR2503 2.2KOhm

1 2

need close to EC

R251543Ohm R251543Ohm

@

1

H_THRMTRIP# 4,47

+VCCP

+1.8VS

H_PECI 4 H_PECI_EC 30

SATA_ODD_PWRGT 60

A20GATE 30

RCIN# 30

H_CPUPWRGD 4

H_SNB_IVB# 4

Title :

PCH(6)_CPU,GPIO,MISC

Wing_Cheng

Engineer:

PEGATRON COMPUTER INC

Size Project N ame

C

Date: Sheet of

5

4

3

2

Date: Sheet

Engineer:

BA52HR/CR

1

Wing_Cheng

of

25 94Friday, February 03, 2012

Rev

1.0

5

U2001H

H5

VSS0

AA17

VSS1

AA2

VSS2

AA3

VSS3

AA33

VSS4

AA34

VSS5

AB11

VSS6

AB14

VSS7

AB39

VSS8

AB4

VSS9

AB43

VSS10

AB5

VSS11

AB7

VSS12

AC19

VSS13

AC2

VSS14

D D

C C

AC21

VSS15

AC24

VSS16

AC33

VSS17

AC34

VSS18

AC48

VSS19

AD10

VSS20

AD11

VSS21

AD12

VSS22

AD13

VSS23

AD19

VSS24

AD24

VSS25

AD26

VSS26

AD27

VSS27

AD33

VSS28

AD34

VSS29

AD36

VSS30

AD37

VSS31

AD38

VSS32

AD39

VSS33

AD4

VSS34

AD40

VSS35

AD42

VSS36

AD43

VSS37

AD45

VSS38

AD46

VSS39

AD8

VSS40

AE2

VSS41

AE3

VSS42

AF10

VSS43

AF12

VSS44

AD14

VSS45

AD16

VSS46

AF16

VSS47

AF19

VSS48

AF24

VSS49

AF26

VSS50

AF27

VSS51

AF29

VSS52

AF31

VSS53

AF38

VSS54

AF4

VSS55

AF42

VSS56

AF46

VSS57

AF5

VSS58

AF7

VSS59

AF8

VSS60

AG19

VSS61

AG2

VSS62

AG31

VSS63

AG48

VSS64

AH11

VSS65

AH3

VSS66

AH36

VSS67

AH39

VSS68

AH40

VSS69

AH42

VSS70

AH46

VSS71

AH7

VSS72

AJ19

VSS73

AJ21

VSS74

AJ24

VSS75

AJ33

VSS76

AJ34

VSS77

AK12

VSS78

AK3

VSS79

COUGAR_POINT_ES1

02V000000001

GND GND

02V000000001

VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158

AK38 AK4 AK42 AK46 AK8 AL16 AL17 AL19 AL2 AL21 AL23 AL26 AL27 AL31 AL33 AL34 AL48 AM11 AM14 AM36 AM39 AM43 AM45 AM46 AM7 AN2 AN29 AN3 AN31 AP12 AP19 AP28 AP30 AP32 AP38 AP4 AP42 AP46 AP8 AR2 AR48 AT11 AT13 AT18 AT22 AT26 AT28 AT30 AT32 AT34 AT39 AT42 AT46 AT7 AU24 AU30 AV16 AV20 AV24 AV30 AV38 AV4 AV43 AV8 AW14 AW18 AW2 AW22 AW26 AW28 AW32 AW34 AW36 AW40 AW48 AV11 AY12 AY22 AY28

+VTT_PCH_ORG

+VTT_PCH_VCCIO

4

+VTT_PCH_VCC

+VTT_PCH_VCCIO

+VTT_PCH_ORG

+VTT_PCH_VCCIO

10UF/10V

+VTT_PCH_VCCAPLL_FDI

R2605 0Ohm@R 2605 0Ohm@

SP2606 R0402SP2606 R0402

12

+VTT_PCH_VCCDPLL_FDI

12

C2601

10UF/10V

GND

SP2604 R0402SP2604 R0402

L2601 1kOhm/100Mhz

+VTT_PCH_VCC_EXP

12

C2606

+3VS_VCC3_3

12

2 1

12

C2607

C2607 1UF/6.3V

1UF/6.3V

@

12

C2602

C2602 1UF/6.3V

1UF/6.3V

GND

+VTT_PCH_VCCDPLL_EXP

12

+VTT_PCH_VCCAPLL_EXP

R1.0 0126 Intel Comments

12

C2608

C2608 1UF/6.3V

1UF/6.3V

SP2605

R0402

+VCCIO_CPU_VCC_DMI

R1.0 0126 Intel Comments

12

C2623

@ C2623

@

C2603

C2603 1UF/6.3V

1UF/6.3V

@ C2609

@

12

GND

1UF/6.3V

GND

+VTT_PCH_VCCDPLL_EXP

3.709A/29=128mA

Total 29pin (EDS R2.1) Joyoung0614

12

C2605

C2605 10UF/10V

10UF/10V

@

GND

3.709A/29*12= 1.535A

Total 29pin (EDS R2.1) Joyoung0614

12

C2609

C2610

1UF/6.3V

GND

+3VS_VCCA3GBG

228mA/8=28.5mA

change to 228mA total 8pin (EDS R2.1)

12

Joyoung0613

C2611

0.1UF/16V

167mA/4=41.75mA

+VCCAFDI_VRM

3.709A/29=128mA

Total 29pin (EDS R2.1) Joyoung0613

42mA/2=21mA

3

U2001G

1.3A

AA23

VccCore1

AC23

VccCore2

AD21

VccCore3

AD23

VccCore4

AF21

VccCore5

AF23

VccCore6

AG21

VccCore7

AG23

VccCore8

AG24

VccCore9

AG26

VccCore10

AG27

VccCore11

AG29

VccCore12

AJ23

VccCore13

AJ26

VccCore14

AJ27

VccCore15

AJ29

VccCore16

AJ31

VccCore17

AN19

VccIO1

BJ22

VccAPLLEXP

AN16

VccIO2

AN17

VccIO3

AN21

VccIO4

AN26

VccIO5

AN27

VccIO6

AP21

VccIO7

AP23

VccIO8

AP24

VccIO9

AP26

VccIO10

AT24

VccIO11

AN33

VccIO12

AN34

VccIO13

BH29

Vcc3_3_1

AP16

Joyoung0613 change to 167mA total 4pin (EDS R2.1)

VccVRM1

BG6

VccAFDIPLL

AP17

VccIO14

AU20

VccDMI1

COUGAR_POINT_ES1

POWER

VccADAC

VssADAC

CRTLVDS

VccALVDS

VCC CORE

VCCIO

FDI

VssALVDS

VccTX_LVDS1

VccTX_LVDS2

VccTX_LVDS3

VccTX_LVDS4

Vcc3_3_2

Vcc3_3_3

VccVRM2

Joyoung0613 change to 167mA total 4pin (EDS R2.1)

DMI

VccClkDMI

VccDFTERM1

VccDFTERM2

VccDFTERM3

VccDFTERM4

DFT / SPI HVCMOS

02V000000001

2

1mA

U48

U47

GND

1mA

AK36

AK37

GND

AM37

AM38

40mA

AP36

(EDS R2.1) Joyoung0613

AP37

V33

228mA/8*2pin=57mA

V34

change to 228mA total 8pin (EDS R2.1) Joyoung0613

167mA/4=41.75mA

VccDMI2

VccSPI

AT16

AT20

AB36

(EDS R2.1) Joyoung0613

AG16

AG17

AJ16

AJ17

(EDS R2.1) Joyoung0614

V1

(EDS R2.1) Joyoung0613

42mA/2=21mA

75mA

20mA

R1.2

10mA

C2622

0.1UF/16V

+VCCAFDI_VRM

+VCCIO_CPU_VCC_DMI

12

GND

12

GND

12

GND

12

GND

+VCCA_DAC_1_2

12

C2613

0.01UF/50V

GND

R1.0 0225

12

C2615

0.01UF/50V

GND GND GND

+3VS_VCC_GIO

12

C2618

0.1UF/16V

GND

C2619

C2619 1UF/6.3V

1UF/6.3V

C2620

C2620 10UF/10V

10UF/10V

@

C2621

0.1UF/16V

SP2609 R0402SP2609 R0402

+VTT_PCH_ORG_VCCCLKDMI

+V_NVRAM_VCCPNAND +1.8VS

+3VM_VCCPSPI

2 1

R2614 0OhmR2614 0Ohm

SP2610 R0402SP2610 R0402

R2616 0Ohm@R 2616 0Ohm@

R2617 0OhmR2617 0Ohm

C2612

0.1UF/16V

GNDGND

+3VS_VCCA_LVD

+1.8VS_VCCTX_LVD

C2616

0.01UF/50V

SP2608 R0402SP2608 R0402

12

L26031kOhm/100Mhz @L26031kOhm/100Mhz @

12

C2614

C2614 22UF/6.3V

22UF/6.3V

C2617

C2617 22UF/6.3V

22UF/6.3V

@

+VTT_PCH_ORG

12

+VCCP

+3VS

+3VM_SPI

L2604

1kOhm/100Mhz

SP2607

1 2

R0402

+3VS_VCC3_3

1

21

+3VS

+1.8VS

L26021kOhm/100Mhz L26021kOhm/ 100Mhz

21

R1.0 0118

B B

+1.05VS +VTT_PCH_ORG

JP2601

4.56A=330mA+1.3A+2.925A

2

112

3MM_OPEN_5MIL

0614-Change JP(3MM_OPEN_5MIL)

JP2602

112

2MM_OPEN_5MIL

JP2603

112

2MM_OPEN_5MIL

R1.0 fellow everest 0614

JP2604

1MM_OPEN_M1M2

2

112

A A

5

2

+VTT_PCH_VCC

1.3A

+VTT_PCH_VCCIO

2.925A

+VTT_PCH_ORG

+1.5VS

4

SP2602

1 2

R0402

VCCVRAM use +1.5VS in mobile HAD_SYNC should pull high to +3VSUS

+VCCAFDI_VRM

160mA

3

+VTT_PCH_VCCIO

+VTT_PCH_ORG

+1.05VS

+1.5VS

+VCCAFDI_VRM

+3VS_VCC3_3

+3VM_SPI

+1.8VS

+VCCP

R1.0 Delete +VTT_PCH_VCC +VTT_PCH_VCCDPLL_EXP +VTT_PCH_VCCAPLL_EXP +VTT_PCH_VCCDPLL_FDI +VTT_PCH_VCCAPLL_FDI +3VS_VCCA3GBG +3VS_VCC_GIO +VCCA_DAC_1_2 +3VS_VCCA_LVDS +3VM_VCCPSPI +V_NVRAM_VCCPNAND +1.8VS_VCCTX_LVD +VCCIO_CPU_VCC_DMI +VTT_PCH_ORG_VCCCLKDMI

+VTT_PCH_VCCIO 20,27 +VTT_PCH_ORG 22,27 +1.05VS 27,63,80,82,87 +1.5VS 53,55,63,91 +VCCAFDI_VRM 27

+3VS

+3VS 4,16,17,20,21,22,23,24,25,27,28,30,37,38,39,40,41,47,48,49,53,55,60,63, 66,69,91,92 +3VS_VCC3_3 27 +3VM_SPI 28 +1.8VS 7,25,63,84 +VCCP 3,4, 6,7,25,27,37,47,63,82

Title :

PCH(7)_POWER,GND

Wing_Cheng

Engineer:

PEGATRON COMPUTER INC

Size Project N ame

C

Date: Sheet of

2

Date: Sheet of

Engineer:

BA52HR/CR

1

Wing_Cheng

26 94Friday, February 03, 2012

Rev

1.0

U2001I

AY4

VSS159

AY42

VSS160

AY46

VSS161

AY8

VSS162

B11

VSS163

B15

VSS164

B19

VSS165

B23

VSS166

B27

VSS167

B31

VSS168

B35

VSS169

B39

VSS170

B7

VSS171

F45

VSS172

BB12

VSS173

BB16

D D

C C

B B

A A

BB20 BB22 BB24 BB28 BB30 BB38

BB4 BB46 BC14 BC18

BC2 BC22 BC26 BC32 BC34 BC36 BC40 BC42 BC48 BD46

BD5 BE22 BE26 BE40 BF10 BF12 BF16 BF20 BF22 BF24 BF26 BF28

BD3 BF30 BF38 BF40

BF8 BG17 BG21 BG33 BG44

BG8 BH11 BH15 BH17 BH19

H10 BH27 BH31 BH33 BH35 BH39 BH43

BH7

D3 D12 D16 D18 D22 D24 D26 D30 D32 D34 D38 D42

D8 E18 E26 G18 G20 G26 G28 G36 G48 H12 H18 H22 H24 H26 H30 H32 H34

F3

COUGAR_POINT_ES1

+3VS_VCC3_3

R2701 0OhmR2701 0Ohm

L2701 1kOhm/ 100Mhz@ L2701 1kOhm/100Mhz@

VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233 VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258

02V000000001

1 2

5

H46

VSS259

K18

VSS260

K26

VSS261

K39

VSS262

K46

VSS263

K7

VSS264

L18

VSS265

L2

VSS266

L20

VSS267

L26

VSS268

L28

VSS269

L36

VSS270

L48

VSS271

M12

VSS272

P16

VSS273

M18

VSS274

M22

VSS275

M24

VSS276

M30

VSS277

M32

VSS278

M34

VSS279

M38

VSS280

M4

VSS281

M42

VSS282

M46

VSS283

M8

VSS284

N18

VSS285

P30

VSS286

N47

VSS287

P11

VSS288

P18

VSS289

T33

VSS290

P40

VSS291

P43

VSS292

P47

VSS293

P7

VSS294

R2

VSS295

R48

VSS296

T12

VSS297

T31

VSS298

T37

VSS299

T4

VSS300

W34

VSS301

T46

VSS302

T47

VSS303

T8

VSS304

V11

VSS305

V17

VSS306

V26

VSS307

V27

VSS308

V29

VSS309

V31

VSS310

V36

VSS311

V39

VSS312

V43

VSS313

V7

VSS314

W17

VSS315

W19

VSS316

W2

VSS317

W27

VSS318

W48

VSS319

Y12

VSS320

Y38

VSS321

Y4

VSS322

Y42

VSS323

Y46

VSS324

Y8

VSS325

BG29

VSS326

N24

VSS327

AJ3

VSS328

AD47

VSS329

B43

VSS330

BE10

VSS331

BG41

VSS332

G14

VSS333

H16

VSS334

T36

VSS335

BG22

VSS336

BG24

VSS337

C22

VSS338

AP13

VSS339

M14

VSS340

AP3

VSS341

AP1

VSS342

BE16

VSS343

BC16

VSS344

BG28

VSS345

BJ28

VSS346

21

5

12

C2701

10UF/10V

GND GND

GNDGND

+3VS_VCC_CLKF33

12

C2702

1UF/6.3V

+VTT_PCH_VCCIO

SP2716

1 2

R0402

+VTT_PCH_VCCA_A_DPL

+VTT_PCH_VCCA_B_DPL

+1.05VM_ORG

12

C2715

C2715 1UF/6.3V

1UF/6.3V

GND

+1.05VM_ORG

12

R2702

R2702 0Ohm

0Ohm

@

+VTT_PCH_VCCA_B_DPL

4

+VTT_PCH_ORG

+VCCP

12

C2703

1UF/6.3V

GND

12

C2704

1UF/6.3V

GND

4

+VTT_PCH_ORG

+3VSUS_ORG

+3VA

L2704 1kOhm/100Mhz@ L2704 1kOhm/100Mhz@

C2707

@C2707

@

10UF/10V

12

C2709

C2709 22UF/6.3V

22UF/6.3V

SP2718 R0402SP2718 R0402

1 2

R2710 0Ohm@R2710 0Ohm@

1 2

+VTT_CPU_VCCPCPU

SP2701

1 2

R0603

12

C2713

22UF/6.3V

/HR

GND

12

C2740

22UF/6.3V

/HR

GND

R2703 0Ohm@R 2703 0Ohm@

1 2

R2704 0OhmR2704 0Ohm

1 2

R2705 0Ohm@R 2705 0Ohm@

1 2

0.1UF/16V

21

12

+VTT_PCH_VCCIO

GND

12

C2710

C2710 22UF/6.3V

22UF/6.3V

GND

GNDGND

12

C2714

0.1UF/16V

+VTT_PCH_VCCA_A_DPL

GND

+VTT_PCH_VCCA_B_DPL

12

C2716

C2716 1UF/6.3V

1UF/6.3V

SP2717 R0402SP2717 R0402

+VTT_PCH_ORG

GND

12

C2720

4.7UF/6.3V

GND

+VCC_RTC

+VTT_PCH_ORG

L2702

21

1kOhm/100Mhz

12

C2751

47UF/4V

GND

L2703

21

1kOhm/100Mhz

12

C2750

47UF/4V

GND

12

C2705

12

C2706

@

GND

0.1UF/16V

GND

SP2715 R0402SP2715 R0402

1 2

+VCCDPLL_CPY

+VCCSUS1

12

C2708

C2708 1UF/6.3V

1UF/6.3V

@

GND

0.903A/23*20= 785mA

12

C2711

C2712

1UF/6.3V

GND

+VCCAFDI_VRM

+VCCDIFFCLK

+VCCDIFFCLKN

+VTT_PCH_ORG_SSCVCC

1 2

C2717

1UF/6.3V

GND

+V1.05VM_ORG_VCCSUS

C2719

@C2719

@

1UF/6.3V

GND

12

C2721

0.1UF/16V

12

C2723

C2723 1UF/6.3V

1UF/6.3V

GND

3

U2001J

3mA

VCCSST

1mA

6uA

C2725

0.1UF/16V

AD49

T16

V12

T38

BH23

AL29

AL24

AA19

AA21

AA24

AA26

AA27

AA29

AA31

AC26

AC27

AC29

AC31

AD29

AD31

W21

W23

W24

W26

W29

W31

W33

N16

Y49

BD47

BF47

AF17 AF33 AF34 AG34

AG33

V16

T17 V19

BJ8

A22

2

U2001J

VccAClk

VccDSW3_3

DcpSusByp

Vcc3_3_4

VccAPLLDMI2

VccIO15

DcpSus1

VccASW1

VccASW2

VccASW3

VccASW4

VccASW5

VccASW6

VccASW7

VccASW8

VccASW9

VccASW10

VccASW11

VccASW12

VccASW13

VccASW14

VccASW15

VccASW16

VccASW17

VccASW18

VccASW19

VccASW20

DcpRTC

VccVRM3

VccADPLLA

VccADPLLB

VccIO16 VccDIFFCLKN1 VccDIFFCLKN2 VccDIFFCLKN3

VccSSC

DcpSST

DcpSus2 DcpSus3

V_PROC_IO

VccRTC

COUGAR_POINT_ES1

109mA

266mA

+VTT_PCH_VCCACLK

+VCCPDSW

PCH_VCCDSW

+3VS_VCC_CLKF33

228mA/8=28.5mA

+VCCAPLL_CPY_PCH

3.709A/29=128mA

100mA/3=33mA

12

C2741

@ C2741

@

1UF/6.3V

GND

+VCCRTCEXT

167mA/4=41.75mA

75mA

3.709A/29=128mA 55mA

95mA

12

0.1UF/16V

12

C2718

GND

100mA/3*2=66mA

12

C2722

0.1UF/16V

GNDGND

12

C2724

0.1UF/16V

GND

+3VSUS +3VSUS_ORG

JP2703

1MM_OPEN_M1M2

112

+5VSUS +5VSUS_ORG

JP2702

1MM_OPEN_M1M2

112

+3VS +3VS_VCC3_3

JP2704

1MM_OPEN_M1M2

112

3

POWER

Clock and Misc ellaneous

CPURTC

PCI/GPIO/LPCMISC

SATA USB

HDA

VccSus3_3_1

VccSus3_3_2

VccSus3_3_3

VccSus3_3_4

VccSus3_3_5

V5REF_Sus

VccSus3_3_6

VccSus3_3_7

VccSus3_3_8

VccSus3_3_9

VccSus3_3_10

VccAPLLSATA

VccSusHDA

+1.05VS

+VTT_PCH_ORG

+VTT_PCH_VCCIO

+VCCDIFFCLKN +VCCAFDI_VRM

VccIO17

VccIO18

VccIO19

VccIO20

VccIO21

VccIO22

DcpSus4

V5REF

Vcc3_3_5

Vcc3_3_6

Vcc3_3_7

Vcc3_3_8

VccIO23

VccIO24

VccIO25

VccIO26

VccVRM4

VccIO27

VccIO28

VccIO29

VccASW21

VccASW22

VccASW23

+VCC_RTC

+3VS_VCC3_3

+VCCP

+3VSUS_ORG

+3VA

+1.05VS

+5VSUS

+3VSUS

+3VS

+5VS

2

3.709A/29*5= 639mA

N26

P26

P28

T27

T29

119mA

T23

T24

0.1UF/16V

V23

V24

P24

3.709A/29=128mA

+VCCAUPLL

T26

1mA

M26

+VCCA_USBSUS

AN23

AN24

1mA

P34

N20

N22

P20

P22

228mA/8*2pin=57mA

AA16

W16

228mA/8=28.5mA

T34

228mA/8=28.5mA

AJ2

AF13

AH13

3.709A/29*4= 512mA

AH14

AF14

AK1

167mA/4=41.75mA

AF11

AC16

3.709A/29*3= 384mA

AC17

AD17

PCH_VCC_1_1_20

T21

PCH_VCC_1_1_21

V21

PCH_VCC_1_1_22

T19

10mil trace

10mA

P32

R1.0 fellow everest 0614

JP2705

112

2MM_OPEN_5MIL

+VCC_RTC 20,22 +3VA 20,30, 48,63,65,81,88,93 +1.05VS 26,63,80,82,87 +VTT_PCH_ORG 22,26 +VTT_PCH_VCCIO 20,26

+VCCDIFFCLKN 21 +VCCAFDI_VRM 26 +3VS 4,16, 17,20,21,22,23,24,25,26,28,30,37,38,39,40,41,47,48,49,53,55,60,63,66,69,91,92 +3VS_VCC3_3 26 +VCCP 3,4,6,7,25, 26,37,47,63,82 +5VSUS 22,30,60,61,63,65,66,82,83,84,85,91 +5VS 30,38, 39,41,42,48,49,60,63,66,80,87,91 +3VSUS_ORG 20,21,22,24,25 +3VSUS 4,22,24,28,30,33,65,81,85,92

2

12

C2726

C2726 1UF/6.3V

1UF/6.3V

GND

12

C2727

GND

SP2705 R0402SP2705 R0402

+3VSUS_ORG_VCCPSUS

12

C2732

C2732 1UF/6.3V

1UF/6.3V

+3VS_VCCPCORE

GND

+3VS_VCCPPCI

12

C2734

0.1UF/16V

GND

0.903A/23*3= 118mA

1.01A

2

+VTT_PCH_VCCUSBCORE

+3VSUS_ORG_VCCPUSB

+3VSUS_ORG_VCCAUBG

12

C2728

0.1UF/16V

GND

1 2

12

C2735

0.1UF/16V

12

C2736

C2736 1UF/6.3V

1UF/6.3V

+VCCAFDI_VRM

+VTT_PCH_VCCIO_VCC_SATA

12

C2738

C2738 1UF/6.3V

1UF/6.3V

12

C2739

0.1UF/16V

GND

+1.05VM_ORG

SP2702 R0603SP2702 R0603

SP2703 R0603SP2703 R0603

SP2704 R0402SP2704 R0402

+VTT_PCH_VCCIO

12

C2730

C2730 1UF/6.3V

1UF/6.3V

@

GND

SP2706 R0402SP2706 R0402

1 2

SP2708 R0402SP2708 R0402

1 2

+VTT_PCH_VCCIO_SATA3

SP2709 R0603SP2709 R0603

1 2

+VTT_PCH_ORG_VCCAPLL_SATA3

GND

SP2710 R0603SP2710 R0603

1 2

+3VSUS_ORG_VCCPAZSUS

SP2714 R0603SP2714 R0603

1 2

1

1 2

+5VSUS_PCH_VCC5REFSUS

+5VS_PCH_VCC5REF

12

C2737

C2737 10UF/10V

10UF/10V

@

PEGATRON COMPUTER INC

Size Project N ame

C

Date: Sheet of

+3VSUS_ORG

+3VS_VCC3_3

+VTT_PCH_VCCIO

+3VSUS_ORG

C2729

C2729 1UF/6.3V

1UF/6.3V

SP2707 R0402SP2707 R0402

12

C2733

0.1UF/16V

GND

+VTT_PCH_VCCIO

@

L27051kOhm/100Mhz

21

+VTT_PCH_VCCIO

+1.05VM_ORG

+3VSUS_ORG

BA52HR/CR

2

3

12

GND

12

GND

1

D2701

D2701 1V/0.2A

1V/0.2A

R2711

1 2

100Ohm

2

3

C2731

C2731 1UF/6.3V

1UF/6.3V

1 2

+VTT_PCH_ORG

Title :

Engineer:

1

D2702

D2702 1V/0.2A

1V/0.2A

R2712

1 2

100Ohm

PCH(8)_POWER,GND

Wing_Cheng

+3VSUS_ORG

+5VSUS_ORG

+3VS

+5VS

+3VS_VCC3_3

27 94Friday, February 03, 2012

Rev

1.0

5

PCH SPI ROM

+3VA_EC

D D

+3VSUS

R2814 0OhmR2814 0Ohm

R2815 0Ohm

12

@

12

R2813 0OhmR2813 0Ohm

+3VM_SPI

D2801

1

3

2

@

1V/0.2A

12

PCH_SPICS0#20 PCH_SPISO20,30

PCH_SPICS0#

PCH_SPISO

+3VM_SPI

4

U2801

1 2 1 2 1 2

R28110Ohm R28110Ohm R280733Ohm R280733Ohm R28033.3KOhm R28033.3KOhm

U2801

1

CS#

2

SO/SIO1

3

WP#/ACC GND4SI/SIO0

MX25L1606EM2I-12G

05V000000010

(2MB)

HOLD#

SCLK

3

R1.0 0106

+3VM_SPI

R2801

12

3.3KOhm

C2801

0.1UF/16V

8

VCC

SPI1_HOLD#

7

SPI1_CLK

6

SPI1_SI

5

1 2

3.3KOhm

R2805

R2805 R2806

R2806

1 2 1 2

33Ohm

33Ohm 33Ohm

33Ohm

PCH_SPICLK+3VM_SPI1_WP# PCH_SPISI

2

+12VS

+12VSUS

+3VM_SPI

+3VS

+3VS 4,16, 17,20,21,22,23,24,25,26,27,30,37,38,39,40,41,47,48,49,53,55,60,63,66,69,91,92

+12VS 39,41,91

+12VSUS 22,60,81,91

+3VM_SPI 26

PCH EC

PCH_SPICLK 20,30

PCH_SPISI 20,30

1

<6.5 inch <6.5 inch

SPI ROM (32Mb)

SPI ROM (128 Kb)

+3VM_SPI

U2802

@U2802

PCH_SPICS1#20,30

C C

PCH_SPICS1#

1 2 1 2 1 2

SPI Debug Connector

SPI2_CS#1

R28120Ohm @ R28120Ohm @

SPI2_SO

R281033Ohm @ R281033Ohm @

+3VM_SPI2_WP#

R28043.3KOhm @ R28043.3KOhm @

PCH SMBus

1

CS#

2

SO/SIO1

3

WP#/ACC GND4SI/SIO0

MX25L3206EM2I-12G

05V000000005

(4MB)

@

HOLD#

SCLK

VCC

+3VSUS

SCL_3A21

PCH

B B

SDA_3A21

+3VS +3VSUS

SMB1_CLK30,49,69,74

EC, VGA Thermal

SMB1_DAT30,49,69,74

+3VM_SPI

12

R2802

C2802

3.3KOhm

0.1UF/16V

@

8

SPI2_HOLD#

7

SPI2_CLK

6

SPI2_SI

5

6 1

Q2801A

UM6K1N

2

Q2802A

UM6K1N

61

R2808 R2809

2

@R2808

@

1 2

@R2809

@

1 2

3 4

Q2801B

UM6K1N

5

Q2802B

UM6K1N

34

33Ohm

33Ohm 33Ohm

33Ohm

+12VS

5

1 2

R2817 0Ohm

1 2

R2816 0OhmR2816 0Ohm

+3VS

SMBUS Link device

eDP WLAN

12

RN2801A

4.7KOHM

34

RN2801B

4.7KOHM

CPU XDP PCH XDP

+3VS

SMB_CLK_S 16,17,48,53,55

SMB_DAT_S 16,17,48,53,55

@

+12VSUS

+12VS

SML1_CLK 21

PCH

SML1_DAT 21

+3VS

Plamrest Thermal

A A

Title :

PCH(9)_SPI,SMB

Wing_Cheng

Engineer:

PEGATRON COMPUTER INC

Size Project N ame

C

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

BA52HR/CR

1

Wing_Cheng

28 94Friday, February 03, 2012

Rev

1.0

5

D D

C C

4

3

2

1

B B

A A

Title :

CLK_ICS9LRS3197

Wing_Cheng

Engineer:

PEGATRON COMPUTER INC

Size Project Name

Custom

Date: Sheet of

5

4

3

Date: Sheet of

2

Engineer:

BA52HR/CR

Wing_Cheng

1

Rev

1.0

29 94Friday, February 03, 2012

1.0

5

+3VA_EC

+3VACC

D D

LPC_AD020,65 LPC_AD120,65 LPC_AD220,65 LPC_AD320,65

CLK_KBCPCI_PCH24

LPC_FRAME#20,65

BUF_PLT_RST#24,33,40,47,51,53,55,70

INT_SERIRQ20,65

EXT_SMI#25,65 EXT_SCI#21

A20GATE25

RCIN#25

EC_RST#47

KSI048 KSI148 KSI248 KSI348 KSI448 KSI548 KSI648

KSI748 KSO048 KSO148

KSO248 KSO348 KSO448

GSENSOR_INT1_EC69

ALL_SYSTEM_PWRGD92

R3040

R3040 10KOhm

10KOhm

5

Q3001A

Q3001A UM6K1N

UM6K1N

@

WLAN_RST#_EC55

CRT_IN#_EC38

LCD_BACKOFF#37

VRM_PWRGD80,92

SUS_PWRGD81,92

KSO548 KSO648 KSO748 KSO848 KSO948 KSO1048 KSO1148 KSO1248 KSO1348 KSO1448 KSO1548

IOAC_EN55, 81

CHGCB0#61

TP_CLK48

TP_DAT48

SMB0_CLK63, 88 SMB0_DAT63,88 SMB1_CLK28,49,69,74 SMB1_DAT28,49,69,74

H_PECI_EC25

OP_SD#42

CTL_FAN49

BT_ON_EC55

+3VS_WLAN

12

R3041

R3041 10KOhm

10KOhm

61

12

RF_ON_R

2

C C

B B

RF_ON55

+3VS_WLAN

12

34

Q3001B

Q3001B UM6K1N

UM6K1N

GND GND

R3035 0Ohm

+3VS

RN3004D

7 8

47OHM

RN3004C

5 6

47OHM

RN3004B

3 4

47OHM

RN3004A

1 2

47OHM

SP3004 R0402SP3004 R0402

1 2

SP3005 R0402SP3005 R0402

1 2

SP3006 R0402SP3006 R0402

1 2

SP3007 R0402SP3007 R0402

1 2

RF_ON_R

H_PECI_EC

VRM_PWRGD

SCE# SCK SI SO

LAD0 LAD1 LAD2 LAD3

EC_XIN EC_XOUT

Share ROM

U3004

A A

SCE# SCE#_S

R3034 0OhmR3034 0Ohm

SO

R3029 15OhmR3029 15Ohm

1 2

R3032 3.3KOhmR3032 3.3KOhm

+3VA_EC

1 2

12

5

U3004

1

CS#

SO_S ROM_WP#_S

2 3

SO/SIO1

HOLD#

WP#/ACC

SCLK

GND4SI/SIO0

MX25L3206EM2I-12G

05V000000005

VCC

need to check ROM P/N

8 7

SCLK_S

6

SI_S

5

4

U3001

3

VBAT

127

VSTBY(PLL)

121

VSTBY5

114

VSTBY4

92

VSTBY3

50

VSTBY2

26

VSTBY1

74

AVCC

11

VCC

RING#/

PWRFAIL#/CK32KOUT/LPCRST#/GPB7

10

LAD0/GPM0

9

LAD1/GPM1

8

LAD2/GPM2

7

LAD3/GPM3

13

LPCCLK/GPM4

6

LFRAME#/GPM5

22

LPCRST#/WUI4/GPD2

5

SERIRQ/GPM6

15

ECSMI#/GPD4

23

ECSCI#/GPD3

126

GA20/GPB5

4

KBRST#/GPB6

14

WRST#

58

KSI0/STB#

59

KSI1/AFD#

60

KSI2/INIT#

61

KSI3/SLIN#

62

KSI4

63

KSI5

64

KSI6

65

KSI7

36

KSO0/PD0

37

KSO1/PD1

38

KSO2/PD2

39

KSO3/PD3

40

KSO4/PD4

41

KSO5/PD5

42

KSO6/PD6

43

KSO7/PD7

44

KSO8/ACK#

45

KSO9/BUSY

46

KSO10/PE

51

KSO11/ERR#

52 53 54 55

119 123

85 86 87 88 89 90

110 111 115 116 117 118

81 80 79 78 77 76

128

101 105 102 103

+3VA_EC

WUI18/SOUT1/GPH2/SMDAT3/ID2 KSO12/SLCT KSO13 KSO14 KSO15

GPC0 TMA0/GPB2

PS2CLK0/TMB0/GPF0 PS2DAT0/TMB1/GPF1 PS2CLK1/DTR0#/GPF2 PS2DAT1/RTS0#/GPF3 PS2CLK2/WUI20/GPF4 PS2DAT2/WUI21/GPF5

SMCLK0/GPB3 SMDAT0/GPB4 SMCLK1/GPC1 SMDAT1/GPC2 SMCLK2/PECI/WUI22/GPF6 SMDAT2/PECIRQT#/WUI23/GPF7

DAC5/RIG0#/GPJ5 DAC4/DCD0#/GPJ4 DAC3/TACH1B/GPJ3 DAC2/TACH0B/GPJ2 GPJ1 TACH2/GPJ0

CK32K

2

CK32KE

FSCE# FSCK FMOSI FMISO

IT8518E

R3028

3.3KOhm

1 2

R3030 15OhmR3030 15Ohm

1 2

R3031 15OhmR3031 15Ohm

1 2

4

ADC0/GPI0 ADC1/GPI1 ADC2/GPI2 ADC3/GPI3

ADC4/WUI28/GPI4 ADC5/DCD1#/WUI29/GPI5 ADC6/DSR1#/WUI30/GPI6

ADC7/CTS1#/WUI31/GPI7

PWM0/GPA0 PWM1/GPA1 PWM2/GPA2 PWM3/GPA3 PWM4/GPA4 PWM5/GPA5

PWM6/SSCK/GPA6

PWM7/RIG1#/GPA7

RXD/SIN0/GPB0

TXD/SOUT0/GPB1

KSO16/SMOSI/GPC3

TMRI0/WUI2/GPC4

KSO17/SMISO/GPC5

TMRI1/WUI3/GPC6

PWUREQ#/BBO/GPC7

RI1#/WUI0/GPD0 RI2#/WUI1/GPD1

GINT/CTS0#/GPD5

TACH0A/GPD6

TACH1A/TMA1/GPD7

L80HLAT/BAO/WUI24/GPE0

EGAD/WUI25/GPE1 EGCS#/WUI26/GPE2 EGCLK/WUI27/GPE3

PWRSW/GPE4

RTS1#/WUI5/GPE5

LPCPD#/WUI6/GPE6

L80LLAT/WUI7/GPE7

SSCE1#/FSCE#/GPG0

DTR1#/SBUSY/GPG1/ID7

SSCE0#/GPG2

DSR0#/GPG6

CLKRUN#/WUI16/GPH0/ID0

WUI17/SIN1/SMCLK3/GPH1/ID1

HSCE#/WUI19/GPH3/ID3

HSCK/GPH4/ID4 HMISO/GPH5/ID5 HMOSI/GPH6/ID6

VSS1

VCORE

VSS2 VSS3 VSS4 VSS5 VSS6

AVSS

12

C3013

0.1UF/16V

SCK SI

USB_OC#_EC

66 67 68 69 70 71

ME_PM_SLP_LAN#

72

ME_PM_SLP_A#

73

24 25 28 29 30 31 32 34

108 109 112

KSO16

56 120

KSO17

57 124

WLAN_PWR_ON#

16

18 21 33

FAN0_TACH

47 48

VSUS_ON_EC

19 82 83 84 125 35 17 20

106

BT_PWR_ON#

107

PCH_FLASH_DESCRIPTOR

100 104

93 94 95

HSPI_CS

96

HSPI_CLK

97

HSPI_SO

98

HSPI_SI

99

MEFLSH_EN#20

1 12 27 49 91 113 122

75

FAN0_PWM

R1.2-4

C3008 0.1UF/16VC3008 0.1UF/16V

1 2

1

SP3003

R3056 0OhmN/AR3056 0OhmN/A R3057 0OhmN/AR3057 0OhmN/A R3058 0OhmN/AR3058 0OhmN/A R3059 0OhmN/AR3059 0OhmN/A

Q4602

Q4602 2N7002@G

2N7002

non-Share ROM

SCE#

R3033 0Ohm@R3033 0Ohm@ R3013 15Ohm@R3013 15Ohm@

+3VA_EC

R3024 3.3KOhm@R3024 3.3KOhm@

T3043T3043

T3044T3044

T3045T3045

1 2

1

1 2 1 2 1 2 1 2

??

D

@

S

GND

GND GND

EC_AGND

1 2

T3047T3047

3

Output driving:16mA

R0402

有有有有

?

3

1

PCH_FLASH_DESCRIPTOR

G

2

12

3

THERM_ALERT#_EC 74

SLP_SUS# 22 WLAN_SW# 65 PCH_ALERT# 25

AD_IINP 88 ME_PM_SLP_LAN# 22 ME_PM_SLP_A# 22

PWR_BLUE_LED# 65,66 CHG_LED_BLUE# 66 BAT_ORG_LED# 66

PWR_AMBER_LED# 65,66

USBP0_EN 61 EC_SPKR 41

LCD_EC_PWM 37

USBCHG_EN 81

ME_SUSPWRDNACK 22

PM_RSMRST# 22

KSO16 48

AC_IN_OC 74,88

KSO17 48

BAT1_IN_OC# 90

PM_SUSB# 22 PM_SUSC# 22

PM_PWROK 22,92

FAN0_TACH 49

ME_AC_PRESENT 22

VSUS_ON 63,81,91,93 SUSC_EC# 63, 91 SUSB_EC# 22,24,63,91,92 CPU_VRON 80 PWR_SW#_M 65

RF_DET# 55 LID_SW# 37,48,65 WLAN_WAKE# 55

THRO_CPU 4

PM_PWRBTN# 22

PM_CLKRUN# 22

USBP1_EN 61

USBP2_EN 61 PCH_SPICS1# 20,28 PCH_SPICLK 20,28 PCH_SPISO 20,28 PCH_SPISI 20,28

mSATA_PWR_ON# LAN_PWR_ON# AUD_PWR_ON# CAMERA_PWR_ON# ODD_PWR_ON#

U3003

SCE#_nonS

1

CE#

SO_nonSSO ROM_HD#_nonS

2

SO

ROM_WP#_nonS

3

WP#

4

GND

PM25LD010C-SCE

(128KB)

@

0202

PCH_FLASH_DESCRIPTOR 20

8

VCC

7

HOLD#

SCK_nonS SCK

6

SCK

5

SIO

+3VA_EC

+3VS

+3VSUS

+3VA

For IT8518 Power

+3VA_EC

C3001

10UF/10V

GND

For PU / PD

+3VA_EC

RN3001A

RN3001A RN3001B

RN3001B

+3VS

RN3001D

RN3001D RN3001C

RN3001C

PM_SUSB# PM_SUSC#

CPU_VRON

PM_RSMRST#

AC_IN_OC is pulled high at power

VSUS_ON

+3VSUS

+3VA_EC

12

R3019

C3012

3.3KOhm

0.1UF/16V

@

1 2

1 2 1 2

2

+3VA_EC 28,47 +3VS 4,16,17,20,21,22,23,24,25,26,27,28,37,38,39,40,41,47,48,49,53,55,60,63, 66,69,91,92 +3VSUS 4,22,24,27,28,33,65,81,85,92 +3VA 20,27,48,63,65,81,88,93

21

SP3002

1 2

R0603

1 2

4.7KOHM

3 4

4.7KOHM

3 4

4.7KOHM

1 2

4.7KOHM

R3017 10KOhmR3017 10KOhm

1 2

R3018 10KOhmR3018 10KOhm

1 2

R3060 10KOhmR3060 10KOhm

1 2

R3025 10KOhmR3025 10KOhm

1 2

R3038 10KOhmR3038 10KOhm

1 2

R3061 10KOhmR3061 10KOhm

1 2

R3062 10KOhm

1 2

R3063 10KOhmR3063 10KOhm

1 2

+3VA_EC+3VA

+3VACC

EC_AGND

@

12

C3005

0.1UF/16V

12

C3007

0.1UF/16V

TP_CLK TP_DAT SUSB_EC# SUSC_EC#

A20GATE

RCIN#

FAN0_TACH

PWR_SW#_M

WLAN_WAKE#

L3001

1kOhm/100Mhz

+3VA_EC

12

C3002

C3003

0.1UF/16V

R1.0 change to short pin. Joyoung0628 R1.0 change to short pin. Joyoung0628

SP3001

1 2

R0603

EC_AGND

1 2 1 2

1 2

BAT1_IN_OC#

THERM_ALERT#_EC

R3004 47KOhmR3004 47KOhm

1 2

4.7KOHM

3 4

4.7KOHM

7 8

4.7KOHM

5 6

4.7KOHM

R3055 10KOhmR3055 10KOhm

1 2

R3006 100KOHMR3006 100KOHM R3007 100KOHMR3007 100KOHM

R3009 100KOHMR3009 100KOHM

R3011 10KOhmR3011 10KOhm

10UF/10V

SMB0_CLK SMB0_DAT

SMB1_DAT SMB1_CLK

C3004

+3VS

12

C3006

0.1UF/16V

+5VS

GND

+3VS

+3VA_EC

RN3002A

RN3002A RN3002B

RN3002B RN3003B

RN3003B RN3003A

RN3003A

0202

R3008 100KOHMR3008 100KOHM

1 2

R3053 100KOHM@R3053 100KOHM@

R3054 10KOhm

1 2

@

VSUS_ON Default Pull High to +3VSUS

Cload=12.5PF place close to EC

R301615Ohm @ R301615Ohm @

SISI_nonS

R302315Ohm @ R302315Ohm @

2

VSUS_ON

12

VSUS_ON

EC_XIN EC_XOUT

+/-20ppm/12.5PF

1 4

12

C3010

C3010 10PF/50V

10PF/50V

R3021

R3021 10MOhm

10MOhm

@

X3001

32.768Khz

2

+3VSUS

R3020 10KOhmR3020 10KOhm

1 2

+5VSUS

R3014 47KOhmR3014 47KOhm

R3027 47KOhmR3027 47KOhm

+5VA

R3015 47KOhmR3015 47KOhm

R3022 47KOhmR3022 47KOhm

12

R3026

@

12

0Ohm

@

3

12

BU2/RD3

Size Project N ame

C

Date: Sheet of

C3011

C3011 10PF/50V

10PF/50V

@

12

VA70

PWR_BLUE_LED#

PWR_AMBER_LED#

BAT_ORG_LED#

CHG_LED_BLUE#

1

IOAC_EN

RF_DET#

PM_PWRBTN#

Title :

Engineer:

1

ITE8518E

Wing_Cheng

30 99Friday, February 03, 2012

Rev

1.0

5

4

3

2

1

D D

+3VSUS

C C

B B

A A

R3309

1 2

0Ohm

GND

1A 40 mil

12

C3301

10UF/6.3V

+AVDDH27

R3317 0OhmR3317 0Ohm

12

C3311

0.1UF/16V

GND

C3321

C3321 12PF/50V

12PF/50V

1 2

13

2

4

1 2

C3322

C3322 12PF/50V

12PF/50V

25MHZ

25MHZ X3301

X3301

XOUT_LAN_C

1 2

12

C3302

10UF/6.3V

12

C3314

0.1UF/16V

GND

12

C3310

0.1UF/16V

20 mil

12

C3303

1UF/10V

GND

40 mil

VDDCT

20 mil

0.1UF/16V

+3V_LAN

12

C3315

0.1UF/16V

+VDD17

C3331

GND

U3301

1

12

C3313

1UF/10V

60 mil

9

22 16

6

13 19 34 31

40

VDD33

AVDDH_REG

AVDDH1 AVDDH2

AVDDL_RE G

AVDDL1 AVDDL2 AVDDL3 AVDDL4

LX

12

C3304

0.1UF/16V

12

C3308

0.1UF/16V

12

C3317

0.1UF/16V

12

C3305

0.1UF/16V

+AVDDH27

L3301

12

C3306

10UF/10V

12

C3309

1UF/10V

12

C3316

0.1UF/16V

2.2UH

12

C3312

0.1UF/16V

21

+AVDDL11

VCTL17

<200 mil<200 mil

5

12

C3307

0.1UF/16V

+DVDDL11

12

C3319

0.1UF/16V

XIN_LAN XOUT_LAN

SP3301

1 2

R3308 2.37KOhm

12

GND

1%

C3318

1UF/10V

12

C3320

@

820PF/50V

1AV200000090

GND

1 2

R0402

GND

R3301 close to pin10

This customer directs part number 020O-002P000 ATHEROS/AR8151-BL1A-RL

VDDCT

37

DVDDL_REG

24

DVDDL

8

XTLI

7

XTLO

10

RBIAS

AR8151-BL1A-RL

TRXP0 TRXN0 TRXP1 TRXN1 TRXP2 TRXN2 TRXP3 TRXN3

LED[1] LED[0] LED[2]

TX_P TX_N

RX_P RX_N

REFCLK_P REFCLK_N

PERSTn

WAKEn

SMCLK

SMDATA

CLKREQn

TESTMODE

GND1 GND2 GND3 GND4 GND8 GND7 GND6 GND5

11 12 14 15 17 18 20 21

L_TRDP1

L_TRDP2

L_TRDP0

L_TRDN0

L_TRDN1

R330349.9Ohm1%R330349.9Ohm

R330449.9Ohm1%R330449.9Ohm

R330549.9Ohm1%R330549.9Ohm

R330649.9Ohm1%R330649.9Ohm

1%

1 2

12

C3323

0.1UF/16V

LED1

39

LED0

38 23

30 29

35 36

33 32

2

3

25 26

4

28

NC

27 41

GND

42 43 44 45 49 48 47 46

GND

R3314 0Ohm@R3314 0Ohm@

PCIE_RXP_LAN_R PCIE_RXN_LAN_R

+3V_LAN

R3323

4.7KOhm

@

1 2

PCIE_WAKE#_LAN

1%

1 2

12

C3324

0.1UF/16V

1 2

C3327 0.1UF/16VC 3327 0.1UF/16V

1 2

C3328 0.1UF/16VC 3328 0.1UF/16V

1 2

+3V_LAN

R3322

4.7KOhm

@

1 2

R3318 0OhmR3318 0Ohm

1 2

R1.3

PCIE_WAKE#_LAN

L_TRDN2

R330149.9Ohm1%R330149.9Ohm

R330249.9Ohm1%R330249.9Ohm

1%

1 2

12

C3325

0.1UF/16V

CLK_REQ6_LAN#

1

12

C3330

0.1UF/16V

@

GND GND

R3315 0Ohm@R3315 0Ohm@

L_TRDP3

1%

T3301T3301

Pull High at PCH

+3VSUS

G

2

S

2N7002

1 2

L_TRDN3

R331349.9Ohm1%R331349.9Ohm

R331249.9Ohm1%R331249.9Ohm

1%

1 2

12

C3326

0.1UF/16V

GNDGNDGNDGND

Close Chip

R3319 0Ohm

12

C3329

1UF/10V

@

12

R3310

R3310 10KOhm

10KOhm

1

3

D

Q5306

L_TDP 34

L_TDN 34

L_RDP 34

L_RDN 34

L_TRDP2 34

L_TRDM2 34

L_TRDP3 34

L_TRDM3 34

PCIE_RXP6_LAN 21 PCIE_RXN6_LAN 21

PCIE_TXP6_LAN 21 PCIE_TXN6_LAN 21

CLK_PCIE_LAN 21

CLK_PCIE_LAN# 21

BUF_PLT_RST# 24,30,40,47,51,53,55,70

CLK_REQ6_LAN# 21

1 2

@

VDDCT

PCIE_WAKE# 22, 51,53

LED1

LED0

12

R3307

R3307 10KOhm

10KOhm

Strap for non-overclocking

GND

12

R3321

R3321 10KOhm

10KOhm

@

GND

LED_BLINKINGn 34

LED_LINKn 34

Title :

LAN_AR8151L

Ahren_chen

Engineer:

T13M_RG

1

Engineer:

Rev

1.0

33 99Friday, February 03, 2012

BG1-CSC-HW R&D Dept.5

Size Project Name

Custom

Date: Sheet of

5

4

3

2

Date: Sheet of