PEGATRON PA4DB Schematics
Vinafix.com
5
4
3
2
1
SYSTEM PAGE REF.
01. Block Diagram
02. System Setting
03. CPU(1) _DDI/eDP
04. CPU(2)_DDR4
05. CPU(3)_+VCCCORE
06. CPU(4)_+VCCGT
07. CPU(5)_+VDDQ/IO/SA
08. CPU(6)_CPU GND
09. CPU(7)_CFG/RSVD
D D
C C
B B
A A
15. DDR4(0)_Termination
16. DDR4(1)_Memory Down
17. DDR4(2)_SO-DIMM1
18. DDR4(3)_CA/DQ Voltage
20. PCH(1)_SMB,LPC
21. PCH(2) LPSS,ISH
22. PCH(3)_HDA,SDIO
23. PCH(4) _PCIE,SATA,USB,SSIC
24. PCH(5)_CLK,RTC,HDA,SDIO
25. PCH(6)_SYS PWR
26. PCH(7)_POWER
28. PCH(8)_SPI,SMB
30. EC_IT8987E/BX
31. TP / Keyboard
32. RST_Reset Circuit
33. INTEL LAN_I219
34. RJ45
36. AUDIO_ALC255
37. AUDIO_COMBO JACK
40_Card Reader-RTS5229
44. BUG_Debug
45. eDP_output
46. CRT RTD2166
47. Display Port Switch
48. TV(1)_HDMI
50. THERMAL / FAN
51. SATA HDD/ SSD
52. USB JACK
53. NGFF_WLAN/ WiGig
56. LED
57. Discharge
60. DC-IN/ Batt connector
61. Touch Panel
62. TPM
65. ME_CONN,Skew Hole
66. BRD Conn
67. MLB to IO
68. BYPASS EC SEQUENCE
70_VGA-PCIE
71_VGA-N16P-GT FRAME BUFFER GDDR5
72.VGA_RGB,XTAL GDDR5
73_VGA_LVDS_HDMI GDDR5
74.VGA_GPIO,STRAP GDDR5
75_VGA_Power,GND GDDR5
76_VGA_CHA VRAM GDDR5
77_VGA_CHB VRAM GDDR5
80_POWER_VCORE for U22
81_POWER_SYSTEM
82_POWER_+1.0VSUS & 2.5V
83_POWER_ DDR & VTT_DSC
84_POWER_+1.8VSUS
85_POWER_+1.5VS_VGA
86_POWER_+1.05VS_VGA
87_POWER_+VGA_VCORE
88_POWER_CHARGER
89_POWER_AC_PD Input
90_POWER_DETECT
91_POWER_LOAD SWITCH
92_POWER_PROTECT
93_POWER_SIGNAL
94_POWER_FLOWCHART
A01. P4_Swap Bay
A02. P4_Smart card reader
A03. P4_IO DB
A04. P4_LED DB
A05. P4_TP Button DB
A06. P4_KB LED DB
A07. P4_IO DB
P4 Skylake U (2+2) Rev1.0
BLOCK DIAGRAM
USB 3.0
Type C
CON
Page 42
VGA
DP
USB Type C
USB3.0
Controller
DP AUX
ANALOGIX/ANX7428
USB2.0
Keyboard
Page 31
Analog Fan
Page 50
eDP Panel
Page 45
HDMI
Page 48
Page 46
Page 41
AUDIO Jack
Page 37
DMIC X 1
Page 37
Speaker
Page 36
VGA
HDMI
4K2K Repeater
PS8203
DP to VGA transfer
Realtek/RTD2166
Touch Pad
TPM NPCT650
Debug Conn.
EC IT8987E/BX
D.B.
Page 48
Page 46
USB3.0 re-driver
TI/SN65LVPE512
Page 31
Page 42
Page 62
Page 44
Page 30
16M SPI ROM
Page 28
Codec
Realtek/ALC255
Page 36
HDD
Page 51
eDP X 2
1
DDI1
DP switch
PS8338B
3
3&4
DDI2
Page 47
USB 3.0
USB 2.0
1
HDA
SATA3 re-driver
PARADE/PS8527B
I2C
LPC
SPI
Page 51
Skylake U
CPU
+
PCH
SATA
1
0
PCIE
SMLINK
0
CHB
CHA
USB 3.0
USB 2.0
Page 4~9
Page 20~26
6
WLAN
10
Wigig
0
5
11&12
1
PCIEx2
USB3.0 Port / S&C
1
Swap Bay
8
USB2.0 Hub
GENESYS/GL850G
7
Camera
10
Touch Panel
2
USB2.0 port
8
Card Reader/RTS5170
Finger printer
5
WLAN/WiGig + BT4.0
LAN
INTEL/I219
Page 51
NFC
Page 62
DDR4 SO-DIMM x1
DDR4 Memory Down x4
I/O extension
Page A01
Page 45
Page 61
Page A01 or A07
Page A03 or A07
Page A08
NGFF
Page 53
RJ45
Page 34
Page 33
M.2 SSD
Page 51
Page 15~18
USB2.0 * 2
Smart CR
Page A02
Power
VCORE/GT/SA
Page 80
System (5V & 3.3V)
Page 81
+1.0VSUS & 2.5V
Page 82
DDR & VTT
Page 83
+1.8VSUS
Page 84
+1.35VS_VGA
Page 85
+1.05VS_VGA
Page 86
+VGA_VCORE
Page 87
BATTERY CHARGER
Page 88
Type-C PD
Page 89
POWER DETECT
Page 90
LOAD SWITCH
Page 91
Power Protect
Page 92
Discharge Circuit
Page 57
Reset Circuit
Page 32
5
DC & BATT. Conn.
Page 60
Skew Holes
Page 65
4
Swap Bay DB
Page A01~A03
TP DB
Page A05
IO DB
Page A07 Page A04
KB LED DB
Page A06
3
LED DB
<Variant Name>
<Variant Name>
<Variant Name>
Block Diagram
Block Diagram
Block Diagram
Title :
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1/HW3
BG1/HW3
BG1/HW3
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
P4
P4
P4
1
Title :
Engin eer:
Engin eer:
Engin eer:
Bill Yang
Bill Yang
Bill Yang
1 108Tuesday, September 06, 2016
1 108Tuesday, September 06, 2016
1 108Tuesday, September 06, 2016
Rev
Rev
Rev
1.0
1.0
1.0
Vinafix.com
5
D D
4
3
2
1
C C
B B
A A
<Variant Name>
<Variant Name>
<Variant Name>
Title :
Title :
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
<Title>
<Title>
<Title>
Size Project Name
KTKUG_25W 1.1
C
Size Project Name
KTKUG_25W 1.1
C
Size Project Name
KTKUG_25W 1.1
C
5
4
3
2
Date: Sheet of
Date: Sheet of
Date: Sheet of
Title :
Engineer:
Engineer:
Engineer:
1
Rev
Rev
Rev
2 108Tuesday, September 06, 2016
2 108Tuesday, September 06, 2016
2 108Tuesday, September 06, 2016
Vinafix.com
5
4
3
2
1
+VCCIO
+VCCST_CPU
SKYLAKE-U symbol ReV0.53 #545316 / Ballout_Rev0_71 #543787 / PEGA local PN is 4201-0062000
U0301A
HDMI_TXN 248
HDMI_TXP 248
D D
DDI Port 1: HDMI
DDI Port 2: DP Switch
+VCCIO
C C
HDMI_TXN 148
HDMI_TXP 148
HDMI_TXN 048
HDMI_TXP 048
HDMI_CLKN48
HDMI_CLKP48
DP2_TXN047
DP2_TXP047
DP2_TXN147
DP2_TXP147
DP2_TXN247
DP2_TXP247
DP2_TXN347
DP2_TXP347
HDMI_SCL_PCH48
HDMI_SDA_PCH48
R0301 24.9Ohm1%
HDMI_SDA_PCH
DDPC _CTR LDATA
12
DP_CO MP
E55
DDI1_TXN[0]
F55
DDI1_TXP[0]
E58
DDI1_TXN[1]
F58
DDI1_TXP[1]
F53
DDI1_TXN[2]
G53
DDI1_TXP[2]
F56
DDI1_TXN[3]
G56
DDI1_TXP[3]
C50
DDI2_TXN[0]
D50
DDI2_TXP[0]
C52
DDI2_TXN[1]
D52
DDI2_TXP[1]
A50
DDI2_TXN[2]
B50
DDI2_TXP[2]
D51
DDI2_TXN[3]
C51
DDI2_TXP[3]
L13
GPP_E18/DDPB_CTRLCLK
L12
GPP_E19/DDPB_CTRLDATA
N7
GPP_E20/DDPC_CTRLCLK
N8
GPP_E21/DDPC_CTRLDATA
N11
GPP_E22
N12
GPP_E23
E52
eDP_RCOMP
940432
01V010000015
DDI
DISPLAY SIDEBANDS
EDP
GPP_E13/DDPB_HPD0
GPP_E14/DDPC_HPD1
GPP_E15/DDPD_HPD2
GPP_E16/DDPE_HPD3
GPP_E17/EDP_HPD
EDP_TXN[0]
EDP_TXP[0]
EDP_TXN[1]
EDP_TXP[1]
EDP_TXN[2]
EDP_TXP[2]
EDP_TXN[3]
EDP_TXP[3]
EDP_AUXN
EDP_AUXP
EDP_DISP_UTIL
DDI1_AUXN
DDI1_AUXP
DDI2_AUXN
DDI2_AUXP
RSVD_1
RSVD_2
eDP_BKLTEN
eDP_BKLTCTL
eDP_VDDEN
C47
C46
D46
C45
A45
B45
A47
B47
E45
F45
B52
G50
F50
E48
F48
G46
F46
L9
L7
L6
EXT_SMI#_R EXT_SMI#
N9
EXT_SC I#_R EXT_SC I#
L10
eDP_HP D
R12
R11
U13
1 2
R0302 0Ohm
1 2
R0303 0Ohm
DP2_AU XN 47
DP2_AU XP 47
+VCCSTG
+3VS
EDP_TX N0 45
EDP_TX P0 45
EDP_TX N1 45
EDP_TX P1 45
EDP_AU XN 45
EDP_AU XP 45
DPB_HPD 48
DP2_HP D 47
EXT_SMI# 30,44
EXT_SC I# 30
eDP_HP D 45
LCD_BK LTEN_PCH 21,45
LCD_BL_PWM_PCH 45
EDP_VD D_EN 45
+VCCIO 7,57,91
+VCCST_CPU 5,7,9,25
+VCCSTG 5,7
+3VS 4,17,20,21,22,23,24,28,30,31,32,36,37,45,46,47,48,50,51,53,57,61,62,67,91,92
eDP x 2
Pull down at connector side
+VCCST_CPU+VCCSTG+VCCST_CPU
12
R0311
1KOhm
H_PRO CHOT# H_PRO CHOT#_R
B B
THRO_CPU30
2
12
R0312
1KOhm
1 2
1 2
R0314 499Ohm1%
H_PECI_EC30
R0315 43Ohm
SP0301
R0316 49.9Ohm1%
R0317 49.9Ohm1%
R0318 49.9Ohm1%
R0319 49.9Ohm1%
1 2
1 2
1 2
1 2
1 2
R0341由EC control 觸發時的對地電阻也是要介於 70-200 ohm
1
1
G
3
32
D
S
(depends on under-shoot measurement result),預留0ohm是調整空間
R0341 0Ohm
12
H_PRO CHOT#
12
T0310
T0312
T0311
T0313
T0314
CPU_POPIRCOMP
PCH_POPIRCOMP
EDRAM_OPIO_RC OMP
EOPIO_RC OMP
R0313
49.9Ohm
1%
@
TP_CAT ERR #_R
H_PECI
H_THRMTR IP#_R
1
SKTOC C#
1
CPU_G P0
1
CPU_G P1
1
CPU_G P2
1
CPU_G P3
U0301D
D63
CATERR#
A54
PECI
C65
PROCHOT#
C63
THERMTRIP#
A65
SKTOCC#
C55
BPM#[0]
D55
BPM#[1]
B54
BPM#[2]
C56
BPM#[3]
A6
GPP_E3/CPU_GP0
A7
GPP_E7/CPU_GP1
BA5
GPP_B3/CPU_GP2
AY5
GPP_B4/CPU_GP3
AT16
PROC_POPIRCOMP
AU16
PCH_OPIRCOMP
H66
OPCE_RCOMP
H65
OPC_RCOMP
940432
01V010000015
CPU MISC
JTAG
DDPB_CTRLDATA has pull high at connector side
HDMI_SDA_PCH
DDPC _CTR LDATA
1 2
R0304 2.2KOhm@
1 2
R0321 2.2KOhm
PROC_TCK
PROC_TDI
PROC_TDO
PROC_TMS
PROC_TRST#
PCH_JTAG_TCK
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS
PCH_TRST#
JTAGX
B61
XDP_TC LK
D60
XDP_TD I_CPU
A61
XDP_TD O_CPU
C60
XDP_TMS_CPU
B59
XDP_TR ST_C PU_N
B56
PCH_J TAG_TCLK
D59
PCH_J TAG_TDI
A56
PCH_J TAG_TDO
C59
PCH_J TAG_TMS
C61
PCH_T RST_CPU_N
A59
XDP_TC LK_JTAGX
DDPB_CTRLDATA
+3VS +3VS
DDPC_CTRLDATA
DDPD_CTRLDATA
- Internal weak pull down 20k ohm
- 0 : port is not detected
1 : port is deteccted
1
T0315
1
T0316
1
T0317
1
T0318
1
T0319
1
T0320
1
T0321
1
T0322
1
T0323
1
T0324
1
T0325
EXT_SC I#
EXT_SMI#
1 2
R0307 10KOhm
1 2
R0308 10KOhm
Q0301
2N7002
N/A
PROC HOT#88
A A
VR_HO T#80
5
SP0325 0Ohm
R0320 0Ohm@
12
12
CPU(1)_DDI/eDP
CPU(1)_DDI/eDP
Title :
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1/HW 3
BG1/HW 3
BG1/HW 3
Size Project N ame
Size Project N ame
Size Project N ame
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
4
3
2
Date: Sheet of
P4
P4
P4
Title :
Engineer:
Engineer:
Engineer:
1
CPU(1)_DDI/eDP
Bill Yang
Bill Yang
Bill Yang
1.0
1.0
1.0
3 108Tuesday, Septemb er 06, 2016
3 108Tuesday, Septemb er 06, 2016
3 108Tuesday, Septemb er 06, 2016
Rev
Rev
Rev
Vinafix.com
5
4
3
2
+1.2V
+3VSUS
+3VS
+1.2V 7,15,16,17,18,57,83
+3VSUS 24,25,26,28,30,31,33,41,42,51,53,62,67,68,81,92
+3VS 3,17,20,21,22,23,24,28,30,31,32,36,37,45,46,47,48,50,51,53,57,61,62,67,91,92
1
D D
M_A_D[63:0]16 M_B_D[63:0]17
M_A_D0
M_A_D1
M_A_D2
M_A_D3
M_A_D4
M_A_D5
M_A_D6
M_A_D7
M_A_D8
M_A_D9
M_A_D10
M_A_D11
M_A_D12
M_A_D13
NIL Channel A[0..15]NIL Channel A[32..47]NIL Channel B[0..15]NIL Channel B[32..47]
C C
B B
M_A_D14
M_A_D15
M_A_D16
M_A_D17
M_A_D18
M_A_D19
M_A_D20
M_A_D21
M_A_D22
M_A_D23
M_A_D24
M_A_D25
M_A_D26
M_A_D27
M_A_D28
M_A_D29
M_A_D30
M_A_D31
M_A_D32
M_A_D33
M_A_D34
M_A_D35
M_A_D36
M_A_D37
M_A_D38
M_A_D39
M_A_D40
M_A_D41
M_A_D42
M_A_D43
M_A_D44
M_A_D45
M_A_D46
M_A_D47
M_A_D48
M_A_D49
M_A_D50
M_A_D51
M_A_D52
M_A_D53
M_A_D54
M_A_D55
M_A_D56
M_A_D57
M_A_D58
M_A_D59
M_A_D60
M_A_D61
M_A_D62
M_A_D63
U0301B
AL71
DDR0_DQ[0]
AL68
DDR0_DQ[1]
AN68
DDR0_DQ[2]
AN69
DDR0_DQ[3]
AL70
DDR0_DQ[4]
AL69
DDR0_DQ[5]
AN70
DDR0_DQ[6]
AN71
DDR0_DQ[7]
AR70
DDR0_DQ[8]
AR68
DDR0_DQ[9]
AU71
DDR0_DQ[10]
AU68
DDR0_DQ[11]
AR71
DDR0_DQ[12]
AR69
DDR0_DQ[13]
AU70
DDR0_DQ[14]
AU69
DDR0_DQ[15]
BB65
DDR0_DQ[16]/DDR0_DQ[32]
AW65
DDR0_DQ[17]/DDR0_DQ[33]
AW63
DDR0_DQ[18]/DDR0_DQ[34]
AY63
DDR0_DQ[19]/DDR0_DQ[35]
BA65
DDR0_DQ[20]/DDR0_DQ[36]
AY65
DDR0_DQ[21]/DDR0_DQ[37]
BA63
DDR0_DQ[22]/DDR0_DQ[38]
BB63
DDR0_DQ[23]/DDR0_DQ[39]
BA61
DDR0_DQ[24]/DDR0_DQ[40]
AW61
DDR0_DQ[25]/DDR0_DQ[41]
BB59
DDR0_DQ[26]/DDR0_DQ[42]
AW59
DDR0_DQ[27]/DDR0_DQ[43]
BB61
DDR0_DQ[28]/DDR0_DQ[44]
AY61
DDR0_DQ[29]/DDR0_DQ[45]
BA59
DDR0_DQ[30]/DDR0_DQ[46]
AY59
DDR0_DQ[31]/DDR0_DQ[47]
AY39
DDR0_DQ[32]/DDR1_DQ[0]
AW39
DDR0_DQ[33]/DDR1_DQ[1]
AY37
DDR0_DQ[34]/DDR1_DQ[2]
AW37
DDR0_DQ[35]/DDR1_DQ[3]
BB39
DDR0_DQ[36]/DDR1_DQ[4]
BA39
DDR0_DQ[37]/DDR1_DQ[5]
BA37
DDR0_DQ[38]/DDR1_DQ[6]
BB37
DDR0_DQ[39]/DDR1_DQ[7]
AY35
DDR0_DQ[40]/DDR1_DQ[8]
AW35
DDR0_DQ[41]/DDR1_DQ[9]
AY33
DDR0_DQ[42]/DDR1_DQ[10]
AW33
DDR0_DQ[43]/DDR1_DQ[11]
BB35
DDR0_DQ[44]/DDR1_DQ[12]
BA35
DDR0_DQ[45]/DDR1_DQ[13]
BA33
DDR0_DQ[46]/DDR1_DQ[14]
BB33
DDR0_DQ[47]/DDR1_DQ[15]
AY31
DDR0_DQ[48]/DDR1_DQ[32]
AW31
DDR0_DQ[49]/DDR1_DQ[33]
AY29
DDR0_DQ[50]/DDR1_DQ[34]
AW29
DDR0_DQ[51]/DDR1_DQ[35]
BB31
DDR0_DQ[52]/DDR1_DQ[36]
BA31
DDR0_DQ[53]/DDR1_DQ[37]
BA29
DDR0_DQ[54]/DDR1_DQ[38]
BB29
DDR0_DQ[55]/DDR1_DQ[39]
AY27
DDR0_DQ[56]/DDR1_DQ[40]
AW27
DDR0_DQ[57]/DDR1_DQ[41]
AY25
DDR0_DQ[58]/DDR1_DQ[42]
AW25
DDR0_DQ[59]/DDR1_DQ[43]
BB27
DDR0_DQ[60]/DDR1_DQ[44]
BA27
DDR0_DQ[61]/DDR1_DQ[45]
BA25
DDR0_DQ[62]/DDR1_DQ[46]
BB25
DDR0_DQ[63]/DDR1_DQ[47]
940432
IL Channel A[0..63]
NIL Channel A[0..15]
NIL Channel A[32..47]
DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12]
DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT#
DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]
DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]
DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]
DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]
DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]
DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]
NIL Channel B[0..15]
NIL Channel B[32..47]
IL Channel A DQS[0..7]
NIL Channel A
DQS[0,1,4,5]
NIL Channel B
DQS[0,1,4,5]
DDR CH - A
DDR0_CKN[0]
DDR0_CKP[0]
DDR0_CKN[1]
DDR0_CKP[1]
DDR0_CKE[0]
DDR0_CKE[1]
DDR0_CKE[2]
DDR0_CKE[3]
DDR0_CS#[0]
DDR0_CS#[1]
DDR0_ODT[0]
DDR0_ODT[1]
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5]
DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9]
DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6]
DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8]
DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]
DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]
DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]
DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1]
DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]
DDR0_DQSN[2]/DDR0_DQSN[4]
DDR0_DQSP[2]/DDR0_DQSP[4]
DDR0_DQSN[3]/DDR0_DQSN[5]
DDR0_DQSP[3]/DDR0_DQSP[5]
DDR0_DQSN[4]/DDR1_DQSN[0]
DDR0_DQSP[4]/DDR1_DQSP[0]
DDR0_DQSN[5]/DDR1_DQSN[1]
DDR0_DQSP[5]/DDR1_DQSP[1]
DDR0_DQSN[6]/DDR1_DQSN[4]
DDR0_DQSP[6]/DDR1_DQSP[4]
DDR0_DQSN[7]/DDR1_DQSN[5]
DDR0_DQSP[7]/DDR1_DQSP[5]
DDR0_MA[3]
DDR0_MA[4]
DDR0_DQSN[0]
DDR0_DQSP[0]
DDR0_DQSN[1]
DDR0_DQSP[1]
DDR0_ALERT#
DDR0_PAR
DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ
DDR_VTT_CNTL
AU53
AT53
AU55
AT55
BA56
BB56
AW56
AY56
AU45
AU43
AT45
AT43
BA51
BB54
BA52
AY52
AW52
AY55
AW54
BA54
BA55
AY54
AU46
AU48
AT46
AU50
AU52
AY51
AT48
AT50
BB50
AY50
BA50
BB52
AM70
AM69
AT69
AT70
BA64
AY64
AY60
BA60
BA38
AY38
AY34
BA34
BA30
AY30
AY26
BA26
AW50
AT52
AY67
AY68
BA67
AW67
M_A_A5
M_A_A9
M_A_A6
M_A_A8
M_A_A7
M_A_A12
M_A_A11
M_A_A13
M_A_A15
M_A_A14
M_A_A16
M_A_A2
M_A_A10
M_A_A1
M_A_A0
M_A_A3
M_A_A4
M_A_DQS#0
M_A_DQS0
M_A_DQS#1
M_A_DQS1
M_A_DQS#2
M_A_DQS2
M_A_DQS#3
M_A_DQS3
M_A_DQS#4
M_A_DQS4
M_A_DQS#5
M_A_DQS5
M_A_DQS#6
M_A_DQS6
M_A_DQS#7
M_A_DQS7
DDR0_VREF_DQ
DDR_PG_CTRL_S
1
M_A_A[16:0] 15,16
M_A_DQS#[7:0] 16
M_A_DQS[7:0] 16
M_A_DIM0_CLK#0 15,16
M_A_DIM0_CLK0 15,16
M_A_DIM0_CKE0 15,16
M_A_DIM0_CS#0 15,16
M_A_DIM0_ODT0 15,16
M_A_BG0 15,16
M_A_BG1 15,16
M_A_BA0 15,16
M_A_BA1 15,16
M_A_ALERT# 15,16
M_A_PAR 15,16
DIMM0_VREF_CA 18
T0401
DIMM1_VREF_DQ 18
M_A_ACT# 15,16
U0301C
AF65
M_B_D0
AF64
M_B_D1
AK65
M_B_D2
AK64
M_B_D3
AF66
M_B_D4
AF67
M_B_D5
AK67
M_B_D6
AK66
M_B_D7
AF70
M_B_D8
AF68
M_B_D9
AH71
M_B_D10
AH68
M_B_D11
AF71
M_B_D12
AF69
M_B_D13
AH70
NIL Channel A[16..31]NIL Channel A[48..63]NIL Channel B[16..31]NIL Channel B[48..63]
M_B_D14
M_B_D15
M_B_D16
M_B_D17
M_B_D18
M_B_D19
M_B_D20
M_B_D21
M_B_D22
M_B_D23
M_B_D24
M_B_D25
M_B_D26
M_B_D27
M_B_D28
M_B_D29
M_B_D30
M_B_D31
M_B_D32
M_B_D33
M_B_D34
M_B_D35
M_B_D36
M_B_D37
M_B_D38
M_B_D39
M_B_D40
M_B_D41
M_B_D42
M_B_D43
M_B_D44
M_B_D45
M_B_D46
M_B_D47
M_B_D48
M_B_D49
M_B_D50
M_B_D51
M_B_D52
M_B_D53
M_B_D54
M_B_D55
M_B_D56
M_B_D57
M_B_D58
M_B_D59
M_B_D60
M_B_D61
M_B_D62
M_B_D63
AH69
AT66
AU66
AP65
AN65
AN66
AP66
AT65
AU65
AT61
AU61
AP60
AN60
AN61
AP61
AT60
AU60
AU40
AT40
AT37
AU37
AR40
AP40
AP37
AR37
AT33
AU33
AU30
AT30
AR33
AP33
AR30
AP30
AU27
AT27
AT25
AU25
AP27
AN27
AN25
AP25
AT22
AU22
AU21
AT21
AN22
AP22
AP21
AN21
IL Channel B[0..63]
DDR1_DQ[0]/DDR0_DQ[16]
DDR1_DQ[1]/DDR0_DQ[17]
DDR1_DQ[2]/DDR0_DQ[18]
DDR1_DQ[3]/DDR0_DQ[19]
DDR1_DQ[4]/DDR0_DQ[20]
DDR1_DQ[5]/DDR0_DQ[21]
DDR1_DQ[6]/DDR0_DQ[22]
DDR1_DQ[7]/DDR0_DQ[23]
DDR1_DQ[8]/DDR0_DQ[24]
DDR1_DQ[9]/DDR0_DQ[25]
DDR1_DQ[10]/DDR0_DQ[26]
DDR1_DQ[11]/DDR0_DQ[27]
DDR1_DQ[12]/DDR0_DQ[28]
DDR1_DQ[13]/DDR0_DQ[29]
DDR1_DQ[14]/DDR0_DQ[30]
DDR1_DQ[15]/DDR0_DQ[31]
DDR1_DQ[16]/DDR0_DQ[48]
DDR1_DQ[17]/DDR0_DQ[49]
DDR1_DQ[18]/DDR0_DQ[50]
DDR1_DQ[19]/DDR0_DQ[51]
DDR1_DQ[20]/DDR0_DQ[52]
DDR1_DQ[21]/DDR0_DQ[53]
DDR1_DQ[22]/DDR0_DQ[54]
DDR1_DQ[23]/DDR0_DQ[55]
DDR1_DQ[24]/DDR0_DQ[56]
DDR1_DQ[25]/DDR0_DQ[57]
DDR1_DQ[26]/DDR0_DQ[58]
DDR1_DQ[27]/DDR0_DQ[59]
DDR1_DQ[28]/DDR0_DQ[60]
DDR1_DQ[29]/DDR0_DQ[61]
DDR1_DQ[30]/DDR0_DQ[62]
DDR1_DQ[31]/DDR0_DQ[63]
DDR1_DQ[32]/DDR1_DQ[16]
DDR1_DQ[33]/DDR1_DQ[17]
DDR1_DQ[34]/DDR1_DQ[18]
DDR1_DQ[35]/DDR1_DQ[19]
DDR1_DQ[36]/DDR1_DQ[20]
DDR1_DQ[37]/DDR1_DQ[21]
DDR1_DQ[38]/DDR1_DQ[22]
DDR1_DQ[39]/DDR1_DQ[23]
DDR1_DQ[40]/DDR1_DQ[24]
DDR1_DQ[41]/DDR1_DQ[25]
DDR1_DQ[42]/DDR1_DQ[26]
DDR1_DQ[43]/DDR1_DQ[27]
DDR1_DQ[44]/DDR1_DQ[28]
DDR1_DQ[45]/DDR1_DQ[29]
DDR1_DQ[46]/DDR1_DQ[30]
DDR1_DQ[47]/DDR1_DQ[31]
DDR1_DQ[48]
DDR1_DQ[49]
DDR1_DQ[50]
DDR1_DQ[51]
DDR1_DQ[52]
DDR1_DQ[53]
DDR1_DQ[54]
DDR1_DQ[55]
DDR1_DQ[56]
DDR1_DQ[57]
DDR1_DQ[58]
DDR1_DQ[59]
DDR1_DQ[60]
DDR1_DQ[61]
DDR1_DQ[62]
DDR1_DQ[63]
940432
SKL_ULT
NIL Channel A[16..31]
NIL Channel A[48..63]
DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5]
DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9]
DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6]
DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]
DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]
DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12]
DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#
DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]
DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]
DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]
DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]
DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1]
DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]
NIL Channel B[16..31]
NIL Channel B[48..63]
IL Channel B DQS[0..7]
NIL Channel A
DQS[2,3,6,7]
NIL Channel B
DQS[2,3,6,7]
DDR CH - B
DDR1_DQSN[0]/DDR0_DQSN[2]
DDR1_DQSP[0]/DDR0_DQSP[2]
DDR1_DQSN[1]/DDR0_DQSN[3]
DDR1_DQSP[1]/DDR0_DQSP[3]
DDR1_DQSN[2]/DDR0_DQSN[6]
DDR1_DQSP[2]/DDR0_DQSP[6]
DDR1_DQSN[3]/DDR0_DQSN[7]
DDR1_DQSP[3]/DDR0_DQSP[7]
DDR1_DQSN[4]/DDR1_DQSN[2]
DDR1_DQSP[4]/DDR1_DQSP[2]
DDR1_DQSN[5]/DDR1_DQSN[3]
DDR1_DQSP[5]/DDR1_DQSP[3]
DDR1_CKN[0]
DDR1_CKN[1]
DDR1_CKP[0]
DDR1_CKP[1]
DDR1_CKE[0]
DDR1_CKE[1]
DDR1_CKE[2]
DDR1_CKE[3]
DDR1_CS#[0]
DDR1_CS#[1]
DDR1_ODT[0]
DDR1_ODT[1]
DDR1_MA[3]
DDR1_MA[4]
DDR1_DQSN[6]
DDR1_DQSP[6]
DDR1_DQSN[7]
DDR1_DQSP[7]
DDR1_ALERT#
DDR1_PAR
DRAM_RESET#
DDR_RCOMP[0]
DDR_RCOMP[1]
DDR_RCOMP[2]
AN45
AN46
AP45
AP46
AN56
AP55
AN55
AP53
BB42
AY42
BA42
AW42
AY48
AP50
BA48
BB48
AP48
AP52
AN50
AN48
AN53
AN52
BA43
AY43
AY44
AW44
BB44
AY47
BA44
AW46
AY46
BA46
BB46
BA47
AH66
AH65
AG69
AG70
AR66
AR65
AR61
AR60
AT38
AR38
AT32
AR32
AR25
AR27
AR22
AR21
AN43
AP43
AT13
CPUDRAMRST#
AR18
SM_RCOMP_0
AT18
SM_RCOMP_1
AU18
SM_RCOMP_2
M_B_A[16:0] 17
M_B_DQS#[7:0] 17
M_B_DQS[7:0] 17
M_B_DIM0_CLK#1
M_B_DIM0_CLK1
M_B_DQS#0
M_B_DQS0
M_B_DQS#1
M_B_DQS1
M_B_DQS#2
M_B_DQS2
M_B_DQS#3
M_B_DQS3
M_B_DQS#4
M_B_DQS4
M_B_DQS#5
M_B_DQS5
M_B_DQS#6
M_B_DQS6
M_B_DQS#7
M_B_DQS7
M_B_A5
M_B_A9
M_B_A6
M_B_A8
M_B_A7
M_B_A12
M_B_A11
M_B_A13
M_B_A15
M_B_A14
M_B_A16
M_B_A2
M_B_A10
M_B_A1
M_B_A0
M_B_A3
M_B_A4
1 2
R0402 121OHM1%
1 2
R0403 80.6Ohm1%
1 2
R0404 100Ohm1%
M_B_DIM0_CLK#0 17
M_B_DIM0_CLK#1 17
M_B_DIM0_CLK0 17
M_B_DIM0_CLK1 17
M_B_DIM0_CKE0 17
M_B_DIM0_CKE1 17
M_B_DIM0_CS#0 17
M_B_DIM0_CS#1 17
M_B_DIM0_ODT0 17
M_B_DIM0_ODT1 17
M_B_BG0 17
M_B_ACT# 17
M_B_BG1 17
M_B_BA0 17
M_B_BA1 17
M_B_ALERT# 17
M_B_PAR 17
+1.2V
12
R0405
470Ohm
1 2
R0401
0Ohm
@
C0402
0.1UF/16V
1 2
DDR4_DRAMRST# 16,17
If Mixed SO-DIMM and Memory Down,
RCOMP[0] should be 121 Ohm.
+1.2V +3VS +3VSUS
12
12
R0407
220KOhm
1%
R0411
2MOHM
@
C0401
0.1UF/16V
U0401
1
NC
2
A
3 4
GND
74AUP1G07GW
A A
5
4
VCC
5
Y
1 2
3
12
R0408
220KOhm
1%@
DDR_VTT_CNTL to VTT power ready < 35us (tCPU18)
2
DDR_PG_CTRL 83
CPU(2)_DDR3L
CPU(2)_DDR3L
Title :
Title :
1
Title :
Engineer:
Engineer:
Engineer:
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
BG1/HW3
BG1/HW3
BG1/HW3
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
P4
P4
P4
CPU(2)_DDR3L
Bill Yang
Bill Yang
Bill Yang
4 108Tuesday, September 06, 2016
4 108Tuesday, September 06, 2016
4 108Tuesday, September 06, 2016
Rev
Rev
Rev
1.0
1.0
1.0
Vinafix.com
5
4
3
2
1
+VCORE
+VCCSTG
+VCCST_CPU
D D
C C
+VCORE +VCORE
AK33
AK35
AK37
AK38
AK40
AM32
AM33
AM35
AM37
AM38
AK32
AB62
AC63
AE63
AE62
AG62
U0301L
A30
VCC_1
A34
VCC_2
A39
VCC_3
A44
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
AL33
VCC_10
AL37
VCC_11
AL40
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
G30
VCC_18
K32
RSVD_3
RSVD_4
VCCOPC_1
P62
VCCOPC_2
V62
VCCOPC_3
H63
VCC_OPC_1P8_1
G61
VCC_OPC_1P8_2
VCCOPC_SENSE
VSSOPC_SENSE
VCCEOPIO_1
VCCEOPIO_2
AL63
VCCEOPIO_SENSE
AJ62
VSSEOPIO_SENSE
CPU POWER 1 OF 4
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_SENSE
VSS_SENSE
VIDALERT#
VIDSCK
VIDSOUT
VCCSTG
G32
G33
G35
G37
G38
G40
G42
J30
J33
J37
J40
K33
K35
K37
K38
K40
K42
K43
E32
E33
B63
A63
D64
G20
VIDALERT#
VIDSCK
VIDSOUT
+VCCFUSEPRG
NB_R0402_20MIL_SMALL
VCORE_VCCSENSE 80
VCORE_VSSSENSE 80
1 2
R0517 220Ohm1%
R0518 0Ohm
R0519 0Ohm
1 2
SP0505
12
12
+VCCSTG
CPU side VR side
+VCCST_CPU
12
R0520
56Ohm
1%
VIDALERT#_R
VIDSCK_R
+VCCST_CPU
12
R0521
100Ohm
1%
VIDSOUT_R
+VCCST_CPU
12
+VCCST_CPU
12
R0522
45.3Ohm
1%
R0523
100Ohm
1%
R0524 0Ohm
C0505
0.1UF/16V
1 2
@
1 2
R0525 51Ohm1%
1 2
R0526 10Ohm1%
12
VR_SVID_ALERT# 80
VR_SVID_CLK 80
VR_SVID_DATA 80
+VCORE 57,80
+VCCSTG 3,7
+VCCST_CPU 3,7,9,25
940432
01V010000015
B B
A A
VCORE_VCCSENSE
VCORE_VSSSENSE
+VCORE
1 2
1 2
R0540
100Ohm
1%
R0541
100Ohm
1%
CPU(3)_+VCCCORE
CPU(3)_+VCCCORE
Title :
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1/HW3
BG1/HW3
BG1/HW3
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
P4
P4
P4
Title :
Engineer:
Engineer:
Engineer:
CPU(3)_+VCCCORE
Bill Yang
Bill Yang
Bill Yang
5 108Tuesday, September 06, 2016
5 108Tuesday, September 06, 2016
1
5 108Tuesday, September 06, 2016
Rev
Rev
Rev
1.0
1.0
1.0
Vinafix.com
5
4
3
2
1
+VCCGT
A48
D D
C C
+VCCGT
R0611
100Ohm
1%
1 2
VCCGT_VCCSENSE80
VCCGT_VSSSENSE80
R0610
B B
100Ohm
1%
1 2
VCCGT_VCCSENSE
VCCGT_VSSSENSE
VCCGT_VCCSENSE
VCCGT_VSSSENSE
A53
A58
A62
A66
AA63
AA64
AA66
AA67
AA69
AA70
AA71
AC64
AC65
AC66
AC67
AC68
AC69
AC70
AC71
J43
J45
J46
J48
J50
J52
J53
J55
J56
J58
J60
K48
K50
K52
K53
K55
K56
K58
K60
L62
L63
L64
L65
L66
L67
L68
L69
L70
L71
M62
N63
N64
N66
N67
N69
J70
J69
U0301M
CPU POWER 2 OF 4
VCCGT_1
VCCGT_2
VCCGT_3
VCCGT_4
VCCGT_5
VCCGT_6
VCCGT_7
VCCGT_8
VCCGT_9
VCCGT_10
VCCGT_11
VCCGT_12
VCCGT_13
VCCGT_14
VCCGT_15
VCCGT_16
VCCGT_17
VCCGT_18
VCCGT_19
VCCGT_20
VCCGT_21
VCCGT_22
VCCGT_23
VCCGT_24
VCCGT_25
VCCGT_26
VCCGT_27
VCCGT_28
VCCGT_29
VCCGT_30
VCCGT_31
VCCGT_32
VCCGT_33
VCCGT_34
VCCGT_35
VCCGT_36
VCCGT_37
VCCGT_38
VCCGT_39
VCCGT_40
VCCGT_41
VCCGT_42
VCCGT_43
VCCGT_44
VCCGT_45
VCCGT_46
VCCGT_47
VCCGT_48
VCCGT_49
VCCGT_50
VCCGT_51
VCCGT_52
VCCGT_53
VCCGT_54
VCCGT_55
VCCGT_SENSE
VSSGT_SENSE
VCCGT_56
VCCGT_57
VCCGT_58
VCCGT_59
VCCGT_60
VCCGT_61
VCCGT_62
VCCGT_63
VCCGT_64
VCCGT_65
VCCGT_66
VCCGT_67
VCCGT_68
VCCGT_69
VCCGT_70
VCCGT_71
VCCGT_72
VCCGT_73
VCCGT_74
VCCGT_75
VCCGT_76
VCCGT_77
VCCGT_78
VCCGT_79
VCCGT_80
VccGTx_1
VccGTx_2
VccGTx_3
VccGTx_4
VccGTx_5
VccGTx_6
VccGTx_7
VccGTx_8
VccGTx_9
VccGTx_10
VccGTx_11
VccGTx_12
VccGTx_13
VccGTx_14
VccGTx_15
VccGTx_16
VccGTx_17
VccGTx_18
VccGTx_19
VccGTx_20
VccGTx_21
VccGTx_22
VccGTx_23
VccGTx_24
VccGTx_25
VccGTx_26
VccGTx_27
VccGTx_28
VccGTx_29
VCCGTx_SENSE
VSSGTx_SENSE
N70
N71
R63
R64
R65
R66
R67
R68
R69
R70
R71
T62
U65
U68
U71
W63
W64
W65
W66
W67
W68
W69
W70
W71
Y62
AK42
AK43
AK45
AK46
AK48
AK50
AK52
AK53
AK55
AK56
AK58
AK60
AK70
AL43
AL46
AL50
AL53
AL56
AL60
AM48
AM50
AM52
AM53
AM56
AM58
AU58
AU63
BB57
BB66
AK62
AL61
+VCCGT
+VCCGT
+VCCGT 57,80
940432
01V010000015
A A
CPU(4)_+VCCGT
CPU(4)_+VCCGT
Title :
Title :
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
Engineer:
Engineer:
BG1/HW3
BG1/HW3
BG1/HW3
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
Date: Sheet of
2
P4
P4
P4
Engineer:
CPU(4)_+VCCGT
Bill Yang
Bill Yang
Bill Yang
6 108Tuesday, September 06, 2016
6 108Tuesday, September 06, 2016
6 108Tuesday, September 06, 2016
1
Rev
Rev
Rev
1.0
1.0
1.0
Vinafix.com
5
4
3
2
1
+1.2V
+VCCST_CPU
+VCCSTG
+VCCIO
+VCCSA
C0719
1UF/6.3V
+5VSUS
+12VSUS
+VCCIO
12
+1.0V
C0720
1UF/6.3V
D D
2
+VDDQ_CPU
12
C0701
10UF/6.3V
12
C0702
10UF/6.3V
12
C0703
10UF/6.3V
12
C0704
10UF/6.3V
+VDDQ_CPU
12
C0705
10UF/6.3V
R0701 0Ohm
12
1 2
+VCCST_CPU
+VCCSTG
C0706
10UF/6.3V
12
12
C0701 - C0704 : Near by package
C0705 - C0710 : Underneath the package
12
C0707
1UF/6.3V
+VDDQ_CPU_CLK
12
C0708
1UF/6.3V
Decoupling cap for internal power
12
C0711
0.1UF/16V
C0712
1UF/6.3V
C0713
1UF/6.3V
12
C0709
1UF/6.3V
12
C0710
1UF/6.3V
2.8A
0.1A
AU23
AU28
AU35
AU42
BB23
BB32
BB41
BB47
BB51
AM40
A18
A22
AL23
K20
K21
U0301N
CPU POWER 3 OF 4
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQC
VCCST
VCCSTG
VCCPLL_OC
VccPLL_1
VccPLL_2
940432
01V010000 015
VCCIO_1
VCCIO_2
VCCIO_3
VCCIO_4
VCCIO_5
VCCIO_6
VCCIO_7
VCCSA_1
VCCSA_2
VCCSA_3
VCCSA_4
VCCSA_5
VCCSA_6
VCCSA_7
VCCSA_8
VCCSA_9
VCCSA_10
VCCSA_11
VCCSA_12
VCCSA_13
VCCSA_14
VCCIO_SENSE
VSSIO_SENSE
VSSSA_SENSE
VCCSA_SENSE
AK28
AK30
AL30
AL42
AM28
AM30
AM42
AK23
AK25
G23
G25
G27
G28
J22
J23
J27
K23
K25
K27
K28
K30
AM23
AM22
H21
H20
VCCIO_VR_FB
VSSIO_VR_FB
4.5A
12
C0717
1UF/6.3V
VCCSA_VSSSENSE 80
VCCSA_VCCSENSE 80
12
C0718
1UF/6.3V
12
+1.2V
JP0701
112
3MM_OPEN_5MIL
C C
+1.2V 4,15 ,16,17,18,57,83
+VCCST_CPU 3,5,9,25
+VCCSTG 3,5
+VCCIO 3,57 ,91
+VCCSA 57,80
+5VSUS 41,42,52,56,67,81
+12VSUS 81,91
+1.0V 57,9 1
+VCCSA
+VCCIO
12
R0714
1KOhm
@
12
R0715
1KOhm
@
Reserved PH/PD
+VCCSFR_OC
12
C0714
0.1UF/16V
VCCSA_VCCSENSE
+VCCSFR
B B
12
C0715
0.1UF/16V
12
C0716
0.1UF/16V
+1.0V
R0710 0Ohm
1 2
RES 0 OHM 1/10W (0603) JUMP
+1.0V +VCCSFR
R0711 0Ohm
1 2
RES 0 OHM 1/10W (0603) JUMP
+VCCST_CPU
0.24A0.24A
0.24A0.24A
+VCCSFR_OC+1.2V
VCCSA_VSSSENSE
+VCCSA
1 2
1 2
R0720
100Ohm
1%
R0721
100Ohm
1%
Refer to CRB 0.53
R0709 0Ohm
1 2
RES 0 OHM 1/10W (0603) JUMP
+VCCIO
R0713 0Ohm
1 2
RES 0 OHM 1/10W (0603) JUMP
A A
+VCCSTG
0.12A0.12A
CPU(5)_+VDDQ/IO/SA
CPU(5)_+VDDQ/IO/SA
CPU(5)_+VDDQ/IO/SA
Title :
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1/HW3
BG1/HW3
BG1/HW3
Size Pr oject Name
Size Pr oject Name
Size Pr oject Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
P4
P4
P4
Title :
Engineer:
Engineer:
Engineer:
1
Bill Yang
Bill Yang
Bill Yang
7 108Tuesday, September 06, 2016
7 108Tuesday, September 06, 2016
7 108Tuesday, September 06, 2016
Rev
Rev
Rev
1.0
1.0
1.0
Vinafix.com
5
4
3
2
1
U0301P
GND 1 OF 3
A5
VSS_1
A67
VSS_2
A70
D D
C C
B B
AA2
AA4
AA65
AA68
AB15
AB16
AB18
AB21
AB8
AD13
AD16
AD19
AD20
AD21
AD62
AD8
AE64
AE65
AE66
AE67
AE68
AE69
AF1
AF10
AF15
AF17
AF2
AF4
AF63
AG16
AG17
AG18
AG19
AG20
AG21
AG71
AH13
AH6
AH63
AH64
AH67
AJ15
AJ18
AJ20
AJ4
AK11
AK16
AK18
AK21
AK22
AK27
AK63
AK68
AK69
AK8
AL2
AL28
AL32
AL35
AL38
AL4
AL45
AL48
AL52
AL55
AL58
AL64
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
AL65
AL66
AM13
AM21
AM25
AM27
AM43
AM45
AM46
AM55
AM60
AM61
AM68
AM71
AM8
AN20
AN23
AN28
AN30
AN32
AN33
AN35
AN37
AN38
AN40
AN42
AN58
AN63
AP10
AP18
AP20
AP23
AP28
AP32
AP35
AP38
AP42
AP58
AP63
AP68
AP70
AR11
AR15
AR16
AR20
AR23
AR28
AR35
AR42
AR43
AR45
AR46
AR48
AR5
AR50
AR52
AR53
AR55
AR58
AR63
AR8
AT2
AT20
AT23
AT28
AT35
AT4
AT42
AT56
AT58
AT63
AT68
AT71
AU10
AU15
AU20
AU32
AU38
AV68
AV69
AV70
AV71
AW10
AW12
AW14
AW16
AW18
AW21
AW23
AW26
AW28
AW30
AW32
AW34
AW36
AW38
AW41
AW43
AW45
AW47
AW49
AW51
AW53
AW55
AW57
AW60
AW62
AW64
AW66
AY66
BA10
BA14
BA18
BA23
BA28
BA32
BA36
BA45
AV1
AW6
AW8
B10
B14
B18
B22
B30
B34
B39
B44
B48
B53
B58
B62
B66
B71
BA1
BA2
F68
U0301Q
GND 2 OF 3
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
BA49
BA53
BA57
BA6
BA62
BA66
BA71
BB18
BB26
BB30
BB34
BB38
BB43
BB55
BB6
BB60
BB64
BB67
BB70
C1
C25
C5
D10
D11
D14
D18
D22
D25
D26
D30
D34
D39
D44
D45
D47
D48
D53
D58
D6
D62
D66
D69
E11
E15
E18
E21
E46
E50
E53
E56
E6
E65
E71
F1
F13
F2
F22
F23
F27
F28
F32
F33
F35
F37
F38
F4
F40
F42
BA41
F8
G10
G22
G43
G45
G48
G5
G52
G55
G58
G6
G60
G63
G66
H15
H18
H71
J11
J13
J25
J28
J32
J35
J38
J42
J8
K16
K18
K22
K61
K63
K64
K65
K66
K67
K68
K70
K71
L11
L16
L17
01V010000015
U0301R
GND 3 OF 3
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
940432
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
VSS_326
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
VSS_354
VSS_355
VSS_356
VSS_357
VSS_358
VSS_359
L18
L2
L20
L4
L8
N10
N13
N19
N21
N6
N65
N68
P17
P19
P20
P21
R13
R6
T15
T17
T18
T2
T21
T4
U10
U63
U64
U66
U67
U69
U70
V16
V17
V18
W13
W6
W9
Y17
Y19
Y20
Y21
940432
01V010000015
A A
5
4
940432
01V010000015
CPU(6)_CPU GND
CPU(6)_CPU GND
Title :
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1/HW3
BG1/HW3
BG1/HW3
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
P4
P4
P4
Title :
Engineer:
Engineer:
Engineer:
1
CPU(6)_CPU GND
Bill Yang
Bill Yang
Bill Yang
Rev
Rev
Rev
1.0
1.0
1.0
8 108Tuesday, September 06, 2016
8 108Tuesday, September 06, 2016
8 108Tuesday, September 06, 2016
Vinafix.com
5
4
3
2
1
+VCCST_CPU
+1.8VSUS
U0301S
RESERVED SIGNALS-1
1
T0966
D D
R0930 1KOhm
C C
T0903
12
T0905
T0907
T0906
T0920
1
1
1
1
1 2
R0901 49.9Ohm1%
1
ITP_PMODE
CFG0
CFG2
CFG4
CFG5
CFG6
CFG7
CFG_RCOMP
E68
B67
D65
D67
E70
C68
D68
C67
F71
G69
F70
G68
H70
G71
H69
G70
E63
F63
E66
F66
E60
AY2
AY1
K46
K45
AL25
AL27
C71
B70
F60
A52
BA70
BA68
J71
J68
F65
G65
F61
E61
E8
D1
D3
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
CFG[18]
CFG[19]
CFG_RCOMP
ITP_PMODE
RSVD_5
RSVD_6
RSVD_7
RSVD_8
RSVD_9
RSVD_10
RSVD_11
RSVD_12
RSVD_13
RSVD_14
RSVD_15
RSVD_16
RSVD_TP_1
RSVD_TP_2
RSVD_17
RSVD_18
VSS_360
VSS_361
RSVD_19
RSVD_20
RSVD_TP_3
RSVD_TP_4
RSVD_TP_5
RSVD_TP_6
RSVD_21
RSVD_22
RSVD_23
RSVD_24
RSVD_25
RSVD_26
RSVD_27
RSVD_28
RSVD_29
RSVD_30
RSVD_31
RSVD_32
RSVD_33
RSVD_34
RSVD_35
RSVD_36
RSVD_37
RSVD_38
RSVD_39
RSVD_40
RSVD_41
RSVD_42
RSVD_TP_7
RSVD_TP_8
PROC_SELECT#
TP5
TP6
TP4
TP1
TP2
VSS_362
ZVM#
MSM#
BB68
BB69
AK13
AK12
BB2
BA3
AU5
AT5
D5
D4
B2
C2
B3
A3
AW1
E1
E2
BA4
BB4
A4
C4
BB5
A69
B69
AY3
D71
C70
C54
D54
AY4
BB3
AY71
AR56
AW71
AW70
AP56
C64
RSVD_AY3
VSS_AY71
SNN_ZVM#
SNN_MSM#
SKL_CNL#
R0902 0Ohm
1 2
R0903 0Ohm
T0931
1
1 2
T0930
1
From Intel, SKL-U 2+2 remove these pins.
1 2
R0904 100KOhm@
+VCCST_CPU 3,5,7,25
+1.8VSUS 21,24,26,84
+VCCST_CPU
940432
01V010000015
Intel confirm this pin is pulled high to +VCCST_CPU for CannonLake
B B
U0301T
SPARE
AW69
RSVD_43
AW68
RSVD_44
AU56
+1.8VSUS +VCC_1P8
1 2
R0910 0Ohm@
near U11
A A
12
C0901
1UF/6.3V
@
AW48
U12
U11
H11
RSVD_45
RSVD_46
C7
RSVD_47
RSVD_48
RSVD_49
RSVD_50
01V010000015
940432
RSVD_51
RSVD_52
RSVD_53
RSVD_54
RSVD_55
RSVD_56
RSVD_57
RSVD_58
F6
E3
C11
B11
A11
D12
C12
F52
CPU(7)_CFG/RSVD
CPU(7)_CFG/RSVD
CPU(7)_CFG/RSVD
Title :
Title :
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
BG1/HW3
BG1/HW3
BG1/HW3
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
P4
P4
P4
Title :
Engineer:
Engineer:
Engineer:
1
Bill Yang
Bill Yang
Bill Yang
9 108Tuesday, September 06, 2016
9 108Tuesday, September 06, 2016
9 108Tuesday, September 06, 2016
Rev
Rev
Rev
1.0
1.0
1.0
Vinafix.com
5
D D
4
3
2
1
C C
B B
A A
<Variant Name>
<Variant Name>
<Variant Name>
Title :
Title :
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
<Title>
<Title>
<Title>
Size Project Name
KTKUG_25W
C
Size Project Name
KTKUG_25W
C
Size Project Name
KTKUG_25W
C
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Engineer:
Engineer:
Engineer:
1
Title :
Rev
Rev
Rev
1.1
1.1
10 108Tuesday, September 06, 2016
10 108Tuesday, September 06, 2016
10 108Tuesday, September 06, 2016
1.1
Vinafix.com
5
D D
4
3
2
1
C C
B B
A A
<Variant Name>
<Variant Name>
<Variant Name>
Title :
Title :
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
<Title>
<Title>
<Title>
Size Project Name
KTKUG_25W 1.1
C
Size Project Name
KTKUG_25W 1.1
C
Size Project Name
KTKUG_25W 1.1
C
5
4
3
2
Date: Sheet of
Date: Sheet of
Date: Sheet of
Title :
Engineer:
Engineer:
Engineer:
1
Rev
Rev
Rev
11 108Tuesday, September 06, 2016
11 108Tuesday, September 06, 2016
11 108Tuesday, September 06, 2016
Vinafix.com
5
D D
4
3
2
1
C C
B B
A A
Title
Title
Title
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A
A
A
Date: Sheet of
Date: Sheet of
Date: Sheet of
5
4
3
<Doc> <RevCode>
<Doc> <RevCode>
<Doc> <RevCode>
12 108Tuesday, September 06, 2016
12 108Tuesday, September 06, 2016
12 108Tuesday, September 06, 2016
2
1
Vinafix.com
5
D D
4
3
2
1
C C
B B
A A
Title
Title
Title
<Title>
<Title>
<Title>
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A
A
A
Date: Sheet of
Date: Sheet of
Date: Sheet of
5
4
3
<Doc> <RevCode>
<Doc> <RevCode>
<Doc> <RevCode>
13 108Tuesday, September 06, 2016
13 108Tuesday, September 06, 2016
13 108Tuesday, September 06, 2016
2
1
Vinafix.com
5
D D
4
3
2
1
C C
B B
A A
<Variant Name>
<Variant Name>
<Variant Name>
Title :
Title :
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
<Title>
<Title>
<Title>
Size Project Name
KTKUG_25W 1.1
C
Size Project Name
KTKUG_25W 1.1
C
Size Project Name
KTKUG_25W 1.1
C
5
4
3
2
Date: Sheet of
Date: Sheet of
Date: Sheet of
Title :
Engineer:
Engineer:
Engineer:
1
Rev
Rev
Rev
14 108Tuesday, September 06, 2016
14 108Tuesday, September 06, 2016
14 108Tuesday, September 06, 2016
Vinafix.com
5
4
3
2
1
+0.6VS
+0.6VS 17,57,83
DDR4(0)_Termination
+1.2V
D D
+0.6VS
+0.6VS
1 2
1 2
1 2
1 2
1 2
C C
1 2
1 2
1 2
1 2
1 2
1 2
R150134.8Ohm 1%
R150234.8Ohm 1%
R150334.8Ohm 1%
R150434.8Ohm 1%
R150534.8Ohm 1%
R150634.8Ohm 1%
R150734.8Ohm 1%
R150834.8Ohm 1%
R150934.8Ohm 1%
R151034.8Ohm 1%
R151134.8Ohm 1%
M0_MA0
M0_MA1
M0_MA2
M0_MA3
M0_MA4
M0_MA5
M0_MA6
M0_MA7
M0_MA8
M0_MA9
M_A_A10_AP
M_A_A0 4,16
M_A_A1 4,16
M_A_A2 4,16
M_A_A3 4,16
M_A_A4 4,16
M_A_A5 4,16
M_A_A6 4,16
M_A_A7 4,16
M_A_A8 4,16
M_A_A9 4,16
M_A_A10 4,16
M_A_DIM0_CS#04,16
M_A_DIM0_CKE04,16
M_A_BG04,16
M_A_BG14,16
M_A_BA04,16
M_A_BA14,16
M_A_DIM0_ODT04,16
M_A_ACT#4,16
M_A_PAR4,16
R1523 34.8Ohm1%
R1538 34.8Ohm1%
R1524 34.8Ohm1%
R1525 34.8Ohm1%
R1530 34.8Ohm1%
R1532 34.8Ohm1%
R1534 34.8Ohm1%
vx_r0402_small
1 2
R1521 34.8Ohm1%
1 2
R1522 34.8Ohm1%
vx_r0402_small
vx_r0402_small
vx_r0402_small
vx_r0402_small
vx_r0402_small
vx_r0402_small
vx_r0402_small
vx_r0402_small
/DDP
+0.6VS
12
12
12
12
12
12
12
Average placed close to +VDDQ_VTT power plane
+0.6VS
12
C1501
1UF/6.3V
X5R/10%
vx_c0402_small
+0.6VS
12
C1502
1UF/6.3V
X5R/10%
vx_c0402_small
12
C1053
1UF/6.3V
X5R/10%
vx_c0402_small
12
vx_c0402_small
C1504
1UF/6.3V
X5R/10%
12
C1505
1UF/6.3V
X5R/10%
vx_c0402_small
12
C1506
1UF/6.3V
X5R/10%
vx_c0402_small
+1.2V 4,7,16,17,18,57,83
12
C1507
1UF/6.3V
X5R/10%
vx_c0402_small
12
vx_c0402_small
C1508
1UF/6.3V
X5R/10%
1 2
1 2
1 2
1 2
B B
1 2
1 2
A A
R151234.8Ohm 1%
R151334.8Ohm 1%
R151434.8Ohm 1%
R151534.8Ohm 1%
R151634.8Ohm 1%
R152934.8Ohm 1%
M0_MA11
M0_MA12
M0_MA13
M_A_A14_WE_N
M_A_A15_CAS_N
M_A_A16_RAS_N
M_A_A11 4,16
M_A_A12 4,16
M_A_A13 4,16
M_A_A14 4,16
M_A_A15 4,16
M_A_A16 4,16
+0.6VS
vx_r0402_small
1 2
M_A_DIM0_CLK#04,16
M_A_DIM0_CLK04,16
M_A_ALERT#4,16
R1536 36Ohm5%
R1537 36Ohm5%
R1535 49.9Ohm1%
vx_r0402_small
1 2
vx_r0402_small
1 2
+1.2V
10UF/6.3V
C1509
12
10UF/6.3V
12
C1510
DDR4(1)_Termination
DDR4(1)_Termination
Title :
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-NB4
BG1-NB4
BG1-NB4
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
P4
P4
P4
Title :
Engineer:
Engineer:
Engineer:
1
DDR4(1)_Termination
Bill Yang
Bill Yang
Bill Yang
15 96Tuesday, September 06, 2016
15 96Tuesday, September 06, 2016
15 96Tuesday, September 06, 2016
Rev
Rev
Rev
1.0
1.0
1.0
Vinafix.com
5
+1.2V
12
C1612
C1629
+2P5VPP
12
+1.2V
C1609
1UF/6.3V
C1623
1UF/6.3V
1UF/6.3V
1UF/6.3V
D D
C C
12
12
C1606
1UF/6.3V
12
Close to U1601
+1.2V
12
C1602
1UF/6.3V
M_A_ACT#4,15
M_A_BA04,15
M_A_BA14,15
M_A_BG04, 15
M_A_PAR4,15
M_A_DIM0_CS#04,15
M_A_DIM0_ODT04,15
M_A_DIM0_CKE04,15
M_A_DIM0_CLK04,15
M_A_DIM0_CLK#04,15
M_A_ALERT#4,15
Byte 0: 0~7
M_A_DQS04
M_A_DQS#04
Byte 1: 8~15
M_A_DQS14
M_A_DQS#14
DDR4_DRAMRST#4,17
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_A16
M_A_D8
M_A_D10
M_A_D12
M_A_D11
M_A_D9
M_A_D14
M_A_D13
M_A_D15
M_A_D0
M_A_D2
M_A_D4
M_A_D6
M_A_D1
M_A_D7
M_A_D5
M_A_D3
U1601
P3
A0
P7
A1
R3
A2
N7
A3
N3
A4
P8
A5
P2
A6
R8
A7
R2
A8
R7
A9
M3
A10/AP
T2
A11
M7
A12/BC_n
T8
A13
L2
WE_n/A14
M8
CAS_n/A15
L8
RAS_n/A16
L3
ACT_n
N2
BA0
N8
BA1
M2
BG0
T3
PAR
L7
CS_n
K3
ODT
K2
CKE
K7
CK_t
K8
CK_c
P9
ALERT_n
G2
LDQ0
F7
LDQ1
H3
LDQ2
H7
LDQ3
H2
LDQ4
H8
LDQ5
J3
LDQ6
J7
LDQ7
E7
NF/LDM_n/LDBI_n
G3
LDQS_t
F3
LDQS_c
A3
UDQ0
B8
UDQ1
C3
UDQ2
C7
UDQ3
C2
UDQ4
C8
UDQ5
D3
UDQ6
D7
UDQ7
E2
NF/UDM_n/UDBI_n
B7
UDQS_t
A7
UDQS_c
P1
RESET_n
MT40A1G16HBA-0 83E:A
03V1500 00100
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_5
VDDQ_9
VDDQ_10
VPP_1
VPP_2
VREFCA
VSS_8
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
VSSQ_10
B3
B9
D1
G7
J1
J9
L1
L9
R1
T9
A1
A9
C1
D9
F2
F8
G1
G9
J2
J8
B1
R9
M1
F9
LZQ
N9
TEN
T7
B2
E1
E9
UZQ
G8
K1
K9
M9
BG1
N1
T1
A2
A8
C9
D2
D8
E3
E8
F1
H1
H9
+1.2V
1 2
R1601 24 0Ohm
/DDP
R1624 0 Ohm
MEM1_E9
MEM1_M9
+2P5VPP
12
4
+V_VREF_CA_DIMM0
MEM1_E9
MEM1_E9
MEM1_M9
MEM1_M9
12
C1665
0.047UF/10 V
1AV200000 049
/DDP
R1608 24 0Ohm
1 2
/SDP
R1616 0 Ohm
Colay
/DDP
R1609 0 Ohm
/SDP
R1617 0 Ohm
3
M_A_A[16:0] 4,15
M_A_D[63:0] 4
U1602
P3
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_A16
M_A_ACT#
M_A_BA0
M_A_BA1
M_A_BG0
M_A_PAR
M_A_DIM0_CS#0
M_A_DIM0_ODT0
M_A_DIM0_CKE0
M_A_DIM0_CLK0
M_A_DIM0_CLK#0
M_A_ALERT#
M_A_D17
M_A_D23
+1.2V
Byte 2: 16~23
M_A_DQS24
12
M_A_DQS#24
Byte 3: 24~31
12
M_A_BG1 4,1 5
12
M_A_DQS34
M_A_DQS#34
M_A_D16
M_A_D18
M_A_D21
M_A_D19
M_A_D20
M_A_D22
M_A_D25
M_A_D27
M_A_D29
M_A_D26
M_A_D28
M_A_D31
M_A_D24
M_A_D30
DDR4_DRAMRST#
A0
P7
A1
R3
A2
N7
A3
N3
A4
P8
A5
P2
A6
R8
A7
R2
A8
R7
A9
M3
A10/AP
T2
A11
M7
A12/BC_n
T8
A13
L2
WE_n/A14
M8
CAS_n/A15
L8
RAS_n/A16
L3
ACT_n
N2
BA0
N8
BA1
M2
BG0
T3
PAR
L7
CS_n
K3
ODT
K2
CKE
K7
CK_t
K8
CK_c
P9
ALERT_n
G2
LDQ0
F7
LDQ1
H3
LDQ2
H7
LDQ3
H2
LDQ4
H8
LDQ5
J3
LDQ6
J7
LDQ7
E7
NF/LDM_n/LDBI_n
G3
LDQS_t
F3
LDQS_c
A3
UDQ0
B8
UDQ1
C3
UDQ2
C7
UDQ3
C2
UDQ4
C8
UDQ5
D3
UDQ6
D7
UDQ7
E2
NF/UDM_n/UDBI_n
B7
UDQS_t
A7
UDQS_c
P1
RESET_n
MT40A1G16HBA-0 83E:A
03V1500 00100
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_5
VDDQ_9
VDDQ_10
VPP_1
VPP_2
VREFCA
VSS_8
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
VSSQ_10
LZQ
TEN
UZQ
BG1
+1.2V
B3
B9
D1
G7
J1
J9
L1
L9
R1
T9
A1
A9
C1
D9
F2
F8
G1
G9
J2
J8
B1
R9
M1
F9
1 2
R1603 24 0Ohm
N9
T7
R1625 0 Ohm
B2
E1
E9
G8
K1
K9
M9
N1
T1
A2
A8
C9
D2
D8
E3
E8
F1
H1
H9
/DDP
MEM2_E9
MEM2_M9
+2P5VPP
12
2
+1.2V
12
12
C1601
C1611
1UF/6.3V
1UF/6.3V
+2P5VPP
12
12
C1627
C1628
1UF/6.3V
1UF/6.3V
+V_VREF_CA_DIMM0
12
C1664
0.047UF/10 V
1AV200000 049
/DDP
R1610 240Oh m
MEM2_E9
MEM2_E9
1 2
/SDP
R1618 0 Ohm
12
Colay
/DDP
R1611 0Ohm
MEM2_M9 M_A_BG1
R1619 0Ohm
MEM2_M9
12
/SDP
12
12
C1604
1UF/6.3V
Close to U1602
C1613
1UF/6.3V
1
+1.2V
+2P5VPP
+1.2V 4,7,15,17 ,18,57,83
+2P5VPP 17 ,57,82
12
Change to 0402 size for layout
+1.2V
12
12
10UF/6.3V
12
10UF/6.3V
C1605
C1632
12
10UF/6.3V
12
C1608
10UF/6.3V
C1610
12
10UF/6.3V
+2P5VPP
10UF/6.3V
C1633
C1614
12
10UF/6.3V
12
10UF/6.3V
C1607
C1631
Around the DRAM devices
12
C1617
C1625
+2P5VPP
12
1UF/6.3V
C1630
1UF/6.3V
C1615
12
1UF/6.3V
1UF/6.3V
B B
A A
12
12
C1616
1UF/6.3V
Close to U1603
+1.2V
Byte 4: 32~39
Byte 5: 40~47
5
C1618
1UF/6.3V
M_A_DQS44
M_A_DQS#44
M_A_DQS54
M_A_DQS#54
12
+1.2V
C1621
1UF/6.3V
C1626
1UF/6.3V
12
+2P5VPP
12
1UF/6.3V
C1624
1UF/6.3V
C1619
12
C1620
1UF/6.3V
12
12
12
C1622
1UF/6.3V
Close to U1604
12
12
12
<Variant Na me>
<Variant Na me>
<Variant Na me>
DDR4(1)_MEMORY DOWN
DDR4(1)_MEMORY DOWN
DDR4(1)_MEMORY DOWN
Title :
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1/HW3
BG1/HW3
BG1/HW3
Size Proje ct Name
Size Proje ct Name
Size Proje ct Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
P4
P4
P4
1
Title :
Engineer:
Engineer:
Engineer:
Bill Yang
Bill Yang
Bill Yang
16 104Tuesday, Se ptember 06, 2 016
16 104Tuesday, Se ptember 06, 2 016
16 104Tuesday, Se ptember 06, 2 016
Rev
Rev
Rev
1.0
1.0
1.0
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_ACT#
M_A_BA0
M_A_BA1
M_A_BG0
M_A_PAR
M_A_DIM0_CS#0
M_A_DIM0_ODT0
M_A_DIM0_CKE0
M_A_DIM0_CLK0
M_A_DIM0_CLK#0
M_A_ALERT#
M_A_D37
M_A_D38
M_A_D33
M_A_D39
M_A_D36
M_A_D35
M_A_D32
M_A_D34
M_A_D43
M_A_D46
M_A_D40
M_A_D47
M_A_D45
M_A_D42
M_A_D44
M_A_D41
U1603
P3
A0
P7
A1
R3
A2
N7
A3
N3
A4
P8
A5
P2
A6
R8
A7
R2
A8
R7
A9
M3
A10/AP
T2
A11
M7
A12/BC_n
T8
A13
L2
WE_n/A14
M8
CAS_n/A15
L8
RAS_n/A16
L3
ACT_n
N2
BA0
N8
BA1
M2
BG0
T3
PAR
L7
CS_n
K3
ODT
K2
CKE
K7
CK_t
K8
CK_c
P9
ALERT_n
G2
LDQ0
F7
LDQ1
H3
LDQ2
H7
LDQ3
H2
LDQ4
H8
LDQ5
J3
LDQ6
J7
LDQ7
E7
NF/LDM_n/LDBI_n
G3
LDQS_t
F3
LDQS_c
A3
UDQ0
B8
UDQ1
C3
UDQ2
C7
UDQ3
C2
UDQ4
C8
UDQ5
D3
UDQ6
D7
UDQ7
E2
NF/UDM_n/UDBI_n
B7
UDQS_t
A7
UDQS_c
P1
RESET_n
MT40A1G16HBA-0 83E:A
03V1500 00100
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_5
VDDQ_9
VDDQ_10
VPP_1
VPP_2
VREFCA
VSS_8
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
VSSQ_10
B3
B9
D1
G7
J1
J9
L1
L9
R1
T9
A1
A9
C1
D9
F2
F8
G1
G9
J2
J8
B1
R9
M1
F9
LZQ
N9
TEN
T7
B2
E1
E9
UZQ
G8
K1
K9
M9
BG1
N1
T1
A2
A8
C9
D2
D8
E3
E8
F1
H1
H9
+1.2V
+2P5VPP
R1605 24 0Ohm
1 2
/DDP
R1627 0 Ohm
12
MEM3_E9
MEM3_M9
+V_VREF_CA_DIMM0
12
C1666
0.047UF/10 V
1AV200000 049
/DDP
MEM3_E9
MEM3_E9
1 2
R1614 24 0Ohm
/SDP
R1620 0Ohm
12
Colay
/DDP
R1615 0 Ohm
MEM3_M9 M_A_BG1
R1621 0 Ohm
MEM3_M9
4
12
/SDP
12
+1.2V
Byte 6: 48~55
M_A_DQS64
M_A_DQS#64
Byte 7: 56~63
M_A_DQS74
M_A_DQS#74
3
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_A16M_A_A16
M_A_ACT#
M_A_BA0
M_A_BA1
M_A_BG0
M_A_PAR
M_A_DIM0_CS#0
M_A_DIM0_ODT0
M_A_DIM0_CKE0
M_A_DIM0_CLK0
M_A_DIM0_CLK#0
M_A_ALERT#
M_A_D48
M_A_D51
M_A_D49
M_A_D55
M_A_D53
M_A_D54
M_A_D52
M_A_D50
M_A_D59
M_A_D57
M_A_D62
M_A_D58
M_A_D56
M_A_D61
M_A_D63
M_A_D60
DDR4_DRAMRST#DDR4_DRAMRST#
U1604
P3
A0
P7
A1
R3
A2
N7
A3
N3
A4
P8
A5
P2
A6
R8
A7
R2
A8
R7
A9
M3
A10/AP
T2
A11
M7
A12/BC_n
T8
A13
L2
WE_n/A14
M8
CAS_n/A15
L8
RAS_n/A16
L3
ACT_n
N2
BA0
N8
BA1
M2
BG0
T3
PAR
L7
CS_n
K3
ODT
K2
CKE
K7
CK_t
K8
CK_c
P9
ALERT_n
G2
LDQ0
F7
LDQ1
H3
LDQ2
H7
LDQ3
H2
LDQ4
H8
LDQ5
J3
LDQ6
J7
LDQ7
E7
NF/LDM_n/LDBI_n
G3
LDQS_t
F3
LDQS_c
A3
UDQ0
B8
UDQ1
C3
UDQ2
C7
UDQ3
C2
UDQ4
C8
UDQ5
D3
UDQ6
D7
UDQ7
E2
NF/UDM_n/UDBI_n
B7
UDQS_t
A7
UDQS_c
P1
RESET_n
MT40A1G16HBA-0 83E:A
03V1500 00100
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_5
VDDQ_9
VDDQ_10
VPP_1
VPP_2
VREFCA
VSS_8
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
VSSQ_10
B3
B9
D1
G7
J1
J9
L1
L9
R1
T9
A1
A9
C1
D9
F2
F8
G1
G9
J2
J8
B1
R9
M1
F9
LZQ
N9
TEN
T7
B2
E1
E9
UZQ
G8
K1
K9
M9
BG1
N1
T1
A2
A8
C9
D2
D8
E3
E8
F1
H1
H9
+1.2V
+2P5VPP
R1607 24 0Ohm
1 2
/DDP
R1626 0 Ohm
12
MEM4_E9
MEM4_M9
+V_VREF_CA_DIMM0
12
C1667
0.047UF/10 V
1AV200000 049
/DDP
R1612 240Oh m
MEM4_E9
MEM4_E9
1 2
/SDP
R1622 0 Ohm
Colay
/DDP
R1613 0 Ohm
MEM4_M9 M_A_BG1
MEM4_M9
/SDP
R1623 0 Ohm
2
Vinafix.com
5
4
3
2
1
+0.6VS
+1.2V
STD
M_B_D[0..63] 4
6:48~55
7:56~63
4:32~39
5:40~47
3:24~31
2:16~23
0:0~7
1:8~15
1 2
R1709 240Ohm 1%
1 2
R1710 240Ohm 1%
M_B_DQS6 4
M_B_DQS#6 4
M_B_DQS7 4
M_B_DQS#7 4
M_B_DQS4 4
M_B_DQS#4 4
M_B_DQS5 4
M_B_DQS#5 4
M_B_DQS3 4
M_B_DQS#3 4
M_B_DQS2 4
M_B_DQS#2 4
M_B_DQS0 4
M_B_DQS#0 4
M_B_DQS1 4
M_B_DQS#1 4
+1.2V
87
88
91
92
J1701A
RAS_n/A16
CAS_n/A15
WE_n/A14
A13
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
BA1
BA0
BG1
BG0
CK1_t/NF
CK1_c/NF
CK0_t
CK0_c
C1/CS3_n/NC
C0/CS2_n/NC
CS1_n
CS0_n
CKE1
CKE0
ODT1
ODT0
CB7/NC
CB6/NC
CB5/NC
CB4/NC
CB3/NC
CB2/NC
CB1/NC
CB0/NC
PARITY
RESET_n
EVENT_n/NF
ALERT_n
ACT_n
VDDSPD
SA2
SA1
SA0
SDA
SCL
VREFCA
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
DM8_n/DBI_n/NC
DM7_n/DBI7_n
DM6_n/DBI6_n
DM5_n/DBI5_n
DM4_n/DBI4_n
DM3_n/DBI3_n
DM2_n/DBI2_n
DM1_n/DBI_n
DM0_n/DBI0_n
DQS8_t
DQS8_c
DQS7_t
DQS7_c
DQS6_t
DQS6_c
DQS5_t
DQS5_c
DQS4_t
DQS4_c
DQS3_t
DQS3_c
DQS2_t
DQS2_c
DQS1_t
DQS1_c
DQS0_t
DQS0_c
246
245
233
232
250
249
236
237
225
224
212
211
229
228
215
216
204
203
190
191
208
207
194
195
182
183
169
170
186
187
173
174
80
79
67
66
84
83
71
70
59
58
45
46
63
62
49
50
37
38
25
24
42
41
29
28
17
16
3
4
21
20
7
8
96
241
220
199
178
75
54
33
12
97
95
242
240
221
219
200
198
179
177
76
74
55
53
34
32
13
11
M_B_D55
M_B_D50
M_B_D52
M_B_D48
M_B_D54
M_B_D51
M_B_D49
M_B_D53
M_B_D62
M_B_D59
M_B_D61
M_B_D57
M_B_D63
M_B_D58
M_B_D56
M_B_D60
M_B_D35
M_B_D38
M_B_D32
M_B_D37
M_B_D34
M_B_D39
M_B_D36
M_B_D33
M_B_D46
M_B_D43
M_B_D41
M_B_D45
M_B_D42
M_B_D47
M_B_D40
M_B_D44
M_B_D27
M_B_D31
M_B_D28
M_B_D25
M_B_D26
M_B_D30
M_B_D29
M_B_D24
M_B_D23
M_B_D19
M_B_D20
M_B_D17
M_B_D22
M_B_D18
M_B_D21
M_B_D16
M_B_D6
M_B_D3
M_B_D4
M_B_D1
M_B_D2
M_B_D7
M_B_D5
M_B_D0
M_B_D11
M_B_D15
M_B_D12
M_B_D9
M_B_D10
M_B_D14
M_B_D13
M_B_D8
+1.2V
M_B_DQS8
M_B_DQS#8
M_B_DQS6
M_B_DQS#6
M_B_DQS7
M_B_DQS#7
M_B_DQS4
M_B_DQS#4
M_B_DQS5
M_B_DQS#5
M_B_DQS3
M_B_DQS#3
M_B_DQS2
M_B_DQS#2
M_B_DQS0
M_B_DQS#0
M_B_DQS1
M_B_DQS#1
M_B_A[0..16]4
D D
M_B_BA14
M_B_BA04
M_B_BG14
M_B_BG04
M_B_DIM0_CLK14
M_B_DIM0_CLK#14
M_B_DIM0_CLK04
M_B_DIM0_CLK#04
M_B_DIM0_CS#14
M_B_DIM0_CS#04
C C
+1.2V
+1.2V
R1708
240Ohm
1 2
R1702
0Ohm
R1705
0Ohm
1%
R1703
0Ohm
1 2
@
R1706
0Ohm
1 2
+V_VREF_CA_DIMM1
12
C1713
0.1UF/16V
R1704
@
0Ohm
1 2
12
12
C1714
2.2UF/6.3V
@
C1754
2.2UF/6.3V
R1707
0Ohm
1 2
SMB_DAT_S28,46,51
SMB_CLK_S28,46,51
C1757 10PF/50V@
B B
12
@
1 2
1 2
M_B_DIM0_CKE14
M_B_DIM0_CKE04
M_B_DIM0_ODT14
M_B_DIM0_ODT04
1 2
R1711 240Ohm 1%
1 2
R1712 240Ohm 1%
1 2
R1713 240Ohm 1%
1 2
R1714 240Ohm 1%
1 2
R1715 240Ohm 1%
1 2
R1716 240Ohm 1%
1 2
R1717 240Ohm 1%
1 2
R1718 240Ohm 1%
M_B_PAR4
DDR4_DRAMRST#4,16
M_B_ALERT#4
M_B_ACT#4
+3VS
12
SP1701 R0402
SP1702 R0402
C1755
0.1UF/16V
12
12
12
M_B_A16
M_B_A15
M_B_A14
M_B_A13
M_B_A12
M_B_A11
M_B_A10
M_B_A9
M_B_A8
M_B_A7
M_B_A6
M_B_A5
M_B_A4
M_B_A3
M_B_A2
M_B_A1
M_B_A0
T1701
T1702
@
V_SA2_DIMM0_CHB
V_SA1_DIMM0_CHB
V_SA0_DIMM0_CHB
C1756
10PF/50V
@
SMB_DAT_S_CHB
SMB_CLK_S_CHB
+V_VREF_CA_DIMM1
12
C1743
0.1UF/16V
152
156
151
158
119
120
146
121
125
122
127
126
128
131
132
133
144
145
150
113
115
138
140
137
139
165
1
162
1
157
149
110
109
161
155
104
100
105
101
143
108
134
116
114
255
166
260
256
254
253
164
+0.6VS
C1719
10UF/6.3V
+2P5VPP
+2P5VPP
12
C1748
10UF/6.3V
C1730
1UF/6.3V
12
12
C1751
1UF/6.3V
+1.2V
+0.6VS 15,57,83
+1.2V 4,7,15,16,18,57,83
+2P5VPP 16,57,82
12
12
C1702
10PF/50V
C1734
10UF/6.3V
C1735
10UF/6.3V
C1701
10PF/50V
@
@
C1729
1UF/6.3V
12
12
12
12
C1733
10UF/6.3V
C1738
10UF/6.3V
12
12
C1736
10UF/6.3V
C1737
10UF/6.3V
+1.2V +2P5VPP+0.6VS
111
112
117
118
123
124
129
130
135
136
141
142
147
148
153
154
159
160
163
C1704
C1703
12
1UF/6.3V
12
1UF/6.3V
12
10UF/6.3V
12
10UF/6.3V
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
1
VSS1
2
VSS2
5
VSS3
6
VSS4
9
VSS5
10
VSS6
14
VSS7
15
VSS8
18
VSS9
19
VSS10
22
VSS11
23
VSS12
26
VSS13
27
VSS14
30
VSS15
31
VSS16
35
VSS17
36
VSS18
39
VSS19
40
VSS20
43
VSS21
44
VSS22
47
VSS23
48
VSS24
51
VSS25
52
VSS26
56
VSS27
57
VSS28
60
VSS29
61
VSS30
64
VSS31
65
VSS32
68
VSS33
69
VSS34
72
VSS35
73
VSS36
77
VSS37
78
VSS38
81
VSS39
82
VSS40
85
VSS41
86
VSS42
89
VSS43
90
VSS44
93
VSS45
94
VSS46
98
VSS47
DDR4_SO_260P
12V02GBSM007
12
C1708
12
C1715
J1701B
C1707
1UF/6.3V
C1710
1UF/6.3V
12
12
VTT
VPP2
VPP1
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
SIDE2
SIDE1
NP_NC2
NP_NC1
1UF/6.3V
1UF/6.3V
C1706
C1716
258
259
257
99
102
103
106
107
167
168
171
172
175
176
180
181
184
185
188
189
192
193
196
197
201
202
205
206
209
210
213
214
217
218
222
223
226
227
230
231
234
235
238
239
243
244
247
248
251
252
264
263
262
261
C1705
1UF/6.3V
C1712
1UF/6.3V
12
12
12
12
DDR4_SO_260P
12V02GBSM007
A A
<Variant Name>
<Variant Name>
<Variant Name>
DDR4(1)_SO-DIMM
DDR4(1)_SO-DIMM
DDR4(1)_SO-DIMM
Title :
Title :
1
Title :
Engineer:
Engineer:
Engineer:
Bill Yang
Bill Yang
Bill Yang
17 108Tuesday, September 06, 2016
17 108Tuesday, September 06, 2016
17 108Tuesday, September 06, 2016
Rev
Rev
Rev
1.0
1.0
1.0
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
BG1/HW3
BG1/HW3
BG1/HW3
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
P4
P4
P4
Vinafix.com
5
DDR4(3)_CA/DQ Voltage
DDR4(3)_CA/DQ Voltage
DDR4(3)_CA/DQ Voltage
4
3
2
1
M3: CPU driven VREF path is stuffed be default.
M1: VREF_DQ driven by a Voltage Divider Network during Processor power-off
D D
DIMM0_VREF_CA4
12
C1804
0.022UF/16V
12
R1818
24.9Ohm
1%
C C
M3
R1822 2.7Ohm
10V220000434
12
12
C1802
0.1UF/16V
+1.2V
R1810
1.8KOhm
10V220000316
1 2
R1809
1.8KOhm
10V220000316
1 2
+V_VREF_CA_DIMM0
+V_VREF_CA_DIMM0
+V_VREF_CA_DIMM1
+1.2V
+1.2V 4,7,15,16,17,57,83
+V_VREF_CA_DIMM0 16
+V_VREF_CA_DIMM1 17
M1
+1.2V
R1807
1KOhm
1 2
R1808
1KOhm
1 2
+V_VREF_CA_DIMM1
10V220000002
10V220000002
M3
DIMM1_VREF_DQ4
12
C1806
B B
0.022UF/16V
12
R1820
24.9Ohm
1%
R1823 2Ohm
12
12
C1801
0.1UF/16V
M1
A A
<Variant Name>
<Variant Name>
<Variant Name>
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
1
Bill Yang
Bill Yang
Bill Yang
18 108Tuesday, September 06, 2016
18 108Tuesday, September 06, 2016
18 108Tuesday, September 06, 2016
Rev
Rev
Rev
1.0
1.0
1.0
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1/HW3
BG1/HW3
BG1/HW3
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
P4
P4
P4
Vinafix.com
5
D D
4
3
2
1
C C
B B
A A
<Variant Name>
<Variant Name>
<Variant Name>
Title :
Title :
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
<Title>
<Title>
<Title>
Size Project Name
KTKUG_25W 1.1
C
Size Project Name
KTKUG_25W 1.1
C
Size Project Name
KTKUG_25W 1.1
C
5
4
3
2
Date: Sheet of
Date: Sheet of
Date: Sheet of
Title :
Engineer:
Engineer:
Engineer:
1
Rev
Rev
Rev
19 108Tuesday, September 06, 2016
19 108Tuesday, September 06, 2016
19 108Tuesday, September 06, 2016
Vinafix.com
5
4
3
2
1
+3VS
+3VSUS_ORG
D D
U0301E
SPI_CLK28,30
SPI_SO28,30
SPI_SI28,30
SPI_WP#_IO228
SPI_HOLD#_IO328
T2001
C C
1
SPI_CS#028,30
SPI_CS2#
CL_CLK53
CL_DAT53
CL_RST #53
RCIN#30
INT_SERIRQ30,44,62
AV2
AW3
AV3
AW2
AU4
AU3
AU2
AU1
M2
M3
M1
G3
G2
G1
AW13
AY11
J4
V1
V2
01V010000015
SPI - FLASH
SPI0_CLK
SPI0_MISO
SPI0_MOSI
SPI0_IO2
SPI0_IO3
SPI0_CS0#
SPI0_CS1#
SPI0_CS2#
SPI - TOUCH
GPP_D1/SPI1_CLK
GPP_D2/SPI1_MISO
GPP_D3/SPI1_MOSI
GPP_D21/SPI1_IO2
GPP_D22/SPI1_IO3
GPP_D0/SPI1_CS#
C LINK
CL_CLK
CL_DATA
CL_RST#
GPP_A0/RCIN#
GPP_A6/SERIRQ
940432
LPC
SMBUS, SMLINK
GPP_C0/SMBCLK
GPP_C1/SMBDATA
GPP_C2/SMBALERT#
GPP_C3/SML0CLK
GPP_C4/SML0DATA
GPP_C5/SML0ALERT#
GPP_C6/SML1CLK
GPP_B23/SML1ALERT#/PCHHOT#
GPP_A14/SUS_STAT#/ESPI_RESET#
GPP_A9/CLKOUT_LPC0/ESPI_CLK
GPP_C7/SML1DATA
GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3
GPP_A5/LFRAME#/ESPI_CS#
GPP_A10/CLKOUT_LPC1
GPP_A8/CLKRUN#
R7
R8
R10
R9
W2
W1
W3
V3
AM7
AY13
BA13
BB13
AY12
BA12
BA11
AW9
AY9
AW11
SMB_ALER T#
SML0_CLK
SML0_DAT
SML0_ALERT#
SML1_CLK
SML1_DAT
SML1_ALERT#
CLK_KBC PCI_PCH _R
CLK_DE BUG_R
SMB_CLK 28
SMB_DAT 28
SML0_CLK 33,62
SML0_DAT 33,62
1
T2017
1
T2018
LPC_AD 0 30,44,62
LPC_AD 1 30,44,62
LPC_AD 2 30,44,62
LPC_AD 3 30,44,62
LPC_FR AME# 30,44,62
PM_SUS_S TAT# 62
PM_CLKR UN# 30,62 LPCCLK _TPM 62
DIMM/TouchPad
Intel LAN/NFC
1 2
R2001 22O hm
1 2
R2002 22O hm/Debug
1 2
R2022 22O hm/TPM
C2001
10PF/50V
+3VS 3,4,17,21,22,23,24,28,30,31,32,36,37,45,46,47,48,50,51,53,57,61,62,67,91,92
+3VSUS_ORG 21,22,23,25,26
CLK_KBC PCI_PCH 30
CLK_DE BUG 44
C2002
10PF/50V
1 2
@
GND GND
1 2
@
+3VSUS_ORG
1 2
R2021 20KOhm@
GND
B B
1 2
R2004 20KOhm@
SML0_ALERT#
SMB_ALER T#
1 2
R2020 4.7KOhm@
1 2
R2003 2.2KOhm/Vp ro
+3VSUS_ORG
SML0ALERT# - Internal weak pull down
0 : LPC EC (default)
1 : eSPI EC
SMBALERT# - Internal weak pull down 20k ohm
TLS Confidentiality
0 : Disable (default)
INT_SERIRQ
PM_CLKR UN#
1 2
R2009 10KOhm
1 2
R2013 10KOhm
10VH40000005
+3VS
1 : Enable
GND
PDG Page.836 (#543016)
SMB_CLK
SMB_DAT
SML1_DAT
SML1_CLK
SML1_ALERT#
3 4
1 2
3 4
1 2
1 2
R2012 150KOhm
vx_r0402_sm all
RN2001B10KOhm
RN2001A10KOhm
RN2002B2.2KOhm
RN2002A2.2KOhm
A A
<Variant N ame>
<Variant N ame>
<Variant N ame>
PCH(1)_SMB,LPC
PCH(1)_SMB,LPC
Title :
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1/HW 3
BG1/HW 3
BG1/HW 3
Size Project N ame
Size Project N ame
Size Project N ame
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
P4
P4
P4
Title :
Engineer:
Engineer:
Engineer:
1
PCH(1)_SMB,LPC
Bill Yang
Bill Yang
Bill Yang
Rev
Rev
Rev
1.0
1.0
20 108Tuesday, Septem ber 06, 2016
20 108Tuesday, Septem ber 06, 2016
20 108Tuesday, Septem ber 06, 2016
1.0
Vinafix.com
5
+3VSUS_ORG
12
R2121
10KOhm
N/A
D D
12
R2141
10KOhm
N/A
12
R2105
10KOhm
@
+1.8VSUS
12
R2172
10KOhm
/UMA
PCB_ID0
PCB_ID1
PCB_ID2
PCB_ID3
ID2 ID1 ID0 PCB Rev.
0 0 0 R1.0
0 0 1 R1.1
0 1 0 R2.0
0 1 1 R2.1
1 0 0 TBD
1 0 1 TBD
1 1 0 TBD
1 1 1 TBD
12
R2103
10KOhm
@
12
R2140
10KOhm
@
12
R2114
10KOhm
N/A
12
R2171
10KOhm
/DSC
4
MEM_ID0
0
MEM_ID1
0
1
0 1 0
1
0
1
0
3
MEM_ID2
0
00
0
1
Memory Setting
SAMSUNG/K4A4G165WD-BCPB
4Gb 256Mb*16 0315-01C70PB
HYNIX/H5AN4G6NAFR-UHC
4G 256Mb*16 b0315-01EK0PB
SAMSUNG/K4A8G165WB-BCPB
8Gb 512Mb*16 0315-01HF0PB
HYNIX 8G
SAMSUNG/K4A8G165WB-BCRC
2400 512Mb*16
0315-01C80PB
2
+3VSUS_ORG
+1.8VSUS
KBL_ID
1: SKL
0: KBL
+3VS
1
+3VS 3,4,17,20,22,23 ,24,28,30,31,32,36 ,37,45,46,47,48,5 0,51,53,57,61,62,67,91,92
+3VSUS_ORG 20,22,23,25,26
+1.8VSUS 9,24,26,84
SSD_PRSENT#
1: No SSD 1: No NFC
NFC_ID
0: NFC0: SSD
PCB_ID3
1: UMA
0: DSC
1
GND
0
+3VSUS_ORG
+3VSUS_ORG+3VSUS_ORG
+3VSUS_ORG
1
12
R2106
10KOhm
@
C C
12
R2109
10KOhm
N/A
GND GND
+3VSUS_ORG
B B
R2166 10KOhm@
R2144 10KOhm
R2102 10KOhm@
12
R2115
10KOhm
@
12
R2116
10KOhm
N/A
1 2
1 2
1 2
12
R2119
10KOhm
N/A
12
R2120
10KOhm
@
GC6_FB_EN
GPU_EVENT#_PCH
VGA_AON_PWR_EN
12
R2147
10KOhm
/SKL
MEM_ID0
MEM_ID1
MEM_ID2
KBL_SKL_ID
12
R2148
10KOhm
/KBL
GNDGND
G Sensor
G Sensor
NFC_DWL_REQ62
G_PCH_INT51
WiGig_RST#53
UART_RX67
UART_TX67
USB_UART_SEL67
WiGig_WAKE#53
WLAN _ON53
BT_ON/OFF#53
LCD_BKLTEN_PCH3,45
I2C_SDA_MUX_S30
I2C_SCL_MUX_S30
I2C_SDA_TP_S31
I2C_SCL_TP_S31
NFC_DWL_REQ
MEM_ID1
MEM_ID2
GPP_B18
G_PCH_INT
WiGig_RST#
MEM_ID0
BBS
VDB_PD_EN_PCH#
I2C_SDA_SEN_S
I2C_SCL_SEN_S
I2C3_SDA
I2C3_SCL
PCB_ID3
GPIO need to pull high to power with 10Kohm if
unused
+3VSUS_ORG
R2125 10KO hm
1 2
R2108 10KO hm
1 2
R2165 10KO hm
1 2
R2149 10KO hm@
1 2
R2150 10KO hm@
1 2
A A
GND
5
DGPU_PWROK
DGPU_HOLD_RST#
THRO_GPU#
DGPU_HOLD_RST#
DGPU_PWROK
GPP_B18GPP_B18GPP_B18GPP_B18
CRB 0.53 reserve 150k ohm
BBS
BBS
R2152 4.7KOhm@
R2151 20KOhm@
4
R2128 4.7KOhm@
1 2
R2127 4.7KOhm@
1 2
1 2
1 2
+3VS
GSPI0_MOSI / GPP_B18 - Internal weak pull down
0 : No Reboot
1 : Reboot Enable
+3VSUS_ORG
BBS - Internal weak pull down 20k ohm
Boot BIOS Strap
0 : SPI destination (default)
1 : LPC destination
GND
(PD)
0
1
1
U0301F
AN8
GPP_B15/GSPI0_CS#
AP7
GPP_B16/GSPI0_CLK
AP8
GPP_B17/GSPI0_MISO
AR7
GPP_B18/GSPI0_MOSI
AM5
GPP_B19/GSPI1_CS#
AN7
GPP_B20/GSPI1_CLK
AP5
GPP_B21/GSPI1_MISO
AN5
GPP_B22/GSPI1_MOSI
AB1
GPP_C8/UART0_RXD
AB2
GPP_C9/UART0_TXD
W4
GPP_C10/UART0_RTS#
AB3
GPP_C11/UART0_CTS#
AD1
GPP_C20/UART2_RXD
AD2
GPP_C21/UART2_TXD
AD3
GPP_C22/UART2_RTS#
AD4
GPP_C23/UART2_CTS#
U7
GPP_C16/I2C0_SDA
U6
GPP_C17/I2C0_SCL
U8
GPP_C18/I2C1_SDA
U9
GPP_C19/I2C1_SCL
AH9
GPP_F4/I2C2_SDA
AH10
GPP_F5/I2C2_SCL
AH11
GPP_F6/I2C3_SDA
AH12
GPP_F7/I2C3_SCL
AF11
GPP_F8/I2C4_SDA
AF12
GPP_F9/I2C4_SCL
940432
01V010000 015
1
1
1
LPSS ISH
3
SK HYNIX/H5AN8G6NAFR-UHC
2400 512Mb*16
0315-01W60PB
MICRON/MT40A512M16JY-083E:B
2400 512Mb*16
0315-01W90PB
MICRON/MT40A1G16WBU-083E:B
2400 1Gb*16 0315-01YC0PB
GPP_F10/I2C5_SDA/ISH_I2C2_SDA
GPP_F11/I2C5_SCL/ISH_I2C2_SCL
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA
GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL
GPP_D16/ISH_UART0_CTS#/SML0BALERT#
GPP_C12/UART1_RXD/ISH_UART1_RXD
GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
GPP_C15/UART1_CTS#/ISH_UART1_CTS#
Sx_EXIT_HOLDOFF#/GPP_A12/BM_BUSY#/ISH_GP6
NFC_ID
SSD_PRSENT#
I2C_SDA_MUX_S
I2C_SCL_MUX_S
I2C_SDA_SEN_S
I2C_SCL_SEN_S
I2C2_SDA_DP_SW
I2C2_SCL_DP_SW
I2C3_SDA
I2C3_SCL
GPP_D9
GPP_D10
GPP_D11
GPP_D12
GPP_D5/ISH_I2C0_SDA
GPP_D6/ISH_I2C0_SCL
GPP_D7/ISH_I2C1_SDA
GPP_D8/ISH_I2C1_SCL
GPP_D15/ISH_UART0_RTS#
GPP_A18/ISH_GP0
GPP_A19/ISH_GP1
GPP_A20/ISH_GP2
GPP_A21/ISH_GP3
GPP_A22/ISH_GP4
GPP_A23/ISH_GP5
R2173 10KOhm
R2170 10KOhm
R2135 2.2KOhm
R2136 2.2KOhm
R2104 10KOhm@
R2107 10KOhm@
R2153 2.2KOhm@
R2154 2.2KOhm@
R2168 10KOhm@
R2167 10KOhm@
12
12
12
12
12
12
12
12
12
12
2
P2
P3
(PD)
P4
P1
M4
N3
N1
N2
AD11
AD12
U1
U2
U3
U4
AC1
AC2
AC3
AB4
AY8
BA8
BB7
BA7
AY7
AW7
AP13
VDB_PD_EN_PCH#
+3VS
+1.8VSUS+3VSUS_ORG
TP_SENSOR_OFF#
GPU_EVENT#_PCH
DGPU_HOLD_RST#
DGPU_PWROK
THRO_GPU#
GC6_FB_EN
VGA_AON_PWR_EN
I2C2_SDA_DP_SW
I2C2_SCL_DP_SW
KBL_SKL_ID
NFC_ID
SSD_PRSENT#
PCB_ID0
PCB_ID1
PCB_ID2
IOAC_EN_PCH
1 2
GND
I2C0_MUX_SEL 30
T2105
1
T2104
1
T2102
1
T2103
1
T2101
1
T2106
1
TP_IRQ# 30,31
NFC_ID 62
SSD_PRSENT# 51
OP_SD# 37
IOAC_EN_PCH 53
32
3
D
1
1
R2155
100KOhm
<Variant Name>
<Variant Name>
<Variant Name>
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1/HW3
BG1/HW3
BG1/HW3
Size Pr oject Name
Size Pr oject Name
Size Pr oject Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Q2101
2N7002
G
S
2
GND
P4
P4
P4
TP_SENSOR_OFF# 31
VDB_PD_EN_PCH 43
PCH(2) LPSS,ISH
PCH(2) LPSS,ISH
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
1
PCH(2) LPSS,ISH
Bill Yang
Bill Yang
Bill Yang
21 108Tuesday, September 06, 2016
21 108Tuesday, September 06, 2016
21 108Tuesday, September 06, 2016
Rev
Rev
Rev
1.0
1.0
1.0
Vinafix.com
5
4
3
2
1
+3VS
+3VSUS_ORG
D D
U0301G
AUDIO
HDA_SYNC36
HDA_BCLK36
HDA_SDO36
HDA_SDI036
HDA_BCLK_R
HDA_SDO_R
12
12
C2201
22PF/25V
C C
RF request
C2202
22PF/25V
GND
HDA_R ST#36,37
HDA_SPKR36
R2219 33Ohm
R2216 33Ohm
R2215 33Ohm
R2220 33Ohm
R2217 33Ohm
HDA_SPKR
T2230
T2202
HDA_SYNC_R
HDA_BCLK_R
HDA_SDO_R
HDA_SDI0_R
1
SNN_H DA_SD I1
HDA_R ST#_R
1
PCH_G PP_D23
BA22
HDA_SYNC/I2S0_SFRM
AY22
HDA_BLK/I2S0_SCLK
BB22
HDA_SDO/I2S0_TXD
BA21
HDA_SDI0/I2S0_RXD
AY21
HDA_SDI1/I2S1_RXD
AW22
HDA_RST#/I2S1_SCLK
J5
GPP_D23/I2S_MCLK
AY20
I2S1_SFRM
AW20
I2S1_TXD
AK7
GPP_F1/I2S2_SFRM
AK6
GPP_F0/I2S2_SCLK
AK9
GPP_F2/I2S2_TXD
AK10
GPP_F3/I2S2_RXD
H5
GPP_D19/DMIC_CLK0
D7
GPP_D20/DMIC_DATA0
D8
GPP_D17/DMIC_CLK1
C8
GPP_D18/DMIC_DATA1
AW5
GPP_B14/SPKR
SDIO/SDXC
GPP_G0/SD_CMD
GPP_G1/SD_DATA0
GPP_G2/SD_DATA1
GPP_G3/SD_DATA2
GPP_G4/SD_DATA3
GPP_G5/SD_CD#
GPP_G6/SD_CLK
GPP_G7/SD_WP
GPP_A17/SD_PWR_EN#/ISH_GP7
GPP_A16/SD_1P8_SEL
SD_RCOMP
GPP_F23
AB11
AB13
AB12
W12
W11
W10
W8
W7
BA9
BB9
AB7
AF13
200Ohm 10V220000034
12
+3VS 3,4,17,20,21,23,24,28,30,31,32,36,37,45,46,47,48,50,51,53,57,61,62,67,91,92
+3VSUS_ORG 20,21,23,25,26
R2201
1%
GND
RTC_IN# 24
940432
01V010000015
+3VS
1 2
R2202 20KOhm@
GND
HDA_SDO_R
B B
1 2
@
R22031KOhm
12
D2210RB751V-40
+VCCPAZIO
PCH_F LASH_D ESCR IPTOR 30
HDA_SDO - Internal weak pull down
FLASH DESCRIPTOR SECURITY OVERRRIDE
0 : Enable
1 : Disable
HDA_SPKR
1 2
R2209 4.7KOhm@
1 2
R2210 4.7KOhm@
+3VSUS_ORG
SPKR - Internal weak pull down
0 : Disable TOP Swap mode (default)
1 : Enable Top Swap Enable
Default is GPO, to reserve pull high to +3VSUS_ORG
A A
<Variant N ame>
<Variant N ame>
<Variant N ame>
PCH(3),HDA,SDIO
PCH(3),HDA,SDIO
Title :
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1/HW 3
BG1/HW 3
BG1/HW 3
Size Project N ame
Size Project N ame
Size Project N ame
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
P4
P4
P4
Title :
Engineer:
Engineer:
Engineer:
1
PCH(3),HDA,SDIO
Bill Yang
Bill Yang
Bill Yang
Rev
Rev
Rev
1.0
1.0
22 108Tuesday, Septem ber 06, 2016
22 108Tuesday, Septem ber 06, 2016
22 108Tuesday, Septem ber 06, 2016
1.0
Vinafix.com
5
PCH(4) _PCIE,SATA,USB,SSIC
PCH(4) _PCIE,SATA,USB,SSIC
PCH(4) _PCIE,SATA,USB,SSIC
4
3
2
1
+3VS
+3VSUS_ORG
U0301H
PCIE/USB3/SATA
D D
PCIE_RXN_LAN33
PCIE_RXP_LAN33
LAN
WLAN
C C
HDD
WIGIG
SSD
B B
PCIE_TXN_LAN33
PCIE_TXP_LAN33
PCIE_RXN_W LAN53
PCIE_RXP_W LAN53
PCIE_TXN_W LAN53
PCIE_TXP_WL AN53
SATA_RXN051
SATA_RXP051
SATA_TXN051
SATA_TXP051
PCIE_RXN_W IGIG53
PCIE_RXP_W IGIG53
PCIE_TXN_W IGIG53
PCIE_TXP_WIGIG53
PCIE_SATA_RXN11 _SSD51
PCIE_SATA_RXP11_SSD51
PCIE_SATA_TXN11_SSD51
PCIE_SATA_TXP11_SSD51
PCIE_RXN12_ SSD51
PCIE_RXP12_SSD51
PCIE_TXN12_SSD51
PCIE_TXP12_SSD51
1 2
C23200.1U F/16V
1 2
C23210.1U F/16V
C23220.1U F/16V 1 2
1 2
C23230.1U F/16V
SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0
C23010.1U F/16V 1 2
1 2
C23020.1U F/16V
1 2
R2301 100Ohm 1%
PCIE_TXN_LAN_ C
PCIE_TXP_LAN_C
PCIE_TXN_W LAN_C
PCIE_TXP_WL AN_C
PCIE_TXN_W IGIG_C
PCIE_TXP_WIGIG_ C
PCIE_RCOMPN
PCIE_RCOMPP
PIRQA#
H13
PCIE1_RXN/USB3_ 5_RXN
G13
PCIE1_RXP/USB3_5_ RXP
B17
PCIE1_TXN/USB3_5 _TXN
A17
PCIE1_TXP/USB3_5_TXP
G11
PCIE2_RXN/USB3_ 6_RXN
F11
PCIE2_RXP/USB3_6_ RXP
D16
PCIE2_TXN/USB3_6 _TXN
C16
PCIE2_TXP/USB3_6_TXP
H16
PCIE3_RXN
G16
PCIE3_RXP
D17
PCIE3_TXN
C17
PCIE3_TXP
G15
PCIE4_RXN
F15
PCIE4_RXP
B19
PCIE4_TXN
A19
PCIE4_TXP
F16
PCIE5_RXN
E16
PCIE5_RXP
C19
PCIE5_TXN
D19
PCIE5_TXP
G18
PCIE6_RXN
F18
PCIE6_RXP
D20
PCIE6_TXN
C20
PCIE6_TXP
F20
PCIE7_RXN/SATA0_R XN
E20
PCIE7_RXP/SATA0_RXP
B21
PCIE7_TXN/SATA0_TXN
A21
PCIE7_TXP/SATA0_TXP
G21
PCIE8_RXN/SATA1A_R XN
F21
PCIE8_RXP/SATA1A_RXP
D21
PCIE8_TXN/SATA1A_TXN
C21
PCIE8_TXP/SATA1A_TXP
E22
PCIE9_RXN
E23
PCIE9_RXP
B23
PCIE9_TXN
A23
PCIE9_TXP
F25
PCIE10_RXN
E25
PCIE10_RXP
D23
PCIE10_TXN
C23
PCIE10_TXP
F5
PCIE_RCOMPN
E5
PCIE_RCOMPP
D56
PROC_PRD Y#
D61
PROC_PREQ #
BB11
GPP_A7/PIRQA#
E28
PCIE11_RXN/SATA1B_ RXN
E27
PCIE11_RXP/SATA1B_RXP
D24
PCIE11_TXN/SATA1B_TXN
C24
PCIE11_TXP/SATA1B_TXP
E30
PCIE12_RXN/SATA2_ RXN
F30
PCIE12_RXP/SATA2_R XP
A25
PCIE12_TXN/SATA2_TXN
B25
PCIE12_TXP/SATA2_TXP
SSIC / USB3
USB3_2_RXN /SSIC_RXN
USB3_2_RXP/SSIC_R XP
USB3_2_TXN/SSIC_ TXN
USB3_2_TXP/SSIC_TXP
USB2
USB2_VBUSSENSE
GPP_E9/USB2_OC 0#
GPP_E10/USB2_OC 1#
GPP_E11/USB2_OC 2#
GPP_E12/USB2_OC 3#
GPP_E4/DEVSLP0
GPP_E5/DEVSLP1
GPP_E6/DEVSLP2
GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2
GPP_E8/SATALED#
USB3_1_RXN
USB3_1_RXP
USB3_1_TXN
USB3_1_TXP
USB3_3_RXN
USB3_3_RXP
USB3_3_TXN
USB3_3_TXP
USB3_4_RXN
USB3_4_RXP
USB3_4_TXN
USB3_4_TXP
USB2N_1
USB2P_1
USB2N_2
USB2P_2
USB2N_3
USB2P_3
USB2N_4
USB2P_4
USB2N_5
USB2P_5
USB2N_6
USB2P_6
USB2N_7
USB2P_7
USB2N_8
USB2P_8
USB2N_9
USB2P_9
USB2N_10
USB2P_10
USB2_COMP
USB2_ID
H8
G8
C13
D13
J6
H6
B13
A13
J10
H10
B15
A15
E10
F10
C15
D15
AB9
AB10
AD6
AD7
AH3
AJ3
AD9
AD10
AJ1
AJ2
AF6
AF7
AH1
AH2
AF8
AF9
AG1
AG2
AH7
AH8
AB6
USB2_COMP
AG3
USB2_ID_OTG
AG4
USB2_VBUSSENSE_OT G
A9
C9
D9
B9
J1
J2
J3
H2
H3
G4
H1
USB_OC0#_ PCH
USB_OC1#_ PCH
USB_OC2#_ PCH
NFC_IRQ
SATAGP0
SATA_ODD_PR SNT#
USB3_RXN1 52
USB3_RXP1 52
USB3_TXN1 52
USB3_TXP1 5 2
USB3_RXN3 42
USB3_RXP3 42
USB3_TXN3 42
USB3_TXP3 4 2
1 2
R2302 113Ohm 1%
1 2
R2310 1KOhm
1 2
R2330 1KOhm
SATA_SSD_PEDET 5 1
on MLB USB3.0
on MLB Type-C
USB_PN1 52
USB_PP1 52
USB_PN2 67
USB_PP2 67
USB_PN3 42
USB_PP3 42
USB_PN4 42
USB_PP4 42
USB_PN5 53
USB_PP5 53
USB_PN6 31
USB_PP6 31
USB_PN7 45
USB_PP7 45
USB_PN8 67
USB_PP8 67
USB_PN10 45
USB_PP10 45
GND
GND
USB_OC0#_ PCH 52
USB_OC1#_ PCH 67
USB_OC2#_ PCH 42
NFC_IRQ 62
NFC_RESET 62
DEVSLP1 51
+3VS 3,4,17,20,21,22,24 ,28,30,31,32,36,37 ,45,46,47,48,50,51,5 3,57,61,62,67,91,92
+3VSUS_ORG 20,21,22 ,25,26
USB_OC0#_ PCH
USB_OC1#_ PCH
USB_OC2#_ PCH
1 2
3 4
R2329 10KOhm1 2
on MLB USB2.0
ON Swap Bay HUB/ IO U2
DEVSLP1
R2324 10KOhm@
on MLB Type-C
on MLB Type-C
M.2 BT
Finger Printer
SATAGP0
Normal Camera
SD
SATA_ODD_PR SNT#
PIRQA#
R2305 10KOhm@
R2318 10KOhm
Touch Panel
USB3.0 with USB charge
USB2.0
Type-C
10KOhm
10KOhm
1 2
1 2
R2320 10KOhm@
1 2
1 2
+3VSUS_ORG
RN2310 A
RN2310 B
+3VS
+3VS
940432
01V010000 015
A A
<Variant Name>
<Variant Name>
<Variant Name>
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
1
Bill Yang
Bill Yang
Bill Yang
23 108Tuesday, September 06, 2016
23 108Tuesday, September 06, 2016
23 108Tuesday, September 06, 2016
Rev
Rev
Rev
1.0
1.0
1.0
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1/HW3
BG1/HW3
BG1/HW3
Size Project Na me
Size Project Na me
Size Project Na me
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
P4
P4
P4
Vinafix.com
5
4
3
2
1
+VCCF24NS_1P0
U0301I
CSI-2
A36
CSI2_DN0
B36
CSI2_DP0
C38
CSI2_DN1
D38
CSI2_DP1
C36
CSI2_DN2
D36
CSI2_DP2
A38
CSI2_DN3
D D
C C
CLK_PCIE_WIGIG#53
CLK_PCIE_WIGIG53
CLK_REQ_WIGIG#53
CLK_PCIE_WLAN#53
CLK_PCIE_WLAN53
CLK_WLAN_REQ#53
CLK_PCIE_LAN#33
CLK_PCIE_LAN33
CLK_REQ_LAN#33
CLK_PCIE_SSD#51
CLK_PCIE_SSD51
CLK_REQ_SSD#51
CLK_REQ1#
B B
A A
CLK_REQ3#
A 10 K ±5% external pull-up resistor required to core rail,
but the corresponding CLKREQ# function can be disabled by
means of the IntelR ME FW.
CLK_REQ2#
CLK_REQ4#
CLK_REQ5#
CLK_REQ1#
CLK_REQ2#
CLK_REQ3#
CLK_REQ4#
CLK_REQ5#
SUS_CLK
If CLKREQ# control is not needed, say for a free running clock,
do not pulldown signal to GND. This will increase
leakage in Sx states.
CLK_REQ1#
CLK_REQ2#
SP2420
SP2421
SP2419
SP2416
SP2418
SP2417
SP2401
SP2403
SP2404
SP2405
SP2406
1 2
R2405 10KOhm/NON_IOAC
1 2
R2406 10KOhm
1 2
R2430 10KOhm/NON_IOAC
1 2
R2435 10KOhm
1 2
R2431 10KOhm
1 2
R2408 10KOhm
1 2
R2434 10KOhm
1 2
R2409 10KOhm
1 2
R2432 10KOhm
1 2
R2440 10KOhm
1 2
R2437 1KOhm 5%
1 2
R2442 10KOhm/IOAC
1 2
R2441 10KOhm/IOAC
5
B38
CSI2_DP3
C31
CSI2_DN4
D31
CSI2_DP4
C33
CSI2_DN5
D33
CSI2_DP5
A31
CSI2_DN6
B31
CSI2_DP6
A33
CSI2_DN7
B33
CSI2_DP7
A29
CSI2_DN8
B29
CSI2_DP8
C28
CSI2_DN9
D28
CSI2_DP9
A27
CSI2_DN10
B27
CSI2_DP10
C27
CSI2_DN11
D27
CSI2_DP11
940432
01V010000015
12
12
12
12
12
12
12
12
12
12
12
12
@
@
@
@
@
@
@
CLKOUT_PCIE_N1
CLKOUT_PCIE_P1
CLK_REQ1#
CLKOUT_PCIE_N2
CLKOUT_PCIE_P2
CLK_REQ2#
CLKOUT_PCIE_N3
CLKOUT_PCIE_P3
CLK_REQ3#
CLKOUT_PCIE_N4
CLKOUT_PCIE_P4
CLK_REQ4#
CLK_REQ5#
+3VS
+3VS
GND
+3VSUS
GPP_F13/EMMC_DATA0
GPP_F14/EMMC_DATA1
GPP_F15/EMMC_DATA2
GPP_F16/EMMC_DATA3
GPP_F17/EMMC_DATA4
GPP_F18/EMMC_DATA5
GPP_F19/EMMC_DATA6
GPP_F20/EMMC_DATA7
U0301J
D42
CLKOUT_PCIE_N0
C42
CLKOUT_PCIE_P0
AR10
GPP_B5/SRCCLKREQ0#
B42
CLKOUT_PCIE_N1
A42
CLKOUT_PCIE_P1
AT7
GPP_B6/SRCCLKREQ1#
D41
CLKOUT_PCIE_N2
C41
CLKOUT_PCIE_P2
AT8
GPP_B7/SRCCLKREQ2#
D40
CLKOUT_PCIE_N3
C40
CLKOUT_PCIE_P3
AT10
GPP_B8/SRCCLKREQ3#
B40
CLKOUT_PCIE_N4
A40
CLKOUT_PCIE_P4
AU8
GPP_B9/SRCCLKREQ4#
E40
CLKOUT_PCIE_N5
E38
CLKOUT_PCIE_P5
AU7
GPP_B10/SRCCLKREQ5#
940432
01V010000015
CSI2_CLKN0
CSI2_CLKP0
CSI2_CLKN1
CSI2_CLKP1
CSI2_CLKN2
CSI2_CLKP2
CSI2_CLKN3
CSI2_CLKP3
CSI2_COMP
GPP_D4/FLASHTRIG
EMMC
GPP_F21/EMMC_RCLK
GPP_F22/EMMC_CLK
GPP_F12/EMMC_CMD
EMMC_RCOMP
1UF/6.3V
+VCC_RTC
C2407
C37
D37
C32
D32
C29
D29
B26
A26
E13
B7
AP2
AP1
AP3
AN3
AN1
AN2
AM4
AM1
AM2
AM3
AP4
AT1
CLOCK SIGNALS
3
12
4
CSI2_COMP
GPP_D4
EMMC_RCOMP
R2420
1KOhm
1 2
@
D2401
0.8V/0.2mA
1 2
R2418 100Ohm 1%
1 2
R2419 200Ohm 1%
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
1
2
+RTC_BAT
GPD8/SUSCLK
XTAL24_IN
XTAL24_OUT
XCLK_BIASREF
SRTCRST#
RTCRST#
F43
E43
BA17
E37
E35
E42
AM18
RTCX1
AM20
RTCX2
AN18
AM16
R2425
0Ohm
+RTC_AC
R9306 1KOhm
GND
GND
SUS_CLK
XTAL_24M_IN
XTAL_24M_OUT
XCLK_BIASREF
XTAL_32K_X1
XTAL_32K_X2
SRTC_RST#
RTC_RST#
+3VA
R2423
1.5KOhm
1%
@
R2424
45.3KOhm
1%
@
1 2
1
T2417
1
T2401
1 2
R2417 2.71Kohm 0.5%
+RTCBAT
GND
PDG 0.9 - 2.7k +-1%
J2401
4
SIDE2
2
2
1
1
3
SIDE1
WtoB_CON_2P
12V17AISM015
3
+VCCF24NS_1P0
24MHz signal 需包GND
12
R2401
1MOhm
12
R2402
10MOhm
+VCC_RTC
+AC_BAT_SYS
+3VS
+3VA
13
X2401
24MHZ
1 2
X2402
32.768KHZ
07V080000064
SW_RTCRST30
RTC Detect
+RTCBAT +1.8VSUS
GND
1 2
C2401 10PF/50V
2
4
1 2
C2402 10PF/50V
1 2
C2403 15PF/50V
1 2
C2404 15PF/50V
EC reset
CMOS feature
@
Q2402
2N7002
1
12
R2439
10MOhm
@
1
2
+VCCF24NS_1P0 26
+VCC_RTC 25,26,36,60
+AC_BAT_SYS 43,45,80,81,82,83,88
+3VS 3,4,17,20,21,22,23,28,30,31,32,36,37,45,46,47,48,50,51,53,57,61,62,67,91,92
+3VA 30,31,36,41,43,53,56,57,67,81,88,93
R2407
12
GND
GND
GND
GND
GND
32
3
1
1
G
2
GND
RTC_IN# 22
12
JRST2001
0Ohm
@
GND
D
Q2401
2N7002
S
<Variant Name>
<Variant Name>
<Variant Name>
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
BG1/HW3
BG1/HW3
BG1/HW3
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
5%
5%
10KOhm
R2438
100KOhm
@
1 2
32
3
D
G
S
2
GND
12
JRST2002
0Ohm
@
GND GND
1 2
R2403 20KOhm
12
C2405
1UF/6.3V
1 2
R2404 20KOhm
12
C2406
1UF/6.3V
PCH(5)_CLK,RTC,HDA,SDIO
PCH(5)_CLK,RTC,HDA,SDIO
PCH(5)_CLK,RTC,HDA,SDIO
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
P4
P4
P4
1
+VCC_RTC
Bill Yang
Bill Yang
Bill Yang
24 108Tuesday, September 06, 2016
24 108Tuesday, September 06, 2016
24 108Tuesday, September 06, 2016
Rev
Rev
Rev
1.0
1.0
1.0
Vinafix.com
5
+3VSUS_ORG
12
R2501
10KOhm
D D
PM_RSMRST#30
SYS_PWROK30,68
ALL_SYS_PWRGD delay 99 ms from EC
SUSWARN#/SUS PWRDNACK30
C C
12
GND
SYS_RESET#
R2502
1KOhm
@
T2501
SUSACK#30
PCIE_WAKE#53
R2543
1
H_CPUPWRGD_TP H_CPUPWRGD
SYS_PWROK
PM_PWROK
PM_RSMRST_R
R2503 1KOhm
R2508 0Ohm/ SBA
R2509 0Ohm
R2510 0Ohm@
LAN_WAKE#33
LAN_DISABLE#33 MPHY_EXT_PWR_GATEB 26
T2508
4
1 2
1 2
1 2
R2504 0Ohm
1 2
R2505 0Ohm
1 2
R2506 0Ohm
1 2
1 2
1 2
1
PLT_RST#
SYS_RESET#
PM_RSMRST_R
H_VCCST_PWRGD_MCP
SYS_PWROK_R
PM_PCH_PWROK_R
PCH_DPWROK
SUS_PWR_ACK_R
SUSACK#_RSUS_PWR_ACK_R
LAN_WAKE#
GPD11
EC_WAKE_DSW#
U0301K
SYSTEM POWER MANAGEMENT
AN10
GPP_B13/PLTRST#
B5
SYS_RESET#
AY17
RSMRST#
A68
PROCPWRGD
B65
VCCST_PWRGD
B6
SYS_PWROK
BA20
PCH_PWROK
BB20
DSW_PWROK
AR13
GPP_A13/SUSWARN#/SUSPWRDNACK
AP11
GPP_A15/SUSACK#
BB15
WAKE#
AM15
GPD2/LAN_WAKE#
AW17
GPD11/LANPHYPC
AT15
GPD7/RSVD
3
GPP_B12/SLP_S0#
GPD4/SLP_S3#
GPD5/SLP_S4#
GPD10/SLP_S5#
SLP_SUS#
SLP_LAN#
GPD9/SLP_WLAN#
GPD6/SLP_A#
GPD3/PWRBTN#
GPD1/ACPRESENT
GPD0/BATLOW#
GPP_A11/PME#
INTRUDER#
GPP_B11/EXT_PWR_GATE#
GPP_B2/VRALERT#
AT11
AP15
BA16
AY16
AN15
AW15
BB17
AN16
BA15
AY15
AU13
AU11
AP16
AM10
AM11
SLP_S0#
SLP_S3#_R
SLP_S4#_R
SLP_S5#
SLP_SUS#
SLP_WLAN#
ME_PM_SLP_A#_R
AC_PRESENT_R
BATLOW#
PME#
INTRUDER#
EXT_PWR_GATE#
VR_ALERT#
1
T2514
R2545
R2544
1
T2504
1
T2503
1
T2515
R2536 0Ohm/SBA
R2532 0Ohm
1
T2513
R2513 1MOhm
2
NB_R0402_20MIL_SMALL
1 2
1 2
NB_R0402_20MIL_SMALL
12
1 2
internal pull high
1 2
1 2
SP2508
+3VSUS
+VCCDSW
+3VSUS_ORG
+3V
+VCC_RTC
+VCCST_CPU
PM_SUSB# 30,68
PM_SUSC# 30,68
SLP_LAN# 33
ME_PM_SLP_A# 30
PM_PWRBTN# 30
ME_AC_PRESENT 30
+VCC_RTC
1
+3VSUS 4,24,26,28,30,31,33,41,42,51,53,62,67,68,81,92
+VCCDSW 26,30
+3VSUS_ORG 20,21,22,23,26
+3V 31,44,57,67,82,91
+VCC_RTC 24,26,36,60
+VCCST_CPU 3,5,7,9
+3VSUS_ORG
12
R2514
internal pull high
10KOhm
940432
01V010000015
+3V
U2501
1
PLT_RST#
12
C2502
100PF/50V
@
B B
2
GND
1 2
R2515 0Ohm
@
VCC
5
4
12
C2503
100PF/50V
@
A
B
GND3Y
SN74LVC1G08DCKR
EC delay ALL_SYSTEM_PWRGD 2ms
12
R2516
10KOhm
GNDGNDGND
BUF_PLT_RST# 30,32,33,51,53,62
VRM_PWRGD80,92
DELAY_ALL_SYSTEM_PWRGD30
ALL_SYSTEM_PWRGD30,92
ALL_SYSTEM_PWRGD
DELAY_ALL_SYSTEM_PWRGD
VRM_PWRGD
PLT_RST#
1 2
R2529 0Ohm
1 2
R2530 0Ohm@
1 2
R2531 0Ohm@
1 2
SP2506
1 2
D2506
RB751V-40
1 2
D2507
RB751V-40
ALL_SYSTEM_PWRGD_PMOK
H_VCCST_PWRGD_L
R2517 0Ohm@
U2503
1
NC
2
A
3 4
GND
74AUP1G07GW
06V030000021
VCC
Y
U2502
A
1
B
2
3 4
GND
Vcc=2~5.5
1 2
5
H_VCCST_PWRGD_R
VCC
Y
+3VSUS
12
5
0.1UF/16V
C2504
+3VSUS
12
GND
+VCCST_CPU
12
@
12
PM_PWROK
R2519
10KOhm
R2520
1KOhm
1 2
R2521 60.4Ohm1%
0.1UF/16V
C2505
+VDDQ/+VCCST_CPU/+VCCSTG to VCCST_PWRGD must > 1ms
Set to GPI
H_VCCST_PWRGD_MCP
VR_ALERT#
BATLOW#
LAN_WAKE#
PCIE_WAKE#
AC_PRESENT_R
EC_WAKE_DSW#
1 2
R2528 10KOhm@
1 2
R2522 10KOhm
1 2
R2523 10KOhm
1 2
R2525 1KOhm
1 2
R2526 10KOhm
1 2
R2524 10KOhm@
+3VSUS_ORG
+VCCDSW
A A
<Variant Name>
<Variant Name>
<Variant Name>
PCH(6)_SYS PWR
PCH(6)_SYS PWR
PCH(6)_SYS PWR
Title :
Title :
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
BG1/HW3
BG1/HW3
BG1/HW3
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
P4
P4
P4
Title :
Engineer:
Engineer:
Engineer:
1
Bill Yang
Bill Yang
Bill Yang
25 108Tuesday, September 06, 2016
25 108Tuesday, September 06, 2016
25 108Tuesday, September 06, 2016
Rev
Rev
Rev
1.0
1.0
1.0
Vinafix.com
5
4
3
2
1
+1.0VSUS
+1.0VSUS
1 2
+VCCPRIM_CORE
D D
+1.0VSUS
+VCCMPHYGTAON_1P0_LS_SIP
12
R2603
1 2
0Ohm
C2616
22UF/6.3V
@
+VCCMPHYAON_1P0
12
12
C2605
22UF/6.3V
@
near N15
12
@
@
12
+VCCFHV
12
C2612
1UF/6.3V
+VCCAMPHYPLL_1P0
12
C2637
0.1UF/16V
+1.0VSUS
+VCCPAZIO
C C
+3VSUS_ORG
1 2
R2611
0Ohm
+VCCPRIM_3P3
12
C2611
1UF/6.3V
@
near V19
12
C2609
1UF/6.3V
@
+1.0VSUS
1 2
+1.0VSUS
+VCCDSW
R2604
0Ohm
+VCCAPLLEBB_1P0
1 2
1 2
near AJ19
1 2
+VCCAPLL_1P0
C2608
47uF/6.3V
R2605
0Ohm
R2606
0Ohm
R2612
0Ohm
+3VSUS_ORG/+1.8VSUS to +1.0VSUS >200us (tPCH06)
JP2601
2
112
2MM_OPEN_5MIL
+3VSUS_ORG +VCCPAZIO +3VSUS_ORG +VCCPSPI
1 2
R2607 0Ohm
B B
+3VSUS_ORG+3VSUS +3VSUS_ORG +VCCDSW
0.358A0.358A
w/o DSW
GPIO power Rail
+3VSUS_ORG +VCCPGPPA
R2613
1 2
0Ohm
+VCCPRIM_1P0
R2601
0Ohm
C2603
1UF/6.3V
12
C2606
1UF/6.3V
near K17
12
C2601
1UF/6.3V
@
12
C2602
1UF/6.3V
@
+VCCDSW_1P0
near AB19
near AF18
near AL1
1 2
C2604 1UF/6.3V
Decoupling cap for internal power
near N15near N15
12
C2636
0.1UF/16V
+V1.00A_SIP
+VCCPDSW_3P3
+VCCPSPI+VCCSRAM_1P0
12
C2610
1UF/6.3V
@
near N18
1 2
R2633 0Ohm
vx_r0805_0ohm_h24_small
R2610
1 2
0Ohm
+3VSUS_ORG +VCCPGPPD
R2617
1 2
0Ohm
C2607
1UF/6.3V
@
near K15
near AF20
0.696A
2.574A
0.022A
0.727A
0.088A
0.026A
0.696A
0.118A
0.068A
0.011A
0.642A
0.075A
0.696A
0.033A
U0301O
AB19
VCCPRIM_1P0_1
AB20
VCCPRIM_1P0_2
P18
VCCPRIM_1P0_3
AF18
VCCPRIM_CORE_1
AF19
VCCPRIM_CORE_2
V20
VCCPRIM_CORE_3
V21
VCCPRIM_CORE_4
AL1
DCPDSW_1p0
K17
VCCMPHYAON_1P0_1
L1
VCCMPHYAON_1P0_2
N15
VCCMPHYGT_1P0_1
N16
VCCMPHYGT_1P0_2
N17
VCCMPHYGT_1P0_3
P15
VCCMPHYGT_1P0_4
P16
VCCMPHYGT_1P0_5
K15
VCCAMPHYPLL_1P0_1
L15
VCCAMPHYPLL_1P0_2
V15
VCCAPLL_1P0
AB17
VCCPRIM_1P0_4
Y18
VCCPRIM_1P0_5
AD17
VCCDSW_3p3_1
AD18
VCCDSW_3p3_2
AJ17
VCCDSW_3p3_3
AJ19
VCCHDA
AJ16
VCCSPI
AF20
VCCSRAM_1P0_1
AF21
VCCSRAM_1P0_2
T19
VCCSRAM_1P0_3
T20
VCCSRAM_1P0_4
AJ21
VCCPRIM_3p3_1
AK20
VCCPRIM_1P0_6
N18
VCCAPLLEBB_1P0
940432
01V010000015
+VCCDSW
CPU POWER 4 OF 4
R2652 0Ohm@
N/A
Q2601
BC856BS
07V020000007
1 2
D
3
G
1
1
2
1
E1
B1
C1
B2
5
6
N/A
R2648
100KOhm
1 2
VCCPRIM_3p3_2
VCCPRIM_1P0_7
VCCRTCPRIM_3p3
GPP_B0/CORE_VID0
GPP_B1/CORE_VID1
S
23
2
N/A
Q2602
SI2301CDS-T1-GE3
07V040000124
3
C2
E24
12
VCCPGPPA
VCCPGPPB
VCCPGPPC
VCCPGPPD
VCCPGPPE
VCCPGPPF
VCCPGPPG
VCCATS_1p8
VCCRTC_1
VCCRTC_2
DCPRTC
VCCCLK1
VCCCLK2
VCCCLK3
VCCCLK4
VCCCLK5
VCCCLK6
N/A
R2649
100KOhm
0.02A
+VCCPGPPA
AK15
AG15
Y16
Y15
T16
AF16
AD15
V19
T1
AA1
AK17
AK19
BB14
BB10
A14
K19
L21
N20
L19
A10
AN11
AN13
+VCCPDSW_3P3
+VCCPGPPB
0.075A
0.696A
0.006A
0.001A
GND
VCCRTCEXT
0.035A
0.029A
0.024A
0.033A
0.004A
0.01A
GPP_B0
GPP_B1
0.004A
12
0.006A
+VCCPGPPC
R2646
1KOhm
0.008A
+VCCPGPPD
1 2
C26340.1UF/16V
1 2
C26200.1UF/16V
near BB10
12
R2647
1KOhm
Intel confirm pull down 1k
+VCCPRIM_CORE
+VCCDSW
+3VSUS_ORG
+1.8VSUS
0.006A
+VCCPGPPE
near AK19
0.001A
+VCCMPHYGTAON_1P0_LS_P
0.161A
+VCCPGPPF
+VCCPRTC_3P3
GND
C2619 1UF/6.3V
+1.0VSUS
R2650 0Ohm
R2651 0Ohm
vx_r0805_0ohm_h24_small
vx_r0805_0ohm_h24_small
0.056A
+VCCPGPPG
R2626
1 2
0Ohm
1 2
1 2
1 2
+1.0VSUS 82
+VCCPRIM_CORE 82
+VCCDSW 25,30
+3VSUS_ORG 20,21,22,23,25
+1.8VSUS 9,21,24,84
+VCCDTS_1P0
+VCCPRIM_3P3
+VCC_RTC
GND
+VCCMPHYGTAON_1P0_LS
@
R2623
0Ohm
+V1.8A_SIP
12
C2615
1UF/6.3V
near AK19
+VCC19P2_1P0
+VCCF100_1P0
+VCCF135_1P0
+VCCF100OC_1P0
+VCCF24NS_1P0
+VCC24TBT_1P0
C2624
1UF/6.3V
1 2
R2636 0Ohm
vx_r0805_0ohm_h24_small
1 2
R2637 0Ohm
vx_r0805_0ohm_h24_small
1 2
R2638 0Ohm
1 2
R2639 0Ohm
+VCCF24NS_1P0
+1.0VSUS
12
R2624
1 2
0Ohm
near AA1
12
near A10
@
+VCCPAZIO
+VCC_RTC
+3VSUS
+1.8VSUS
+VCCPRTCPRIM_3P3
R2627
0Ohm
R2628
0Ohm
R2629
0Ohm
R2630
0Ohm
R2631
0Ohm
R2632
0Ohm
+VCCMPHYGTAON_1P0_LS_SIP
0.727A
+VCCPAZIO 22
+VCC_RTC 24,25,36,60
+VCCF24NS_1P0 24
+3VSUS 4,24,25,28,30,31,33,41,42,51,53,62,67,68,81,92
R2625
12
C2618
1UF/6.3V
near AK17
1 2
0Ohm
12
12
12
12
12
12
12
C2617
0.1UF/16V
near AK17
+1.0VSUS
+1.0VSUS
+1.0VSUS
+1.0VSUS
+1.0VSUS
+1.0VSUS
+VCCSRAM_1P0
0.642A
+VCCAMPHYPLL_1P0
0.088A
+VCCAPLLEBB_1P0
0.033A
+3VSUS_ORG
+3VSUS_ORG +VCCPGPPB
+3VSUS_ORG +VCCPGPPC
A A
R2615
1 2
0Ohm
R2616
1 2
0Ohm
5
C2635
1UF/6.3V
C2613
1UF/6.3V
12
near AG15
@
12
near Y16
@
+3VSUS_ORG +VCCPGPPE
+1.8VSUS +VCCPGPPF
+3VSUS_ORG +VCCPGPPG
R2619
1 2
0Ohm
1 2
R2620 0Ohm
R2621
1 2
0Ohm
C2614
1UF/6.3V
12
near T16
@
4
MPHY_EXT_PWR_GATEB should pull high at A0 chip
1 2
MPHY_EXT_PWR_GATEB25
R2644 0Ohm
12
C2629
0.033UF/16V
@
+5VO +1.0VSUS
12
C2632
1UF/6.3V
3
12
C2630
1UF/6.3V
Rdson = 15m OHM Iout =2.12A / ICC_Max 2.12A _CRB 0.53/TPCH17 TR<200us
12
C2633
1UF/10V
U2601
1
VIN1_1
2
VIN1_2
3
ON1
4
VBIAS
5
ON2
6
VIN2_1
VIN2_27VOUT2_1
TPS22966DPUR
06V290000053
GND2
VOUT1_2
VOUT1_1
CT1
GND1
CT2
VOUT2_2
15
14
13
12
11
10
9
8
12
C2627
220PF/25V
12
C2628
220PF/25V
2
12
12
C2631
0.1UF/16V
C2626
0.1UF/16V
T2601
TPC26T
+VCCMPHYGTAON_1P0_LS_P
1
<Variant Name>
<Variant Name>
<Variant Name>
PCH(7)_POWER
PCH(7)_POWER
PCH(7)_POWER
Title :
Title :
1
Title :
Engineer:
Engineer:
Engineer:
Bill Yang
Bill Yang
Bill Yang
26 108Tuesday, September 06, 2016
26 108Tuesday, September 06, 2016
26 108Tuesday, September 06, 2016
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
BG1/HW3
BG1/HW3
BG1/HW3
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
P4
P4
P4
Rev
Rev
Rev
1.0
1.0
1.0
Vinafix.com
5
D D
4
3
2
1
C C
B B
A A
<Variant Name>
<Variant Name>
<Variant Name>
Title :
Title :
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
<Title>
<Title>
<Title>
Size Project Name
KTKUG_25W 1.1
C
Size Project Name
KTKUG_25W 1.1
C
Size Project Name
KTKUG_25W 1.1
C
5
4
3
2
Date: Sheet of
Date: Sheet of
Date: Sheet of
Title :
Engineer:
Engineer:
Engineer:
1
Rev
Rev
Rev
27 108Tuesday, September 06, 2016
27 108Tuesday, September 06, 2016
27 108Tuesday, September 06, 2016
Vinafix.com
5
PCH SPI ROM
+3VM_SPI
+3VA_EC
R2863 0Ohm@
12
0.05A
D D
+3VSUS
R2861 0Ohm
12
0.05A
0.04A
4
SPI_CS#020,30
SPI_SO20 ,30
SPI_WP#_IO220
R2860 0Oh m
R2859 33O hm
12
R2833
1KOhm
@
3
+3VM_SPI
12
R2836
3.3KOhm
@
1 2
SPI1_CS#0
SPI1_SO
+3VM_SPI1_WP#
U2801
1
CS#
2
DO(IO1)
3
WP#(IO2)
4
GND
W25Q128FVSIQ
05V000000 031
HOLD#/RESET#(IO3)
VCC
CLK
DI(IO0)
(16MB)
0.1UF/16V
8
7
6
5
2
C2802
SPI1_HOLD#
SPI1_CLK
SPI1_SI
+3VA_EC
+3VM_SPI
12
+3VS
+12VS
+12VSUS
1 2
1 2
R2832
1KOhm
@
R2805
1KOhm
1
+3VS 3,4,17,20,21,22 ,23,24,30,31,32,36 ,37,45,46,47,48,5 0,51,53,57,61,62,67,91,92
+12VS 31 ,57,62,91
+12VSUS 81,91
+3VA_EC 30,32
R2821
3KOhm
1%
1 2
R2865 33Ohm
R2848 33OhmR2864 33O hm
R2849 33Ohm
SPI_HOLD#_IO3 20
SPI_CLK 2 0,30
SPI_SI 20,30
C C
PCH
SPI_CLK/SO/SI/CS#0
SPI_WP#_IO2/SPI_HOLD#_IO3
ROM
EC
16MB
ROM
8MB
PCH SMBus
B B
SMB_CLK20
PCH
SMB
SMB_DAT20
+12VS
2
6 1
D
Q2801A
UM6K1NG1DTN
G
S
5
3 4
D
Q2801B
UM6K1NG1DTN
RN2801A
4.7KOhm
G
S
+3VS
RN2801B
4.7KOhm
3 4
1 2
SMB_CLK_S 17,46,51
DIMM
HDD protection
SMB_DAT_S 17 ,46,51
A A
PCH(8)_SPI,SMB
PCH(8)_SPI,SMB
Title :
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1/HW3
BG1/HW3
BG1/HW3
Size Pr oject Name
Size Pr oject Name
Size Pr oject Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
P4
P4
P4
Title :
Engineer:
Engineer:
Engineer:
1
PCH(8)_SPI,SMB
Bill Yang
Bill Yang
Bill Yang
28 108Tuesday, September 06, 2016
28 108Tuesday, September 06, 2016
28 108Tuesday, September 06, 2016
Rev
Rev
Rev
1.0
1.0
1.0
Vinafix.com
5
D D
4
3
2
1
C C
B B
A A
<Variant Name>
<Variant Name>
<Variant Name>
Title :
Title :
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
<Title>
<Title>
<Title>
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Engineer:
Engineer:
Engineer:
KTKUG_25W
KTKUG_25W
KTKUG_25W
1
Title :
Rev
Rev
Rev
1.1
1.1
1.1
29 108Tuesday, September 06, 2016
29 108Tuesday, September 06, 2016
29 108Tuesday, September 06, 2016
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