Pegatron MILLER Schematic
5
4
3
2
1
Miller with Intel WHL/CNL
D D
eDP CONN.
14" Panel
Page 45
Parade PS8203(1.4b)
HDMI Conn
1.4b(WHL), 2.0a(CNL)
Page 48
VRAM GDDR5
256Mbx32bits x2-pcs
Page 76-77
C C
Keyboard / ClickPad
TMDS
Page 31
Page 48
ITE IT66317FN(2.0a)
Page 13
dGPU TDP 10W
NVIDIA N17S-LG
Page 70-77
EC
PCIe X4(5, 6, 7, 8)GDDR5
IT8987
Thermal/Fan
Page 50
SPI ROM 16MB
or 24MB(PBA)
IO Board
Universal Jack
B B
Page 67
Audio Codec
REALTEK/ALC256M
Speaker
Page 37
DMIC x4
Page 30
Page 28
Page 36
DMIC x4
Page 45
Block Diagram
eDP
DDI1
CannonLake
CPU
U22
WhiskeyLake
CPU
U42
LPC
PCH
SPI
HDA
PCIe X1 (15) / CNVi
PCIe X4 (11 , 12 , 13 , 14)
DMIC x4
SATA0
CHA
CHB
USB 3.0
DDI2
USB 2.0
Re-driver
DDR4 Memory Down
DDR4 Memory Down
Type C Mux
RTS5450
Page 41
CR CONTROLLER
REALTEK/RTS5170-GR
Re-driver
M.2 2230
WLAN & BT
Page 53
M.2 2242/2260/2280
SSD1
Page 51
Page 16
Page 17
USB3.0 Port S/C
Page 52
USB Type-C
Page 42
Camera
Page 45
Finger Printer
Page 69
SD Card
Page 66
USB3.0 Port
Page 66
IO
Board
Power
+VCORE
+VCCGT
+VCCSA
Page 80
System (5V & 3.3V)
Page 81
+1.0VSUS
Page 82
DDR & VTT
Page 83
+1.8VSUS
Page 84
DDR(2.5V)/+PEX_VDD
Page 85
+FBVDDQ
Page 86
+NVVDD
Page 87
Battery Charger
Page 88
+1V8_AON
Page 90
Load Switch
Page 91
Power Protect
Page 92
A A
Title :
Title :
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
BG1-HW3 RD
BG1-HW3 RD
BG1-HW3 RD
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
MILLER
MILLER
MILLER
Engineer:
Engineer:
Engineer:
1
Title :
Block Diagram
Block Diagram
Block Diagram
Howard Chen
Howard Chen
Howard Chen
1 94Monday, June 11, 2018
1 94Monday, June 11, 2018
1 94Monday, June 11, 2018
Rev
Rev
Rev
1.4
1.4
1.4
5
4
3
2
1
Option
Optional
Remark
@ Ummount
/Debug
D D
Debug only
Reserved EMI part/EMI
/UMA Support UMA
/VGA Support VGA
/U22
/U42
/TPM
C C
Support 2+2 CPU
Support 4+2 CPU
Support TPM function
B B
A A
Title :
Title :
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
BG1/HW1
BG1/HW1
BG1/HW1
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
MILLER
MILLER
MILLER
Engineer:
Engineer:
Engineer:
1
Title :
Option
Option
Option
Howard Chen
Howard Chen
Howard Chen
2 94Monday, June 11, 2018
2 94Monday, June 11, 2018
2 94Monday, June 11, 2018
Rev
Rev
Rev
1.4
1.4
1.4
5
4
3
2
+VCCSTG
1
/U22
1 2
/U42
1 2
HDMI_SCL_PCH(13,48)
HDMI_SDA_PCH(13,48)
+VCCST_CPU
12
R306
49.9Ohm
1%
HDMI_TXN2
HDMI_TXP2
HDMI_TXN1
HDMI_TXP1
HDMI_TXN0
HDMI_TXP0
HDMI_CLKN
HDMI_CLKP
eDP_RCOMP
GPP_E21
CATERR#
H_PECI
H_PROCHOT#_D
CPU_THRMTRIP#
CPU_POPIRCOMP
PCH_POPIRCOMP
AL5
AL6
AJ5
AJ6
AF6
AF5
AE5
AE6
AC4
AC3
AC1
AC2
AE4
AE3
AE1
AE2
AM6
CC8
CC9
IPD
CH4
CH3
IPD
CP4
CN4
IPD
CR26
CP26
IPD
U300D
AA4
CATERR#
AR1
PECI
Y4
PROCHOT#
BJ1
THRMTRIP#
U1
BPM#[0]
U2
BPM#[1]
U3
BPM#[2]
U4
BPM#[3]
CE9
GPP_E3/CPU_GP0
CN3
GPP_E7/CPU_GP1
CB34
GPP_B3/CPU_GP2
CC35
GPP_B4/CPU_GP3
BP27
PROC_POPIRCOMP
BW25
PCH_OPIRCOMP
L5
RSVD_56
N5
RSVD_62
4 of 20
FH8068403419514
U300A
DDI1_TXN[0]
DDI1_TXP[0]
DDI1_TXN[1]
DDI1_TXP[1]
DDI1_TXN[2]
DDI1_TXP[2]
DDI1_TXN[3]
DDI1_TXP[3]
DDI2_TXN[0]
DDI2_TXP[0]
DDI2_TXN[1]
DDI2_TXP[1]
DDI2_TXN[2]
DDI2_TXP[2]
DDI2_TXN[3]
DDI2_TXP[3]
GPP_E13/DDPB_HPD0/DISP_MISC0
GPP_E14/DDPC_HPD1/DISP_MISC1
GPP_E15/DPPD_HPD2/DISP_MISC2
GPP_E16/DPPE_HPD3/DISP_MISC3
GPP_E17/EDP_HPD/DISP_MISC4
DISP_RCOMP
GPP_E18/DPPB_CTRLCLK/CNV_BT_HOST_WAKE#
GPP_E19/DPPB_CTRLDATA
GPP_E20/DPPC_CTRLCLK
GPP_E21/DPPC_CTRLDATA
GPP_E22/DPPD_CTRLCLK
GPP_E23/DPPD_CTRLDATA
GPP_H16/DDPF_CTRLCLK
GPP_H17/DDPF_CTRLDATA
FH8068403419514
1 of 20
PROC_TCK
PROC_TDI
PROC_TDO
PROC_TMS
PROC_TRST#
PCH_TCK
PCH_TDI
PCH_TDO
PCH_TMS
PCH_TRST#
PCH_JTAGX
PROC_PREQ#
PROC_PRDY#
EDP_TXN[0]
EDP_TXP[0]
EDP_TXN[1]
EDP_TXP[1]
EDP_TXN[2]
EDP_TXP[2]
EDP_TXN[3]
EDP_TXP[3]
EDP_AUX_N
EDP_AUX_P
DISP_UTILS
DDI1_AUX_N
DDI1_AUX_P
DDI2_AUX_N
DDI2_AUX_P
DDI3_AUX_N
DDI3_AUX_P
eDP_BKLTEN
eDP_VDDEN
eDP_BKLTCTL
T6
U6
Y5
T5
AB6
W6
U5
W5
P5
Y6
P6
W2
W1
IPD
IPU
IPU
IPU
IPD
AG4
AG3
AG2
AG1
AJ4
AJ3
AJ2
AJ1
AH4
AH3
AM7
AC7
AC6
AD4
AD3
AG7
AG6
CN6
CM6
CP7
CP6
CM7
CK11
CG11
CH11
DPB_HPD
12
12
R314
51
GND
EDP_TXN0 (45)
EDP_TXP0 (45)
EDP_TXN1 (45)
EDP_TXP1 (45)
EDP_TXN2 (45)
EDP_TXP2 (45)
EDP_TXN3 (45)
EDP_TXP3 (45)
EDP_AUXN (45)
EDP_AUXP (45)
DP2_AUXN (41)
DP2_AUXP (41)
DPB_HPD (13,48)
DP2_HPD (41)
EXT_SMI# (30,44)
EXT_SCI# (30)
eDP_HPD (45)
LCD_BKLTEN_PCH (45)
EDP_VDD_EN (45)
LCD_BL_PWM_PCH (45)
@
R302
51
12
@
R303
51
12
R308
51
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
PCH_JTAG_TCK
XDP_TDI
XDP_TMS
XDP_PREQ#
XDP_PRDY#
EXT_SMI#
EXT_SCI#
1
1
1
1
+3VS
T303
T304
T305
T302
12
12
R311
R310
10K
10K
+VCCSTG+VCCST_CPU
12
R304
D D
H_PECI_EC(30)
H_THRMTRIP#(32)
C C
THRO_CPU(30)
1
1
G
Q300
2N7002
3
32
D
12
2
S
PROCHOT#(88)
VR_HOT#(80)
B B
R320 0Ohm@
follow Acer MBLL V1.6 request
Add RC filter for ESD
12
GND
H_PROCHOT#PROCHOT#_R
C301
0.1UF/16V
R300 0Ohm
12
1K
H_PROCHOT#
BT_ON/OFF#_PCH(53)
12
R305
1K
1 2
R324 43Ohm
1 2
R309 499 1%
R315
49.9
1%
12
R316
49.9
1%
HDMI_TXN2(13)
HDMI_TXP2(13)
HDMI_TXN1(13)
HDMI_TXP1(13)
HDMI_TXN0(13)
HDMI_TXP0(13)
HDMI_CLKN(13)
HDMI_CLKP(13)
DP2_TXN0(41)
DP2_TXP0(41)
DP2_TXN1(41)
DP2_TXP1(41)
DP2_TXN2(41)
DP2_TXP2(41)
DP2_TXN3(41)
DP2_TXP3(41)
12
GND GND
CNL: 100ohm
+VCCIO
+3VS +3VS +3VS
12
12
12
R323
R322
R321
2.2K
A A
2.2K
2.2K
WHL: 24.9ohm
R318 / R325 colay
R325 100
R318 24.9Ohm
MISC,JTAG,DDI,EDP
MISC,JTAG,DDI,EDP
MISC,JTAG,DDI,EDP
Title :
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
<OrgName>
<OrgName>
<OrgName>
Size Project Name
Size Project Name
Size Project Name
A3
A3
A3
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
MILLER
MILLER
MILLER
Title :
Engineer:
Engineer:
Engineer:
1
Howard_Chen
Howard_Chen
Howard_Chen
3 94Monday, June 11, 2018
3 94Monday, June 11, 2018
3 94Monday, June 11, 2018
Rev
Rev
Rev
1.4
1.4
1.4
5
+3V
12
@
C400
0.1UF/16V
D D
BUF_PLT_RST#(30,32,51,53,62,70)
VRM_PWRGD(80,92)
PM_RSMRST#(28,30)
SYS_PWROK_PCH(30)
C C
DELAY_ALL_SYSTEM_PWRGD
ALL_SYSTEM_PWRGD
B B
R427 0Ohm
R428 0Ohm
RSMRST_R
1 2
1 2
@
GND
U400
5
VCC
Y
SN74AUP1G07DCKR
R402 0Ohm
R437 0Ohm@
R407 0Ohm
R410 60.4
R403 0Ohm
U401
1
NC
2
A
3 4
GND
74AUP1G07GW
06T030000021
@
06T030000021
1 2
1 2
1 2
1 2
1 2
VCC
Y
4
1
NC
2
A
34
GND
GND
R401
100KOHM
3
2
1
1 2
GND
+3VSUS
330KOHM
1 2
R420 10K@
+3VS
12
R415
@
R443
10K
12
12
+VCC_RTC
R406
8.2K
GND
+3VSUS
12
12
@
R442
R409
10K
12
+3VSUS
R416
10K
GND
#575412 chap 6.2
100KOHM
SLP_S0# (30,45,48,54,62,64,91)
PM_SUSB# (30)
PM_SUSC# (30)
12
R417
100KOHM
#575412 chap 6.2
12
R421
100KOHM
@
C410 0.033UF/16V@
C406 0.033UF/16V@
C407 0.033UF/16V
C408 0.033UF/16V@
C409 0.033UF/16V@
PM_PWRBTN# (30)
ME_AC_PRESENT (30)
12
12
12
12
12
PM_SUSB#
SUSB_EC#(30,57,74,91,92)
PM_SUSC#
SUSC_EC#(30,57,91)
#575412 chap 6.2
GND
C411 0.033UF/16V@
R438 0Ohm
C412 0.033UF/16V@
R439 0Ohm
12
1 2
12
1 2
GND
GND
+3VSUS
12
R405
10K
PLT_RST#
PM_SYS_RESET#_R
RSMRST_R
H_CPUPWRGD
VCCST_PWRGD_RVCCST_PWRGD_CPU
PM_PWROK
PCH_DPWROK
1 2
1 2
12
R419
10K
LAN_WAKE#
SUS_PWR_ACK_R
SUSACK#
IPU
IPD
IPD
+3VSUS
12
12
C413
1000PF/50V
WAKE_PCIE#(53)
C402
0.1UF/16V
+3VSUS
+VCCST_CPU
12
R429
1KOhm
+3VSUS
12
R440 0@
R414 10K@
R418
1KOhm
5
VCCST_PWRGD_CPU
12
C403
0.1UF/16V
@
U300K
BJ3 5
GPP _B13/PL TRST#
CN10
SYS_R ESET#
BR3 6
RSMRS T#
AR2
PRO CPWRG D
BJ2
VCC ST_PW RGOOD
CR1 0
SYS_P WROK
BP3 1
PCH_P WROK
BP3 0
DSW _PWR OK
BV3 4
GPP _A13/SUS WARN#/S USPWR DACK
BY32
GPP _A15/SUS ACK#
BU30
WA KE#
BU32
GPD 2/LAN_W AKE#
BU34
GPD 11/LANPHYP C
FH8068403419514
GPP _B11/EX T_PWR _GATE #
11 of 20
+3VSUS
R436
4.7KOhm
@
1 2
R441
4.7KOhm
1 2
GND
GPP _B12/SL P_S0#
GPD 4/SLP_S 3#
GPD 5/SLP_S 4#
GPD 10/SLP_ S5#
SLP _SUS#
SLP _LAN#
GPD 9/SPL_W LAN#
GPD 6/SLP_A #
GPD 3/PWRB TN#
GPD 1/ACPRE SENT
GPD 0/BATLO W#
INTR UDER#
GPP _B2/VRA LERT#
INPUT3 VSEL
INPUT3VSEL
3V SEL
High - 3.0V
Low - 3.3V
BJ3 7
BU36
BU27
BT2 9
BU29
BT3 1
BT3 0
BU37
BU28
BU35
BV3 6
BR3 5
CC3 7
CC3 6
BT2 7
IPU
IPD
GPD10
SLP_SUS#
SLP_LAN#
SLP_WLAN#
SLP_A#
PM_PWRBTN#_R
BATLOW#
SM_INTRUDER#
EXT_PWR_GATE#
GPP_B2
PM_SUSB#
SYS_PWROK_EC(30)
DE_ALL_SYS_PGD_EC(30)
A A
5
PM_SUSB#
U405
A
1
B
2
3 4
GND
Vcc=2~5.5
U403
A
1
B
2
3 4
GND
Vcc=2~5.5
+3VSUS
5
VCC
5
+3VSUS
12
4
SYS_PWROK_PCH
R431
100KOhm@
12
12
R430
100KOhm@
C404
0.1UF/16V
@
DE_ALL_SYS_PGD_HW (30)
1 2
ALL_SYSTEM_PWRGD(30,92)
DELAY_ALL_SYSTEM_PWRGD(30)
VRM_PWRGD(4,80,92)
PLT_RST#
3
R432 0Ohm@
1 2
D401 RB751V-40
1 2
D402 RB751V-40
VR_READY_PMOK
12
GND
2
U404
A
1
B
2
3 4
GND
Vcc=2~5.5
1 2
R433 0Ohm@
R434
100KOhm
+3VSUS
5
VCC
Y
12
GND
PM_PWROK
R435
10KOhm
12
C405
@
0.1UF/16V
CPU_SYS_POWER_MANAGER
CPU_SYS_POWER_MANAGER
CPU_SYS_POWER_MANAGER
Title :
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
<OrgName>
<OrgName>
<OrgName>
Size Project Name
Size Project Name
Size Project Name
A2
A2
A2
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
Title :
Engineer:
Engineer:
Engineer:
MILLER
MILLER
MILLER
Howard_Chen
Howard_Chen
Howard_Chen
4 94Monday, June 11, 2018
4 94Monday, June 11, 2018
4 94Monday, June 11, 2018
Rev
Rev
Rev
1.4
1.4
1.4
Y
VCC
Y
5
D D
T509
C C
GND
GND
B B
A A
1
R520 49.9 1%
4
R500 1K@
R502 1K@
R503 1K
R511 1K@
1 2
ITP_PMODE_XDP_RST_R_N
T508
1
12
12
12
12
CFG_RCOMP
CFG0
CFG2
CFG3
CFG4
CFG7
IPU
R4
R3
M4
M3
R2
N2
R1
N1
N3
N4
AB5
W4
CG2
CG1
H4
H3
BV24
BV25
G3
G4
BK36
BK35
W3
AM4
AM3
A35
D34
G2
G1
T4
T3
J4
J3
J2
L2
J1
L1
L3
L4
U300Q
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[18]
CFG[17]
CFG[19]
CFG_RCOMP
ITP_PMODE
RSVD_43
RSVD_42
RSVD_41
RSVD_40
RSVD_39
RSVD_38
RSVD_55
RSVD_54
RSVD_50
RSVD_49
RSVD_48
RSVD_47
RSVD_TP_6
RSVD_61
RSVD_60
RSVD_59
RSVD_58
FH8068403419514
20 of 20
3
RSVD_TP_8
RSVD_TP_7
IST_TRIG
RSVD_TP_3
RSVD_TP_10
RSVD_TP_9
TP_2
TP_1
RSVD_TP_5
RSVD_TP_4
RSVD_TP_2
RSVD_TP_1
RSVD_36
RSVD_35
RSVD_34
RSVD_TP_13
RSVD_TP_12
RSVD_64
RSVD_63
RSVD_45
RSVD_44
IST_TP[0]
IST_TP[1]
IST_TRIG[0]
IST_TRIG[1]
TP_3
VSS_434
TP_4
RSVD_57
RSVD_53
RSVD_52
RSVD_TP_11
RSVD_1
MSM#
SKTOCC#
F37
F34
CP36
CN36
BJ36
BJ34
BK34
BR18
BT9
BT8
BP8
BP9
CR4
CP3
CR3
AT3
AU3
AN1
AN2
AN4
AN3
AL2
AL1
AL4
AL3
BP34
BP36
BP35
C34
A34
B35
CR35
AH26
AJ27
E1
TP1
SKTOCC#
2
1 2
R522 0Ohm
1
T501
GND
1
T500
1
CPU_RESERVED
CPU_RESERVED
CPU_RESERVED
Title :
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
<OrgName>
<OrgName>
<OrgName>
Size Project Name
Size Project Name
Size Project Name
A3
A3
A3
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
MILLER
MILLER
MILLER
Title :
Engineer:
Engineer:
Engineer:
1
Howard_Chen
Howard_Chen
Howard_Chen
5 94Monday, June 11, 2018
5 94Monday, June 11, 2018
5 94Monday, June 11, 2018
Rev
Rev
Rev
1.4
1.4
1.4
5
4
3
2
1
Used NIL
DDR4
M_A_D[0..63](16)
A_Byte_0
D D
A_Byte_1
A_Byte_4
A_Byte_5
B_Byte_0
B_Byte_1
B_Byte_4
C C
B_Byte_5
M_B_D[0..63](17)
A_Byte_2
A_Byte_3
B B
A_Byte_6
A_Byte_7
B_Byte_2
B_Byte_3
B_Byte_6
A A
5
B_Byte_7
M_A_D0
M_A_D1
M_A_D2
M_A_D3
M_A_D4
M_A_D5
M_A_D6
M_A_D7
M_A_D8
M_A_D9
M_A_D10
M_A_D11
M_A_D12
M_A_D13
M_A_D14
M_A_D15
M_A_D32
M_A_D33
M_A_D34
M_A_D35
M_A_D36
M_A_D37
M_A_D38
M_A_D39
M_A_D40
M_A_D41
M_A_D42
M_A_D43
M_A_D44
M_A_D45
M_A_D46
M_A_D47
M_B_D0
M_B_D1
M_B_D2
M_B_D3
M_B_D4
M_B_D5
M_B_D6
M_B_D7
M_B_D8
M_B_D9
M_B_D10
M_B_D11
M_B_D12
M_B_D13
M_B_D14
M_B_D15
M_B_D32
M_B_D33
M_B_D34
M_B_D35
M_B_D36
M_B_D37
M_B_D38
M_B_D39
M_B_D40
M_B_D41
M_B_D42
M_B_D43
M_B_D44
M_B_D45
M_B_D46
M_B_D47
M_A_D16
M_A_D17
M_A_D18
M_A_D19
M_A_D20
M_A_D21
M_A_D22
M_A_D23
M_A_D24
M_A_D25
M_A_D26
M_A_D27
M_A_D28
M_A_D29
M_A_D30
M_A_D31
M_A_D48
M_A_D49
M_A_D50
M_A_D51
M_A_D52
M_A_D53
M_A_D54
M_A_D55
M_A_D56
M_A_D57
M_A_D58
M_A_D59
M_A_D60
M_A_D61
M_A_D62
M_A_D63
M_B_D16
M_B_D17
M_B_D18
M_B_D19
M_B_D20
M_B_D21
M_B_D22
M_B_D23
M_B_D24
M_B_D25
M_B_D26
M_B_D27
M_B_D28
M_B_D29
M_B_D30
M_B_D31
M_B_D48
M_B_D49
M_B_D50
M_B_D51
M_B_D52
M_B_D53
M_B_D54
M_B_D55
M_B_D56
M_B_D57
M_B_D58
M_B_D59
M_B_D60
M_B_D61
M_B_D62
M_B_D63
IL NIL
A26
DDR 0_DQ[0]/D DR0_DQ [0]
D26
DDR 0_DQ[1]/D DR0_DQ [1]
D28
DDR 0_DQ[2]/D DR0_DQ [2]
C28
DDR 0_DQ[3]/D DR0_DQ [3]
B26
DDR 0_DQ[4]/D DR0_DQ [4]
C26
DDR 0_DQ[5]/D DR0_DQ [5]
B28
DDR 0_DQ[6]/D DR0_DQ [6]
A28
DDR 0_DQ[7]/D DR0_DQ [7]
B30
DDR 0_DQ[8]/D DR0_DQ [8]
D30
DDR 0_DQ[9]/D DR0_DQ [9]
B33
DDR 0_DQ[10 ]/DDR0_D Q[10]
D32
DDR 0_DQ[11 ]/DDR0_D Q[11]
A30
DDR 0_DQ[12 ]/DDR0_D Q[12]
C30
DDR 0_DQ[13 ]/DDR0_D Q[13]
B32
DDR 0_DQ[14 ]/DDR0_D Q[14]
C32
DDR 0_DQ[15 ]/DDR0_D Q[15]
H37
DDR 0_DQ[16 ]/DDR0_D Q[32]
H34
DDR 0_DQ[17 ]/DDR0_D Q[33]
K34
DDR 0_DQ[18 ]/DDR0_D Q[34]
K35
DDR 0_DQ[19 ]/DDR0_D Q[35]
H36
DDR 0_DQ[20 ]/DDR0_D Q[36]
H35
DDR 0_DQ[21 ]/DDR0_D Q[37]
K36
DDR 0_DQ[22 ]/DDR0_D Q[38]
K37
DDR 0_DQ[23 ]/DDR0_D Q[39]
N36
DDR 0_DQ[24 ]/DDR0_D Q[40]
N34
DDR 0_DQ[25 ]/DDR0_D Q[41]
R37
DDR 0_DQ[26 ]/DDR0_D Q[42]
R34
DDR 0_DQ[27 ]/DDR0_D Q[43]
N37
DDR 0_DQ[28 ]/DDR0_D Q[44]
N35
DDR 0_DQ[29 ]/DDR0_D Q[45]
R36
DDR 0_DQ[30 ]/DDR0_D Q[46]
R35
DDR 0_DQ[31 ]/DDR0_D Q[47]
AN35
DDR 0_DQ[32 ]/DDR1_D Q[0]
AN34
DDR 0_DQ[33 ]/DDR1_D Q[1]
AR3 5
DDR 0_DQ[34 ]/DDR1_D Q[2]
AR3 4
DDR 0_DQ[35 ]/DDR1_D Q[3]
AN37
DDR 0_DQ[36 ]/DDR1_D Q[4]
AN36
DDR 0_DQ[37 ]/DDR1_D Q[5]
AR3 6
DDR 0_DQ[38 ]/DDR1_D Q[6]
AR3 7
DDR 0_DQ[39 ]/DDR1_D Q[7]
AU35
DDR 0_DQ[40 ]/DDR1_D Q[8]
AU34
DDR 0_DQ[41 ]/DDR1_D Q[9]
AW 35
DDR 0_DQ[42 ]/DDR1_D Q[10]
AW 34
DDR 0_DQ[43 ]/DDR1_D Q[11]
AU37
DDR 0_DQ[44 ]/DDR1_D Q[12]
AU36
DDR 0_DQ[45 ]/DDR1_D Q[13]
AW 36
DDR 0_DQ[46 ]/DDR1_D Q[14]
AW 37
DDR 0_DQ[47 ]/DDR1_D Q[15]
BA3 5
DDR 0_DQ[48 ]/DDR1_D Q[32]
BA3 4
DDR 0_DQ[49 ]/DDR1_D Q[33]
BC3 5
DDR 0_DQ[50 ]/DDR1_D Q[34]
BC3 4
DDR 0_DQ[51 ]/DDR1_D Q[35]
BA3 7
DDR 0_DQ[52 ]/DDR1_D Q[36]
BA3 6
DDR 0_DQ[53 ]/DDR1_D Q[37]
BC3 6
DDR 0_DQ[54 ]/DDR1_D Q[38]
BC3 7
DDR 0_DQ[55 ]/DDR1_D Q[39]
BE3 5
DDR 0_DQ[56 ]/DDR1_D Q[40]
BE3 4
DDR 0_DQ[57 ]/DDR1_D Q[41]
BG3 5
DDR 0_DQ[58 ]/DDR1_D Q[42]
BG3 4
DDR 0_DQ[59 ]/DDR1_D Q[43]
BE3 7
DDR 0_DQ[60 ]/DDR1_D Q[44]
BE3 6
DDR 0_DQ[61 ]/DDR1_D Q[45]
BG3 6
DDR 0_DQ[62 ]/DDR1_D Q[46]
BG3 7
DDR 0_DQ[63 ]/DDR1_D Q[47]
FH8068403419514
IL NIL
J22
DDR 1_DQ[0]/D DR0_DQ [16]
H25
DDR 1_DQ[1]/D DR0_DQ [17]
G22
DDR 1_DQ[2]/D DR0_DQ [18]
H22
DDR 1_DQ[3]/D DR0_DQ [19]
F25
DDR 1_DQ[4]/D DR0_DQ [20]
J25
DDR 1_DQ[5]/D DR0_DQ [21]
G25
DDR 1_DQ[6]/D DR0_DQ [22]
F22
DDR 1_DQ[7]/D DR0_DQ [23]
D22
DDR 1_DQ[8]/D DR0_DQ [24]
C22
DDR 1_DQ[9]/D DR0_DQ [25]
C24
DDR 1_DQ[10 ]/DDR0_D Q[26]
D24
DDR 1_DQ[11 ]/DDR0_D Q[27]
A22
DDR 1_DQ[12 ]/DDR0_D Q[28]
B22
DDR 1_DQ[13 ]/DDR0_D Q[29]
A24
DDR 1_DQ[14 ]/DDR0_D Q[30]
B24
DDR 1_DQ[15 ]/DDR0_D Q[31]
G31
DDR 1_DQ[16 ]/DDR0_D Q[48]
G32
DDR 1_DQ[17 ]/DDR0_D Q[49]
H29
DDR 1_DQ[18 ]/DDR0_D Q[50]
H28
DDR 1_DQ[19 ]/DDR0_D Q[51]
G28
DDR 1_DQ[20 ]/DDR0_D Q[52]
G29
DDR 1_DQ[21 ]/DDR0_D Q[53]
H31
DDR 1_DQ[22 ]/DDR0_D Q[54]
H32
DDR 1_DQ[23 ]/DDR0_D Q[55]
L31
DDR 1_DQ[24 ]/DDR0_D Q[56]
L32
DDR 1_DQ[25 ]/DDR0_D Q[57]
N29
DDR 1_DQ[26 ]/DDR0_D Q[58]
N28
DDR 1_DQ[27 ]/DDR0_D Q[59]
L28
DDR 1_DQ[28 ]/DDR0_D Q[60]
L29
DDR 1_DQ[29 ]/DDR0_D Q[61]
N31
DDR 1_DQ[30 ]/DDR0_D Q[62]
N32
DDR 1_DQ[31 ]/DDR0_D Q[63]
AJ2 9
DDR 1_DQ[32 ]/DDR1_D Q[16]
AJ3 0
DDR 1_DQ[33 ]/DDR1_D Q[17]
AM32
DDR 1_DQ[34 ]/DDR1_D Q[18]
AM31
DDR 1_DQ[35 ]/DDR1_D Q[19]
AM30
DDR 1_DQ[36 ]/DDR1_D Q[20]
AM29
DDR 1_DQ[37 ]/DDR1_D Q[21]
AJ3 1
DDR 1_DQ[38 ]/DDR1_D Q[22]
AJ3 2
DDR 1_DQ[39 ]/DDR1_D Q[23]
AR3 1
DDR 1_DQ[40 ]/DDR1_D Q[24]
AR3 2
DDR 1_DQ[41 ]/DDR1_D Q[25]
AV3 0
DDR 1_DQ[42 ]/DDR1_D Q[26]
AV2 9
DDR 1_DQ[43 ]/DDR1_D Q[27]
AR3 0
DDR 1_DQ[44 ]/DDR1_D Q[28]
AR2 9
DDR 1_DQ[45 ]/DDR1_D Q[29]
AV3 2
DDR 1_DQ[46 ]/DDR1_D Q[30]
AV3 1
DDR 1_DQ[47 ]/DDR1_D Q[31]
BA3 2
DDR 1_DQ[48 ]/DDR1_D Q[48]
BA3 1
DDR 1_DQ[49 ]/DDR1_D Q[49]
BD3 1
DDR 1_DQ[50 ]/DDR1_D Q[50]
BD3 2
DDR 1_DQ[51 ]/DDR1_D Q[51]
BA3 0
DDR 1_DQ[52 ]/DDR1_D Q[52]
BA2 9
DDR 1_DQ[53 ]/DDR1_D Q[53]
BD2 9
DDR 1_DQ[54 ]/DDR1_D Q[54]
BD3 0
DDR 1_DQ[55 ]/DDR1_D Q[55]
BG3 1
DDR 1_DQ[56 ]/DDR1_D Q[56]
BG3 2
DDR 1_DQ[57 ]/DDR1_D Q[57]
BK3 2
DDR 1_DQ[58 ]/DDR1_D Q[58]
BK3 1
DDR 1_DQ[59 ]/DDR1_D Q[59]
BG2 9
DDR 1_DQ[60 ]/DDR1_D Q[60]
BG3 0
DDR 1_DQ[61 ]/DDR1_D Q[61]
BK3 0
DDR 1_DQ[62 ]/DDR1_D Q[62]
BK2 9
DDR 1_DQ[63 ]/DDR1_D Q[63]
FH8068403419514
4
DDR4
U300B
DDR 0_CKN[0]/D DR0_CK N[0]
DDR 0_CKP[0 ]/DDR0_C KP[0]
DDR 0_CKN[1]/D DR0_CK N[1]
DDR 0_CKP[1 ]/DDR0_C KP[1]
DDR 0_CKE[0 ]/DDR0_C KE[0]
DDR 0_CKE[1 ]/DDR0_C KE[1]
DDR 0_CS#[0 ]/DDR0_C S#[0]
DDR 0_CS#[1 ]/DDR0_C S#[1]
DDR 0_ODT[0 ]/DDR0_O DT[0]
DDR 0_CAB[9 ]/DDR0_MA [0]
DDR 0_CAB[8 ]/DDR0_MA [1]
DDR 0_CAB[5 ]/DDR0_MA [2]
DDR 0_CAA[0 ]/DDR0_MA [5]
DDR 0_CAA[2 ]/DDR0_MA [6]
DDR 0_CAA[4 ]/DDR0_MA [7]
DDR 0_CAA[3 ]/DDR0_MA [8]
DDR 0_CAA[1 ]/DDR0_MA [9]
DDR 0_CAB[7 ]/DDR0_MA [10]
DDR 0_CAA[7 ]/DDR0_MA [11]
DDR 0_CAA[6 ]/DDR0_MA [12]
DDR 0_CAB[0 ]/DDR0_MA [13]
DDR 0_CAB[2 ]/DDR0_MA [14]
DDR 0_CAB[1 ]/DDR0_MA [15]
DDR 0_CAB[3 ]/DDR0_MA [16]
DDR 0_CAB[4 ]/DDR0_B A[0]
DDR 0_CAB[6 ]/DDR0_B A[1]
DDR 0_CAA[5 ]/DDR0_B G[0]
DDR 0_CAA[8 ]/DDR0_A CT#
DDR 0_CAA[9 ]/DDR0_B G[1]
DDR 0_DQSN[0 ]/DDR0_D QSN[0]
DDR 0_DQSP [0]/DDR0_ DQSP[0 ]
DDR 0_DQSN[1 ]/DDR0_D QSN[1]
DDR 0_DQSP [1]/DDR0_ DQSP[1 ]
DDR 0_DQSN[2 ]/DDR0_D QSN[4]
DDR 0_DQSP [2]/DDR0_ DQSP[4 ]
DDR 0_DQSN[3 ]/DDR0_D QSN[5]
DDR 0_DQSP [3]/DDR0_ DQSP[5 ]
DDR 0_DQSN[4 ]/DDR1_D QSN[0]
DDR 0_DQSP [4]/DDR1_ DQSP[0 ]
DDR 0_DQSN[5 ]/DDR1_D QSN[1]
DDR 0_DQSP [5]/DDR1_ DQSP[1 ]
DDR 0_DQSN[6 ]/DDR1_D QSN[4]
DDR 0_DQSP [6]/DDR1_ DQSP[4 ]
DDR 0_DQSN[7 ]/DDR1_D QSN[5]
DDR 0_DQSP [7]/DDR1_ DQSP[5 ]
2 of 20
Used NIL
U300C
DDR 1_CKN[0]/D DR1_CK N[0]
DDR 1_CKP[0 ]/DDR1_C KP[0]
DDR 1_CKN[1]/D DR1_CK N[1]
DDR 1_CKP[1 ]/DDR1_C KP[1]
DDR 1_CKE[0 ]/DDR1_C KE[0]
DDR 1_CKE[1 ]/DDR1_C KE[1]
DDR 1_CS#[0 ]/DDR1_C S#[0]
DDR 1_CS#[1 ]/DDR1_C S#[1]
DDR 1_ODT[0 ]/DDR1_O DT[0]
DDR 1_CAB[9 ]/DDR1_MA [0]
DDR 1_CAB[8 ]/DDR1_MA [1]
DDR 1_CAB[5 ]/DDR1_MA [2]
DDR 1_CAA[0 ]/DDR1_MA [5]
DDR 1_CAA[2 ]/DDR1_MA [6]
DDR 1_CAA[4 ]/DDR1_MA [7]
DDR 1_CAA[3 ]/DDR1_MA [8]
DDR 1_CAA[1 ]/DDR1_MA [9]
DDR 1_CAB[7 ]/DDR1_MA [10]
DDR 1_CAA[7 ]/DDR1_MA [11]
DDR 1_CAA[6 ]/DDR1_MA [12]
DDR 1_CAB[0 ]/DDR1_MA [13]
DDR 1_CAB[2 ]/DDR1_MA [14]
DDR 1_CAB[1 ]/DDR1_MA [15]
DDR 1_CAB[3 ]/DDR1_MA [16]
DDR 1_CAB[4 ]/DDR1_B A[0]
DDR 1_CAB[6 ]/DDR1_B A[1]
DDR 1_CAA[5 ]/DDR1_B G[0]
DDR 1_CAA[9 ]/DDR1_B G[1]
DDR 1_CAA[8 ]/DDR1_A CT#
DDR 1_DQSN[0 ]/DDR0_D QSN[2]
DDR 1_DQSP [0]/DDR0_ DQSP[2 ]
DDR 1_DQSN[1 ]/DDR0_D QSN[3]
DDR 1_DQSP [1]/DDR0_ DQSP[3 ]
DDR 1_DQSN[2 ]/DDR0_D QSN[6]
DDR 1_DQSP [2]/DDR0_ DQSP[6 ]
DDR 1_DQSN[3 ]/DDR0_D QSN[7]
DDR 1_DQSP [3]/DDR0_ DQSP[7 ]
DDR 1_DQSN[4 ]/DDR1_D QSN[2]
DDR 1_DQSP [4]/DDR1_ DQSP[2 ]
DDR 1_DQSN[5 ]/DDR1_D QSN[3]
DDR 1_DQSP [5]/DDR1_ DQSP[3 ]
DDR 1_DQSN[6 ]/DDR1_D QSN[6]
DDR 1_DQSP [6]/DDR1_ DQSP[6 ]
DDR 1_DQSN[7 ]/DDR1_D QSN[7]
DDR 1_DQSP [7]/DDR1_ DQSP[7 ]
3 of 20
DDR4
V32
V31
T32
T31
U36
U37
DDR 0_CKE[2 ]/NC
DDR 0_CKE[3 ]/NC
NC/DDR 0_ODT [1]
NC/DDR 0_MA[3]
NC/DDR 0_MA[4]
NC/DDR 0_ALE RT#
NC/DDR 0_PAR
DDR _VREF_ CA
DDR 0_VREF _DQ[0]
DDR 0_VREF _DQ[1]
DDR 1_VREF _DQ
DDR _VTT_C TL
U34
U35
AE3 2
AF3 2
AE3 1
AF3 1
AC3 7
AC3 6
AC3 4
AC3 5
AA3 5
AB3 5
AA3 7
AA3 6
AB3 4
W3 6
Y31
W3 4
AA3 4
AC3 2
AC3 1
AB3 2
Y32
W3 2
AB3 1
V34
V35
W3 5
C27
D27
D31
C31
J35
J34
P34
P35
AP3 5
AP3 4
AV3 4
AV3 5
BB3 5
BB3 4
BF3 4
BF3 5
W3 7
W3 1
F36
D35
D37
E36
C35
M_A_BG1_CPU
DDR_VTT_CTRL
VREF width=20mils Spacing=20mils
DDR4
AF2 8
AF2 9
AE2 8
AE2 9
T28
T29
DDR 1_CKE[2 ]/NC
DDR 1_CKE[3 ]/NC
NC/DDR 1_ODT [1]
NC/DDR 1_MA[3]
NC/DDR 1_MA[4]
NC/DDR 1_ALE RT#
NC/DDR 1_PAR
DRA M_RESET #
DDR _RCOMP[0 ]
DDR _RCOMP[1 ]
DDR _RCOMP[2 ]
R0603: DDP: 121ohm
R0602/R0603: CNL: 100ohm
V28
V29
AL3 7
AL3 5
AL3 6
AL3 4
AG3 6
AG3 5
AF3 4
AG3 7
AE3 5
AF3 5
AE3 7
AC2 9
AE3 6
AB2 9
AG3 4
AC2 8
AB2 8
AK3 5
AJ3 5
AK3 4
AJ3 4
AJ3 7
AJ3 6
W2 9
Y28
W2 8
H24
G24
C23
D23
G30
H30
L30
N30
AL3 1
AL3 0
AU31
AU30
BC3 1
BC3 0
BH31
BH30
Y29
AE3 4
BU31
BN28
BN27
BN29
M_B_BG1_CPU
DDR4_DRAMRST_N
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
1 2
R0605
1 2
R0606 0Ohm/DDP
12
R0601
100
GND GND GND
M_A_DIM0_CK_DDR0_DN (15,16)
M_A_DIM0_CK_DDR0_DP (15,16)
M_A_DIM0_CKE0 (15,16)
M_A_DIM0_CS0_N (15,16)
M_A_DIM0_ODT0 (15,16)
M_A_A0 (15,16)
M_A_A1 (15,16)
M_A_A2 (15,16)
M_A_A3 (15,16)
M_A_A4 (15,16)
M_A_A5 (15,16)
M_A_A6 (15,16)
M_A_A7 (15,16)
M_A_A8 (15,16)
M_A_A9 (15,16)
M_A_A10_AP (15,16)
M_A_A11 (15,16)
M_A_A12 (15,16)
M_A_A13 (15,16)
M_A_A14_WE_N (15,16)
M_A_A15_CAS_N (15,16)
M_A_A16_RAS_N (15,16)
M_A_BA0 (15,16)
M_A_BA1 (15,16)
M_A_BG0 (15,16)
M_A_ACT_N (15,16)
0Ohm/DDP
M_A_DQS_DN0 (16)
M_A_DQS_DP0 (16)
M_A_DQS_DN1 (16)
M_A_DQS_DP1 (16)
M_A_DQS_DN4 (16)
M_A_DQS_DP4 (16)
M_A_DQS_DN5 (16)
M_A_DQS_DP5 (16)
M_B_DQS_DN0 (17)
M_B_DQS_DP0 (17)
M_B_DQS_DN1 (17)
M_B_DQS_DP1 (17)
M_B_DQS_DN4 (17)
M_B_DQS_DP4 (17)
M_B_DQS_DN5 (17)
M_B_DQS_DP5 (17)
DDR0_A_ALERT_N (15,16)
DDR0_A_PARITY (15,16)
+V_DDR_CA_VREF (19)
+V_DDR_VREFDQ02_CHB (19)
M_B_DIM0_CK_DDR0_DN (15,17)
M_B_DIM0_CK_DDR0_DP (15,17)
M_B_DIM0_CKE0 (15,17)
M_B_DIM0_CS0_N (15,17)
M_B_DIM0_ODT0 (15,17)
M_B_A0 (15,17)
M_B_A1 (15,17)
M_B_A2 (15,17)
M_B_A3 (15,17)
M_B_A4 (15,17)
M_B_A5 (15,17)
M_B_A6 (15,17)
M_B_A7 (15,17)
M_B_A8 (15,17)
M_B_A9 (15,17)
M_B_A10_AP (15,17)
M_B_A11 (15,17)
M_B_A12 (15,17)
M_B_A13 (15,17)
M_B_A14_WE_N (15,17)
M_B_A15_CAS_N (15,17)
M_B_A16_RAS_N (15,17)
M_B_BA0 (15,17)
M_B_BA1 (15,17)
M_B_BG0 (15,17)
M_B_ACT_N (15,17)
M_A_DQS_DN2 (16)
M_A_DQS_DP2 (16)
M_A_DQS_DN3 (16)
M_A_DQS_DP3 (16)
M_A_DQS_DN6 (16)
M_A_DQS_DP6 (16)
M_A_DQS_DN7 (16)
M_A_DQS_DP7 (16)
M_B_DQS_DN2 (17)
M_B_DQS_DP2 (17)
M_B_DQS_DN3 (17)
M_B_DQS_DP3 (17)
M_B_DQS_DN6 (17)
M_B_DQS_DP6 (17)
M_B_DQS_DN7 (17)
M_B_DQS_DP7 (17)
DDR1_B_ALERT_N (15,17)
DDR1_B_PARITY (15,17)
SM_RCOMP_0
SM_RCOMP_1
12
12
R0602
R0603
80.6Ohm
121Ohm
/U42
/U42
R0603 / R0614 colay
R0602 / R0613 colay
3
1 2
GND
1 2
GND
M_A_BG1 (15,16)
R0600
0Ohm
/SDP
DDR_VTT_CTRL
M_B_BG1 (15,17)
R0604
0Ohm
/SDP
DDR4_DRAMRST_N
12
GND GND GND
R0613
100
/U22
12
R0612
10KOhm
@
12
1
2
3 4
+1.2V
12
R0607
470Ohm
R0608 0Ohm
R0614
R0615
100
200Ohm
/U22
@
1 2
U0601
NC
A
GND
74AUP1G07GW
1 2
+1.2V
12
C0601
5
VCC
Y
12
546765_SKL_MOW
DDR4/3L Reset signal - DR AMRST
It is recommended not to install any capacitor
on DDR Reset signal (DRAMRST).
0.1UF/16V
DDR4_DRAMRST_R_N (16,17)
C0602
0.1UF/16V
@
Controls reset to the memory subsystems,
and is used on DDR3L, DDR4
(not applicable to LPDDR3).
2
12
R0609
1KOhm
+3VSUS+3VS
12
R0610
220KOhm
@
DDR_VTT_CNTL to VTT
12
power ready < 35us (tCPU18)
R0611
2MOHM
@
DDR_PG_CTRL (83)
CPU_DDR4
CPU_DDR4
CPU_DDR4
Title :
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
<OrgName>
<OrgName>
<OrgName>
Size Project Name
Size Project Name
Size Project Name
A2
A2
A2
Date: Sheet of
Date: Sheet of
Date: Sheet of
MILLER
MILLER
MILLER
1
Title :
Engineer:
Engineer:
Engineer:
Howard_Chen
Howard_Chen
Howard_Chen
6 94Monday, June 11, 2018
6 94Monday, June 11, 2018
6 94Monday, June 11, 2018
Rev
Rev
Rev
1.4
1.4
1.4
5
D D
C C
4
U300O
K12
K14
K15
K17
K18
K20
L25
M24
M26
P24
P26
R24
R25
R26
W25
V24
Y25
Y24
RSVD_12
RSVD_13
RSVD_14
RSVD_15
RSVD_16
RSVD_17
RSVD_18
RSVD_19
RSVD_20
RSVD_21
RSVD_22
RSVD_23
RSVD_24
RSVD_25
RSVD_33
RSVD_32
RSVD_31
RSVD_30
RSVD_4
RSVD_5
RSVD_6
RSVD_7
RSVD_8
RSVD_9
RSVD_10
RSVD_11
RSVD_3
RSVD_2
AA24
AA26
AB25
AC24
AC25
AC26
AD24
AD26
V25
T25
3
2
1
15 of 20
FH8068403419514
B B
A A
CPU_RSVD
CPU_RSVD
Title :
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
<OrgName>
<OrgName>
<OrgName>
Size Project Name
Size Project Name
Size Project Name
A3
A3
A3
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
MILLER
MILLER
MILLER
Title :
Engineer:
Engineer:
Engineer:
1
CPU_RSVD
Howard_Chen
Howard_Chen
Howard_Chen
7 94Monday, June 11, 2018
7 94Monday, June 11, 2018
7 94Monday, June 11, 2018
Rev
Rev
Rev
1.4
1.4
1.4
5
4
3
2
1
AW24
AW25
AW26
AW27
AY24
AY26
BA5
BA7
BA8
BA25
BA27
BB2
BB26
BC5
BC6
BC7
BC9
BC10
BC26
BC27
BD5
BD8
BD10
BD25
BD27
BE9
BE24
BE25
BE26
BE27
BF2
BF9
BF24
BF26
BG27
AN6
AN5
AA3
AA1
AA2
Y3
BG3
C829
1UF/6.3V
+VCORE
VIDALERT#
VIDSCK
VIDSOUT
12
C830
1UF/6.3V
1 2
R807 1001%
VCORE_VCCSENSE (80)
VCORE_VSSSENSE (80)
1 2
R808 1001%
+VCCST_CPU
+VCORE
GND
1 2
R803 220Ohm
1 2
R804 0Ohm
1 2
R805 0Ohm
CPU Side VR Side
+VCCST_CPU
12
12
R800
R802
100
56Ohm
1%
+VCCSTG
12
12
R809
R801
100
45.3Ohm
1%
1 2
49.9Ohm
1 2
10Ohm
R810
R811
12
C814
0.1UF/16V
GND
VR_SVID_ALERT# (80)
VR_SVID_CLK (80)
VR_SVID_DATA (80)
+VCORE
U300L
12
AN9
AN10
AN24
AN26
AN27
AP2
AP9
AP24
AP26
AR5
AR6
AR7
AR8
AR10
AR25
AR27
AT9
AT24
AT26
AU5
AU6
AU7
AU8
AU9
AU24
AU25
AU26
AU27
AV2
AV5
AV7
AV10
AV27
AW5
AW6
AW7
AW8
AW9
AW10
BB9
BC24
AY9
BB24
C826
1UF/6.3V
VCCCORE_5
VCCCORE_1
VCCCORE_2
VCCCORE_3
VCCCORE_4
VCCCORE_6
VCCCORE_9
VCCCORE_7
VCCCORE_8
VCCCORE_13
VCCCORE_14
VCCCORE_15
VCCCORE_16
VCCCORE_10
VCCCORE_11
VCCCORE_12
VCCCORE_19
VCCCORE_17
VCCCORE_18
VCCCORE_24
VCCCORE_25
VCCCORE_26
VCCCORE_27
VCCCORE_28
VCCCORE_20
VCCCORE_21
VCCCORE_22
VCCCORE_23
VCCCORE_30
VCCCORE_32
VCCCORE_33
VCCCORE_29
VCCCORE_31
VCCCORE_39
VCCCORE_40
VCCCORE_41
VCCCORE_42
VCCCORE_43
VCCCORE_34
RSVD_29
RSVD_28
RSVD_27
RSVD_26
12 of 20
FH8068403419514
12
C827
1UF/6.3V
VCCCORE_35
VCCCORE_36
VCCCORE_37
VCCCORE_38
VCCCORE_44
VCCCORE_45
VCCCORE_48
VCCCORE_49
VCCCORE_50
VCCCORE_46
VCCCORE_47
VCCCORE_51
VCCCORE_52
VCCCORE_56
VCCCORE_57
VCCCORE_58
VCCCORE_59
VCCCORE_53
VCCCORE_54
VCCCORE_55
VCCCORE_63
VCCCORE_64
VCCCORE_60
VCCCORE_61
VCCCORE_62
VCCCORE_69
VCCCORE_65
VCCCORE_66
VCCCORE_67
VCCCORE_68
VCCCORE_70
VCCCORE_73
VCCCORE_71
VCCCORE_72
VCCCORE_74
VCC_SENSE
VSS_SENSE
VIDALERT#
12
C828
1UF/6.3V
VIDSCK
VIDSOUT
RSVD_51
VCCSTG
12
D D
+VCORE
C800
10UF/6.3V
C807
10UF/6.3V
C821
10UF/6.3V
12
12
12
12
C C
+VCORE
12
+VCORE
12
C801
10UF/6.3V
C808
10UF/6.3V
C822
10UF/6.3V
12
12
12
C802
10UF/6.3V
C809
10UF/6.3V
C823
10UF/6.3V
12
12
12
C803
10UF/6.3V
C810
10UF/6.3V
C824
10UF/6.3V
12
12
C804
10UF/6.3V
C811
10UF/6.3V
12
Backside cap
12
C805
10UF/6.3V
C812
10UF/6.3V
12
GND
12
GND
C806
10UF/6.3V
C813
10UF/6.3V
+VCORE
12
1UF/6.3V
C825
GND
B B
A A
GND
CPU_POWER_01
CPU_POWER_01
CPU_POWER_01
Title :
Title :
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
<OrgName>
<OrgName>
<OrgName>
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
MILLER
MILLER
MILLER
Title :
Engineer:
Engineer:
Engineer:
1
Howard_Chen
Howard_Chen
Howard_Chen
8 94Monday, June 11, 2018
8 94Monday, June 11, 2018
8 94Monday, June 11, 2018
Rev
Rev
Rev
1.4
1.4
1.4
5
4
3
2
1
+VCCGT +VCCGT
C914
1UF/6.3V
C926
10UF/6.3 V
C937
10UF/6.3 V
C951
10UF/6.3 V
AK24
AK26
AL24
AL25
AL26
AL27
AM25
AM27
BH24
BH25
BH26
BH27
BJ24
BJ26
BP16
BP18
BG8
BG10
BH9
BJ8
BJ9
BJ10
BK8
BK25
BK27
BL8
BL9
BL10
BL24
BL26
BM24
BN25
BP28
BP29
BE7
BG7
+VCCIO
+VCCSA
VCCIO_SENSE
VSSIO_SENSE
VCCSA_VSSSENSE (80)
VCCSA_VCCSENSE (80)
12
C915
1UF/6.3V
12
C945
10UF/6.3 V
12
C938
1UF/6.3V
12
C954
10UF/6.3 V
12
12
C916
1UF/6.3V
C952
10UF/6.3 V
12
VCCSA_VCCSENSE
VCCSA_VSSSENSE
C939
1UF/6.3V
12
+VCCIO
+VCCSA
C940
1UF/6.3V
12
12
GND
12
12
GND
+VCCCORE_GT
@
R903
100
1%
@
R905
100
1%
R916
100
1%
R917
100
1%
12
C953
1UF/6.3V
+1.2V
D D
+VCCST_CPU
12
C902
1UF/6.3V
+VCCSTG
+1.2V
+1.05VS
+1.05V
C C
0.12A
R913 0
/Non-MS
1 2
vx_r06 03_0o hm_h28_small
0.15A
1 2
R914 0Ohm
0.28A
1 2
R915 0Ohm
+VCCSA
12
C905
10UF/6.3 V
+VCCSA
12
C919
1UF/6.3V
12
12
C906
10UF/6.3 V
C920
1UF/6.3V
+VCCSFR_OC
+VCCSTG
+VCCST_CPU
12
C907
10UF/6.3 V
12
C921
1UF/6.3V
GND
12
12
GND
12
GND
C908
10UF/6.3 V
C922
1UF/6.3V
C901
1UF/6.3V
12
C923
1UF/6.3V
+VCCSFR_OC
12
1 2
R904 0Ohm
0.13A
C924
1UF/6.3V
12
C900
1UF/6.3V
GND +VCCSFR+VCCST_CPU
C903
1UF/6.3V
GND
12
C904
1UF/6.3V
+VCCIO
12
12
C911
1UF/6.3V
+VCCIO
12
GND
+VCCSA
B B
12
+VCCSA
12
+VCCSTG
12
C928
10UF/6.3 V
C941
10UF/6.3 V
C946
0.1UF/16 V
12
12
C929
10UF/6.3 V
C942
10UF/6.3 V
12
C930
10UF/6.3 V
12
C943
10UF/6.3 V
GND
+VCCST_CPU
12
C947
0.1UF/16 V
12
C931
10UF/6.3 V
12
C932
10UF/6.3 V
GND
12
C933
10UF/6.3 V
C917
10UF/6.3 V
+1.2V
12
C934
10UF/6.3 V
+VDDQ=+1P2V_DUAL (Primaryside cap)
10UF(0402):I=4 PCS
+1.2V
12
C948
10UF/6.3 V
AD36
AH32
AH36
AM36
AN32
AW32
AY36
BE32
BH36
R32
Y36
BC28
BP11
BP2
BG1
BG2
BL27
BM26
BR11
BT11
12
12
12
12
C912
1UF/6.3V
C918
10UF/6.3 V
C935
10UF/6.3 V
C949
10UF/6.3 V
U300N
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VDDQ_11
RSVD_46
VCCST_1
VCCST_2
VCCSTG_1
VCCSTG_2
VCCPLL_OC_1
VCCPLL_OC_2
VCCPLL_1
VCCPLL_2
FH80684 03419514
VCCIO_OUT_1
VCCIO_OUT_2
VCCIO_OUT_3
VCCIO_OUT_4
VCCIO_OUT_5
VCCIO_OUT_6
VCCIO_OUT_7
VCCIO_OUT_8
VCCIO_OUT_9
VCCIO_OUT_10
VCCIO_OUT_11
VCCIO_OUT_12
VCCIO_OUT_13
VCCIO_OUT_14
VCCIO_OUT_15
VCCIO_OUT_16
VCCIO_SENSE
VSSIO_SENSE
VSSSA_SENSE
VCCSA_SENSE
14 of 20
12
C913
1UF/6.3V
12
C925
10UF/6.3 V
12
C936
10UF/6.3 V
GND
12
C950
10UF/6.3 V
VCCSA_2
VCCSA_1
VCCSA_3
VCCSA_5
VCCSA_6
VCCSA_4
VCCSA_9
VCCSA_7
VCCSA_8
VCCSA_13
VCCSA_14
VCCSA_10
VCCSA_11
VCCSA_12
VCCSA_15
VCCSA_16
12
GND
12
GND
12
12
A5
A6
A8
A11
A12
A14
A15
A17
A18
A20
AA9
AB2
AB8
AB9
AB10
AC8
AD9
AE8
AE9
AE10
AF2
AF8
AF10
AG8
AG9
AH9
AJ8
AJ10
AK2
AK9
AL8
AL9
AL10
AM8
B3
B4
B6
B8
B11
B14
B17
B20
C2
C3
C6
C7
C8
C11
C12
C14
C15
C17
C18
C20
D4
D7
D11
D12
D14
Y10
FH80684 03419514
U300M
VCCGT_8
VCCGT_9
VCCGT_10
VCCGT_1
VCCGT_2
VCCGT_3
VCCGT_4
VCCGT_5
VCCGT_6
VCCGT_7
VCCGT_11
VCCGT_13
VCCGT_14
VCCGT_15
VCCGT_12
VCCGT_16
VCCGT_17
VCCGT_19
VCCGT_20
VCCGT_18
VCCGT_22
VCCGT_23
VCCGT_21
VCCGT_24
VCCGT_25
VCCGT_26
VCCGT_28
VCCGT_27
VCCGT_29
VCCGT_30
VCCGT_32
VCCGT_33
VCCGT_31
VCCGT_34
VCCGT_39
VCCGT_40
VCCGT_41
VCCGT_42
VCCGT_35
VCCGT_36
VCCGT_37
VCCGT_38
VCCGT_49
VCCGT_51
VCCGT_52
VCCGT_53
VCCGT_54
VCCGT_43
VCCGT_44
VCCGT_45
VCCGT_46
VCCGT_47
VCCGT_48
VCCGT_50
VCCGT_62
VCCGT_63
VCCGT_55
VCCGT_56
VCCGT_57
VCCGT_119
13 of 20
VCCGT_58
VCCGT_59
VCCGT_60
VCCGT_61
VCCGT_64
VCCGT_69
VCCGT_70
VCCGT_71
VCCGT_72
VCCGT_65
VCCGT_66
VCCGT_67
VCCGT_68
VCCGT_73
VCCGT_74
VCCGT_75
VCCGT_76
VCCGT_77
VCCGT_78
VCCGT_79
VCCGT_87
VCCGT_88
VCCGT_89
VCCGT_90
VCCGT_80
VCCGT_81
VCCGT_82
VCCGT_83
VCCGT_84
VCCGT_85
VCCGT_86
VCCGT_95
VCCGT_96
VCCGT_91
VCCGT_92
VCCGT_93
VCCGT_94
VCCGT_98
VCCGT_97
VCCGT_100
VCCGT_101
VCCGT_99
VCCGT_102
VCCGT_104
VCCGT_105
VCCGT_106
VCCGT_103
VCCGT_107
VCCGT_108
VCCGT_109
VCCGT_111
VCCGT_112
VCCGT_110
VCCGT_114
VCCGT_113
VCCGT_115
VCCGT_116
VCCGT_117
VCCGT_118
VCCGT_120
VCCGT_SENSE
VSSGT_SENSE
+VCCGT
+VCCCORE_GT
D15
D17
D18
D20
E4
F5
F6
F7
F8
F11
F14
F17
F20
G11
G12
G14
G15
G17
G18
G20
H5
H6
H7
H8
H11
H12
H14
H15
H17
H18
H20
J7
J8
J11
J14
J17
J20
K2
K11
L7
L8
L10
M9
N7
N8
N9
N10
P2
P8
R9
T8
T9
T10
U8
U10
V2
V9
W8
W9
Y8
E3
D2
+VCCCORE_GT
VCCGT_VCCSENSE
VCCGT_VSSSENSE
12
C983
10UF/6.3 V
12
C991
10UF/6.3 V
12
C995
10UF/6.3 V
+VCCGT
12
12
12
+VCORE
+VCCGT
12
R906
100
1%
VCCGT_VCCSENSE (80)
VCCGT_VSSSENSE (80 )
12
R907
100
1%
GND
12
C984
10UF/6.3 V
12
C992
10UF/6.3 V
12
C996
10UF/6.3 V
70A
WHL ES2: VCCCORE
1 2
R908 0ohm/ U42
1 2
R909 0ohm/ U42
R910 0ohm/ U42
1 2
CNL / WHL ES1: VCCGT
1 2
R911 0ohm/ U22
1 2
R912 0ohm/ U22
12
C985
10UF/6.3 V
C993
1UF/6.3V
12
C997
1UF/6.3V
C986
10UF/6.3 V
C955
10UF/6.3 V
+VCCCORE_GT
12
C987
10UF/6.3 V
12
C998
10UF/6.3 V
12
12
C988
10UF/6.3 V
C999
1UF/6.3V
12
12
C989
10UF/6.3 V
C944
1UF/6.3V
12
C990
10UF/6.3 V
GND
A A
GND
5
4
GND
3
12
C994
1UF/6.3V
2
12
C956
10UF/6.3 V
12
C957
10UF/6.3 V
12
C958
10UF/6.3 V
12
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
<OrgName>
<OrgName>
<OrgName>
Size Pro ject Name
Size Pro ject Name
Size Pro ject Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
C959
1UF/6.3V
12
C960
1UF/6.3V
MILL ER
MILL ER
MILL ER
1
12
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
C961
1UF/6.3V
CPU_POWER_02,03
CPU_POWER_02,03
CPU_POWER_02,03
Howard_Chen
Howard_Chen
Howard_Chen
9 94Monday, J une 11, 2 018
9 94Monday, J une 11, 2 018
9 94Monday, J une 11, 2 018
Rev
Rev
Rev
1.4
1.4
1.4
5
4
3
2
1
+1.05VSUS_ORG
BW16
BW18
BW19
D D
C C
+1.05VSUS
R1001
1 2
+VCCAMPHYPLL_1P05_L
0Ohm
0.152A
+1.05VSUS_ORG +VCCAPLL_1P05
0.102A
L1000
21
75Ohm
12
@
C1009
2PF/50V
B B
0.006A
L1001
12
@
C1013
2PF/50V
75Ohm
12
21
12
@
C1010
2PF/50V
@
C1014
2PF/50V
12
C1011
4.7UF/6.3V
GNDGND
+VCCHDA+3VSUS
12
C1015
0.1UF/16V
12
C1031
0.1UF/16V
C1030
0.1UF/16V
+1.8VSUS_ORG
12
C1000
1UF/6.3V
GND
PLACE NEAR CP17
+1.05VSUS
12
C1029
0.1UF/16V
@
C1006
12
GND
12
47UF/6.3V
GND
12
+3VSUS_ORG
12
GND
C1007
1UF/6.3V
+VCCHDA
C1004
22UF/6.3V
+VCCDSW_3P3
+3VSUS_ORG
+VCCPRIM_CORE
+VCCPDSW_1P05
+VCCAPLL_1P05
+VCCAPLL_1P05
+1.05VSUS_ORG
+1.05VSUS_ORG
+1.05VSUS
BW20
BW22
BW12
BW14
U300P
BP20
VCCPRIM_1P05_7
VCCPRIM_1P05_8
VCCPRIM_1P05_9
VCCPRIM_1P05_10
BY16
VCCPRIM_1P05_11
CA14
VCCPRIM_1P05_12
CC15
VCCPRIM_1P8_1
CD15
VCCPRIM_1P8_2
CD16
VCCPRIM_1P8_3
CP17
VCCPRIM_1P8_4
CB22
VCCPRIM_3P3_2
CB23
VCCPRIM_3P3_3
CC22
VCCPRIM_3P3_4
CC23
VCCPRIM_3P3_5
CD22
VCCPRIM_3P3_6
CD23
VCCPRIM_3P3_7
CP29
VCCPRIM_3P3_8
BU15
VCCPRIM_CORE_1
BU22
VCCPRIM_CORE_2
BV15
VCCPRIM_CORE_3
BV16
VCCPRIM_CORE_4
BV18
VCCPRIM_CORE_5
BV19
VCCPRIM_CORE_6
BV20
VCCPRIM_CORE_7
BV22
VCCPRIM_CORE_8
VCCPRIM_CORE_9
VCCPRIM_CORE_10
CA12
VCCPRIM_CORE_11
CA16
VCCPRIM_CORE_12
CA18
VCCPRIM_CORE_13
CA19
VCCPRIM_CORE_14
CA20
VCCPRIM_CORE_15
CB12
VCCPRIM_CORE_16
CB14
VCCPRIM_CORE_17
CB15
VCCPRIM_CORE_18
BT24
VCCDSW_1P05
BU14
VCCAPLL_1P05_1
BV12
VCCPRIM_MPHY_1P05_1
VCCPRIM_MPHY_1P05_2
VCCPRIM_MPHY_1P05_3
BY12
VCCPRIM_MPHY_1P05_4
BY14
VCCPRIM_MPHY_1P05_5
BV2
VCCAMPHYPLL_1P05
BR15
VCCAPLL_1P05_2
CC12
VCCDUSB_1P05
BR24
VCCDSW_3P3_2
BT20
VCCHDA
BV23
VCCSPI
BT18
VCCPRIM_1P05_1
BT19
VCCPRIM_1P05_2
BU18
VCCPRIM_1P05_3
BU19
VCCPRIM_1P05_4
BT22
VCCPRIM_1P05_14
BP22
VCCPRIM_1P05_13
BV14
VCCPRIM_MPHY_1P05_6
FH8068403419514
16 of 20
VCCPRIM_3P3_9
VCCRTC
VCCPRIM_1P05_6
DCPRTC
VCCPRIM_1P05_5
VCCAPLL_1P05_4
VCCA_BCLK_1P05
VCCAPLL_1P05_3
VCCA_SRC_1P05
VCCA_XTAL_1P05
VCCDPHY_1P24_1
VCCDPHY_1P24_2
VCCDPHY_1P24_3
VCCDPHY_1P24_4
VCCDPHY_1P24_5
VCCDSW_3P3_1
VCCA_19P2_1P05
VCCPRIM_1P8_5
VCCPRIM_1P8_6
VCCPRIM_1P8_7
VCCPRIM_1P8_8
VCCPRIM_1P8_9
VCCPRIM_3P3_10
VCCPRIM_3P3_1
GPP_B0/CORE_VID0
GPP_B1/CORE_VID1
CB16
BR23
BY20
BP24
BR20
BT12
BP14
BR14
BU12
CP5
BY24
CA24
BY23
CA23
CP25
BT23
BR12
CC18
CC19
CD18
CD19
CP23
BW23
BP23
CB36
CB35
+3VSUS_ORG
+VCC_RTC
+VCCRTCEXT
+1.05VSUS_ORG
+VCCAPLL_1P05
+1.05VSUS_ORG
+VCCA_XTAL_1P05_L
+VCCLDOSRAM_1P24
+VCCDPHY_1P24
+VCCDSW_3P3
+1.05VSUS_ORG
+1.8VSUS_ORG
+3VSUS_ORG
12
C1008
1UF/6.3V
GND
PLACE NEAR CP23
1
T1000
1
T1001
+1.05VSUS_ORG +VCCA_XTAL_1P05_L
USB Short Protection
+3VSUS
SM2205PSQGC-TRG
2
E
Q1002
B
PMBT3906
1
C
3
+VCC_RTC
1 2
1 2
0.002A
@
1 2
R1000
1 2
+1.05VSUS_ORG +1.05VSUS
+3VSUS_ORG +3VSUS
+1.8VSUS_ORG +1.8VSUS
+VCCLDOSRAM_1P24 +VCCDPHY_1P24
0.004A
Q1001
1
1
2
2
5
5
D
6
6 3
7
0Ohm
2.087A
1 2
R1007 0Ohm
0.201A
1 2
R1002 0Ohm
0.696A
1 2
R1008 0Ohm
0.61A
1 2
R1010 0
vx_r0603_0ohm_h28_small
S
G
/CNV
8
4
2
E
Q1003
B
1
PMBT3906
C
3
+VCCDSW_3P3
1 2
mount for CNVi
C10010.1UF/16V
C10021UF/6.3V
GND
C100347UF/6.3V
C10051UF/6.3V
GND
GNDGND
+VCCPRIM_CORE
12
C1018
1UF/6.3V
GND
5
+VCCPRIM_CORE
12
@
C1026
1UF/6.3V
GND
12
C1017
0.1UF/16V
GND
@
C1028
1UF/6.3V
+VCCPRIM_CORE
12
@
C1027
1UF/6.3V
GND
+VCCPRIM_CORE
12
A A
GND
+1.05VSUS_ORG
12
C1019
1UF/6.3V
GND
PLACE NEAR BP20 PLACE NEAR BV14 PLACE NEAR BR24 PLACE NEAR CP29
4
+1.05VSUS
12
GND
@
C1020
22UF/6.3V
X5R/+/-20%
+VCCDSW_3P3
12
C1021
1UF/6.3V
GND
+3VSUS_ORG
C1022
0.1UF/16V
1 2
GND
PLACE NEAR CP29
3
12
C1023
1UF/6.3V
+VCCPDSW_1P05
12
C1024
1UF/6.3V
GND
Internal VRM Internal VRMInternal VRM
PLACE NEAR BT24PLACE NEAR BV18 PLACE NEAR CP25PLACE NEAR BP24
+VCCDPHY_1P24+VCCRTCEXT
12
C1025
4.7UF/6.3V
GND
2
R1004
5.1KOhm
1 2
R1005
1MOHM
1 2
GND GND
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
<OrgName>
<OrgName>
<OrgName>
Size Project Name
Size Project Name
Size Project Name
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
R1006
1MOHM
1 2
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
MILLER
MILLER
MILLER
1
CPU_POWER_04
CPU_POWER_04
CPU_POWER_04
Howard_Chen
Howard_Chen
Howard_Chen
10 94Monday, June 11, 2018
10 94Monday, June 11, 2018
10 94Monday, June 11, 2018
Rev
Rev
Rev
1.4
1.4
1.4
5
4
3
2
1
U300R
CR34
VSS_332
BT5
VSS_200
BY5
VSS_227
D D
C C
B B
GND
CP35
CM37
CK37
AW1
CM1
BD6
AY4
B34
E35
A4
AE24
AE26
AF25
AG24
AG26
AH24
AH25
B2
B36
C36
C37
CN1
CN2
CN37
CP2
D1
A32
F33
A3
BJ7
CJ36
A36
BK10
CJ4
AB27
BK2
CK1
AB3
BK28
AB30
BK3
CK4
AB33
BK33
CK7
AB36
BK4
CL2
AB4
BK7
CM13
AB7
BL25
CM17
AC10
BL28
CM21
AC27
BL29
CM25
AC30
BL30
CM29
BL31
CM31
AD33
BL32
CM33
AD35
FH8068403419514
VSS_328
VSS_306
VSS_294
VSS_91
VSS_298
VSS_136
VSS_100
VSS_111
VSS_347
VSS_4
VSS_18
VSS_20
VSS_24
VSS_33
VSS_34
VSS_36
VSS_37
VSS_104
VSS_112
VSS_233
VSS_234
VSS_310
VSS_313
VSS_317
VSS_325
VSS_335
VSS_2
VSS_356
VSS_1
VSS_158
VSS_291
VSS_3
VSS_159
VSS_292
VSS_5
VSS_160
VSS_293
VSS_6
VSS_161
VSS_7
VSS_162
VSS_295
VSS_8
VSS_163
VSS_296
VSS_9
VSS_164
VSS_297
VSS_10
VSS_165
VSS_299
VSS_11
VSS_166
VSS_300
VSS_12
VSS_167
VSS_301
VSS_13
VSS_168
VSS_302
VSS_14
VSS_169
VSS_303
VSS_170
VSS_304
VSS_16
VSS_171
VSS_305
VSS_17
17 of 20
VSS_172
VSS_19
VSS_173
VSS_308
VSS_21
VSS_174
VSS_309
VSS_22
VSS_175
VSS_311
VSS_23
VSS_176
VSS_312
VSS_25
VSS_177
VSS_314
VSS_26
VSS_178
VSS_315
VSS_27
VSS_316
VSS_28
VSS_180
VSS_29
VSS_30
VSS_318
VSS_31
VSS_182
VSS_319
VSS_32
VSS_183
VSS_320
VSS_184
VSS_321
VSS_38
VSS_185
VSS_322
VSS_39
VSS_186
VSS_323
VSS_40
VSS_187
VSS_324
VSS_41
VSS_326
VSS_42
VSS_189
VSS_327
VSS_43
VSS_191
VSS_44
VSS_329
VSS_45
VSS_193
VSS_46
VSS_194
VSS_330
VSS_47
VSS_331
VSS_48
VSS_333
VSS_49
VSS_336
VSS_50
VSS_195
VSS_337
VSS_51
VSS_196
VSS_52
VSS_197
VSS_338
VSS_53
BL7
AE25
BM33
CM5
AE27
BM35
CM9
AE30
BM36
CN13
AE7
BM9
CN17
AF27
BN30
CN21
AF3
BN7
CN25
AF30
CN29
AF33
BP15
AF36
AF4
CN5
AF7
BP25
CN9
AG10
BP3
CP1
BP32
CP11
AH27
BP33
CP13
AH28
BP4
CP15
AH29
BP7
CP19
AH30
CP21
AH31
BR19
CP27
AH33
BR25
AH35
CP37
AJ25
BT15
AJ28
BT16
CP9
AJ7
CR2
AK3
CR36
AK33
D21
AK36
BT25
D25
AK4
BT28
AL28
BT33
D5
AL29
GND
U300S
BT35
VSS_198
D6
VSS_339
AL32
VSS_54
BT36
VSS_199
D8
VSS_340
AL7
VSS_55
D9
VSS_341
AM10
VSS_56
BU11
VSS_201
E23
VSS_342
AM28
VSS_57
E27
VSS_343
AM33
VSS_58
BU23
VSS_204
E29
VSS_344
AM35
VSS_59
BU24
VSS_205
E31
VSS_345
BU25
VSS_206
E33
VSS_346
AN25
VSS_61
BU7
VSS_207
E9
VSS_348
AN28
VSS_62
BV11
VSS_208
F12
VSS_349
AN29
VSS_63
F15
VSS_350
AN30
VSS_64
F18
VSS_351
AN31
VSS_65
BV3
VSS_209
F2
VSS_352
AN7
VSS_66
BV31
VSS_210
F21
VSS_353
AN8
VSS_67
BV33
VSS_211
F24
VSS_354
BV4
VSS_212
F3
VSS_355
AP3
VSS_68
BW11
VSS_213
F4
VSS_357
AP33
VSS_69
BW15
VSS_214
G21
VSS_358
AP36
VSS_70
G27
VSS_359
AP4
VSS_71
G33
VSS_360
AR28
VSS_72
G35
VSS_361
G36
VSS_362
AT33
VSS_74
BW24
VSS_215
G9
VSS_363
AT35
VSS_75
H21
VSS_364
AT36
VSS_76
BW7
VSS_216
H27
VSS_365
AT4
VSS_77
BY11
VSS_217
AU10
VSS_78
BY15
VSS_218
H9
VSS_366
AU28
VSS_79
BY22
VSS_221
J12
VSS_367
AU29
VSS_80
J15
VSS_368
GND GND
FH8068403419514
18 of 20
VSS_222
VSS_369
VSS_81
VSS_223
VSS_370
VSS_83
VSS_224
VSS_371
VSS_84
VSS_225
VSS_372
VSS_85
VSS_226
VSS_373
VSS_86
VSS_375
VSS_87
VSS_228
VSS_376
VSS_88
VSS_229
VSS_377
VSS_89
VSS_230
VSS_378
VSS_90
VSS_231
VSS_379
VSS_92
VSS_232
VSS_380
VSS_93
VSS_235
VSS_381
VSS_94
VSS_236
VSS_382
VSS_95
VSS_237
VSS_383
VSS_96
VSS_238
VSS_384
VSS_98
VSS_239
VSS_385
VSS_99
VSS_386
VSS_101
VSS_387
VSS_102
VSS_240
VSS_388
VSS_103
VSS_241
VSS_389
VSS_105
VSS_390
VSS_106
VSS_391
VSS_107
VSS_242
VSS_392
VSS_108
VSS_243
VSS_393
VSS_109
VSS_244
VSS_394
VSS_110
VSS_245
VSS_395
VSS_247
BY25
J18
AU32
BY28
J21
AV25
BY33
J24
AV28
BY35
J33
AV3
BY36
J36
AV33
J6
AV36
C1
K21
AV4
C21
K22
AV6
C25
K24
AV8
C29
K25
AW28
C33
K27
AW29
C4
K28
AW3
C9
K29
AW30
CA11
K3
AW31
CA15
K30
AY33
CA22
K31
AY35
K32
B12
K4
B15
CA25
K9
B18
CB11
L27
B21
L33
B23
L35
B25
CB18
L36
B27
CB19
L6
B29
CB2
N25
B31
CB20
N27
CB25
GND
N6
B37
CB3
P10
B5
CB33
P3
B7
CB4
P33
B9
CB7
P36
BA10
CC11
P4
BA28
P7
BA3
CC20
R27
BB3
CC25
R28
BB33
CC28
R29
BB36
CC31
R30
BB4
CC7
R31
BC25
CD11
T27
CD12
T30
BC29
CD14
T33
T35
BC32
CD24
T36
CD25
T7
BC8
CE33
U26
BD28
CE35
U7
BD33
CE36
V26
BD35
CE7
V27
BD36
CF11
V3
BE10
CF14
V30
BE28
CF19
V33
BE29
CF2
V36
BE3
FH8068403419514
U300T
VSS_396
VSS_113
VSS_248
VSS_397
VSS_114
VSS_249
VSS_398
VSS_115
VSS_250
VSS_399
VSS_116
VSS_251
VSS_400
VSS_117
VSS_252
VSS_401
VSS_118
VSS_402
VSS_119
VSS_255
VSS_403
VSS_122
VSS_257
VSS_404
VSS_123
VSS_258
VSS_405
VSS_124
VSS_259
VSS_406
VSS_125
VSS_260
VSS_407
VSS_126
VSS_261
VSS_408
VSS_262
VSS_409
VSS_127
VSS_263
VSS_410
VSS_411
VSS_128
VSS_265
VSS_412
VSS_266
VSS_413
VSS_130
VSS_267
VSS_415
VSS_131
VSS_268
VSS_416
VSS_132
VSS_269
VSS_417
VSS_133
VSS_270
VSS_418
VSS_134
VSS_271
VSS_419
VSS_138
VSS_272
VSS_420
VSS_139
VSS_273
VSS_421
VSS_140
VSS_274
VSS_422
VSS_141
19 of 20
VSS_275
VSS_423
VSS_142
VSS_276
VSS_424
VSS_143
VSS_277
VSS_425
VSS_278
VSS_426
VSS_146
VSS_279
VSS_427
VSS_147
VSS_280
VSS_148
VSS_428
VSS_149
VSS_281
VSS_429
VSS_150
VSS_430
VSS_151
VSS_282
VSS_431
VSS_283
VSS_432
VSS_153
VSS_284
VSS_433
VSS_154
VSS_286
VSS_155
VSS_287
VSS_156
VSS_289
VSS_157
VSS_290
VSS_181
VSS_188
VSS_219
VSS_220
VSS_254
VSS_202
VSS_253
VSS_190
VSS_203
VSS_264
VSS_192
VSS_179
VSS_246
VSS_256
VSS_374
VSS_414
VSS_137
VSS_73
VSS_82
VSS_97
VSS_121
VSS_129
VSS_144
VSS_145
VSS_120
VSS_135
VSS_152
VSS_285
VSS_288
VSS_60
VSS_307
VSS_15
VSS_35
VSS_334
CF23
V4
BE30
CF28
W10
BE31
CF3
W27
CF4
W30
BF3
CG33
W7
BF33
CG7
BF36
Y26
BF4
CH31
Y27
BG25
Y30
BG28
CJ11
Y33
CJ14
Y35
BH28
CJ19
Y7
BH29
CJ23
BH32
CJ28
BH33
CJ33
BH35
CJ35
BP19
BR16
BY18
BY19
CC16
BU16
CC14
BR22
BU20
CD20
BT14
BP12
CB24
CC24
J5
U24
BD7
AR4
AU4
AW4
BA6
BC4
BE4
BE8
BA4
BD4
BG4
CJ2
CJ3
AM5
CM4
AC5
AG5
CR6
GND
A A
CPU_GND
CPU_GND
CPU_GND
Title :
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
<OrgName>
<OrgName>
<OrgName>
Size Project Name
Size Project Name
Size Project Name
A3
A3
A3
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
MILLER
MILLER
MILLER
Title :
Engineer:
Engineer:
Engineer:
1
Howard_Chen
Howard_Chen
Howard_Chen
11 94Monday, June 11, 2018
11 94Monday, June 11, 2018
11 94Monday, June 11, 2018
Rev
Rev
Rev
1.4
1.4
1.4
5
D D
4
3
2
1
C C
B B
A A
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
<OrgName>
<OrgName>
<OrgName>
Size Project Name
Size Project Name
Size Project Name
A
A
A
Date: Sheet of
Date: Sheet of
Date: Sheet of
5
4
3
2
MILLER
MILLER
MILLER
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
RSVD
RSVD
RSVD
Howard Chen
Howard Chen
Howard Chen
12 94Monday, June 11, 2018
12 94Monday, June 11, 2018
12 94Monday, June 11, 2018
1
Rev
Rev
Rev
1.4
1.4
1.4
5
4
3
2
1
+3VS_RGLRI
+1.0_RGLRO
12
D D
Colay
R1329/R4804
R1330/R4803
HDMI_TXP2(3)
HDMI_TXN2(3)
HDMI_TXP1(3)
HDMI_TXN1(3)
HDMI_TXP0(3)
HDMI_TXN0(3)
HDMI_CLKP(3)
HDMI_CLKN(3)
C C
+3VS
R1349 0Ohm/U22
1 2
R1319 0/U22
R1354 0/U22
R1355 0/U22
R1356 0/U22
R1315 0/U22
R1316 0/U22
R1317 0/U22
R1318 0/U22
R1307 0/U42
R1308 0/U42
R1309 0/U42
R1310 0/U42
R1311 0/U42
R1312 0/U42
R1313 0/U42
R1314 0/U42
0603
/U22
B B
A A
L1303
60Ohm
21
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
Colay
+3VS_RGLRI
HDMI_SDA_PCH(3,48)
HDMI_SCL_PCH(3,48)
HDMI_TXP2_IT
HDMI_TXN2_IT
HDMI_TXP1_IT
HDMI_TXN1_IT
HDMI_TXP0_IT
HDMI_TXN0_IT
HDMI_CLKP_IT
HDMI_CLKN_IT
HDMI_TXP2_PS (48)
HDMI_TXN2_PS (48)
HDMI_TXP1_PS (48)
HDMI_TXN1_PS (48)
HDMI_TXP0_PS (48)
HDMI_TXN0_PS (48)
HDMI_CLKP_PS (48)
HDMI_CLKN_PS (48)
OVDD33_66317
MCUVDD_66317
TVCC33_66317
12
/U22
C1339
4.7UF/6.3V
GND
RVCC33_66317
GND
GND
GND
1 2
C1335
0.1UF/16V
1 2
C1336
0.1UF/16V
1 2
/U22
C1338
0.1UF/16V
/U22
/U22
1 2
GND
R1329 22Ohm/U22
R1330 22Ohm/U22
C1325 0.1UF/16V/U22
C1326 0.1UF/16V/U22
C1327 0.1UF/16V/U22
C1328 0.1UF/16V/U22
C1329 0.1UF/16V/U22
C1330 0.1UF/16V/U22
C1331 0.1UF/16V/U22
C1332 0.1UF/16V/U22
/U22
C1337
0.1UF/16V
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
+1.0_RGLRO
/U22
C1334
10uF/10V
R1352 0Ohm/U22
12
/U22
C1333
10uF/10V
Close to chipClose to chip
IVDD10_66317
GNDGND
TXSCL_66317
TXSDA_66317
OVDD33_66317
PC_SDA
PC_SCL
HDMI_SDA_66317
HDMI_SCL_66317
HDMID_DDI2_DATA2_P
HDMID_DDI2_DATA2_N
HDMID_DDI2_DATA1_P
HDMID_DDI2_DATA1_N
RAVCC10_66317
HDMID_DDI2_DATA0_P
HDMID_DDI2_DATA0_N
HDMID_DDI2_DATA3_P
HDMID_DDI2_DATA3_N
RVCC33_66317
RVCC10_66317
IVDD10_66317
1 2
0603
/U22
L1301
21
60Ohm
/U22
L1302
21
60Ohm
HDMI 2.0 Re-Timer
/U22
U1302A
25
NC_1
26
RGLRI
27
RGLRO
28
IVDD10_1
29
TXSCL
30
TXSDA
31
OVDD33_2
32
PCSDA
33
PCSCL
34
RXSDA
35
RXSCL
36
NC_2
37
RX2P
38
RX2M
39
RX1P
40
RX1M
41
RAVCC10
42
RX0P
43
RX0M
44
RXCP
45
RXCM
46
RVCC33
47
RVCC10
48
IVDD10_2
49
GND_1
IT66317FN/BW-0003(R)
GND
02T0I0001N00
Add least 9 GND vias
on EPAD area.
IVDD10_66317
12
/U22
C1341
4.7UF/6.3V
Close to pin48 Close to pin28
TVCC10_66317
RVCC10_66317
TAVCC10_66317
12
/U22
C1323
4.7UF/6.3V
GND
RAVCC10_66317
C1324
0.1UF/16V
1 2
GND
24
TX2P
23
TX2M
22
TX1P
21
TX1M
20
TAVCC10
19
TX0P
18
TX0M
17
TXCP
16
TXCM
15
TVCC10
14
TVCC33
13
REXT
12
TXHPD
11
ISPSDA
10
ISPSCL
9
URDBG
8
I2CEN
7
OVDD33_1
6
PCADR
5
RXHPD
4
RSV
3
MCUVDD
2
MPCSDA
1
MPCSCL
/U22
C1340
0.1UF/16V
1 2
GNDGND GND
1 2
GND
1 2
GND
/U22
C1322
0.1UF/16V
1 2
GND
/U22
1 2
/U22
C1320
0.1UF/16V
/U22
C1321
0.1UF/16V
HDMI_TMDSD_DATA2_P
HDMI_TMDSD_DATA2_N
HDMI_TMDSD_DATA1_P
HDMI_TMDSD_DATA1_N
TAVCC10_66317
HDMI_TMDSD_DATA0_P
HDMI_TMDSD_DATA0_N
HDMI_TMDSD_CLK_P
HDMI_TMDSD_CLK_N
TVCC10_66317
TVCC33_66317
REXT_66317
DP1_HPD_66317
ISP_SDA
ISP_SCL
HDMI_SW2
OVDD33_66317
PCADR
HPD_IFPE_HDMI_R
HDMI_SW1
MCUVDD_66317
MPC_SDA PC_SDA
MPC_SCL PC_SCL
/U22
C1342
0.1UF/16V
1 2
R1346 22Ohm@
1 2
R1345 22Ohm@
1 2
R1328 11KOhm@
1 2
R1327 22Ohm/U22
U1302B
50
51
52
53
54
55
56
57
58
IT66317FN/BW-0003(R)
02T0I0001N00
GND
Output
Swing
Level 1
(Lowest)
Level 2
(Default)
/U22
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
Level 3
Level 4
(Highest)
ISP_SDA
ISP_SCL
HDMI_SDA_66317
HDMI_SCL_66317
PC_SDA
PC_SCL
TXSDA_66317
TXSCL_66317
PCADR
HDMI_SDA_PCH
HDMI_SCL_PCH
GND
Debug use only.
1 2
R1324 1KOhm 1%/U22
HDMI_SCL_PCH
HDMI_SDA_PCH
HDMI_SW1 HDMI_SW2
0 0
0 1
1 0
1 1
OVDD33_66317
G
S
/U22
UM6K1NG1DTN
Q4801A
12
R133510KOhm @
12
R133610KOhm @
12
R133710KOhm @
12
R133810KOhm @
12
R134710KOhm /U22
12
R134810KOhm /U22
12
R135010KOhm /U22
12
R135110KOhm /U22
12
R133310KOhm @
12
R133410KOhm @
GND
2
D
/U22
UM6K1NG1DTN
HDMI_SW1
HDMI_SW2
OVDD33_66317
PU @ cpu side
DP1_HPD
12
/U22
R1325
100KOhm
61
5
G
S
D
Q4801B
OVDD33_66317
1 2
1 2
GND GND
GND
DPB_HPD (3,48)
HDMI_SCL_R
HDMI_SDA_R
34
R1322
22KOhm@
/U22
R1320
100KOhm
1 2
1 2
1 2
GND
/U22
R1323
22KOhm
@
R1321
100KOhm
HDMI_Re_SDA(48)
HDMI_Re_SCL(48)
DPB_Re_HPD(48)
HDMI_SDA
HDMI_SCL
DP1_HPD
/U22
R1326
47KOhm
1%
1 2
R1331 22Ohm/U22
1 2
R1332 22Ohm/U22
Colay
R1301 0Ohm/U42
R1302 0Ohm/U42
R1303 0Ohm/U42
R1304 0Ohm/U22
R1305 0Ohm/U22
R1306 0Ohm/U22
HDMI_SCL
HDMI_SDA
1 2
1 2
1 2
1 2
1 2
1 2
HDMI_TMDSD_DATA2_N (48)
HDMI_TMDSD_DATA2_P (48)
HDMI_TMDSD_DATA1_P (48)
HDMI_TMDSD_DATA1_N (48)
HDMI_TMDSD_DATA0_P (48)
HDMI_TMDSD_DATA0_N (48)
HDMI_TMDSD_CLK_P (48)
HDMI_TMDSD_CLK_N (48)
HDMI_SDA_CON
HDMI_SCL_CON
DP1_HPD_CON
HDMI_SDA_CON (48)
HDMI_SCL_CON (48)
DP1_HPD_CON (48)
<Variant Name>
<Variant Name>
<Variant Name>
HDMI-4K2K
HDMI-4K2K
Title :
Title :
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
BG1-HW3 RD
BG1-HW3 RD
BG1-HW3 RD
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Title :
Engineer:
Engineer:
Engineer:
MILLER
MILLER
MILLER
1
HDMI-4K2K
Howard Chen
Howard Chen
Howard Chen
13 94Monday, June 11, 2018
13 94Monday, June 11, 2018
13 94Monday, June 11, 2018
Rev
Rev
Rev
1.4
1.4
1.4
5
D D
4
3
2
1
C C
B B
A A
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
<OrgName>
<OrgName>
<OrgName>
Size Project Name
Size Project Name
Size Project Name
A
A
A
Date: Sheet of
Date: Sheet of
Date: Sheet of
5
4
3
2
MILLER
MILLER
MILLER
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
RSVD
RSVD
RSVD
Howard Chen
Howard Chen
Howard Chen
14 94Monday, June 11, 2018
14 94Monday, June 11, 2018
14 94Monday, June 11, 2018
1
Rev
Rev
Rev
1.4
1.4
1.4
5
4
3
2
1
15
D D
C C
DDR4(0)_Termination
+0.6VS
CHA
R1501
R1503
R1504
R1505
R1507
R1509
R1511
R1513
R1515
R1517
R1519
R1520
R1521
R1523
R1524
R1526
R1527
36OHM
1 2
36OHM
1 2
36OHM
1 2
36OHM
1 2
36OHM
1 2
36OHM
1 2
36OHM
1 2
36OHM
1 2
36OHM
1 2
36OHM
1 2
36OHM
1 2
36OHM
1 2
36OHM
1 2
36OHM
1 2
36OHM
1 2
36OHM
1 2
36OHM
1 2
+0.6VS
36OHM
1 2
33Ohm
33Ohm
R1500
R1502
R1506
R1508
R1510
R1512
R1514
R1516
R1518
1%
1%
R1528
1 2
36OHM
1 2
/DDP
36OHM
1 2
36OHM
1 2
36OHM
1 2
36OHM
1 2
36OHM
1 2
36OHM
1 2
C1547
49.9Ohm
1 2
M_A_DIM0_CS0_N(6,16)
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10_AP
M_A_A11
M_A_A12
M_A_A13
M_A_A14_WE_N
M_A_A15_CAS_N
M_A_A16_RAS_N
M_A_A0 (6,16)
M_A_A1 (6,16)
M_A_A2 (6,16)
M_A_A3 (6,16)
M_A_A4 (6,16)
M_A_A5 (6,16)
M_A_A6 (6,16)
M_A_A7 (6,16)
M_A_A8 (6,16)
M_A_A9 (6,16)
M_A_A10_AP (6,16)
M_A_A11 (6,16)
M_A_A12 (6,16)
M_A_A13 (6,16)
M_A_A14_WE_N (6,16)
M_A_A15_CAS_N (6,16)
M_A_A16_RAS_N (6,16)
M_A_DIM0_CKE0(6,16)
M_A_BG1(6,16)
M_A_BG0(6,16)
M_A_BA0(6,16)
M_A_BA1(6,16)
M_A_DIM0_ODT0(6,16)
M_A_ACT_N(6,16)
DDR0_A_PARITY(6,16)
1 2
M_A_DIM0_CK_DDR0_DN(6,16)
M_A_DIM0_CK_DDR0_DP(6,16)
DDR0_A_ALERT_N(6,16)
R1522
12
C1516
@
3PF/50V
1 2
R1525
36OHM
1%
1%
1%
1%
1%
1%
1%
0.01UF/50V
1 2
1%
1%
1%
+0.6VS
+1.2V
+1.2V
Average placed close to +VDDQ_VTT power plane
+0.6VS
C1518
10UF/6.3V
12
C1503
1UF/6.3V
12
+0.6VS
C1500
1UF/6.3V
12
C1517
10UF/6.3V
12
C1501
1UF/6.3V
12
Follow intel PDG #575412 0.7
12
C1504
1UF/6.3V
12
C1505
1UF/6.3V
12
C1506
1UF/6.3V
+0.6VS
12
12
@
C1521
10UF/6.3V
C1502
1UF/6.3V
12
12
C1507
1UF/6.3V
@
C1522
10UF/6.3V
+0.6VS
Follow intel PDG #575412 0.7
36OHM
1 2
1%
1%
R1529
R1531
R1535
R1537
R1539
R1541
R1543
R1545
R1547
1 2
36OHM
1 2
/DDP-CHB
36OHM
1 2
/CHB
36OHM
1 2
/CHB
36OHM
1 2
/CHB
36OHM
1 2
/CHB
36OHM
1 2
/CHB
36OHM
1 2
/CHB
C1546
+0.6VS
B B
CHB
A A
R1530
R1532
R1533
R1534
R1536
R1538
R1540
R1542
R1544
R1546
R1548
R1549
R1550
R1552
R1553
R1554
R1556
36OHM
1 2
/CHB
36OHM
1 2
/CHB
36OHM
1 2
/CHB
36OHM
1 2
/CHB
36OHM
1 2
/CHB
36OHM
1 2
/CHB
36OHM
1 2
/CHB
36OHM
1 2
/CHB
36OHM
1 2
/CHB
36OHM
1 2
/CHB
36OHM
1 2
/CHB
36OHM
1 2
/CHB
36OHM
1 2
/CHB
36OHM
1 2
/CHB
36OHM
1 2
/CHB
36OHM
1 2
/CHB
36OHM
1 2
/CHB
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10_AP
M_B_A11
M_B_A12
M_B_A13
M_B_A14_WE_N
M_B_A15_CAS_N
M_B_A16_RAS_N
M_B_A0 (6,17)
M_B_A1 (6,17)
M_B_A2 (6,17)
M_B_A3 (6,17)
M_B_A4 (6,17)
M_B_A5 (6,17)
M_B_A6 (6,17)
M_B_A7 (6,17)
M_B_A8 (6,17)
M_B_A9 (6,17)
M_B_A10_AP (6,17)
M_B_A11 (6,17)
M_B_A12 (6,17)
M_B_A13 (6,17)
M_B_A14_WE_N (6,17)
M_B_A15_CAS_N (6,17)
M_B_A16_RAS_N (6,17)
M_B_DIM0_CK_DDR0_DN(6,17)
M_B_DIM0_CK_DDR0_DP(6,17)
M_B_DIM0_CS0_N(6,17)
M_B_DIM0_CKE0(6,17)
M_B_BG1(6,17)
M_B_BG0(6,17)
M_B_BA0(6,17)
M_B_BA1(6,17)
M_B_DIM0_ODT0(6,17)
M_B_ACT_N(6,17)
DDR1_B_PARITY(6,17)
33Ohm
1 2
R1551
/CHB
12
C1545
@
3PF/50V
33Ohm
1 2
R1555
/CHB
/CHB
36OHM
/CHB
1%
1%
1%
1%
1%
1%
1%
0.01UF/50V
1 2
/CHB
1%
1%
+0.6VS
+1.2V
+1.2V
+0.6VS
12
+0.6VS
12
/CHB
C1523
1UF/6.3V
/CHB
C1531
10UF/6.3V
12
12
/CHB
C1524
1UF/6.3V
/CHB
C1532
10UF/6.3V
12
/CHB
C1525
1UF/6.3V
12
/CHB
C1526
1UF/6.3V
12
/CHB
C1527
1UF/6.3V
+0.6VS
12
12
@
C1535
10UF/6.3V
/CHB
C1528
1UF/6.3V
12
/CHB
C1529
1UF/6.3V
12
@
C1536
10UF/6.3V
12
/CHB
C1530
1UF/6.3V
Title :
Title :
Title :
DDR4(0)_Termination
DDR4(0)_Termination
49.9Ohm
1 2
DDR1_B_ALERT_N(6,17)
5
4
3
R1557
/CHB
1%
2
BG1-HW3 RD
BG1-HW3 RD
BG1-HW3 RD
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
MILLER
MILLER
MILLER
Engineer:
Engineer:
Engineer:
1
DDR4(0)_Termination
Howard Chen
Howard Chen
Howard Chen
15 94Monday, June 11, 2018
15 94Monday, June 11, 2018
15 94Monday, June 11, 2018
Rev
Rev
Rev
1.4
1.4
1.4
5
16
D D
C C
DDR4(1)_CH0
M_A_D[0:63] (6)
M_A_A0(6,15)
M_A_A1(6,15)
M_A_A2(6,15)
M_A_A3(6,15)
M_A_A4(6,15)
M_A_A5(6,15)
M_A_A6(6,15)
M_A_A7(6,15)
M_A_A8(6,15)
M_A_A9(6,15)
M_A_A10_AP(6,15)
M_A_A11(6,15)
M_A_A12(6,15)
M_A_A13(6,15)
M_A_A14_WE_N(6,15)
M_A_A15_CAS_N(6,15)
M_A_A16_RAS_N(6,15)
M_A_ACT_N(6,15)
M_A_BA0(6,15)
M_A_BA1(6,15)
M_A_BG0(6,15)
DDR0_A_PARITY(6,15)
M_A_DIM0_CS0_N(6,15)
M_A_DIM0_ODT0(6,15)
M_A_DIM0_CKE0(6,15)
M_A_DIM0_CK_DDR0_DP(6,15)
M_A_DIM0_CK_DDR0_DN(6,15)
DDR0_A_ALERT_N(6,15)
+1.2V
M_A_DQS_DP0(6)
M_A_DQS_DN0(6)
+1.2V
M_A_DQS_DP1(6)
M_A_DQS_DN1(6)
DDR4_DRAMRST_R_N(6,17)
12
C1604
0.1UF/16V
@
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10_AP
M_A_A11
M_A_A12
M_A_A13
M_A_A14_WE_N
M_A_A15_CAS_N
M_A_A16_RAS_N
M_A_ACT_N
M_A_BA0
M_A_BA1
M_A_BG0
DDR0_A_PARITY
M_A_DIM0_CS0_N
M_A_DIM0_ODT0
M_A_DIM0_CKE0
M_A_DIM0_CK_DDR0_DP
M_A_DIM0_CK_DDR0_DN
DDR0_A_ALERT_N
M_A_D0
M_A_D6
M_A_D1
M_A_D3
M_A_D5
M_A_D2
M_A_D4
M_A_D7
M_A_DQS_DP0
M_A_DQS_DN0
M_A_D9
M_A_D10
M_A_D12
M_A_D15
M_A_D13
M_A_D11
M_A_D8
M_A_D14
M_A_DQS_DP1
M_A_DQS_DN1
DDR4_DRAMRST_R_N
U1600
256M x 16 (4Gbit)
P3
A0
P7
A1
R3
A2
N7
A3
N3
A4
P8
A5
P2
A6
R8
A7
R2
A8
R7
A9
M3
A10/AP
T2
A11
M7
A12/BC_n
T8
A13
L2
WE_n/A14
M8
CAS_n/A15
L8
RAS_n/A16
L3
ACT_n
N2
BA0
N8
BA1
M2
BG0
T3
PAR
L7
CS_n
K3
ODT
K2
CKE
K7
CK_t
K8
CK_c
P9
ALERT_n
G2
DQ0
F7
DQ1
H3
DQ2
H7
DQ3
H2
DQ4
H8
DQ5
J3
DQ6
J7
DQ7
E7
NF/LDM_n/LDBI_n
G3
LDQS_t
F3
LDQS_c
A3
DQ8
B8
DQ9
C3
DQ10
C7
DQ11
C2
DQ12
C8
DQ13
D3
DQ14
D7
DQ15
E2
NF/UDM_n/UDBI_n
B7
UDQS_t
A7
UDQS_c
P1
RESET_n
MT40A256M16GE-083E
03T150000101
DDR4
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VPP_1
VPP_2
VREFCA
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
VSSQ_10
ZQ
TEN
NC
+1.2V
B3
B9
D1
G7
J1
J9
L1
L9
R1
T9
A1
A9
C1
D9
F2
F8
G1
G9
+2P5VPP +2P5VPP
J2
J8
B1
R9
M1
DDR4_A_ZQ_01
F9
N9
T7
R1605 0Ohm
B2
E1
E9
G8
K1
K9
M9
N1
T1
A2
A8
C9
D2
D8
E3
E8
F1
H1
H9
R1.4 0.1uf change 0.047uf
follow intel PDG
+V_DDR_VREFCA_CHA_DIMM
12
R1600
240Ohm
RES 240 OHM 1/16W (0402) 1%
/DDP
12
A_MEM1_E9
R1608 240Ohm
R1615 0Ohm
12
/DDP
1 2
/SDP
1 2
Colay
M_A_BG1 (6,15)
C1600
0.047UF/16V
M_A_DQS_DP2(6)
M_A_DQS_DN2(6)
M_A_DQS_DP3(6)
M_A_DQS_DN3(6)
+1.2V
+1.2V
4
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10_AP
M_A_A11
M_A_A12
M_A_A13
M_A_A14_WE_N
M_A_A15_CAS_N
M_A_A16_RAS_N
M_A_ACT_N
M_A_BA0
M_A_BA1
M_A_BG0
DDR0_A_PARITY
M_A_DIM0_CS0_N
M_A_DIM0_ODT0
M_A_DIM0_CKE0
M_A_DIM0_CK_DDR0_DP
M_A_DIM0_CK_DDR0_DN
DDR0_A_ALERT_N
M_A_DQS_DP2
M_A_DQS_DN2
M_A_DQS_DP3
M_A_DQS_DN3
DDR4_DRAMRST_R_N
12
C1605
0.1UF/16V
@
M_A_D17
M_A_D18
M_A_D21
M_A_D23
M_A_D22
M_A_D19
M_A_D20
M_A_D16
M_A_D26
M_A_D28
M_A_D29
M_A_D30
M_A_D24
M_A_D27
M_A_D31
M_A_D25
U1601
256M x 16 (4Gbit)
P3
A0
P7
A1
R3
A2
N7
A3
N3
A4
P8
A5
P2
A6
R8
A7
R2
A8
R7
A9
M3
A10/AP
T2
A11
M7
A12/BC_n
T8
A13
L2
WE_n/A14
M8
CAS_n/A15
L8
RAS_n/A16
L3
ACT_n
N2
BA0
N8
BA1
M2
BG0
T3
PAR
L7
CS_n
K3
ODT
K2
CKE
K7
CK_t
K8
CK_c
P9
ALERT_n
G2
DQ0
F7
DQ1
H3
DQ2
H7
DQ3
H2
DQ4
H8
DQ5
J3
DQ6
J7
DQ7
E7
NF/LDM_n/LDBI_n
G3
LDQS_t
F3
LDQS_c
A3
DQ8
B8
DQ9
C3
DQ10
C7
DQ11
C2
DQ12
C8
DQ13
D3
DQ14
D7
DQ15
E2
NF/UDM_n/UDBI_n
B7
UDQS_t
A7
UDQS_c
P1
RESET_n
MT40A256M16GE-083E
03T150000101
DDR4
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VPP_1
VPP_2
VREFCA
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
VSSQ_10
ZQ
TEN
NC
+1.2V
B3
B9
D1
G7
J1
J9
L1
L9
R1
T9
A1
A9
C1
D9
F2
F8
G1
G9
J2
J8
B1
R9
M1
DDR4_A_ZQ_23
F9
N9
T7
R1606 0Ohm
B2
E1
E9
G8
K1
K9
M9
N1
T1
A2
A8
C9
D2
D8
E3
E8
F1
H1
H9
R1602
240Ohm
RES 240 OHM 1/16W (0402) 1%
1 2
/DDP
12
A_MEM2_E9
M_A_BG1
R1.4 0.1uf change 0.047uf
follow intel PDG
+V_DDR_VREFCA_CHA_DIMM
12
C1601
0.047UF/16V
/DDP
1 2
R1609 240Ohm
1 2
R1613 0Ohm/SDP
3
U1602
DDR4
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10_AP
M_A_A11
M_A_A12
M_A_A13
M_A_A14_WE_N
M_A_A15_CAS_N
M_A_A16_RAS_N
M_A_ACT_N
M_A_BA0
M_A_BA1
M_A_BG0
DDR0_A_PARITY
M_A_DIM0_CS0_N
M_A_DIM0_ODT0
M_A_DIM0_CKE0
M_A_DIM0_CK_DDR0_DP
M_A_DIM0_CK_DDR0_DN
DDR0_A_ALERT_N
M_A_D44
M_A_D46
M_A_D40
M_A_D42
M_A_D41
M_A_D47
M_A_D45
+1.2V
M_A_DQS_DP5(6)
M_A_DQS_DN5(6)
+1.2V
M_A_DQS_DP4(6)
M_A_DQS_DN4(6)
M_A_D43
M_A_DQS_DP5
M_A_DQS_DN5
M_A_D32
M_A_D38
M_A_D37
M_A_D39
M_A_D33
M_A_D35
M_A_D36
M_A_D34
M_A_DQS_DP4
M_A_DQS_DN4
DDR4_DRAMRST_R_N
12
C1606
0.1UF/16V
@
256M x 16 (4Gbit)
P3
A0
P7
A1
R3
A2
N7
A3
N3
A4
P8
A5
P2
A6
R8
A7
R2
A8
R7
A9
M3
A10/AP
T2
A11
M7
A12/BC_n
T8
A13
L2
WE_n/A14
M8
CAS_n/A15
L8
RAS_n/A16
L3
ACT_n
N2
BA0
N8
BA1
M2
BG0
T3
PAR
L7
CS_n
K3
ODT
K2
CKE
K7
CK_t
K8
CK_c
P9
ALERT_n
G2
DQ0
F7
DQ1
H3
DQ2
H7
DQ3
H2
DQ4
H8
DQ5
J3
DQ6
J7
DQ7
E7
NF/LDM_n/LDBI_n
G3
LDQS_t
F3
LDQS_c
A3
DQ8
B8
DQ9
C3
DQ10
C7
DQ11
C2
DQ12
C8
DQ13
D3
DQ14
D7
DQ15
E2
NF/UDM_n/UDBI_n
B7
UDQS_t
A7
UDQS_c
P1
RESET_n
MT40A256M16GE-083E
03T150000101
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VPP_1
VPP_2
VREFCA
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
VSSQ_10
TEN
B3
B9
D1
G7
J1
J9
L1
L9
R1
T9
A1
A9
C1
D9
F2
F8
G1
G9
J2
J8
B1
R9
M1
F9
ZQ
N9
T7
NC
B2
E1
E9
G8
K1
K9
M9
N1
T1
A2
A8
C9
D2
D8
E3
E8
F1
H1
H9
+1.2V
+2P5VPP
DDR4_A_ZQ_54
R1603
240Ohm
RES 240 OHM 1/16W (0402) 1%
1 2
/DDP
R1607 0Ohm
A_MEM3_E9
M_A_BG1
2
R1.4 0.1uf change 0.047uf
follow intel PDG
+V_DDR_VREFCA_CHA_DIMM
12
C1602
0.047UF/16V
12
/DDP
1 2
R1610 240Ohm
1 2
R1614 0Ohm/SDP
ColayColay
M_A_DQS_DP6(6)
M_A_DQS_DN6(6)
M_A_DQS_DP7(6)
M_A_DQS_DN7(6)
12
+1.2V
+1.2V
C1607
0.1UF/16V
@
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10_AP
M_A_A11
M_A_A12
M_A_A13
M_A_A14_WE_N
M_A_A15_CAS_N
M_A_A16_RAS_N
M_A_ACT_N
M_A_BA0
M_A_BA1
M_A_BG0
DDR0_A_PARITY
M_A_DIM0_CS0_N
M_A_DIM0_ODT0
M_A_DIM0_CKE0
M_A_DIM0_CK_DDR0_DP
M_A_DIM0_CK_DDR0_DN
DDR0_A_ALERT_N
M_A_D50
M_A_D49
M_A_D55
M_A_D48
M_A_D54
M_A_D52
M_A_D51
M_A_D53
M_A_DQS_DP6
M_A_DQS_DN6
M_A_D63
M_A_D60
M_A_D62
M_A_D57
M_A_D59
M_A_D61
M_A_D58
M_A_D56
M_A_DQS_DP7
M_A_DQS_DN7
DDR4_DRAMRST_R_N
U1603
256M x 16 (4Gbit)
P3
A0
P7
A1
R3
A2
N7
A3
N3
A4
P8
A5
P2
A6
R8
A7
R2
A8
R7
A9
M3
A10/AP
T2
A11
M7
A12/BC_n
T8
A13
L2
WE_n/A14
M8
CAS_n/A15
L8
RAS_n/A16
L3
ACT_n
N2
BA0
N8
BA1
M2
BG0
T3
PAR
L7
CS_n
K3
ODT
K2
CKE
K7
CK_t
K8
CK_c
P9
ALERT_n
G2
DQ0
F7
DQ1
H3
DQ2
H7
DQ3
H2
DQ4
H8
DQ5
J3
DQ6
J7
DQ7
E7
NF/LDM_n/LDBI_n
G3
LDQS_t
F3
LDQS_c
A3
DQ8
B8
DQ9
C3
DQ10
C7
DQ11
C2
DQ12
C8
DQ13
D3
DQ14
D7
DQ15
E2
NF/UDM_n/UDBI_n
B7
UDQS_t
A7
UDQS_c
P1
RESET_n
MT40A256M16GE-083E
03T150000101
DDR4
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VPP_1
VPP_2
VREFCA
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
VSSQ_10
ZQ
TEN
NC
+1.2V
B3
B9
D1
G7
J1
J9
L1
L9
R1
T9
A1
A9
C1
D9
F2
F8
G1
G9
J2
J8
B1
R9
M1
DDR4_A_ZQ_67
F9
N9
T7
R1604 0Ohm
B2
E1
A_MEM4_E9
E9
G8
K1
K9
M9
N1
T1
A2
A8
C9
D2
D8
E3
E8
F1
H1
H9
1
+2P5VPP
R1.4 0.1uf change 0.047uf
follow intel PDG
+V_DDR_VREFCA_CHA_DIMM
12
C1603
12
/DDP
0.047UF/16V
R1601
240Ohm
12
/DDP
1 2
R1611 240Ohm
/SDP
1 2
R1612 0Ohm
Colay
M_A_BG1
Follow intel PDG #575412 0.7
+1.2V
B B
A A
+2P5VPP
12
12
12
C1652
0.1UF/16V
C1608
10UF/6.3V
C1620
1UF/6.3V
12
12
12
C1653
0.1UF/16V
5
C1609
10UF/6.3V
C1621
1UF/6.3V
12
12
C1622
C1623
1UF/6.3V
1UF/6.3V
12
12
C1655
1UF/6.3V
12
C1656
1UF/6.3V
C1654
10UF/6.3V
+1.2V
+2P5VPP
12
12
12
C1661
0.1UF/16V
4
C1611
10UF/6.3V
C1628
1UF/6.3V
12
12
12
C1662
0.1UF/16V
C1612
10UF/6.3V
C1629
1UF/6.3V
12
12
C1663
10UF/6.3V
C1630
1UF/6.3V
+1.2V
12
12
C1616
C1617
10UF/6.3V
10UF/6.3V
12
C1631
1UF/6.3V
12
12
C1664
C1665
1UF/6.3V
1UF/6.3V
3
+2P5VPP
12
12
C1675
0.1UF/16V
C1642
1UF/6.3V
12
12
C1676
0.1UF/16V
C1643
1UF/6.3V
12
12
C1644
C1645
1UF/6.3V
1UF/6.3V
12
C1677
10UF/6.3V
12
12
C1678
1UF/6.3V
C1679
1UF/6.3V
2
+1.2V
+2P5VPP
12
12
12
C1670
0.1UF/16V
C1614
10UF/6.3V
C1636
1UF/6.3V
12
12
12
C1671
0.1UF/16V
C1615
10UF/6.3V
C1637
1UF/6.3V
12
12
C1638
C1639
1UF/6.3V
1UF/6.3V
12
C1672
10UF/6.3V
12
12
C1673
1UF/6.3V
C1674
1UF/6.3V
Title :
Title :
Title :
DDR4(1)_CH0
DDR4(1)_CH0
BG1-HW3 RD
BG1-HW3 RD
BG1-HW3 RD
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
MILL ER
MILL ER
Date: Sheet of
Date: Sheet of
Date: Sheet of
MILL ER
1
Enginee r:
Enginee r:
Enginee r:
DDR4(1)_CH0
Howard Che n
Howard Che n
Howard Che n
16 94Monday, June 11, 2018
16 94Monday, June 11, 2018
16 94Monday, June 11, 2018
Rev
Rev
Rev
1.4
1.4
1.4
5
17
D D
C C
DDR4(2)_CH1
M_B_D[0:63] (6)
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10_AP
M_B_A11
M_B_A12
M_B_A13
M_B_A14_WE_N
M_B_A15_CAS_N
M_B_A16_RAS_N
M_B_ACT_N M_B_ACT_N
M_B_BA0
M_B_BA1
M_B_BG0 M_B_BG0
DDR1_B_PARITY DDR1_B_PARITY
M_B_DIM0_CS0_N M_B_DIM0_CS0_N
M_B_DIM0_ODT0
M_B_DIM0_CKE0
M_B_DIM0_CK_DDR0_DP M_B_DIM0_CK_DDR0_DP
M_B_DIM0_CK_DDR0_DN
DDR1_B_ALERT_N DDR1_B_ALERT_N
M_B_D4
M_B_D6
M_B_D1
M_B_D7
M_B_D5
M_B_D3
M_B_D0
+1.2V
M_B_D2
M_B_DQS_DP0 M_B_DQS_DP2
M_B_DQS_DN0
Byte_0
M_B_A0(6,15)
M_B_A1(6,15)
M_B_A2(6,15)
M_B_A3(6,15)
M_B_A4(6,15)
M_B_A5(6,15)
M_B_A6(6,15)
M_B_A7(6,15)
M_B_A8(6,15)
M_B_A9(6,15)
M_B_A10_AP(6,15)
M_B_A11(6,15)
M_B_A12(6,15)
M_B_A13(6,15)
M_B_A14_WE_N(6,15)
M_B_A15_CAS_N(6,15)
M_B_A16_RAS_N(6,15)
M_B_ACT_N(6,15)
M_B_BA0(6,15)
M_B_BA1(6,15)
M_B_BG0(6,15)
DDR1_B_PARITY(6,15)
M_B_DIM0_CS0_N(6,15)
M_B_DIM0_ODT0(6,15)
M_B_DIM0_CKE0(6,15)
M_B_DIM0_CK_DDR0_DP(6,15)
M_B_DIM0_CK_DDR0_DN(6,15)
DDR1_B_ALERT_N(6,15)
M_B_DQS_DP0(6) M_B_DQS_DP2(6)
M_B_DQS_DN0(6)
Byte_1 Byte_3
+1.2V
12
C1706
0.1UF/16V
@
M_B_DQS_DP1
M_B_DQS_DN1
DDR4_DRAMRST_R_N
M_B_DQS_DP1(6)
M_B_DQS_DN1(6)
DDR4_DRAMRST_R_N(6,16)
U1700
DDR4
256M x 16 (4Gbit)
P3
A0
P7
A1
R3
A2
N7
A3
N3
A4
P8
A5
P2
A6
R8
A7
R2
A8
R7
A9
M3
A10/AP
T2
A11
M7
A12/BC_n
T8
A13
L2
WE_n/A14
M8
CAS_n/A15
L8
RAS_n/A16
L3
ACT_n
N2
BA0
N8
BA1
M2
BG0
T3
PAR
L7
CS_n
K3
ODT
K2
CKE
K7
CK_t
K8
CK_c
P9
ALERT_n
G2
DQ0
F7
DQ1
H3
DQ2
H7
DQ3
H2
DQ4
H8
DQ5
J3
DQ6
J7
DQ7
E7
NF/LDM_n/LDBI_n
G3
LDQS_t
F3
M_B_D13
M_B_D10 M_B_D29
M_B_D8
M_B_D9
M_B_D11
M_B_D14
M_B_D12
M_B_D15
LDQS_c
A3
DQ8
B8
DQ9
C3
DQ10
C7
DQ11
C2
DQ12
C8
DQ13
D3
DQ14
D7
DQ15
E2
NF/UDM_n/UDBI_n
B7
UDQS_t
A7
UDQS_c
P1
RESET_n
MT40A256M16GE-083E
03T150000101
/CHB
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VPP_1
VPP_2
VREFCA
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
VSSQ_10
TEN
+1.2V
B3
B9
D1
G7
J1
J9
L1
L9
R1
T9
A1
A9
C1
D9
F2
F8
G1
G9
J2
J8
B1
R9
M1
F9
ZQ
N9
T7
NC
B2
E1
E9
G8
K1
K9
M9
N1
T1
A2
A8
C9
D2
D8
E3
E8
F1
H1
H9
+2P5VPP +2P5VPP
R1.4 0.1uf change 0.047uf
follow intel PDG
+V_DDR_VREFCA_CHB_DIMM
12
C1700
/CHB
DDR4_B_ZQ_01 DDR4_B_ZQ_23
12
/CHB
/DDP
R1706 0Ohm
B_MEM1_E9
0.047UF/16V
R1700
240Ohm
RES 240 OHM 1/16W (0402) 1%
12
/DDP
1 2
R1708 240Ohm
/SDP
1 2
R1715 0Ohm
Colay
M_B_BG1 (6,15)
+1.2V
M_B_DQS_DN2(6)
+1.2V
M_B_DQS_DP3(6)
M_B_DQS_DN3(6)
4
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10_AP
M_B_A11
M_B_A12
M_B_A13
M_B_A14_WE_N
M_B_A15_CAS_N
M_B_A16_RAS_N
M_B_BA0
M_B_BA1
M_B_DIM0_ODT0
M_B_DIM0_CKE0
M_B_DIM0_CK_DDR0_DN
M_B_D19
M_B_D23
M_B_D18
M_B_D22
M_B_D21
M_B_D16
M_B_D20
M_B_D17
M_B_DQS_DN2
M_B_D26
M_B_D31
M_B_D24
M_B_D27
M_B_D25
M_B_D30
M_B_D28
M_B_DQS_DP3
M_B_DQS_DN3
DDR4_DRAMRST_R_N
12
C1707
0.1UF/16V
@
U1701
256M x 16 (4Gbit)
P3
A0
P7
A1
R3
A2
N7
A3
N3
A4
P8
A5
P2
A6
R8
A7
R2
A8
R7
A9
M3
A10/AP
T2
A11
M7
A12/BC_n
T8
A13
L2
WE_n/A14
M8
CAS_n/A15
L8
RAS_n/A16
L3
ACT_n
N2
BA0
N8
BA1
M2
BG0
T3
PAR
L7
CS_n
K3
ODT
K2
CKE
K7
CK_t
K8
CK_c
P9
ALERT_n
G2
DQ0
F7
DQ1
H3
DQ2
H7
DQ3
H2
DQ4
H8
DQ5
J3
DQ6
J7
DQ7
E7
NF/LDM_n/LDBI_n
G3
LDQS_t
F3
LDQS_c
A3
DQ8
B8
DQ9
C3
DQ10
C7
DQ11
C2
DQ12
C8
DQ13
D3
DQ14
D7
DQ15
E2
NF/UDM_n/UDBI_n
B7
UDQS_t
A7
UDQS_c
P1
RESET_n
MT40A256M16GE-083E
03T150000101
/CHB
DDR4
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VPP_1
VPP_2
VREFCA
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
VSSQ_10
ZQ
TEN
NC
+1.2V
B3
B9
D1
G7
J1
J9
L1
L9
R1
T9
A1
A9
C1
D9
F2
F8
G1
G9
J2
J8
B1
R9
M1
F9
N9
T7
R1707 0Ohm
B2
E1
E9
G8
K1
K9
M9
N1
T1
A2
A8
C9
D2
D8
E3
E8
F1
H1
H9
/DDP
R1702
240Ohm
RES 240 OHM 1/16W (0402) 1%/CHB
1 2
B_MEM2_E9
12
M_B_BG1
R1.4 0.1uf change 0.047uf
follow intel PDG
+V_DDR_VREFCA_CHB_DIMM
12
C1701
/CHB
0.047UF/16V
/DDP
1 2
R1709 240Ohm
1 2
R1714 0Ohm/SDP
Colay
3
U1702
Byte_4Byte_2
Byte_5
DDR4
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10_AP
M_B_A11
M_B_A12
M_B_A13
M_B_A14_WE_N
M_B_A15_CAS_N
M_B_A16_RAS_N
M_B_ACT_N M_B_ACT_N
M_B_BA0
M_B_BA1
M_B_BG0 M_B_BG0
DDR1_B_PARITY DDR1_B_PARITY
M_B_DIM0_CS0_N M_B_DIM0_CS0_N
M_B_DIM0_ODT0
M_B_DIM0_CKE0
M_B_DIM0_CK_DDR0_DP
M_B_DIM0_CK_DDR0_DN
DDR1_B_ALERT_N DDR1_B_ALERT_N
M_B_D33
M_B_D34
M_B_D36
M_B_D39
M_B_D35
M_B_D38
M_B_D32
+1.2V
M_B_DQS_DP4(6)
M_B_DQS_DN4(6)
+1.2V
M_B_DQS_DP5(6)
M_B_DQS_DN5(6)
12
C1704
0.1UF/16V
@
M_B_D37
M_B_DQS_DP4
M_B_DQS_DN4
M_B_D41
M_B_D46
M_B_D40
M_B_D44
M_B_D43
M_B_D42
M_B_D45
M_B_D47
M_B_DQS_DP5
M_B_DQS_DN5
DDR4_DRAMRST_R_N
256M x 16 (4Gbit)
P3
A0
P7
A1
R3
A2
N7
A3
N3
A4
P8
A5
P2
A6
R8
A7
R2
A8
R7
A9
M3
A10/AP
T2
A11
M7
A12/BC_n
T8
A13
L2
WE_n/A14
M8
CAS_n/A15
L8
RAS_n/A16
L3
ACT_n
N2
BA0
N8
BA1
M2
BG0
T3
PAR
L7
CS_n
K3
ODT
K2
CKE
K7
CK_t
K8
CK_c
P9
ALERT_n
G2
DQ0
F7
DQ1
H3
DQ2
H7
DQ3
H2
DQ4
H8
DQ5
J3
DQ6
J7
DQ7
E7
NF/LDM_n/LDBI_n
G3
LDQS_t
F3
LDQS_c
A3
DQ8
B8
DQ9
C3
DQ10
C7
DQ11
C2
DQ12
C8
DQ13
D3
DQ14
D7
DQ15
E2
NF/UDM_n/UDBI_n
B7
UDQS_t
A7
UDQS_c
P1
RESET_n
MT40A256M16GE-083E
03T150000101
/CHB
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VPP_1
VPP_2
VREFCA
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
VSSQ_10
TEN
+1.2V
B3
B9
D1
G7
J1
J9
L1
L9
R1
T9
A1
A9
C1
D9
F2
F8
G1
G9
+2P5VPP
J2
J8
B1
R9
M1
DDR4_B_ZQ_45
F9
ZQ
N9
/DDP
T7
R1704 0Ohm
NC
B2
E1
B_MEM3_E9 B_MEM4_E9
E9
G8
K1
K9
M9
N1
T1
A2
A8
C9
D2
D8
E3
E8
F1
H1
H9
2
+V_DDR_VREFCA_CHB_DIMM(19)
U1703
DDR4
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10_AP
M_B_A11
M_B_A12
M_B_A13
M_B_A14_WE_N
M_B_A15_CAS_N
M_B_A16_RAS_N
M_B_BA0
+1.2V
+1.2V
M_B_BA1
M_B_DIM0_ODT0
M_B_DIM0_CKE0
M_B_DIM0_CK_DDR0_DP
M_B_DIM0_CK_DDR0_DN
M_B_D59
M_B_D56
M_B_D58
M_B_D57
M_B_D63
M_B_D61
M_B_D62
M_B_D60
M_B_DQS_DP7
M_B_DQS_DN7
M_B_D51
M_B_D48
M_B_D50
M_B_D52
M_B_D54
M_B_D49
M_B_D55
M_B_D53
M_B_DQS_DP6
M_B_DQS_DN6
DDR4_DRAMRST_R_N
12
C1705
0.1UF/16V
@
R1.4 0.1uf change 0.047uf
follow intel PDG
+V_DDR_VREFCA_CHB_DIMM
12
C1702
/CHB
R1701
240Ohm/CHB
0.047UF/16V
12
Byte_6
12
M_B_DQS_DP7(6)
/DDP
1 2
R1710 240Ohm
/SDP
1 2
R1712 0Ohm
M_B_DQS_DN7(6)
Byte_7
Colay Colay
M_B_DQS_DP6(6)
M_B_DQS_DN6(6)
M_B_BG1
256M x 16 (4Gbit)
P3
A0
P7
A1
R3
A2
N7
A3
N3
A4
P8
A5
P2
A6
R8
A7
R2
A8
R7
A9
M3
A10/AP
T2
A11
M7
A12/BC_n
T8
A13
L2
WE_n/A14
M8
CAS_n/A15
L8
RAS_n/A16
L3
ACT_n
N2
BA0
N8
BA1
M2
BG0
T3
PAR
L7
CS_n
K3
ODT
K2
CKE
K7
CK_t
K8
CK_c
P9
ALERT_n
G2
DQ0
F7
DQ1
H3
DQ2
H7
DQ3
H2
DQ4
H8
DQ5
J3
DQ6
J7
DQ7
E7
NF/LDM_n/LDBI_n
G3
LDQS_t
F3
LDQS_c
A3
DQ8
B8
DQ9
C3
DQ10
C7
DQ11
C2
DQ12
C8
DQ13
D3
DQ14
D7
DQ15
E2
NF/UDM_n/UDBI_n
B7
UDQS_t
A7
UDQS_c
P1
RESET_n
MT40A256M16GE-083E
03T150000101
/CHB
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VPP_1
VPP_2
VREFCA
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSSQ_1
VSSQ_2
VSSQ_3
VSSQ_4
VSSQ_5
VSSQ_6
VSSQ_7
VSSQ_8
VSSQ_9
VSSQ_10
1
ZQ
TEN
NC
+1.2V
B3
B9
D1
G7
J1
J9
L1
L9
R1
T9
A1
A9
C1
D9
F2
F8
G1
G9
J2
J8
B1
R9
M1
DDR4_B_ZQ_67
F9
N9
T7
R1705 0Ohm
B2
E1
E9
G8
K1
K9
M9
N1
T1
A2
A8
C9
D2
D8
E3
E8
F1
H1
H9
+V_DDR_VREFCA_CHB_DIMM
+2P5VPP
R1.4 0.1uf change 0.047uf
follow intel PDG
+V_DDR_VREFCA_CHB_DIMM
12
C1703
/CHB
0.047UF/16V
R1703
240Ohm
RES 240 OHM 1/16W (0402) 1%/CHB
1 2
/DDP
12
/DDP
1 2
R1711 240Ohm
1 2
R1713 0Ohm/SDP
M_B_BG1
Follow intel PDG #575412 0.7
+1.2V
12
B B
A A
12
12
+2P5VPP +2P5VPP
12
C1752
0.1UF/16V
/CHB
/CHB
C1708
10UF/6.3V
/CHB
C1720
1UF/6.3V
12
12
C1753
0.1UF/16V
/CHB
/CHB
C1709
10UF/6.3V
/CHB
C1721
1UF/6.3V
5
12
12
/CHB
C1754
10UF/6.3V
/CHB
C1722
1UF/6.3V
12
/CHB
C1723
1UF/6.3V
12
12
/CHB
/CHB
C1755
C1756
1UF/6.3V
1UF/6.3V
+1.2V
12
12
/CHB
/CHB
C1711
C1712
10UF/6.3V
10UF/6.3V
12
12
/CHB
/CHB
C1728
C1729
1UF/6.3V
1UF/6.3V
12
C1762
0.1UF/16V
/CHB
12
12
C1761
0.1UF/16V
/CHB
4
12
C1730
1UF/6.3V
/CHB
C1763
10UF/6.3V
12
/CHB
/CHB
C1731
1UF/6.3V
12
12
/CHB
/CHB
C1764
C1765
1UF/6.3V
1UF/6.3V
3
+1.2V
+2P5VPP
12
12
12
C1770
0.1UF/16V
/CHB
/CHB
C1714
10UF/6.3V
/CHB
C1736
1UF/6.3V
12
12
12
C1771
0.1UF/16V
/CHB
/CHB
C1715
10UF/6.3V
/CHB
C1737
1UF/6.3V
+1.2V
12
12
/CHB
/CHB
C1717
C1718
10UF/6.3V
10UF/6.3V
12
12
/CHB
/CHB
C1738
C1739
1UF/6.3V
1UF/6.3V
+2P5VPP
12
12
/CHB
C1772
10UF/6.3V
/CHB
C1773
1UF/6.3V
12
/CHB
C1774
1UF/6.3V
2
12
12
C1779
0.1UF/16V
/CHB
/CHB
C1744
1UF/6.3V
12
12
C1780
0.1UF/16V
/CHB
/CHB
C1745
1UF/6.3V
12
12
/CHB
/CHB
C1746
C1747
1UF/6.3V
1UF/6.3V
12
12
12
/CHB
C1781
10UF/6.3V
/CHB
C1782
1UF/6.3V
/CHB
C1783
1UF/6.3V
Title :
Title :
MILL ER
MILL ER
MILL ER
Title :
Enginee r:
Enginee r:
Enginee r:
BG1-HW3 RD
BG1-HW3 RD
BG1-HW3 RD
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
DDR4(2)_CH1
DDR4(2)_CH1
DDR4(2)_CH1
Howard Che n
Howard Che n
Howard Che n
17 94Monday, June 11, 2018
17 94Monday, June 11, 2018
17 94Monday, June 11, 2018
Rev
Rev
Rev
1.4
1.4
1.4
5
D D
4
3
2
1
C C
B B
A A
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
<OrgName>
<OrgName>
<OrgName>
Size Project Name
Size Project Name
Size Project Name
A
A
A
Date: Sheet of
Date: Sheet of
Date: Sheet of
5
4
3
2
MILLER
MILLER
MILLER
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
RSVD
RSVD
RSVD
Howard Chen
Howard Chen
Howard Chen
18 94Monday, June 11, 2018
18 94Monday, June 11, 2018
18 94Monday, June 11, 2018
1
Rev
Rev
Rev
1.4
1.4
1.4
5
4
3
2
1
19
D D
C C
DDR4(3)_CA/DQ Voltage
+1.2V
R1901
+V_DDR_CA_VREF(6)
12
C1900
0.022UF/16V
12
R1903
24.9Ohm
1%
+V_DDR_VREFDQ02_CHB(6)
12
C1901
0.022UF/16V
12
R1907
24.9Ohm
1%
1 2
2.7Ohm
R1905
1 2
2.7Ohm
1 2
12
+1.2V
1 2
12
R1900
1.8KOhm
1%
R1902
1.8KOhm
1%
R1904
1.8KOhm
1%
R1906
1.8KOhm
1%
+V_DDR_VREFCA_CHB_DIMM
+V_DDR_VREFCA_CHA_DIMM
+V_DDR_VREFCA_CHA_DIMM
+V_DDR_VREFCA_CHB_DIMM
+1.2V
+1.2V (6,9,15,16,17,57,83)
+V_DDR_VREFCA_CHB_DIMM (17)
+V_DDR_VREFCA_CHA_DIMM (16)
B B
A A
DDR4(3)_CA/DQ Voltage
DDR4(3)_CA/DQ Voltage
Title :
Title :
BG1/HW1
BG1/HW1
BG1/HW1
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
MILLER
MILLER
MILLER
Title :
Engineer:
Engineer:
Engineer:
1
DDR4(3)_CA/DQ Voltage
Howard Chen
Howard Chen
Howard Chen
19 94Monday, June 11, 2018
19 94Monday, June 11, 2018
19 94Monday, June 11, 2018
Rev
Rev
Rev
1.4
1.4
1.4
5
4
3
2
1
U300G
BN34
HDA_S YNC/I2S0 _SFRM
BN37
HDA_B CLK/I2 S0_SCL K
BN36
HDA_S DO/I2S 0_TXD
BN35
HDA_S DI0/I2 S0_RXD
BL3 6
HDA_S DI1/I2 S1_RXD /SNDW1 _DATA
BL3 5
HDA_R ST#/I2 S1_SCL K/SNDW 1_CLK
CK2 3
GPP _D23/I2 S_MCLK
BL3 7
I2S 1_SFRM/S NDW2_C LK
BL3 4
I2S 1_TXD/S NDW2_D ATA
CJ3 2
GPP _H1/I2S2 _SFRM/CNV _BT_I 2S_BCL K/CNV_RF _RESE T#
CH32
GPP _H0/I2S2 _SCLK/C NV_BT_ I2S_SC LK
CH29
GPP _H2/I2S2 _TXD/CNV _BT_I 2S_SDI /MODEM_CL KREQ
CH30
GPP _H3/I2S2 _RXD/CNV _BT_I 2S_SDO
CP2 4
GPP _D19/DMI C_CLK0 /SNDW4 _CLK
CN24
GPP _D20/DMI C_DATA 0/SNDW 4_DATA
CK2 5
GPP _D17/DMI C_CLK1 /SNDW3 _CLK
CJ2 5
GPP _D18/DMI C_DATA 1/SNDW 3_DATA
CF3 5
GPP _B14/SP KR
FH8068403419514
GPP_B14 TOP SWAP OVERRIDE
High - TOP SWAP enabled
Low - disabled (*)
7 of 20
GPP _G0/SD_ CMD
GPP _G1/SD_ DATA0
GPP _G2/SD_ DATA1
GPP _G3/SD_ DATA2
GPP _G4/SD_ DATA3
GPP _G5/SD_ CD#
GPP _G6/SD_ CLK
GPP _G7/SD_ WP
GPP _A17/SD _VDD1_ PWR_ EN#/ISH_G P7
GPP _A16/SD _1P8_S EL
SD_ 1P8_RC OMP
SD_ 3P3_RC OMP
CH36
CL3 5
CL3 6
CM35
CN35
CH35
CK3 6
CK3 4
BW 36
BY31
CK3 3
CM34
VGA_THERM#
R2018 0Ohm/TPANEL
SD_RCOMP
+3VSUS
12
R2026
10KOhm
12
12
GND
TPanel_EN (45)
TPanel_ON (45)
R2008
200
1%
VGA_THERM# (32,74,92)
12
12
12
@
2.2K
HDA_SYNC_R
HDA_BCLK_R
HDA_SDO_R
HDA_SDI0_R
HDA_RST#_R
VGA_THERM#
12
GND
IPD
IPD
IPD
IPD
IPD
IPD
IPD
IPD
12
@
R2010
20K
1 2
D D
C C
HDA_SYNC(36)
HDA_BCLK(36)
HDA_SDO(36)
HDA_SDI0(36)
HDA_RST#(36)
#575412 chap 6.2
HDA_SDO_R
12
R2021
100KOHM
FLASH DESCRIPTOR OVERRIDE
High - override
Low - not override (*)
@
12
C2001
2PF/50V
GND
+3VSUS
12
R2019
4.7KOhm
@
D2001 1.2V/0.1A
12
@
C2002
2PF/50V
R2020
100KOHM
12
mount R2024/R2025 for CNVi
12
R2003 33Ohm
1 2
R2004 33Ohm
1 2
R2005 33Ohm
1 2
R2023 33Ohm
1 2
R2006 33Ohm
R2007 100KOHM
R2024 75KOhm/CNV
R2025 71.5KOhm/CNV
+3VS
CNVI_RF_RESET_N(53)
CNVI_XTAL_CLKREQ(53)
2DMIC_CLK_PCH(45)
2DMIC_DAT_PCH(45)
4DMIC_CLK_PCH(45)
4DMIC_DAT_PCH(45)
R2009
GND
HDA_SPKR(36)
PCH_FLASH_DESCRIPTOR (30)
U300I
CNV_WGR_D0N(53)
CNV_WGR_D0P(53)
CNV_WGR_D1N(53)
CNV_WGR_D1P(53)
CNV_WT_D0N(53)
CNV_WT_D0P(53)
CNV_WT_D1N(53)
PCH_UART0_DEBUG_RX(28)
PCH_UART0_DEBUG_TX(28)
CNV_WT_D1P(53)
CNV_WGR_CLK_DN(53)
CNV_WGR_CLK_DP(53)
CNV_WT_CLK_DN(53)
CNV_WT_CLK_DP(53)
1 2
AUTO_AC_TEST#(64)
RTC_IN#(21)
B B
R2014 150Ohm
GND
A A
CR3 0
CNV_W R_D0 N
CP3 0
CNV_W R_D0 P
CM30
CNV_W R_D1 N
CN30
CNV_W R_D1 P
CN32
CNV_W T_D0 N
CM32
CNV_W T_D0 P
CP3 3
CNV_W T_D1 N
CN33
CNV_W T_D1 P
CN31
CNV_W R_CL KN
CP3 1
CNV_W R_CL KP
CP3 4
CNV_W T_CL KN
CN34
CNV_W T_CL KP
CP3 2
CNV_W T_RC OMP_1
CR3 2
CNV_W T_RC OMP_2
CP2 0
GPP _F0/CNV_ PA_BLA NKING
CK1 9
GPP _F1
CG1 7
GPP _F2
CR1 4
GPP _C8/UART 0_RXD
CP1 4
GPP _C9/UART 0_TXD
CN14
GPP _C10/UAR T0_RTS #
CM14
GPP _C11/UAR T0_CTS #
CJ1 7
GPP _F8/CNV_ MFUART2_ RXD
CH17
GPP _F9/CNV_ MFUART2_ TXD
CF1 7
GPP _F23/A4 WP_PR ESENT
FH8068403419514
GPP _H18/CPU_ C10_GA TE#
GPP _H19/TIME SYNC[0]
GPP _D4/IMGC LKOUT0/B K4/SBK 4
GPP _H20/IMGC LKOUT1
GPP _F12/EMMC _DATA0
GPP _F13/EMMC _DATA1
GPP _F14/EMMC _DATA2
GPP _F15/EMMC _DATA3
GPP _F16/EMMC _DATA4
GPP _F17/EMMC _DATA5
GPP _F18/EMMC _DATA6
GPP _F19/EMMC _DATA7
GPP _F20/EMMC _RCLK
GPP _F21/EMMC _CLK
GPP _F11/EMMC _CMD
GPP _F22/EMMC _RESET #
EMMC_R COMP
9 of 20
GPP _H21
GPP _H22
GPP _H23
GPP _F10
GPD 7
GPP _F3
CN27
CM27
CF2 5
CN26
CM26
CK1 7
BV3 5
CN20
CG2 5
CH25
CR2 0
CM20
CN19
CM19
CN18
CR1 8
CP1 8
CM18
CM16
CP1 6
CR1 6
CN16
CK1 5
GPP_H19
GPP_H21
IPD
GPP_H23
IPD
R2011 100KOHM
12
R2015
200Ohm
1%
R2012 20KOhm@
GPP_D4
GND
1
1
1 2
1 2
CPU_C10_GATE# (91)
T2000
T2001
+3VSUS
GND
GPP_D4
GPP_H21
+3VSUS
12
R2022
10KOhm
+3VSUS
12
12
GND
R2016
4.7KOhm
GPP_H21 XTAL FREQ
High - 24MHZ
@
Low - 38.4MHZ (*)
R2017
20KOhm
GPU_OVERT# (74)
PCH_AUDIO,SDIO,CSI2
PCH_AUDIO,SDIO,CSI2
PCH_AUDIO,SDIO,CSI2
Title :
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
<OrgName>
<OrgName>
<OrgName>
Size Project Name
Size Project Name
Size Project Name
A2
A2
A2
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
MILLER
MILLER
MILLER
1
Title :
Engineer:
Engineer:
Engineer:
Howard Chen
Howard Chen
Howard Chen
20 94Monday, June 11, 2018
20 94Monday, June 11, 2018
20 94Monday, June 11, 2018
Rev
Rev
Rev
1.4
1.4
1.4
5
4
+3VSUS
3
USB Debug
R2102
vPro: I
non-vPro: NI
R2108
enable: I
disable: NI
2
1
D D
12
R2167
100KOHM
SPI_CLK_SOC
SPI_MISO_SOC
SPI_MOSI_SOC
#575412 chap 6.2
SPI_CLK_SOC
12
R2168
100KOHM
GND
1 2
TPM_CLK(62)
SPI_CLK(28)
TPM_MISO(62)
SPI_SO(28)
TPM_MOSI(62)
SPI_SI(28)
R2110 33Ohm/T PM
1 2
R2112 0/TPM
1 2
R2114 33Ohm/T PM
+3VS
SPI_WP#_IO2(28)
SPI_HOLD#_IO3(28)
SPI_CS#0(28)
SPI_CS#1(28)
TPM_CS#(62)
12
R2128
8.2K
RCIN#(30)
INT_SERIRQ(30,44)
C C
Serial Interrupt Request
CL_DATA(53)
CL_CLK(53)
CL_RST#(53)
R2166
100KOHM
+3VSUS
12
12
R2165
100KOHM
U300E
CH37
IPD
SPI 0_CLK
CF3 7
IPU
SPI 0_MISO
CF3 6
IPU
SPI 0_MOSI
CF3 4
IPU
SPI 0_IO2
CG3 4
IPU
SPI 0_IO3
CG3 6
IPD
SPI 0_CS0#
CG3 5
IPD
SPI 0_CS1#
CH34
IPD
SPI 0_CS2#
CF2 0
GPP _D1/SPI 1_CLK/B K1/SBK 1
CG2 2
GPP _D2/SPI 1_MISO_ IO1/BK 2/SBK2
CF2 2
GPP _D3/SPI 1_MOSI_ IO0/BK 3/SBK3
CG2 3
GPP _D21/SP I1_IO2
CH23
GPP _D22/SP I1_IO3
CG2 0
GPP _D0/SPI 1_CS0# /BK0/SB K0
CH7
IPD
CL_ CLK
CH8
IPD
CL_ DATA
CH9
CL_ RST#
BV2 9
GPP _A0/RCI N#/TIME_S YNC1
BV2 8
GPP _A6/SER IRQ
FH8068403419514
GPP _C1/SMBD ATA
GPP _C2/SMBA LERT#
GPP _C3/SML0 CLK
GPP _C4/SML0 DATA
GPP _C5/SML0 ALERT#
GPP _C6/SML1 CLK
GPP _B23/SML 1ALERT #/PCHHOT #
GPP _A14/SUS _STAT# /ESPI_ RESET#
GPP _A9/CLK OUT_LPC 0/ESPI _CLK
5 of 20
GPP _C7/SML1 DATA
GPP _A1/LAD 0/ESPI_ IO0
GPP _A2/LAD 1/ESPI_ IO1
GPP _A3/LAD 2/ESPI_ IO2
GPP _A4/LAD 3/ESPI_ IO3
GPP _A5/LFR AME#/ESP I_CS#
GPP _A10/CL KOUT_LP C1
GPP _A8/CLK RUN#
GPP _C0/SMBC LK
CK1 4
CH15
CJ1 5
CH14
CF1 5
CG1 5
CN15
CM15
CC3 4
CA2 9
BY29
BY27
BV2 7
CA2 8
CA2 7
BV3 2
BV3 0
BY30
12
12
@
@
R2100
R2101
1K
1K
1%
1%
GPP_C2
IPD
SML0_CLK
SML0_DATA
GPP_C5
IPD
GPP_B23
IPD
IPU
IPU
IPU
IPU
PM_SUS_STAT#
CLK_KBCPCI_PCH_R
CLK_LPC1
12
R2169
8.2K
12
12
@
R2102
4.7KOhm
PM_CLKRUN# (30)
+3VS
12
@
@
R2103
R2104
1K
1K
1%
1%
R2120 22Ohm
R2124 22Ohm/Debug
12
@
R2105
4.7KOhm
1 2
1 2
12
@
R2108
4.7KOhm
LPC_AD0 (30,44)
LPC_AD1 (30,44)
LPC_AD2 (30,44)
LPC_AD3 (30,44)
12
@
C2103
27PF/50V
GNDGND
12
@
C2104
27PF/50V
SMB_CLK (30)
SMB_DAT (30)
PCH_SML1_CLK (28)
PCH_SML1_DATA (28)
LPC_FRAME# (30,44)
CLK_KBCPCI_PCH (30)
CLK_DEBUG (44)
MUX
EC GPU
12
C2113
0.1UF/16V
@
GND
PM_SUS_STAT#
12
GND GND GND
C2112
@
R2121
20K
12
@
R2122
20K
@
12
0.033UF/16V
#575412 chap 6.2
GND
GPP_C2 TLS
High - TLS enabled
Low - disabled (*)
GPP_C5 EC
High - eSPI
Low - LPC (*)
@
R2123
20K
GPP_B23 USB debug
1 2
High - enabled
Low - disabled (*)
PCIE_CLK_0
Connected to device.
Default : Clock free run. (PD 10K).
Reserver 10K PU for power saving purpose.
+3VS
PCH CLKREQ Setting:
Not connected to device.
PCIECLKRQ[5:0]# are core well powered.
+3VSUS
PCIE_CLK_1
PCIE_CLK_2
PCIE_CLK_3
GPU
SSD
PCIE_CLK_4
12
12
12
R2133
R2132
10K
10K
GPU
SSD1
B B
WLAN
CLK_PCIE_PEG#(70)
CLK_PCIE_PEG(70)
CLK_REQ1#_PEG(70)
CLK_PCIE_SSD#(51)
CLK_PCIE_SSD(51)
CLK_REQ2#_SSD(51)
CLK_PCIE_WLAN#(53)
CLK_PCIE_WLAN(53)
CLK_REQ5#_WLAN(53)
12
12
@
R2148
10K
@
SRTC_RST#
R2147
10K
GND GND GND
12
@
R2134
R2130
10K
10K
U300J
AW 2
CLK OUT_PCI E_N0
AY3
CF3 2
BC1
BC2
CE3 2
BD3
BC3
CF3 0
BH3
BH4
CE3 1
BA1
BA2
CE3 0
BE1
BE2
CF3 1
JRST2102
SGL_JUMP
@
CLK OUT_PCI E_P0
GPP _B5/SRC CLKREQ 0#
CLK OUT_PCI E_N1
CLK OUT_PCI E_P1
GPP _B6/SRC CLKREQ 1#
CLK OUT_PCI E_N2
CLK OUT_PCI E_P2
GPP _B7/SRC CLKREQ 2#
CLK OUT_PCI E_N3
CLK OUT_PCI E_P3
GPP _B8/SRC CLKREQ 3#
CLK OUT_PCI E_N4
CLK OUT_PCI E_P[4]
GPP _B9/SRC CLKREQ 4#
CLK OUT_PCI E_N5
CLK OUT_PCI E_P5
GPP _B10/SR CCLKRE Q5#
FH8068403419514
1
2
GPP_B5
1
T2101
GPP_B8
1
T2102
GPP_B9
1
T2103
12
@
R2149
10K
1
2
PCIE_CLK_5
10 of 20
R2162 20KOhm
12
C2109
1uF/6.3V
LAN
CLK OUT_ITP XDP_N
CLK OUT_ITP XDP_P
GPD 8/SUSCLK
XTA L_IN
XTA L_OUT
XCL K_BIAS REF
CLK IN_XTAL
RTC X1
RTC X2
SRT CRST#
RTC RST#
1 2
AU1
AU2
BT3 2
CK3
CK2
CJ1
CM3
BN31
BN32
BR3 7
BR3 4
+VCC_RTC
SUSCLK
XTAL_24M_IN_R
XTAL_24M_OUT_R
DIFFCLK_BIASREF
XTAL_32K_X1
XTAL_32K_X2
SRTC_RST#
RTC_RST#
XTAL_32K_X1
XTAL_32K_X2
R2138 0
R2139 0
R2142 60.4Ohm 1%
R2143 10KOhm
/CNV
1 2
R2151 0
1 2
R2152 0
1 2
1 2
1 2
12
GND
XTAL_24M_IN
XTAL_24M_OUT
CLKIN_XTAL (53)
mount R2143 for CNVi
XTAL_32K_X1_R
XTAL_32K_X2_R
12
C2107
18PF/50V
R2153 10MOhm
R2154
0Ohm
32k_R
12
GND
1 2
1%
1 4
32-KHz is required
R2140 200KOhm 1%
X2100 24MHZ
1 3
C2105
10PF/50V
2
2
GND
3
12
GND
X2101
32.768KHZ
1 2
4
12
C2108
18PF/50V
GNDGNDGND
U22_24M
R2144
0Ohm
12
12
GND
+VCC_RTC
C2106
10PF/50V
12
GND
C2111
1UF/10V
12
1 2
1 2
R2136 0
@
R2141
1K
R2155
1KOhm
@
D2101
12
RB751V-40
0.37V/30mA
D2102
12
RB751V-40
0.37V/30mA
12
R2156
0Ohm
+RTC_AC
+RTC_BAT
WLAN_SUSCLK (53)
+3VA
@
R2157
1.5KOhm
1%
@
R2158
45.3KOhm
1%
1 2
R2159 1KOhm
+RTCBAT
12
R2160
10MOhm
@
CON2101
4
2
1
3
WtoB_CON_2P
12T17GISM030
Q2101A
2
G
UM6K1NG1DTN
SID E2
2
1
SID E1
+1.8VSUS
12
R2161
100KOhm
1%
@
61
D
S
RTC_IN# (20)
A A
SW_RTCRST(30)
5
R2164
10KOhm
RTC_RST#
12
34
Q2101B
5
G
UM6K1NG1DTN
1 2
R2163 20KOhm
JRST2101
SGL_JUMP
1
@
2
4
D
S
12
1
2
C2110
1uF/6.3V
PCH_SPI,SMB,LPC,CLK,RTC
PCH_SPI,SMB,LPC,CLK,RTC
PCH_SPI,SMB,LPC,CLK,RTC
Title :
Title :
1
Title :
Engineer:
Engineer:
Engineer:
Howard Chen
Howard Chen
Howard Chen
21 94Monday, June 11, 2018
21 94Monday, June 11, 2018
21 94Monday, June 11, 2018
Rev
Rev
Rev
1.4
1.4
1.4
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
<OrgName>
<OrgName>
<OrgName>
Size Project Name
Size Project Name
Size Project Name
A2
A2
A2
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
MILLER
MILLER
MILLER
5
D D
PCIENB_RXN5_VGA(70)
PCIENB_RXP5_VGA(70)
PCIEG_TXN5_VGA(70)
PCIEG_TXP5_VGA(70)
PCIENB_RXN6_VGA(70)
PCIENB_RXP6_VGA(70)
PCIEG_TXN6_VGA(70)
GPU
M.2 SSD1
C C
WLAN
B B
PCIEG_TXP6_VGA(70)
PCIENB_RXN7_VGA(70)
PCIENB_RXP7_VGA(70)
PCIEG_TXN7_VGA(70)
PCIEG_TXP7_VGA(70)
PCIENB_RXN8_VGA(70)
PCIENB_RXP8_VGA(70)
PCIEG_TXN8_VGA(70)
PCIEG_TXP8_VGA(70)
PCIE_RXN9_SSD_PCIE(51)
PCIE_RXP9_SSD_PCIE(51)
PCIE_TXN9_SSD_PCIE(51)
PCIE_TXP9_SSD_PCIE(51)
PCIE_RXN10_SSD_PCIE(51)
PCIE_RXP10_SSD_PCIE(51)
PCIE_TXN10_SSD_PCIE(51)
PCIE_TXP10_SSD_PCIE(51)
PCIE_RXN11_SSD_PCIE(51)
PCIE_RXP11_SSD_PCIE(51)
PCIE_TXN11_SSD_PCIE(51)
PCIE_TXP11_SSD_PCIE(51)
PCIE_RXN12_SSD_SATA(51)
PCIE_RXP12_SSD_SATA(51)
PCIE_TXN12_SSD_SATA(51)
PCIE_TXP12_SSD_SATA(51)
PCIE_RXN14_WLAN(53)
PCIE_RXP14_WLAN(53)
PCIE_TXN14_WLAN(53)
PCIE_TXP14_WLAN(53)
C2200 0.22UF/10V/VGA
C2201 0.22UF/10V/VGA
C2202 0.22UF/10V/VGA
C2203 0.22UF/10V/VGA
C2204 0.22UF/10V/VGA
C2205 0.22UF/10V/VGA
C2206 0.22UF/10V/VGA
C2207 0.22UF/10V/VGA
C2208 0.1UF/16V/PCIE
C2209 0.1UF/16V/PCIE
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
4
PCIEG_TXN5_VGA_C
PCIEG_TXP5_VGA_C
PCIEG_TXN6_VGA_C
PCIEG_TXP6_VGA_C
PCIEG_TXN7_VGA_C
PCIEG_TXP7_VGA_C
PCIEG_TXN8_VGA_C
PCIEG_TXP8_VGA_C
PCIE_TXN14_WLAN_C
PCIE_TXP14_WLAN_C
PCIE_RCOMPN
R22051001%
PCIE_RCOMPP
U300H
BW 9
PCI E5_RXN/US B31_5_ RXN
BW 8
PCI E5_RXP /USB31_5 _RXP
BW 4
PCI E5_TXN/US B31_5_ TXN
BW 3
PCI E5_TXP /USB31_5 _TXP
BU6
PCI E6_RXN/US B31_6_ RXN
BU5
PCI E6_RXP /USB31_6 _RXP
BU4
PCI E6_TXN/US B31_6_ TXN
BU3
PCI E6_TXP /USB31_6 _TXP
BT7
PCI E7_RXN
BT6
PCI E7_RXP
BU2
PCI E7_TXN
BU1
PCI E7_TXP
BU9
PCI E8_RXN
BU8
PCI E8_RXP
BT4
PCI E8_TXN
BT3
PCI E8_TXP
BP5
PCI E9_RXN
BP6
PCI E9_RXP
BR2
PCI E9_TXN
BR1
PCI E9_TXP
BN6
PCI E10_RX N
BN5
PCI E10_RX P
BR4
PCI E10_TX N
BR3
PCI E10_TX P
BN10
PCI E11_RX N/SATA0_ RXN
BN8
PCI E11_RX P/SATA0 _RXP
BN4
PCI E11_TX N/SATA0_ TXN
BN3
PCI E11_TX P/SATA 0_TXP
BL6
PCI E12_RX N/SATA1A _RXN
BL5
PCI E12_RX P/SATA1 A_RXP
BN2
PCI E12_TX N/SATA1A _TXN
BN1
PCI E12_TX P/SATA 1A_TXP
BK6
PCI E13_RX N
BK5
PCI E13_RX P
BM4
PCI E13_TX N
BM3
PCI E13_TX P
BJ6
PCI E14_RX N
BJ5
PCI E14_RX P
BL2
PCI E14_TX N
BL1
PCI E14_TX P
BG5
PCI E15_RX N/SATA1B _RXN
BG6
PCI E15_RX P/SATA1 B_RXP
BL4
PCI E15_TX N/SATA1B _TXN
BL3
PCI E15_TX P/SATA 1B_TXP
BE5
PCI E16_RX N/SATA2_ RXN
BE6
PCI E16_RX P/SATA2 _RXP
BJ4
PCI E16_TX N/SATA2_ TXN
BJ3
PCI E16_TX P/SATA 2_TXP
CE6
PCI E_RCOMP _N
CE5
PCI E_RCOMP _P
CR2 8
GPP _H12/M2_S KT2_CF G0
CP2 8
GPP _H13/M2_S KT2_CF G1
CN28
GPP _H14/M2_S KT2_CF G2
CM28
GPP _H15/M2_S KT2_CF G3
FH8068403419514
PCI E1_RXN/US B31_1_ RXN
PCI E1_RXP /USB31_1 _RXP
PCI E1_TXN/US B31_1_ TXN
PCI E1_TXP /USB31_1 _TXP
PCI E2_RXN/US B31_2_ RXN/SSI C_1_RX N
PCI E2_RXP /USB31_2 _RXP/S SIC_1_ RXP
PCI E2_TXN/US B31_2_ TXN/SSI C_1_TX N
PCI E2_TXP /USB31_2 _TXP/S SIC_1_ TXP
PCI E3_RXN/US B31_3_ RXN
PCI E3_RXP /USB31_3 _RXP
PCI E3_TXN/US B31_3_ TXN
PCI E3_TXP /USB31_3 _TXP
PCI E4_RXN/US B31_4_ RXN
PCI E4_RXP /USB31_4 _RXP
PCI E4_TXN/US B31_4_ TXN
PCI E4_TXP /USB31_4 _TXP
USB2N_ 1
USB2P _1
USB2N_ 2
USB2P _2
USB2N_ 3
USB2P _3
USB2N_ 4
USB2P _4
USB2N_ 5
USB2P _5
USB2N_ 6
USB2P _6
USB2N_ 7
USB2P _7
USB2N_ 8
USB2P _8
USB2N_ 9
USB2P _9
USB2N_ 10
USB2P _10
USB2_ COMP
USB_I D
USB_V BUSSENS E
GPP _E9/USB2 _OC0#/G P_BSS B_CLK
GPP _E10/USB 2_OC1# /GP_BS SB_DI
8 of 20
GPP _E11/USB 2_OC2#
GPP _E12/USB 2_OC3#
GPP _E4/DEV SLP0
GPP _E5/DEV SLP1
GPP _E6/DEV SLP2
GPP _E0/SAT AXPCIE 0/SATA GP0
GPP _E1/SAT AXPCIE 1/SATA GP1
GPP _E2/SAT AXPCIE 2/SATA GP2
GPP _E8/SAT ALED#/S PI1_C S1#
RSV D_37
CB5
CB6
CA4
CA3
BY8
BY9
CA2
CA1
BY7
BY6
BY4
BY3
BW 6
BW 5
BW 2
BW 1
CE3
CE4
CE1
CE2
CG3
CG4
CD3
CD4
CG5
CG6
CC1
CC2
CG8
CG9
CB8
CB9
CH5
CH6
CC3
CC4
CC5
CE8
CC6
CK6
CK5
CK8
CK9
CP8
CR8
CM8
CN8
CM10
CP1 0
CN7
AR3
3
USBCOMP
USB_OTG_ID
USB_VBUSSENSE
USB_OC1#_R
IPU
IPU
IPU
DMIC_ID
USB3_RXN1_MB (52)
USB3_RXP1_MB (52)
USB3_TXN1_MB (52)
USB3_TXP1_MB (52)
USB3_RXN2_TYPEC (54)
USB3_RXP2_TYPEC (54)
USB3_TXN2_TYPEC (54)
USB3_TXP2_TYPEC (54)
USB3_RXN4_IO (64)
USB3_RXP4_IO (64)
USB3_TXN4_IO (64)
USB3_TXP4_IO (64)
USB_PN1_MB (52)
USB_PP1_MB (52)
USB_PN2_TYPEC (42)
USB_PP2_TYPEC (42)
USB_PN3_TYPEC (42)
USB_PP3_TYPEC (42)
USB_PN4_IO (64)
USB_PN5
USB_PP5
USB_PP4_IO (64)
USB_PN6_CR (64)
USB_PP6_CR (64)
USB_PN7_CCD (45)
USB_PP7_CCD (45)
USB_PN8_TS (45)
USB_PP8_TS (45)
USB_PN10_BT (53)
USB_PP10_BT (53)
1 2
R2201 113 1%
1 2
R2216 1K
1 2
R2217 1K
DMIC ID
+3VSUS
12
/4MIC
R2214
10KOhm
DMIC_ID
12
/2MIC
R2215
10KOhm
USB3.0 S/C
USB3.1 Type C
USB3.0 (IO BD)
USB3.0 S/C
USB3.1 Type C
USB3.1 Type C
USB3.0 (IO BD)
FingerPrint / USB Hub
Card Reader
Camera
Touch
BT
GND
2
USB_OC0#_MB (52)
USB_OC2#_TYPEC (42)
USB_OC3#_IO (64)
SATA_DEVSLP1 (51)
SATA_SSD1_PEDET (51)
USB_PN5
USB_PP5
USB_OC3#_IO
USB_OC0#_MB
USB_OC1#_R
USB_OC2#_TYPEC
12
USB3 MB S/C
TYPE C
USB3 I/O
Colay
/Premium_FP
1 2
RN2202A 0Ohm
3 4
RN2202B 0Ohm
/Premium_FP
/HUB
3 4
RN2203B 0Ohm
1 2
RN2203A 0Ohm
/HUB
3 4
5 6
7 8
1 2
C2210
1000PF/50V
USB_PN5_FP (69)
USB_PP5_FP (69)
USB_PN5_HUB (63)
USB_PP5_HUB (63)
10KOhm
10KOhm
10KOhm
10KOhm
+3VSUS
RN2201B
RN2201C
RN2201D
RN2201A
1
DMIC ID
A A
4 DMIC
2 DMIC
5
4
3
1
0
PCH_PCIE,USB,SATA
PCH_PCIE,USB,SATA
PCH_PCIE,USB,SATA
Title :
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
<OrgName>
<OrgName>
<OrgName>
Size Project Name
Size Project Name
Size Project Name
A2
A2
A2
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
1
Title :
Engineer:
Engineer:
Engineer:
MILLER
MILLER
MILLER
Howard Chen
Howard Chen
Howard Chen
22 94Monday, June 11, 2018
22 94Monday, June 11, 2018
22 94Monday, June 11, 2018
Rev
Rev
Rev
1.4
1.4
1.4
5
+3VS
GPP_B18 No Reboot
High - enabled
Low - disabled (*)
GPP_B22 Boot ROM
High - LPC
Low - SPI (*)
GPP_F6 Intergrated CNVi
High - disabled
D D
Low - enabled
R2334
CNV_BRI_RSP(53)
CNV_RGI_DT_R(53)
CNV_BRI_DT_R(53)
CNV_RGI_RSP(53)
6/30
CNVi Intel recommand unmount R2306
7/3
Intel's feedback:
JfP has internal PD,
so don’t need to put an external resistor.
mount R2302/R2304 for CNVi
10K
+1.8VSUS
1 2
1 2
/CNV
R2302
20K
GND
1 2
/CNV
R2304
20K
R2333
@
20K
GND
12
12
R2332
20K
1 2
GND
@
R2306
10K
1 2
4
@
R2300
10K
PIRQ#(62)
WLAN_ON_PCH(53)
1 2
R2335 75OHM
R2336 75OHM
1 2
/TPM
1 2
R2349
0
12
R230520K @
I2C_SDA_MUX_S(30)
I2C_SCL_MUX_S(30)
PCH_I2C1_SDA(31 )
PCH_I2C1_SCL(31)
INT_PIRQA#
GPP_B18
PME#
GPP_B22
+3VS
HDCP_ID
MB_ID
CPU_ID
GPP_C23
WLAN_ID
RSV_ID1
RSV_ID2
RSV_ID3
R2301
#575412 chap 6.2
10K
U300F
CC27
1 2
GPP_B15/GSPI0_CS0#
CC32
GPP_A7/PIRQA#/GSPI0_CS1#
CE28
GPP_B16/GSPI0_CLK
CE27
IPD
GPP_B17/GSPI0_MISO
CE29
IPD
GPP_B18/GSPI0_MOSI
CA31
GPP_B19/GSPI1_CS0#
CA32
IPU
GPP_A11/PME#/GSPI1_CS1#/SD_VDD2_PWR_EN#
CC29
GPP_B20/GSPI1_CLK
CC30
IPD
GPP_B21/GSPI1_MISO
CA30
IPD
GPP_B22/GSPI1_MOSI
CK20
IPU
GPP_F5/CNV_BRI_RSP
CG19
GPP_F6/CNV_RGI_DT
CJ20
GPP_F4/CNV_BRI_DT
CH19
IPU
GPP_F7/CNV_RGI_RSP
CR12
GPP_C20/UART2_RXD
CP12
GPP_C21/UART2_TXD
CN12
GPP_C22/UART2_RTS#
CM12
GPP_C23/UART2_CTS#
CM11
GPP_C16/I2C0_SDA
CN11
GPP_C17/I2C0_SCL
CK12
GPP_C18/I2C1_SDA
CJ12
GPP_C19/I2C1_SCL
CF27
GPP_H4/I2C2_SDA
CF29
GPP_H5/I2C2_SCL
CH27
GPP_H6/I2C3_SDA
CH28
GPP_H7/I2C3_SCL
CJ30
GPP_H8/I2C4_SDA
CJ31
GPP_H9/I2C4_SCL
FH8068403419514
3
GPP_D9/ISH_SPI_CS#/GSPI2_CS0#
GPP_D10/ISH_SPI_CLK/GSPI2_CLK
GPP_D11/ISH_SPI_MISO/GSPI2_MISO
GPP_D12/ISH_SPI_MOSI/GSPI2_MOSI
GPP_D5/ISH_I2C0_SDA
GPP_D6/ISH_I2C0_SCL
GPP_D7/ISH_I2C1_SDA
GPP_D8/ISH_I2C1_SCL
GPP_H10/I2C5_SDA/ISH_I2C2_SDA
GPP_H11/I2C5_SCL/ISH_I2C2_SCL
GPP_D13/ISH_UART0_RXD
GPP_D14/ISH_UART0_TXD
GPP_D15/ISH_UART0_RTS#/GSPI2_CS1#
GPP_D16/ISH_UART0_CTS#/SML0BALERT#
GPP_C12/UART1_RXD/ISH_UART1_RXD
GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
GPP_C15/UART1_CTS#/ISH_UART1_CTS#
GPP_A12/ISH_GP6/BM_BUSY#/SX_EXIT_HOLDOFF#
6 of 20
GPP_A18/ISH_GP0
GPP_A19/ISH_GP1
GPP_A20/ISH_GP2
GPP_A21/ISH_GP3
GPP_A22/ISH_GP4
GPP_A23/ISH_GP5
2
CN22
CR22
CM22
CP22
CK22
CH20
CH22
CJ22
CJ27
CJ29
CM24
CN23
CM23
CR24
CG12
CH12
CF12
CG14
BW35
BW34
CA37
CA36
CA35
CA34
BW37
IPD
IPD
GPP_D9
GPP_D12
GPU_ID
PCB_ID0
PCB_ID1
PCB_ID2
MEM_ID0
MEM_ID1
MEM_ID2
MEM_ID3
MEM_CHA
MEM_CHB
PME#
GPU_EVENT#_PCH
THRO_GPU#
GC6_FB_GPU
DGPU_PWROK
DGPU_HOLD_RST#
DGPU_PWROK
DGPU_HOLD_RST#
TP_SENSOR_OFF# (31)
GPU_EVENT#_PCH (74 )
DGPU_PWROK (70,85,87)
THRO_GPU# (74)
I2C0_MUX_SEL (30)
DGPU_HOLD_RST# (70)
TP_IRQ# (30,31)
GC6_FB_GPU (74)
OP_SD# (36)
I2C_SDA_MUX_S
I2C_SCL_MUX_S
PCH_I2C1_SDA
PCH_I2C1_SCL
1
1 2
R2352 10K@
1 2
R2330 10K
1 2
R2324 10K
R2325 10K
1 2
1 2
R2326 10K@
1 2
R2327 10K@
1 2
R2328 10K@
R2329 10K
1 2
GPP_D12
GPP_D12 JTAG ODT
High - enabled
Low - disabled
R2307 2.2KOhm
R2308 2.2KOhm
R2321 2.2KOhm@
R2322 2.2KOhm@
12
12
12
12
+3VSUS
GND
+3VSUS
1 2
1 2
GND
+3VS
R2303
20K
R2331
10K
@
GPP_D9
C C
PCB ID
+3VSUS
12
12
12
@
N/A
R2311
R2313
10KOhm
10KOhm
PCB_ID0 MEM_ID0
PCB_ID1
PCB_ID2
12
@
N/A
R2314
R2312
10KOhm
10KOhm
PCB_ID1
(GPP_C14)
PCB_ID0
(GPP_C13)
0 0
1
1
1
0
1
01 1
11 0
12
@
R2309
10KOhm
12
N/A
R2310
10KOhm
B B
PCB_ID2
(GPP_C15)
R10
R11 0
R12
R13
R14
0
0
0
0
1 0 0
R15
R20
+3VSUS
DIS
12
/VGA
R2315
100KOhm
UMA
12
/UMA
R2316
100KOhm
CNL U22 0
WHL U42 1
UMA
DIS 1
U42
12
/U42
R2317
10KOhm
MB_ID MEM_CHBHDCP_ID
CPU_ID
U22
12
/U22
R2318
10KOhm
CPU_ID
MB_ID
0
HDCP IDCPU BD ID
GPU ID
12
12
/HDCP2.2
/N17S-G1
R2319
R2350
10KOhm
10KOhm
12
12
/N17S-LG
/HDCP1.4
R2351
R2320
10KOhm
10KOhm
N17S-LG
N17S-G1
GPU_ID
HDCP_ID
0HDCP 1.4
1HDCP 2.2
GPU_ID
0
1
MEM TEST ID
+3VSUS+3VSUS
12
12
/CHA-ON
/CHB-ON
R2337
R2339
10KOhm
10KOhm
MEM_CHA
12
12
/CHA-DIS
/CHB-DIS
R2338
R2340
10KOhm
10KOhm
CHA
CHB
Disable
Enable
Disable
Enable 1
0
1
0
MEM ID
+3VSUS +3VSUS
12
12
/RAMID
/RAMID
R2343
R2341
10KOhm
10KOhm
12
12
/RAMID
/RAMID
R2342
R2344
10KOhm
10KOhm
MICRON
MT40A512M16LY-075:E
SDP
HYNIX
H5AN8G6NCJR-VKC 0
SDP
0315-02GJ0PB
HYNIX
H5AN8G6NAFR-UHC
SDP 0315-01W60PB
HYNIX
H5ANAG6NAMR-UHC
DDP 0315-02640PB
MICRON
MT40A1G16WBU-083E:B
DDP 0315-01YC0PB
MICRON
MT40A1G16KNR-075:E
DDP 0315-02FY0PB
12
12
/RAMID
R2345
10KOhm
/RAMID
R2346
10KOhm
12
12
MEM_ID3
(GPP_A21)
0
0
0
0
0
0
0
@
R2347
10KOhm
MEM_ID1
MEM_ID2
MEM_ID3
N/A
R2348
10KOhm
GPP_C23
WLAN ID
MEM_ID2
(GPP_A20)
MEM_ID1
(GPP_A19)
0 0
0
0
1 00
1 1 0
1 2
R2361 0@
1 2
R2323 0Ohm
12
12
/PCIE
@
R2353
R2355
10KOhm
10KOhm
12
12
/CNV
@
R2354
R2356
10KOhm
10KOhm
MEM_ID0
(GPP_A18)
0
0
1
1
1
0
1
01 1
12
12
@
R2357
10KOhm
@
R2358
10KOhm
12
12
VGA_AON_PWR_EN (57,74)
@
R2359
10KOhm
WLAN_ID
RSV_ID1
RSV_ID2
RSV_ID3
@
R2360
10KOhm
WLAN_ID
0CNVI0315-02DW0PB
1PCIE
A A
PCH_GPIO
PCH_GPIO
PCH_GPIO
Title :
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
<OrgName>
<OrgName>
<OrgName>
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Engi neer:
Engi neer:
Engi neer:
MILL ER
MILL ER
MILL ER
Title :
1
Howard Chen
Howard Chen
Howard Chen
23 94Monday, June 11, 2018
23 94Monday, June 11, 2018
23 94Monday, June 11, 2018
Rev
Rev
Rev
1.4
1.4
1.4
5
D D
4
3
2
1
C C
B B
A A
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1/HW1
BG1/HW1
BG1/HW1
Size Project Name
Size Project Name
Size Project Name
A
A
A
Date: Sheet of
Date: Sheet of
Date: Sheet of
5
4
3
MILLER
MILLER
MILLER
2
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
RSVD
RSVD
RSVD
Howard Chen
Howard Chen
Howard Chen
24 94Monday, June 11, 2018
24 94Monday, June 11, 2018
24 94Monday, June 11, 2018
1
Rev
Rev
Rev
1.4
1.4
1.4
5
D D
4
3
2
1
C C
B B
A A
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1/HW1
BG1/HW1
BG1/HW1
Size Project Name
Size Project Name
Size Project Name
A
A
A
Date: Sheet of
Date: Sheet of
Date: Sheet of
5
4
3
MILLER
MILLER
MILLER
2
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
RSVD
RSVD
RSVD
Howard Chen
Howard Chen
Howard Chen
25 94Monday, June 11, 2018
25 94Monday, June 11, 2018
25 94Monday, June 11, 2018
1
Rev
Rev
Rev
1.4
1.4
1.4
5
D D
4
3
2
1
C C
B B
A A
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1/HW1
BG1/HW1
BG1/HW1
Size Project Name
Size Project Name
Size Project Name
A
A
A
Date: Sheet of
Date: Sheet of
Date: Sheet of
5
4
3
MILLER
MILLER
MILLER
2
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
RSVD
RSVD
RSVD
Howard Chen
Howard Chen
Howard Chen
26 94Monday, June 11, 2018
26 94Monday, June 11, 2018
26 94Monday, June 11, 2018
1
Rev
Rev
Rev
1.4
1.4
1.4
5
D D
4
3
2
1
C C
B B
A A
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
<OrgName>
<OrgName>
<OrgName>
Size Project Name
Size Project Name
Size Project Name
A
A
A
Date: Sheet of
Date: Sheet of
Date: Sheet of
5
4
3
2
MILLER
MILLER
MILLER
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
RSVD
RSVD
RSVD
Howard Chen
Howard Chen
Howard Chen
27 94Monday, June 11, 2018
27 94Monday, June 11, 2018
27 94Monday, June 11, 2018
1
Rev
Rev
Rev
1.4
1.4
1.4
5
4
3
2
1
+3VM_SPI
SPI_W P#_IO2
SPI_SO
+3VM_SPI
1 2
R2806 33 Ohm
R2807 33 Ohm
1 2
R2812 33 Ohm
1 2
1 2
R2813 33 Ohm
R2834 0O hm
1 2
1 2
R2825 33 Ohm/ 8M_ROM
R2828 33 Ohm/ 8M_ROM
1 2
SPI1_CS #0
SPI1_S O
SPI1_W P#
R2832
1KOhm @
SPI1_CS #0_R
SPI1_S O_R
SPI11_ WP#_R
R2804
1KOhm @
+3VM_SPI
12
12
@
R2805
3.3KOhm
U2800
1
CS#
2
DO(IO1)
3
4
HOLD#/RESET#(IO3)
WP#(IO2)
GND
W25 Q128JVSIQ 0 5T00M003N00
VCC
CLK
DI(IO0)
8
7
6
5
12
C2800
0.1UF/16 V
SPI1_HOLD #
SPI1_CL K
SPI1_S I
16MB: 0500-02XE000 WSON-8 (Default)
32MB: 0500-02WQ000 WSON-8 (PBA/vPro/PBA+vPro)
+3VM_SPI
C2802
0.1UF/16 V
/8M_ROM
12
12
@/8M_ROM
R2826
3.3KOhm
U2802
1
CS#
2
DO(IO1)
WP#(IO2)
GND
HOLD#(IO3)
3
4
W25 Q64FVSSIQ 05 T00000 0025
/8M_ROM
VCC
CLK
DI(IO0)
8
7
6
5
SPI1_HOLD #_R
SPI1_CL K_R
SPI1_S I_R
+3VM_SPI
12
12
R2802
@
1KOhm
R2803 1KOhm
12
R2829
@
1KOhm
R2835 1KOhm@
1 2
@
R2808 33 Ohm
R2810 33 Ohm
R2811 33 Ohm
R2814 33 Ohm
R2815 33 Ohm
R2816 3K Ohm
1 2
R2824 33 Ohm/8 M_ROM
R2827 33 Ohm/8 M_ROM
R2831 33 Ohm/8 M_ROM
R2823 3K Ohm
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
/8M_ROM
1 2
+3VA_EC
D D
C C
+3VSUS
R2800 0O hm@
R2801 0O hm
1 2
55mA
SPI_W P#_IO2(21 )
SPI_SO(21)
F_CS#_ EC(30)
F_SDIO_ EC(3 0)
SPI_CS# 0(21 )
PCH_UART0_DEBUG_TX(20)
PCH_UART0_DEBUG_RX(20)
+3VM_SPI
SPI_HOLD# _IO3
SPI_CLK
SPI_SI
+3VM_SPI
SPI_HOLD# _IO3 (21)
SPI_CLK (21)
SPI_SI (21)
F_SCK_ EC (30)
F_SDI_ EC (30 )
PM_RSMRST#(4,30 )
PM_RSMRST#_ SW
SPI_CS# 1(21 )
SPI_CS# 0
SPI_SO
SPI_CLK
SPI_SI
SPI_HOLD# _IO3
+3VM_SPI
/8M_ROM_TPM
R2822 1K Ohm
1 2
U2801
/8M_ROM
1
OE
Vcc
2
A
3
GND
Y
74LVC1G1 26GW
GND
06T030 003I0 0
@/8M_ROM
1 2
R2833 0O hm
FPC_CON_1 2P
1
1
2
2
SIDE1
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
SIDE2
12
12
CON2800
/Debug
+3VM_SPI
5
4
R2836 0O hm
13
14
PM_RSMRST#_ SW (62)
/8M_ROM
1 2
SPI1_CS #0_R
B B
LPC
PCH SMBus
+3VSUS
PCH EC
RN2800A
4.7KOhm
@
CS1
SPI0
CS0
FSPI
U2800
EC
16M
GPU
BIOS+EC+ME
A A
U2802
RN2800B
4.7KOhm
@
3 4
1 2
PCH_SML1_ CLK (21)
PCH
PCH_SML1_ DATA (21)
8M
Title :
Title :
(PBA)
5
4
3
2
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
PEGATRON PROPR IETARY AND CONFIDENTIAL
BG1/HW1
BG1/HW1
BG1/HW1
Size Pro ject Name
Size Pro ject Name
Size Pro ject Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
MILL ER
MILL ER
MILL ER
Engineer:
Engineer:
Engineer:
1
Title :
PCH(9)_SPI_SMB
PCH(9)_SPI_SMB
PCH(9)_SPI_SMB
Howard Chen
Howard Chen
Howard Chen
Rev
Rev
Rev
1.4
1.4
28 94Monday, June 11, 2018
28 94Monday, June 11, 2018
28 94Monday, June 11, 2018
1.4
5
D D
4
3
2
1
C C
B B
A A
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
<OrgName>
<OrgName>
<OrgName>
Size Project Name
Size Project Name
Size Project Name
A
A
A
Date: Sheet of
Date: Sheet of
Date: Sheet of
5
4
3
2
MILLER
MILLER
MILLER
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
RSVD
RSVD
RSVD
Howard Chen
Howard Chen
Howard Chen
29 94Monday, June 11, 2018
29 94Monday, June 11, 2018
29 94Monday, June 11, 2018
1
Rev
Rev
Rev
1.4
1.4
1.4
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