PEGATRON IPMIP-DP Schematics

5

4

3

2

1

POS-PIQ57BQ

PAGE

01 02 03

D D

04 05 06 07 08 09

10~15

16 17 18 19

20~28

29 30 31

C C

32 33 34 35 36 37 38 39 40 41 42 43 44 45

B B

46 47 48 49 50 51 52 53 54 55 56 57 58 59

A A

60 61 62 63 64 65 66

BLOCK DIAGRAM CHANGE HISTORY CLOCKS DISTRIBUTION SIGNAL & RESET MAP POWER FLOW POWER DISTRIBUTION POWER SEQUENCE CLOCK SLG8SP424 VID RESISTER CPU_SOCKET1160_MEMORY 1 - 6 DDR3 CHANNEL A DDR3 CHANNEL B DDR3 TERMINATION A&B PCI EXPRESS X 16 SLOT INTEL PCH 1 - 9 INTEGRATED VGA PORT DVI LEVEL SHIFTER DVI CONTROL DVI-I CONNECTOR Intel 82578DC LAN RJ45+USB CONNECTER Dual USB CONNECTER PCI EXPRESS X1 SLOT -1 PCI SLOT INTERFACE - PCI-1 PCI SLOT INTERFACE - PCI-2 RTL 888S/662 AZALIA CODEC FRONT AUDIO CONNECTOR Azalia Rear Audio Connector USB HEADER CONNECTOR - 1 USB HEADER CONNECTOR - 2 SATA & TPM CONNECTOR SPI SERIAL FLASH & SMBUS SUPER I/O - ITE 8721-1 SUPER I/O - ITE 8721-2 FAN CIRCUIT FOR 4 - PIN FRONT PANEL CIRCUIT FOR CPC RTC / CMOS / SCREW/KM RSMRST CIRCUIT / EMI CPU ITP / LPC DEBUG CONN RTL8111DL LAN LED / COM / SPKR / INTRUDER LPT ATX POWER CONNECTOR VCORE CONTROLLER VCORE DRIVER1 VCORE DRIVER2 VAGX CONTROLLER VAGX DRIVER +1P1V_VTT +1P5V_DUAL +1P05V_PCH / +1P05V_ME +5V_DUAL / +3P3V_ME +SM_VTT / +1P8V_SFR

TITLE

5

Revision: R1.01 (2010/04/20)

VRD 11.1 on Board

100MHz

PCI-E X16 SLOT

ITP

High-Speed USB

12 ports

Audio Reartek ALC888S/662

Intel 82578DC

10/100/1000

PCI-E X1 SLOT2

Print port

4

PCI_E BUS

PCIE x1

100MHz

480Mb/s

24MHz

3

Intel Processor

Clarkdale/ Lynnfield

LGA-1156 Pin Socket

FDI LINK

DMI

INTEL

Ibex Peak

PCH

951 Pin

27mm X 27mm

LPC BUS

PCIE BUS

100MHz

SIO

ITE 8721

KB/MS

PCI BUS

33MHz

COM x 2

128-bit Dual-Channel Memory x 4 Slots

Channel A

Channel B

RGB

SATA BUS

SPI

TPM

SLB9635TT

2

DDR3 800/1066/1333

VGA CONN

DVI

Display Port

2* PCI SLOT

SATA2SATA0

SATA3SATA1

SPI FLASH

8MB

CLOCK

SILEGO 424

PEGATRON DT-MB RESTRICTED SECRET

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

IPMIP-DP

SATA4

SATA5(e-SATA)

133 MHz

100 MHz

96 MHz

14.318 MHz

Title :

Engineer:

1

BLOCK DIAGRAM

Vic_Chen

1 68Friday, April 23, 2010

Rev

1.01

5

Schematics Change History

Schematics Change HistorySchematics Change History

Version

VersionVersion

1.01

D D

1.01

C C

1.01

Date

DateDate

2010/03/23 1.Change PCE20,PCE21BOM to 11X090567160. SR92 BOM to 10X212100510.

2.SIO pin 76 pull high to +5VSB_ATX form ITE vender request.(Fix EuP mode issue)2010/03/23 2010/03/23 3.Remove +3P3V_ME schematic to meet core team request. 2010/03/23 2010/03/23

4.Change VC10,VC11,VC12,VC13 BOM default NI.10X212300040

5.Change VR8 , VR9 to 10X212300040 2010/03/24 2010/03/24

7.Change P1R4 to 10X212100140 , Del P1R1 , ADD O2R28.

8.D3CB7,D3CB15 from 0.1uF to 2.2uF,to fix EA VREF_CA issue2010/03/24 2010/03/25 9 . O3Q1' O3R2'O3R10 to NI.Change O3R6'O3Q2'O3R11 to I. 2010/03/29

10.Change [VL2,4,6 change to 0 ohm]_[VL3,5,7 to 0.068UH/300mA]_[VC1,4,7 default NI]to fix EA VGA signal issue. 2010/03/29 2010/03/29

12.SR83,SR88 from 33 ohm to 22 ohm,to Fix VGA EA issue.

13.Add HR60,to fix EA RESET signal issue.2010/03/30

14.Change +1P5V_DUAL_OV to SIO GP10.2010/04/01 2010/04/02 13.Add M1C15 , M1C18 for DP.

4

3

Comments

CommentsComments

2

1

B B

CAD Note:

Default component footprint is SMD 0402, Y5V, 5% type. Difference footprint show on schematics.

A A

Property: BOM

I = Installed Part.

NI = Not Installed Part.

PROTO = PROTO Phase Only.

VP = Virtual Part.

5

4

3

2

PEGATRON DT-MB RESTRICTED SECRET

Title :

CHANGE HISTORY

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

Engineer:

IPMIP-DP

CHANGE HISTORY

Vic_Chen

2 68Wednesd ay, April 07, 2010

1

Rev

1.01

5

4

3

2

1

PCH Buffer Mode

ITP Connector

ITP ConnectorITP Connector

D D

CK_HOST_CPU/#

CK_ITP/#

133 MHz

CK_120M_IPL/# 120 MHz

Intel

IntelIntel

Processor

ProcessorProcessor

Havendale

HavendaleHavendale 1156 pin

1156 pin

1156 pin1156 pin

CK_100M_PE16/#

CK_133M_PCH_IN/#

CK_96M_DREF/# 96 MHz

C C

CLOCK CHIP

CLOCK CHIPCLOCK CHIP

CK_100M_SATA/#

CK_14M_PCH

100 MHzCK_100M_PCH_DMI/#

100 MHz

14.318 MHz

Intel

IntelIntel

PCH

PCHPCH

SPI_CLK

CK_33M_SL1 33 MHz

CK_33M_SL2 33 MHz

CK_100M_PE1/#

SILEGO

SILEGOSILEGO 424

424

424 424

G U B

B B

CRYSTAL

CRYSTALCRYSTAL

14.318MHz

14.318MHz14.318MHz

E D _ M 3 3 _ K C

33 MHz

CRYSTAL

CRYSTALCRYSTAL

25MHz

25MHz25MHz

LPC DEBUG1

LPC DEBUG1LPC DEBUG1

H C P _ M 3 3 _ K C

CK_100M_LAN/#

M_CHA_CLK[0..5]/#

M_CHB_CLK[0..5]/#

CK_100M_PEG/# 100 MHz

100 MHz

24 MHzAZ_BITCLK

33 MHz

100 MHz

PCIEx16 Slot

PCIEx16 SlotPCIEx16 Slot

AZALIA

AZALIAAZALIA

Realtek888S

Realtek888SRealtek888S

SPI

SPISPI

PCI Slot

PCI SlotPCI Slot

PCI Slot

PCI SlotPCI Slot

PCIEx1 Slot 1

PCIEx1 Slot 1PCIEx1 Slot 1

INTEL 82578

INTEL 82578INTEL 82578

2

2 M

M

M M

M

M X

X

X ,

,

, 1

1

1 M

M

M M

M

M X

X

4

4 M

M

M M

M

M X

X

X ,

,

, 3

3

3 M

M

M M

M

M X

X

CRYSTAL

CRYSTALCRYSTAL

25MHz

25MHz25MHz

CK_33M_SIO33 MHz

ITE-8721

ITE-8721 ITE-8721

A A

PEGATRON DT-MB RESTRICTED SECRET

CLOCK DISTRIBUTION

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

IPMIP-DP

1

Vic_Chen

3 68Tuesday, March 23, 2 010

Rev

1.01

5

4

3

2

1

RESET_SWITCH

D D

PCI_Express x 16

<18>PCIES_RST#

PWRGD

<17>PCH_PCIRST#

PCI_Express x 1

<18>PCIES_RST#

PWRGD

POWER_SWITCH

<3>PWRBTN#

C C

POWER SUPPLY

<8>PSON#

PSON#

PWROK

B B

<9>ATX_PWRGD

SIO ITE-8721

PSIN#

PSON#

ATXPGD

RSTOUT0#

LRESET#

KBRST# RCIN#

RSMRST#

PSOUT# PWRBTN#

<17>PLTRST#

RST_KB#

<2>RSMRST#

<4>SB_PWRBTN#

<5>SLP_S5#

SLP_S5#

SLP_S3# SLP_S3#

<6>SLP_S4#

<7>SLP_S3#

<5.1>SLP_M#

<5.1>SLP_LAN#

PCIRST#

PLTRST#

RSMRST#

SLP_S5#

SLP_S4#

SLP_M#

SLP_LAN#

SYS_PWROK

PWROK

RST#

PCI SLOT

<17>PLTRST#

SYS_RESET#

PCH

HDA_RST#

AZ_RST#

RESET#

SYS_RESET#

DRAMPWROK

RTCRST#

<1>RTCRST#

BATTERY

CPUPWRGD VCCPWRGOOD

MEPWROK

AUDIO

ALC888S

SYS_RESET#

<15>DRAM_PWROK

<16>CPUPWRGD

<11>VRM_VID[0..7]

PROCESSOR

DBR#

RSTIN#

SM_DRAMPWROK

RESET_OBS#

VID[0..7]

VCORE

VTTPWRGD

DBR#

ITP

RESET#

TRST#

H_RSTOUT#

TRST#

<14>PWROK

ME_POWER

If support AMT, SLP_M# will come with SLP_S5

If not support AMT, SLP_M# will come with SLP_S3

A A

+1P05V_ME

+3P3V_ME

CK 505

CKPWRGD/PD#

<5.2>MEPWROK

<13>VRM_PWRGD

Vcore Controller

VID[0..7]

VCORE

VR_RDY

EN_VTT

<12>VCORE

<10>VTTPWRGD

+1P1V_VTT

VTTPWRGD

ISL6341

NCP5395

PEGATRON DT-MB RESTRICTED SECRET

SIGNAL & RESET MAP

Title :

Engineer:

Pegatron Corp.

Size Project Name

SOCKET or SLOTCHIP

5

4

3

2

Size Project Name

A3

Date: Sheet of

Engineer:

IPMIP-DP

1

Vic_Chen

4 68Tuesday, March 23, 2 010

Rev

1.01

5

+12V_VCORE

22.1875A

4

16.042A

Controller : NCP5395 H/S:FDU8780_F071*2 L/S:IPDH6N03LAG*2 3 Phase

3

2

+1.4V_CPU/110A

1

3.4375A

D D

2.708A

+5V

C C

+5VSB

11.8305A

2A

SPDT

+5V_DUAL

13.8305A

Controller : ISL6341CRZ_TR H/S:AOD452*2 L/S:AOD472*2

Controller : ISL6314 H/S:IPD09N03LAG*1 L/S:IPD09N03LAG*2

7.8305A

Controller:RT8105/AWN7120 H/S:AOD452*2 L/S:AOD452*2

USB/6A

+1P5V_DUAL

19.548A

RT9173C

0.549A

RT8015APQW

+1P05V_ME 2.222A

LM358+MOS

3.44A

Controller : MP2307

2.838A

+3VSB

3.18A

+1.1V_VTT/30A

+1.3V_AXG/20A

+1.5V_Dual/13.2A

+0P75V_VTT_DDR/0.83A

+1P05V_PCH/5.598A

UP7704U8

B B

SPDT

+3P3V_ME

0.26A

+3.3V

+12V

A A

Title :

SWITCHING

LINEAR

SWITCH ON/OFF

Title :

Engineer:

PEGATRO N CORPOATION

Size Project Name

A3

Date: Sheet of

IPMIP-DP

Engineer:

POWER FLOW

Michael Lee

5 68Tuesday, March 23, 2 010

Rev

1.01

5

Lynnfield/Clarkdale

VCORE

+1.1V_VTT

+1.5V

+1.8V

D D

V_CPU_IO

+5V

+3.3V

-> 90A - 95(TBD)W

-> 30A(TBD) - 33W Vddq -> 6A - 9W Vccpll -> 1.35A - 2.43W

Intel Ibex Peak

Intel Ibex PeakIntel Ibex Peak

-> <1mA - 1.1mW V5REF -> <1mA - 5mW V5REF_Sus -> <1mA - 5mW

Vcc3_3 -> 0.357A - 1.178W VccDAC -> 0.069A - 0.228W

+1.1V

VccDMI -> 0.065A - 0.07W

VccADPLLA -> 0.075A - 0.079W

VccADPLLB-> 0.075A - 0.079W

+1.05V

C C

VccCORE -> 1.629A - 1.71W VccIO -> 3.251A - 3.414W VccLAN -> 0.372A - 0.39W VccME -> 2.222A - 2.333W

+1.8V

VccqNAND -> 0.156A - 0.281W VccVRM -> 0.196A - 0.353W VccTX_LVDS -> 0.059A - 0.106W

+3P3V

VccALVDS -> <1mA - 3.3mW

VccRTC -> 2mA - 6.6mW

+3P3VSB

VccSus3_3 -> 0.168A - 0.554W VccSusHDA -> 0.006A - 0.02W

VccME3_3-> 0.086A - 0.284W

B B

CLOCK- CK505

+3P3V

+VDD_IO (0.8V)

+1.5V_DAUL

-> 250mA - 0.825W

-> 80mA - 64mW

DDR3 DIMM (4) & Termination

DDR3 DIMM (4) & TerminationDDR3 DIMM (4) & Termination

VDD (S0, S1) -> 7.2 A - 10.8W VDD (S3) -> 712mA - 1.07W

SM_VTT(0.75V)

SM VTT (S0, S1) -> 0.83A - 0.623W

4

+12V

+3P3V

+3P3V_PCI

+12V

+3P3V

+3P3V_PCI

+12V

-12V

+5V

+3P3V

+3P3V_PCI

+3P3V_CL

+1P8VSB_LAN

VCC_LAN(1.05V)

+5V

+3.3VSB

+3.3V

+5VSB

+3P3V

+5V_DUAL

PCI Express x 1

PCI Express x 1PCI Express x 1

-> 0.5A - 6W

-> 3.0A - 9.9W

WAKE -> 0.375A - 1.24W No WAKE-> 20mA - 66mW

PCI Express x 16

PCI Express x 16PCI Express x 16

-> 5.5A - 66W

-> 3.0A - 9.9W

WAKE -> 0.375A - 1.24W No WAKE-> 20mA - 66mW

PCI SLOTS

PCI SLOTSPCI SLOTS

-> 0.5A - 6W

-> 0.1A - 1.2W

-> 5.0A - 25W

-> 7.6A - 25.08W

WAKE -> 0.375A - 1.24W No WAKE-> 20mA - 66mW

INTEL 82578

INTEL 82578INTEL 82578

-> 15.5mA(TBD) - 51.15mW

-> 300mA - 540mW

-> 300mA -315mW

SIO ITE-8721

SIO ITE-8721SIO ITE-8721

-> 1mA - 5mW

-> 2.4uA - 7.92uW

-> 2mA - 6.6mW

ALC888S Azalia Codec

ALC888S Azalia CodecALC888S Azalia Codec

-> 0.6A - 3W

-> 0.4A - 1.32W

USB 12 PORTS

USB 12 PORTSUSB 12 PORTS

(S0, S1) -> 8.4A - 42W (S3) -> 0.336A - 1.68W

3

+3P3V

+2P5V_DVI

+5V

+12V

+5V_DUAL

+3V

+12V

+5V

+12V

+5V

1394A

1394A1394A

-> mA - W

HDMI

HDMIHDMI

-> mA - mW

SATA 6 PORTS

SATA 6 PORTSSATA 6 PORTS

-> 0.975A - 4.875W

-> 0.9A - 10.8W

FAN

FANFAN

-> 0.6A - 7.2W

PS2 KB/MS

PS2 KB/MSPS2 KB/MS

(S0, S1) -> 0.345A - 1.73W (S3) -> 2mA - 10mW

SPI

SPISPI

-> 30mA - 99mW

HDD

HDDHDD

-> 0.75A - 9.0W

-> 0.75A - 3.75W

CD ROM

CD ROMCD ROM

-> 0.75A - 9.0W

-> 0.75A - 3.75W

2

1

A A

PEGATRON DT-MB RESTRICTED SECRET

POWER DISTRIBUTION

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

IPMIP-DP

1

Vic_Chen

6 68Tuesday, March 23, 2 010

Rev

1.01

5

4

3

2

1

G5 S5 S4 S3 S0

t1

D D

t2

+5VSB

t3

+3VSB

t4

t5

t10

t14

RSMRST#

C C

t11

SLP_S4#

SLP_S3#

t7

SLP_SM#

t6

PS_ON#

Latch Latch

+12V, +5V

B B

+3V

VTTPWRGD

t8

t12

VRM_PWRGD

PWROK

DRAM_PWROK

t9

A A

The data is not final

5

t1>18ms

t2>0ms

t4>0ms

t5>10ms

t6>0ms

t7>0ms

t9>99ms

t10<110ms

t11>1RTCCLK

t12>5ms

t13:35~74RTCCLK

t14<110ms

4

3

t13

2

PEGATRON DT-MB RESTRICTED SECRET

Title :

POWER SEQUENCE

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

Engineer:

IPMIP-DP

POWER SEQUENCE

Michael Lee

7 68Tuesday, March 23, 2 010

1

Rev

1.01

5

4

3

2

1

ICS9LRS4180AKLFT: 0610-0038000 SLG8SP424VTR: 0610-007D000

D D

21

+CLKVCC 3

12

GND GND

VRM_PW RGD22 ,59

SMB_CLK _M16,17,49,5 7

SMB_DAT A_M16,17,49,5 7

I

CKCB4

0.1UF/16V

X7R 10%

12

NI

CKCB11

CKCB11 10UF/6.3V

10UF/6.3V

X5R 10%

X5R 10% mx_c0805

mx_c0805

GNDGND

12

I

CKCB5

0.1UF/16V

X7R 10%

GND GND

VP

CKR43

1 2

12

I

CKC8

CKC8 33PF/50V

33PF/50V

NPO 5%

GND GND GND

I

CKCB12

CKCB12 10UF/6.3V

10UF/6.3V

X5R 10%

X5R 10% mx_c0805

mx_c0805

I

CKCB3

0.1UF/16V

X7R 10%

0

VP

CKR48

CKR48 0

0

12

I

CKCB6

0.1UF/16V

X7R 10%

GND GND

12

I

CKCB8

0.1UF/16V

X7R 10%

Y1_R

12

NI

CKC10

CKC10 33PF/50V

33PF/50V

NPO 5%

12

GND

12

GND

I

Y1

14.318Mh z

1 2

GND

3

I

CKCB7

0.1UF/16V

X7R 10%

I

CKCB9

0.1UF/16V

X7R 10%

CKCB10

NI

0.1UF/16V

X7R 10%

12

GNDGND

12

I

CKCB2

0.1UF/16V

X7R 10%

GND

CK505_P WRGD

OSC_CK1 4M_XTALIN OSC_CK1 4M_XTALOUT

12

I

CKC9

CKC9 33PF/50V

33PF/50V

NPO 5%

NI

CKC11

CKC11 33PF/50V

33PF/50V

NPO 5%

GND

1

VDD1

30

VDD2

19

VDD_CPU

12

VDD_SRC

9

VDD_SATA

3

VDD_96

16

VDD_A

25

VDD_REF

22

VSS_CPU

13

VSS_SRC

5

VSS_96

31

VSS1

32

VSS2

17

VSS_A

28

VSS_REF

33

GND

34

GND1

35

GND2

36

GND3

37

GND4

2

CKPWRGD/PD#

27

XIN

26

XOUT

23

SCL

24

SDA

CKU1

USB_48M/FS_A

CPU

CPU#

SRC

SRC#

SATA

SATA#

DOT_96

DOT_96#

FS_B

REF/FS_C

RCPUHCL K

21

RCPUHCL K#

20

RCK_100 M_PCIE

15

RCK_100 M_PCIE#

14

RCK_100 M_SATA

10

RCK_100 M_SATA#

11

RCK_96M _DREF

6

RCK_96M _DREF#

7

+CLKVCC 3

12

NI/SLG8SP424

CKR39

4.7K

CK_RESE T#

18

NC

CK_48MH z

4

CK_FSLB

8

RCK_REF _14P318

29

PU in F_PANEL

+CLKVCC 3

1 2

12

GND

CKR3 CKR4

CKR12 CKR13

CKR20 CKR21

CKR24 CKR25

+CLKVCC 3 +CLKVCC 3

12

CKR36

CKR36 10KOhm

10KOhm

5%

5% I

I

CKR47

CKR47 10KOhm

10KOhm

5%

5% NI

NI

CKR38

CKR38 10KOhm

10KOhm

5%

5% NI

NI

12

CKR49

CKR49 10KOhm

10KOhm

5%

5% I

I

GND GND

0CKR3

0

12

NOBOM

0CKR4

0

12

NOBOM

0CKR12

0

12

NOBOM

0CKR13

0

12

NOBOM

0CKR20

0

12

NOBOM

0CKR21

0

12

NOBOM

0CKR24

0

12

NOBOM

0CKR25

0

12

NOBOM

RESET(Pin 18) on ICS9LRS4180A

NOTE:

Real time system reset signal for frequency gear

ratio change or watchdog timer timeout.

NC(Pin 18) on SLG8SP424

NOTE:

CKR5

NI

12

CKR37

CKR37 10KOhm

10KOhm

5%

5% NI

NI

CKR50

CKR50 10KOhm

10KOhm

5%

5% I

I

NI

1 2

0

CKR27 33

I

CKR29 33

I

1 2

12

NI

CKC2

CKC2 10PF/50V

10PF/50V

NPO 5%

GND GND

CK_133M _PCH_IN 24 CK_133M _PCH_IN# 24

CK_100M _PCH_DMI 20 CK_100M _PCH_DMI# 20

CK_100M _PCH_SATA 21 CK_100M _PCH_SATA# 21

CK_96M_ PCH_DREF 23 CK_96M_ PCH_DREF# 23

SYS_RESET # 13,22 ,52,57

CK_48M_ SIO 47

CK_14M_ PCH 24

12

NI

CKC5

CKC5 10PF/50V

10PF/50V

NPO 5%

+3P3VSB

+3P3V

C C

B B

NI

CKR55

CKR55 0

0

mx_r0603

1 2

I

CKR56

CKR56 0

0

mx_r0603

1 2

+CLKPW

I

CKL1

600Ohm/1 00Mhz/0.5A

mx_l0603

SLG8SP4 24VTR

I

A A

5

4

3

NOTE:

FSLC FSLB FSLA CPU FREQ

0 0 1 133MHz

1 10 100MHz

PEGATRON DT-MB RESTRICTED SECRET

ICS 4180/SLG 424

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

2

Date: Sheet of

Engineer:

IPMIP-DP

ICS 4180/SLG 424

Vic_Chen

1

Rev

1.01

8 68Wednesd ay, April 07, 2010

1.01

5

D D

C C

4

3

2

+1P1V_V TT

1

12

NI

HR9

HR9 1K

VRM_VID[0..7]13,5 9

B B

GFX_VID[0..6]13

A A

5

4

GFX_VID6 GFX_VID5 GFX_VID4 GFX_VID3 GFX_VID2 GFX_VID1 GFX_VID0

VP

VP VP

VP

VRM_VID0 VRM_VID1 VRM_VID2 VRM_VID3 VRM_VID4 VRM_VID5 VRM_VID6 VRM_VID7

HR53 0

1 2

HR54 0

1 2

HR55 0

1 2

HR56 0

1 2

HR57 0

1 2

HR58 0

1 2

HR59 0

1 2

3

1K

12

I

HR10

HR10 1K

1K

12

I

HR18

HR11

1K

12

NI

HR41

HR17

1K

12

I

NI

HR62

HR52

1K

12

NI

HR61

HR63

1K

12

I

HR42

HR42 1K

1K

12

NI

HR43

HR43 1K

1K

12

NI

HR64

HR64 1K

1K

12

NI

HR65

HR65 1K

1K

12

NI

I

HR44

HR46

1K

12

I

NI

HR45

HR47

1K

12

NI

HR66

HR68

1K

12

NI

HR69

HR67

1K

12

NI

HR50

HR48

1K

12

I

HR49

HR51

1K

GND

+1P1V_V TT

12

NI

HR72

HR70

1K

VAXG_VID7 VAXG_VID6 VAXG_VID5 VAXG_VID4 VAXG_VID3 VAXG_VID2 VAXG_VID1

12

NI

HR71

HR73

1K

GND

2

VAXG_VID[1 ..7] 62

PEGATRON DT-MB RESTRICTED SECRET

Title :

VID RES

1

VID RES

Vic_Chen

9 68Wednesd ay, April 07, 2010

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

Engineer:

IPMIP-DP

Rev

1.01

5

M_CHA_M AA[0..15]16

D D

C C

+1P5V_D UAL

12

I

HR60

HR60 0

GND

0

12

NI

HC1

HC1 220PF/50 V

220PF/50 V

X7R 10%

B B

DDR3_DR AMRST#16,17

IP R1.02 added to reduce The glitch.

M_CHA_C LK01 6 M_CHA_C LK0#16 M_CHA_C LK11 6 M_CHA_C LK1#16 M_CHA_C LK21 6 M_CHA_C LK2#16 M_CHA_C LK31 6 M_CHA_C LK3#16

M_CHA_D QS816 M_CHA_D QS8#16

NOTE:

For ECC DIMM

MA_ECC_ CB[0..7]16

A A

5

4

I

HU1A

M_CHA_M AA0 M_CHA_M AA1 M_CHA_M AA2 M_CHA_M AA3 M_CHA_M AA4 M_CHA_M AA5 M_CHA_M AA6 M_CHA_M AA7 M_CHA_M AA8 M_CHA_M AA9 M_CHA_M AA10 M_CHA_M AA11 M_CHA_M AA12 M_CHA_M AA13 M_CHA_M AA14 M_CHA_M AA15

M_CHA_W E#16 M_CHA_C AS#16 M_CHA_R AS#16

M_CHA_B A016 M_CHA_B A116 M_CHA_B A216

M_CHA_C S#01 6 M_CHA_C S#11 6 M_CHA_C S#21 6 M_CHA_C S#31 6

M_CHA_C KE016 M_CHA_C KE116 M_CHA_C KE216 M_CHA_C KE316

M_CHA_O DT016 M_CHA_O DT116 M_CHA_O DT216 M_CHA_O DT316

HT1TPC26bNOBOM HT1TPC26bNOBOM

1

HT2TPC26bNOBOM HT2TPC26bNOBOM

1

HT3TPC26bNOBOM HT3TPC26bNOBOM

1

HT4TPC26bNOBOM HT4TPC26bNOBOM

1

4

M_CHA_B A0 M_CHA_B A1 M_CHA_B A2

M_CHA_C S#0 M_CHA_C S#1 M_CHA_C S#2 M_CHA_C S#3

M_CHA_C KE0 M_CHA_C KE1 M_CHA_C KE2 M_CHA_C KE3

M_CHA_O DT0 M_CHA_O DT1 M_CHA_O DT2 M_CHA_O DT3

TP_CPU_ AK22 TP_CPU_ AM22 TP_CPU_ AL23 TP_CPU_ AK23

M_CHA_D QS8 M_CHA_D QS8#

MA_ECC_ CB0 MA_ECC_ CB1 MA_ECC_ CB2 MA_ECC_ CB3 MA_ECC_ CB4 MA_ECC_ CB5 MA_ECC_ CB6 MA_ECC_ CB7

AW18

AY15 AV15 AU15

AW14

AY13 AV14

AW13

AU14

AW12

AT19 AU13

AW11

AU24 AT11 AR10

AT22 AU22 AT20

AV20 AU19 AU12

AV21

AW24

AU21 AU23

AU10

AW10

AV10 AY10

AV23 AV24

AW23

AY24

AR22 AR21 AP18 AN18 AN21 AP21 AP19 AN19

AV8

AK22 AM22

AL23

AK23

AL10

AM10

AP10 AN10 AR11 AP11

AK9

AL9 AK11 AM11

SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8] SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

SA_WE# SA_CAS# SA_RAS#

SA_BS[0] SA_BS[1] SA_BS[2]

SA_CS[0]# SA_CS[1]# SA_CS[2]# SA_CS[3]#

SA_CKE[0] SA_CKE[1] SA_CKE[2] SA_CKE[3]

SA_ODT[0] SA_ODT[1] SA_ODT[2] SA_ODT[3]

SA_CK[0] SA_CK[0]# SA_CK[1] SA_CK[1]# SA_CK[2] SA_CK[2]# SA_CK[3] SA_CK[3]#

SM_DRAMRST#

SA_CS[4]# SA_CS[5]# SA_CS[6]# SA_CS[7]#

SA_DQS[8] SA_DQS[8]#

SA_ECC_CB[0] SA_ECC_CB[1] SA_ECC_CB[2] SA_ECC_CB[3] SA_ECC_CB[4] SA_ECC_CB[5] SA_ECC_CB[6] SA_ECC_CB[7]

DDR_A

SOCKET_ 1156P

3

SA_DQS#[0]

SA_DQS#[1]

SA_DQS[2]#

SA_DQS#[3]

SA_DQS[4]#

SA_DQS[5]#

SA_DQS[6]#

SA_DQS[7]#

3

SA_DQS[0]

SA_DM[0]

SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7]

SA_DQS[1]

SA_DM[1]

SA_DQ[8]

SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15]

SA_DQS[2]

SA_DM[2]

SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23]

SA_DQS[3]

SA_DM[3]

SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31]

SA_DQS[4]

SA_DM[4]

SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39]

SA_DQS[5]

SA_DM[5]

SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47]

SA_DQS[6]

SA_DM[6]

SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55]

SA_DQS[7]

SA_DM[7]

SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

Rev 1.2

AK3 AJ3 AJ2

AH1 AJ4 AL2 AL1 AG2 AH2 AK1 AK2

AP2 AP3 AN1

AN3 AN2 AR3 AR2 AM3 AM2 AP1 AR4

AU4 AU3 AU1

AT4 AU2 AW3 AW4 AT3 AT1 AV2 AV4

AY6 AW6 AV6

AW5 AY5 AU8 AY8 AU5 AV5 AV7 AW7

AR28 AT29 AN29

AN27 AT28 AP28 AP30 AN26 AR27 AR29 AN30

AV32 AW32 AW31

AU30 AU31 AV33 AU34 AV30 AW30 AU33 AW33

AW36 AV35 AU35

AW35 AY35 AV37 AU37 AY34 AW34 AV36 AW37

AR39 AR38 AT38

AT39 AT40 AN38 AN39 AU38 AU39 AP39 AP40

M_CHA_D QS0 M_CHA_D QS0# M_CHA_D M0

M_CHA_D Q0 M_CHA_D Q1 M_CHA_D Q2 M_CHA_D Q3 M_CHA_D Q4 M_CHA_D Q5 M_CHA_D Q6 M_CHA_D Q7

M_CHA_D QS1 M_CHA_D QS1# M_CHA_D M1

M_CHA_D Q8 M_CHA_D Q9 M_CHA_D Q10 M_CHA_D Q11 M_CHA_D Q12 M_CHA_D Q13 M_CHA_D Q14 M_CHA_D Q15

M_CHA_D QS2 M_CHA_D QS2# M_CHA_D M2

M_CHA_D Q16 M_CHA_D Q17 M_CHA_D Q18 M_CHA_D Q19 M_CHA_D Q20 M_CHA_D Q21 M_CHA_D Q22 M_CHA_D Q23

M_CHA_D QS3 M_CHA_D QS3# M_CHA_D M3

M_CHA_D Q24 M_CHA_D Q25 M_CHA_D Q26 M_CHA_D Q27 M_CHA_D Q28 M_CHA_D Q29 M_CHA_D Q30 M_CHA_D Q31

M_CHA_D QS4 M_CHA_D QS4# M_CHA_D M4

M_CHA_D Q32 M_CHA_D Q33 M_CHA_D Q34 M_CHA_D Q35 M_CHA_D Q36 M_CHA_D Q37 M_CHA_D Q38 M_CHA_D Q39

M_CHA_D QS5 M_CHA_D QS5# M_CHA_D M5

M_CHA_D Q40 M_CHA_D Q41 M_CHA_D Q42 M_CHA_D Q43 M_CHA_D Q44 M_CHA_D Q45 M_CHA_D Q46 M_CHA_D Q47

M_CHA_D QS6 M_CHA_D QS6# M_CHA_D M6

M_CHA_D Q48 M_CHA_D Q49 M_CHA_D Q50 M_CHA_D Q51 M_CHA_D Q52 M_CHA_D Q53 M_CHA_D Q54 M_CHA_D Q55

M_CHA_D QS7 M_CHA_D QS7# M_CHA_D M7

M_CHA_D Q56 M_CHA_D Q57 M_CHA_D Q58 M_CHA_D Q59 M_CHA_D Q60 M_CHA_D Q61 M_CHA_D Q62 M_CHA_D Q63

2

M_CHA_D Q[0..63] 16

M_CHA_D QS0 16 M_CHA_D QS0# 16 M_CHA_D M0 16

M_CHA_D QS1 16 M_CHA_D QS1# 16 M_CHA_D M1 16

M_CHA_D QS2 16 M_CHA_D QS2# 16 M_CHA_D M2 16

M_CHA_D QS3 16 M_CHA_D QS3# 16 M_CHA_D M3 16

M_CHA_D QS4 16 M_CHA_D QS4# 16 M_CHA_D M4 16

M_CHA_D QS5 16 M_CHA_D QS5# 16 M_CHA_D M5 16

M_CHA_D QS6 16 M_CHA_D QS6# 16 M_CHA_D M6 16

M_CHA_D QS7 16 M_CHA_D QS7# 16 M_CHA_D M7 16

1

PEGATRON DT-MB RESTRICTED SECRET

CPU 1160 + MEMORY - 1

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

2

Date: Sheet of

IPMIP-DP

Engineer:

Vic_Chen

10 68Wednesd ay, April 07, 2010

1

10 68Wednesd ay, April 07, 2010

Rev

1.01

5

M_CHB_M AA[0..15]17

D D

M_CHB_W E#17 M_CHB_C AS#17 M_CHB_R AS#17

M_CHB_B A017 M_CHB_B A117 M_CHB_B A217

M_CHB_C S#01 7 M_CHB_C S#11 7 M_CHB_C S#21 7

C C

B B

NOTE:

M_CHB_C S#31 7

M_CHB_C KE017 M_CHB_C KE117 M_CHB_C KE217 M_CHB_C KE317

M_CHB_O DT017 M_CHB_O DT117 M_CHB_O DT217 M_CHB_O DT317

M_CHB_C LK01 7 M_CHB_C LK0#17 M_CHB_C LK11 7 M_CHB_C LK1#17 M_CHB_C LK21 7 M_CHB_C LK2#17 M_CHB_C LK31 7 M_CHB_C LK3#17

M_CHB_D QS817 M_CHB_D QS8#17

For ECC DIMM

MB_ECC_ CB[0..7]17

A A

5

4

I

HU1B

M_CHB_M AA0 M_CHB_M AA1 M_CHB_M AA2 M_CHB_M AA3 M_CHB_M AA4 M_CHB_M AA5 M_CHB_M AA6 M_CHB_M AA7 M_CHB_M AA8 M_CHB_M AA9 M_CHB_M AA10 M_CHB_M AA11 M_CHB_M AA12 M_CHB_M AA13 M_CHB_M AA14 M_CHB_M AA15

M_CHB_B A0 M_CHB_B A1 M_CHB_B A2

M_CHB_C S#0 M_CHB_C S#1 M_CHB_C S#2 M_CHB_C S#3

M_CHB_C KE0 M_CHB_C KE1 M_CHB_C KE2 M_CHB_C KE3

M_CHB_O DT0 M_CHB_O DT1 M_CHB_O DT2 M_CHB_O DT3

HT5TPC26bNOBOM HT5TPC26bNOBOM

1

HT6TPC26bNOBOM HT6TPC26bNOBOM

1

HT7TPC26bNOBOM HT7TPC26bNOBOM

1

HT8TPC26bNOBOM HT8TPC26bNOBOM

1

4

TP_CPU_ AM23 TP_CPU_ AM24 TP_CPU_ AL24 TP_CPU_ AK24

M_CHB_D QS8 M_CHB_D QS8#

MB_ECC_ CB0 MB_ECC_ CB1 MB_ECC_ CB2 MB_ECC_ CB3 MB_ECC_ CB4 MB_ECC_ CB5 MB_ECC_ CB6 MB_ECC_ CB7

AU20 AU18 AV18 AU17 AY18 AV17

AW17

AU16

AT17 AY16 AY25

AW16 AW15 AW28

AY12 AV11

AU26

AW27 AW26

AU25

AW25

AV12

AY27

AW29

AV26 AV29

AW8

AY9 AU9 AV9

AU27 AU29 AV27 AU28

AR17 AR16

AT15 AR15 AN17 AN16 AR19 AR18

AM23 AM24

AL24 AK24

AR14 AR13

AR12

AT13 AN15 AP14 AM12 AN12 AN14 AP13

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8] SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

SB_WE# SB_CAS# SB_RAS#

SB_BS[0] SB_BS[1] SB_BS[2]

SB_CS[0]# SB_CS[1]# SB_CS[2]# SB_CS[3]#

SB_CKE[0] SB_CKE[1] SB_CKE[2] SB_CKE[3]

SB_ODT[0] SB_ODT[1] SB_ODT[2] SB_ODT[3]

SB_CK[0] SB_CK[0]# SB_CK[1] SB_CK[1]# SB_CK[2] SB_CK[2]# SB_CK[3] SB_CK[3]#

SB_CS[4]# SB_CS[5]# SB_CS[6]# SB_CS[7]#

SB_DQS[8] SB_DQS[8]#

SB_ECC_CB[0] SB_ECC_CB[1] SB_ECC_CB[2] SB_ECC_CB[3] SB_ECC_CB[4] SB_ECC_CB[5] SB_ECC_CB[6] SB_ECC_CB[7]

DDR_B

SOCKET_ 1156P

3

SB_DQS[0]

SB_DQS[0]#

SB_DM[0]

SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7]

SB_DQS[1]

SB_DQS[1]#

SB_DM[1]

SB_DQ[8]

SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15]

SB_DQS[2]

SB_DQS#[2]

SB_DM[2]

SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23]

SB_DQS[3]

SB_DQS#[3]

SB_DM[3]

SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31]

SB_DQS[4]

SB_DQS[4]#

SB_DM[4]

SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39]

SB_DQS[5]

SB_DQS[5]#

SB_DM[5]

SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47]

SB_DQS[6]

SB_DQS#[6]

SB_DM[6]

SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55]

SB_DQS[7]

SB_DQS[7]#

SB_DM[7]

SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]

Rev 1.2

3

AF4 AE5 AE4

AD7 AD6 AH8 AJ8 AC7 AC6 AF5 AE6

AH6 AJ5 AH4

AG5 AH7 AK6 AL4 AG6 AG4 AJ7 AK7

AN6 AM6 AM7

AL6 AN5 AP6 AR5 AL5 AM4 AN7 AP5

AR8 AP8 AT7

AT6 AR7 AR9 AM8 AN8 AR6 AL8 AT9

AT25 AR24 AN24

AN23 AP23 AR25 AR26 AT23 AP22 AP25 AT26

AP32 AR32 AN32

AT32 AP31 AR33 AM32 AT31 AR31 AR34 AT33

AR36 AR37 AM33

AR35 AT36 AN33 AP36 AP34 AT35 AN34 AP37

AL37 AM36 AK35

AL35 AM35 AJ36 AJ37 AN35 AM34 AJ35 AL36

M_CHB_D QS0 M_CHB_D QS0# M_CHB_D M0

M_CHB_D Q0 M_CHB_D Q1 M_CHB_D Q2 M_CHB_D Q3 M_CHB_D Q4 M_CHB_D Q5 M_CHB_D Q6 M_CHB_D Q7

M_CHB_D QS1 M_CHB_D QS1# M_CHB_D M1

M_CHB_D Q8 M_CHB_D Q9 M_CHB_D Q10 M_CHB_D Q11 M_CHB_D Q12 M_CHB_D Q13 M_CHB_D Q14 M_CHB_D Q15

M_CHB_D QS2 M_CHB_D QS2# M_CHB_D M2

M_CHB_D Q16 M_CHB_D Q17 M_CHB_D Q18 M_CHB_D Q19 M_CHB_D Q20 M_CHB_D Q21 M_CHB_D Q22 M_CHB_D Q23

M_CHB_D QS3 M_CHB_D QS3# M_CHB_D M3

M_CHB_D Q24 M_CHB_D Q25 M_CHB_D Q26 M_CHB_D Q27 M_CHB_D Q28 M_CHB_D Q29 M_CHB_D Q30 M_CHB_D Q31

M_CHB_D QS4 M_CHB_D QS4# M_CHB_D M4

M_CHB_D Q32 M_CHB_D Q33 M_CHB_D Q34 M_CHB_D Q35 M_CHB_D Q36 M_CHB_D Q37 M_CHB_D Q38 M_CHB_D Q39

M_CHB_D QS5 M_CHB_D QS5# M_CHB_D M5

M_CHB_D Q40 M_CHB_D Q41 M_CHB_D Q42 M_CHB_D Q43 M_CHB_D Q44 M_CHB_D Q45 M_CHB_D Q46 M_CHB_D Q47

M_CHB_D QS6 M_CHB_D QS6# M_CHB_D M6

M_CHB_D Q48 M_CHB_D Q49 M_CHB_D Q50 M_CHB_D Q51 M_CHB_D Q52 M_CHB_D Q53 M_CHB_D Q54 M_CHB_D Q55

M_CHB_D QS7 M_CHB_D QS7# M_CHB_D M7

M_CHB_D Q56 M_CHB_D Q57 M_CHB_D Q58 M_CHB_D Q59 M_CHB_D Q60 M_CHB_D Q61 M_CHB_D Q62 M_CHB_D Q63

2

M_CHB_D Q[0..63] 17

M_CHB_D QS0 17 M_CHB_D QS0# 17 M_CHB_D M0 17

M_CHB_D QS1 17 M_CHB_D QS1# 17 M_CHB_D M1 17

M_CHB_D QS2 17 M_CHB_D QS2# 17 M_CHB_D M2 17

M_CHB_D QS3 17 M_CHB_D QS3# 17 M_CHB_D M3 17

M_CHB_D QS4 17 M_CHB_D QS4# 17 M_CHB_D M4 17

M_CHB_D QS5 17 M_CHB_D QS5# 17 M_CHB_D M5 17

M_CHB_D QS6 17 M_CHB_D QS6# 17 M_CHB_D M6 17

M_CHB_D QS7 17 M_CHB_D QS7# 17 M_CHB_D M7 17

1

PEGATRON DT-MB RESTRICTED SECRET

CPU 1160 + MEMORY - 2

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

2

Date: Sheet of

IPMIP-DP

Engineer:

Vic_Chen

11 68Wednesd ay, April 07, 2010

1

11 68Wednesd ay, April 07, 2010

Rev

1.01

5

I

HU1C

D D

C C

EXP_RXP 038 EXP_RXN 038

EXP_RXP 138 EXP_RXN 138

EXP_RXP 238 EXP_RXN 238

EXP_RXP 338 EXP_RXN 338

EXP_RXP 438 EXP_RXN 438

EXP_RXP 538 EXP_RXN 538

EXP_RXP 638 EXP_RXN 638

EXP_RXP 738 EXP_RXN 738

EXP_RXP 838 EXP_RXN 838

EXP_RXP 938 EXP_RXN 938

EXP_RXP 1038 EXP_RXN 1038

EXP_RXP 1138 EXP_RXN 1138

EXP_RXP 1238 EXP_RXN 1238

EXP_RXP 1338 EXP_RXN 1338

EXP_RXP 1438 EXP_RXN 1438

EXP_RXP 1538 EXP_RXN 1538

EXP_RXP 0 EXP_RXN 0

EXP_RXP 1 EXP_RXN 1

EXP_RXP 2 EXP_RXN 2

EXP_RXP 3 EXP_RXN 3

EXP_RXP 4 EXP_RXN 4

EXP_RXP 5 EXP_RXN 5

EXP_RXP 6 EXP_RXN 6

EXP_RXP 7 EXP_RXN 7

EXP_RXP 8 EXP_RXN 8

EXP_RXP 9 EXP_RXN 9

EXP_RXP 10 EXP_RXN 10

EXP_RXP 11 EXP_RXN 11

EXP_RXP 12 EXP_RXN 12

EXP_RXP 13 EXP_RXN 13

EXP_RXP 14 EXP_RXN 14

EXP_RXP 15 EXP_RXN 15

C9 D9

B8 C8

A7 A6

B6 C6

A5 B5

B4 C4

C3 D3

D2 E2

E1 F1

G3 G2

G1

H1

J3 J2

J1

K1

L2 L3

P3 P4

T3 T4

HU1C

PEG_RX[0] PEG_RX[0]#

PEG_RX[1] PEG_RX[1]#

PEG_RX[2] PEG_RX[2]#

PEG_RX[3] PEG_RX[3]#

PEG_RX[4] PEG_RX[4]#

PEG_RX[5] PEG_RX[5]#

PEG_RX[6] PEG_RX[6]#

PEG_RX[7] PEG_RX[7]#

PEG_RX[8] PEG_RX[8]#

PEG_RX[9] PEG_RX[9]#

PEG_RX[10] PEG_RX[10]#

PEG_RX[11] PEG_RX[11]#

PEG_RX[12] PEG_RX[12]#

PEG_RX[13] PEG_RX[13]#

PEG_RX[14] PEG_RX[14]#

PEG_RX[15] PEG_RX[15]#

4

PEG_TX[0]

PEG_TX[0]#

PEG_TX[1]

PEG_TX[1]#

PEG_TX[2]

PEG_TX[2]#

PEG_TX[3]

PEG_TX[3]#

PEG_TX[4]

PEG_TX[4]#

PEG_TX[5]

PEG_TX[5]#

PEG_TX[6]

PEG_TX[6]#

PEG_TX[7]

PEG_TX[7]#

PEG_TX[8]

PEG_TX[8]#

PEG_TX[9]

PEG_TX[9]#

PEG_TX[10]

PEG_TX[10]#

PEG_TX[11]

PEG_TX[11]#

PEG_TX[12]

PEG_TX[12]#

PEG_TX[13]

PEG_TX[13]#

PEG_TX[14]

PEG_TX[14]#

PEG_TX[15]

PEG_TX[15]#

3

EXP_TXP 0

C7

EXP_TXN 0

D7

EXP_TXP 1

E7

EXP_TXN 1

E6

EXP_TXP 2

E5

EXP_TXN 2

F5

EXP_TXP 3

F3

EXP_TXN 3

F4

EXP_TXP 4

G6

EXP_TXN 4

G5

EXP_TXP 5

H4

EXP_TXN 5

H3

EXP_TXP 6

F7

EXP_TXN 6

G7

EXP_TXP 7

J6

EXP_TXN 7

J5

EXP_TXP 8

K3

EXP_TXN 8

K4

EXP_TXP 9

H8

EXP_TXN 9

J8

EXP_TXP 10

L6

EXP_TXN 10

L5

EXP_TXP 11

M4

EXP_TXN 11

M3

EXP_TXP 12

K7

EXP_TXN 12

L7

EXP_TXP 13

N6

EXP_TXN 13

N5

EXP_TXP 14

M8

EXP_TXN 14

N8

EXP_TXP 15

R5

EXP_TXN 15

R6

EXP_TXP 0 38 EXP_TXN 0 3 8

EXP_TXP 1 38 EXP_TXN 1 3 8

EXP_TXP 2 38 EXP_TXN 2 3 8

EXP_TXP 3 38 EXP_TXN 3 3 8

EXP_TXP 4 38 EXP_TXN 4 3 8

EXP_TXP 5 38 EXP_TXN 5 3 8

EXP_TXP 6 38 EXP_TXN 6 3 8

EXP_TXP 7 38 EXP_TXN 7 3 8

EXP_TXP 8 38 EXP_TXN 8 3 8

EXP_TXP 9 38 EXP_TXN 9 3 8

EXP_TXP 10 38 EXP_TXN 10 38

EXP_TXP 11 38 EXP_TXN 11 38

EXP_TXP 12 38 EXP_TXN 12 38

EXP_TXP 13 38 EXP_TXN 13 38

EXP_TXP 14 38 EXP_TXN 14 38

EXP_TXP 15 38 EXP_TXN 15 38

DL_FSYNC_ 024 DL_LSYNC_ 024

DL_FSYNC_ 124 DL_LSYNC_ 124

DL_INT24

2

I

HU1D

AC4 AD4

AC3 AD3

AC2

SOCKET_ 1156P

FDI_FSYNC[0] FDI_LSYNC[0]

FDI_FSYNC[1] FDI_LSYNC[1]

FDI_INT

FDI_TX[0]

FDI_TX[0]#

FDI_TX[1]

FDI_TX[1]#

FDI_TX[2]

FDI_TX[2]#

FDI_TX[3]

FDI_TX[3]#

DISPLAY LINK

FDI_TX[4]

FDI_TX[4]#

FDI_TX[5]

FDI_TX[5]#

FDI_TX[6]

FDI_TX[6]#

FDI_TX[7]

FDI_TX[7]#

Rev 1.2

1

U6 U5

V4 V3

U8 U7

W8 W7

W5 W4

R8 R7

Y4 Y3

Y6 Y5

FDI_TXP0 24 FDI_TXN0 24

FDI_TXP1 24 FDI_TXN1 24

FDI_TXP2 24 FDI_TXN2 24

FDI_TXP3 24 FDI_TXN3 24

FDI_TXP4 24 FDI_TXN4 24

FDI_TXP5 24 FDI_TXN5 24

FDI_TXP6 24 FDI_TXN6 24

FDI_TXP7 24 FDI_TXN7 24

DMI_RXP020

B B

A A

DMI_RXN020

DMI_RXP120 DMI_RXN120

DMI_RXP220 DMI_RXN220

DMI_RXP320 DMI_RXN320

DMI_RXP0 DMI_RXN0

DMI_RXP1 DMI_RXN1

DMI_RXP2 DMI_RXN2

DMI_RXP3 DMI_RXN3

R1

DMI_RX[0]

T1

DMI_RX[0]#

U3

DMI_RX[1]

U2

DMI_RX[1]#

U1

DMI_RX[2]

V1

DMI_RX[2]#

W3

DMI_RX[3]

W2

DMI_RX[3]#

SOCKET_ 1156P

DMI_TX[0]

DMI_TX[0]#

DMI_TX[1]

DMI_TX[1]#

DMI_TX[2]

DMI_TX[2]#

DMI PEG

DMI_TX[3]

DMI_TX[3]#

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RBIAS

Rev 1.2

L1 M1

N3 N2

N1 P1

R2 R3

D11

C10

B10

A11

DMI_TXP0 DMI_TXN0

DMI_TXP1 DMI_TXN1

DMI_TXP2 DMI_TXN2

DMI_TXP3 DMI_TXN3

CPU_GRC OMP

CPU_GRB IAS

DMI_TXP0 20 DMI_TXN0 20

DMI_TXP1 20 DMI_TXN1 20

DMI_TXP2 20 DMI_TXN2 20

DMI_TXP3 20 DMI_TXN3 20

I

HR1

49.9 1%

1 2

I

HR2

HR2 750

750

1%

1 2

GND

PEGATRON DT-MB RESTRICTED SECRET

CPU 1160 + MEMORY - 3

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

5

4

3

2

Date: Sheet of

IPMIP-DP

Engineer:

Vic_Chen

12 68Wednesd ay, April 07, 2010

1

12 68Wednesd ay, April 07, 2010

Rev

1.01

5

CK_133M _PCH_OUT24 CK_133M _PCH_OUT#24

CK_100M _PEG_DMI24 CK_100M _PEG_DMI#24

D D

HR108

HR108 0

Divide to 1P1V

+1P5V_D UAL

12

HR78

1.1K

1%

CPUPW RGD22,5 7

PLTRST#22 ,36,47,50,57 VTTPW RGD59 ,64 DRAM_PW ROK22

HR75

VP

C C

B B

A A

PECI_SIO48

PECI21

H_THMTR IP#21 PM_SYNC21

PEG CONFIG TABLE CFG[0~5] All have internal P-U

CFG1

CFG0 1

1

0 1

H NORM Reversal

CFG3 CFG4 Disabled

CFG7

Engineering experiment

CFG15

Engineering experiment

1 2

NI

1 2

+3P3VSB

12

VTTPG_G ATE2

3

C

B

1

B

1

E

E 2

2

GND

VTTPG_G ATE1

CFG2 1 1

L

Enabled

HR74

I

HR76

HR76 10K

10K

I

HQ4

HQ4 PMBS390 4

PMBS390 4

1 2

1

PMBS390 4

I

HR77

4.7K

GND

PCIE CONFIG

1 x 16 2 x 8

12

0

GND

0

3

HQ3

C

I

B

E

E 2

2

3

GND

HR21 1.5K

NI

HR22 1.5K

NI

HR23 1.5K

NI

HR24 1.5K

NI

HR25 1.5K

NI

HR26 1.5K

NI

Description PEG Lane Reversal DP Presence

I

HR79

HR79 3K

3K

1%

I

HD2

NI HD 2

NI

BAT54AW

+1P1V_V TT

12

NI

HR6

49.9

1%

12

NI

HR30

HR30 51

51

+1P1V_V TT

2

1

NOTE:

CFG[0:5] have i nternal pull-up

12 12 12 12 12 12

HR86 1.5K

NI

HR84 1.5K

NI

HR85 1.5K

NI

GND

0

NOBOM

1 2

GND GND

HR7 HR4 HR5 1.3K 1%

HR5 1.3K 1%

1 2

I

+1P1V_V TT+1P1V_V TT+1P1V_V TT +1P1V_V TT

+1P1V_V TT

12

I

HR29

HR28

51

HR13 20 1 %

I

HR12 20 1 %

I

HR14 100 1%

I

HR16 24.9 1%

I

HR15 130 1%

I

HR20 49.9 1%

I

HR19 49.9 1%

I

GND

SLP_S3# 22,48,64,66

12 12

12

1 2

0H R7

0

12

0H R4

0

12

I

HR33

HR33 51

51

12 12

12 12 12

12 12

4

HR109

HR109 0

0

NOBOM

PU in SIO

NOBOM

NOBOM NOBOM

NOBOM

12

NI

HR31

HR31 51

51

SKTOCC#22

HT21TPC26bNOBOM HT21TPC26bNOBOM

HT84TPC26bNOBOM HT84TPC26bNOBOM HT85TPC26bNOBOM HT85TPC26bNOBOM

HT86TPC26bNOBOM HT86TPC26bNOBOM HT88TPC26bNOBOM HT88TPC26bNOBOM HT24TPC26bNOBOM HT24TPC26bNOBOM HT25TPC26bNOBOM HT25TPC26bNOBOM HT26TPC26bNOBOM HT26TPC26bNOBOM

HT28TPC26bNOBOM HT28TPC26bNOBOM HT29TPC26bNOBOM HT29TPC26bNOBOM

HT95TPC26b

NOBOM

+1P1V_V TT

12

NI

HR32

HR32 51

51

PROC_PW RGD_AH36 PROC_PW RGD_AH35

12

I

HR8

HR8 665

665

1%

GND

PCH_PEC I HIERR# PROCHOT #

MCP_COM P2 MCP_COM P3

MCP_SM_ RCOMP0 MCP_SM_ RCOMP1 MCP_SM_ RCOMP2

MCP_NOR TH_COMP MCP_SOU TH_COMP

TP_GFX_ DPRSLPVR

1

1 1

1 1 1 1 1

1 1

CPU_BCL K1# CPU_BCL K1

TDO_TDI_M

1

H_CPURS T

12

I

HC20

0.1UF/16V

X7R 10%

GND

H_CFG0 H_CFG1 H_CFG2 H_CFG3 H_CFG4 H_CFG5 CFG6 CFG7 TP_CFG8 TP_CFG9

TP_CFG1 0 TP_CFG1 1 TP_CFG1 2 TP_CFG1 3 TP_CFG1 4 CFG15 TP_CFG1 6 TP_CFG1 7

AA7 AA6

AA3 AA4

AA8

AF37 AF38

AH36 AH35

AF34 AG37 AH37

AG35 AG39 AH34

AF35 AH39

AB5 AB4 B11 C11

AG1 AD1 AE1

AF2

AF36

AK38

E10

H10

G12 H12

K10

K12

Y8

J10

E8

G8

F10

H9 E9 F9

K8

J12

L8 K9

H7

L11

I

HU1E

BCLK[0] BCLK[0]#

PEG_CLK PEG_CLK#

BCLK[1]# BCLK[1]

TDI_M TDO_M

VCCPWRGOOD_1 VCCPWRGOOD_0 RSTIN# VTTPWRGOOD SM_DRAMPWROK

PECI CATERR# PROCHOT# THERMTRIP# PM_SYNC

PM_EXT_TS[0]# PM_EXT_TS[1]# COMP2 COMP3

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

COMP1 COMP0

SKTOCC#

GFX_DPRSLPVR

CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9]

CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15] CFG[16] CFG[17]

MISC

3

VID[0]/MSID[0] VID[1]/MSID[1] VID[2]/MSID[2]

VID[3]/CSC[0] VID[4]/CSC[1] VID[5]/CSC[2]

VID[6] VID[7]

PSI#

GFX_VID[0] GFX_VID[1] GFX_VID[2] GFX_VID[3] GFX_VID[4] GFX_VID[5] GFX_VID[6]

GFX_VR_EN

GFX_IMON

FC_AE38

VTT_SELECT

FC_AG40

VCC_SENSE

VSS_SENSE

VTT_SENSE

VSS_SENSE_VTT

VAXG_SENSE

VSSAXG_SENSE

ISENSE

TCK

TDO TMS

TRST#

BCLK_ITP#

BCLK_ITP

PRDY# PREQ#

DBR#

TAPPWRGOOD

RESET_OBS#

BPM[0]# BPM[1]# BPM[2]# BPM[3]# BPM[4]# BPM[5]# BPM[6]# BPM[7]#

2

VRM_VID0

U40

VRM_VID1

U39

VRM_VID2

U38

VRM_VID3

U37

VRM_VID4

U36

VRM_VID5

U35

VRM_VID6

U34

VRM_VID7

U33 AG38

GFX_VID0

G10

GFX_VID1

B12

GFX_VID2

E12

GFX_VID3

E11

GFX_VID4

C12

GFX_VID5

G11

GFX_VID6

J11 F12

GFX_IMON

F6

TP_CPU_ AE38

AE38 AF39

TP_CPU_ AG40

AG40

T35 T34

AE35 AE36

A13 B13

T40

AN37 AM37

TDI

AM38 AN40 AM39

AK40 AK39

AJ38 AK37 AL40 AK34 AL39

AL33 AL32 AK33 AK32 AM31 AL30 AK30 AK31

NOTE:

Lynnfield --> NI HR105/HR107

I

I I

I

IPMIP-GS Add HR105 and HR107

+1P1V_V TT

BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5 BPM#6 BPM#7

1

HR105 0

1 2

HR107 0

1 2

+1P1V_V TT+1P1V _VTT

12

NI

I

HR38

HR39

51

+1P1V_V TT+1P1V_V TT

12

NI

HR35

HR35 51

51

1 1 1 1 1 1 1 1

VRM_VID[0..7] 9,5 9

GFX_VID[0..6] 9

HT9 TP C26b NOBOMHT9 TP C26b NOBOM

HT12 TPC26b NOBOMH T12 TPC 26b NOBOM

NI HR36,38,40 ( CRB1.1 page.102 )

12

NI

HR40

NOTE:

51

PLACE TCK, TDI, TMS RESISTOR C LOSE TO CPU SOC KET

NI

HR34

HR34 51

51

HT11 TPC26b NOBOMH T11 TPC 26b NOBOM HT16 TPC26b NOBOMH T16 TPC 26b NOBOM HT20 TPC26b NOBOMH T20 TPC 26b NOBOM HT89 TPC26b NOBOMH T89 TPC 26b NOBOM HT90 TPC26b NOBOMH T90 TPC 26b NOBOM HT91 TPC26b NOBOMH T91 TPC 26b NOBOM HT92 TPC26b NOBOMH T92 TPC 26b NOBOM HT93 TPC26b NOBOMH T93 TPC 26b NOBOM

12

NI

HR36

HR36 51

51

GND GND

VRM_PSI# 59

GFX_VR_ EN 62

VTT_SEL ECT 64

VCC_SEN SE_A 59 VSS_SEN SE_A 59

VCCVTT_ SENSE_A 64 VSSVTT_ SENSE_A 64

VCCAXG_ SENSE_A 62 VSSAXG_ SENSE_A 62

MCP_ISENS E_A 59

12

I

HR37

HR37 51

51

CK_ITP# 57 CK_ITP 57

H_PRDY# 57 H_PREQ# 57 SYS_RESET # 8,22,52,57 H_TAPPW RGOOD 57 H_RSTOU T# 5 7

HR3

TCK 57 TDI 5 7 TDO 57 TMS 57 TRST# 57

Pin AJ38: PRDY# CRB V1.1 , page.6 (Reserved pull-up for PRDY#) PDG V1.0 , page.70(System Pull-up required)

Pin AL39: RESET_OBS# CRB V1.1 , page.6 (Reserved pull-up for RESET_OBS#) PDG V1.0 , page.393(System Pull-up required)

12

0H R3

0

NOBOM

1

GND

Rev 1.2

SOCKET_ 1156P

5

4

3

2

PEGATRON DT-MB RESTRICTED SECRET

CPU 1160 + MEMORY - 4

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

IPMIP-DP

Engineer:

Vic_Chen

13 68Wednesd ay, April 07, 2010

1

13 68Wednesd ay, April 07, 2010

Rev

1.01

5

I

HU1F

CPU POWER

A38

VCC_NCTF1

C40

VCC_NCTF2

D D

C C

B B

A A

5

A23

VCC1

A24

VCC2

A26

VCC3

A27

VCC4

A33

VCC5

A35

VCC6

A36

VCC7

B23

VCC8

B25

VCC9

B26

VCC10

B28

VCC11

B29

VCC12

B31

VCC13

B32

VCC14

B34

VCC15

B35

VCC16

B37

VCC17

B38

VCC18

C23

VCC19

C24

VCC20

C25

VCC21

C27

VCC22

C28

VCC23

C30

VCC24

C31

VCC25

C33

VCC26

C34

VCC27

C36

VCC28

C37

VCC29

C39

VCC30

D23

VCC31

D24

VCC32

D26

VCC33

D27

VCC34

D29

VCC35

D30

VCC36

D32

VCC37

D33

VCC38

D35

VCC39

D36

VCC40

D38

VCC41

D39

VCC42

E22

VCC43

E23

VCC44

E25

VCC45

E26

VCC46

E28

VCC47

E29

VCC48

E31

VCC49

E32

VCC50

E34

VCC51

E35

VCC52

E37

VCC53

E38

VCC54

E40

VCC55

F21

VCC56

F22

VCC57

F24

VCC58

F25

VCC59

F27

VCC60

F28

VCC61

F30

VCC62

F31

VCC63

F33

VCC64

F34

VCC65

F36

VCC66

F37

VCC67

F39

VCC68

F40

VCC69

G20

VCC70

G21

VCC71

G23

VCC72

G24

VCC73

G26

VCC74

G27

VCC75

G29

VCC76

G30

VCC77

G32

VCC78

G33

VCC79

G35

VCC80

G36

VCC81

G38

VCC82

G39

VCC83

H19

VCC84

H20

VCC85

H22

VCC86

H23

VCC87

H25

VCC88

R39

VCC181

R40

VCC182

SOCKET_ 1156P

VCC89 VCC90 VCC91 VCC92 VCC93 VCC94 VCC95 VCC96 VCC97 VCC98

VCC99 VCC100 VCC101 VCC102 VCC103 VCC104 VCC105 VCC106 VCC107 VCC108 VCC109 VCC110 VCC111 VCC112 VCC113 VCC114 VCC115 VCC116 VCC117 VCC118 VCC119 VCC120 VCC121 VCC122 VCC123 VCC124 VCC125 VCC126 VCC127 VCC128 VCC129 VCC130 VCC131 VCC132 VCC133 VCC134 VCC135 VCC136 VCC137 VCC138 VCC139 VCC140 VCC141 VCC142 VCC143 VCC144 VCC145 VCC146 VCC147 VCC148 VCC149 VCC150 VCC151 VCC152 VCC153 VCC154 VCC155 VCC156 VCC157 VCC158 VCC159 VCC160 VCC161 VCC162 VCC163 VCC164 VCC165 VCC166 VCC167 VCC168 VCC169 VCC170 VCC171 VCC172 VCC173 VCC174 VCC175 VCC176 VCC177 VCC178 VCC179 VCC180

Rev 1.2

H26 H28 H29 H31 H32 H34 H35 H37 H38 H40 J18 J19 J21 J22 J24 J25 J27 J28 J30 J31 J33 J34 J36 J37 J39 J40 K17 K18 K20 K21 K23 K24 K26 K27 K29 K30 K32 K33 K35 K36 K38 K39 L17 L19 L20 L22 L23 L25 L26 L28 L29 L31 L32 L34 L35 L37 L38 L40 M17 M19 M21 M22 M24 M25 M27 M28 M30 M33 M34 M36 M37 M39 M40 N33 N35 N36 N38 N39 P33 P34 P35 P36 P37 P38 P39 P40 R33 R34 R35 R36 R37 R38

4

+1P1V_V TT+VCORE+VCORE +V_AXG+1P1V_V TT +1P5V_D UAL

AA33 AA34 AA35 AA36 AA37 AA38 AC33 AC34 AC35 AC36 AC37 AC38 AC39 AC40 AD33 AD34 AD35 AD36 AD37 AD38 AD39 AD40 AE33 AE34 AE39 AE40

AF33

AG33

AJ31 AJ32

V33 V34 V35 V36 V37 V38 V39 V40 Y33 Y34 Y35 Y36 Y37

Y38 AJ21 AJ25 AJ27 AJ29

AK20 AK21

AL20 AL21

AC8

AE8 AJ17 AJ19

AK19

AC5 AJ23

I

HU1G

CPU POWER

VTT1 VTT2 VTT3 VTT4 VTT5 VTT6 VTT7 VTT8 VTT9 VTT10 VTT11 VTT12 VTT13 VTT14 VTT15 VTT16 VTT17 VTT18 VTT19 VTT20 VTT21 VTT22 VTT23 VTT24 VTT25 VTT26 VTT27 VTT28 VTT29 VTT30 VTT31 VTT32 VTT33 VTT34 VTT35 VTT36 VTT37 VTT38 VTT39 VTT40 VTT41 VTT42 VTT43 VTT44 VTT45 VTT46 VTT47 VTT48 VTT49 VTT50 VTT51 VTT52 VTT53 VTT54 VTT55 VTT56 VTT57 VTT58 VTT59

SOCKET_ 1156P

3

VCCPLL1 VCCPLL2 VCCPLL3

Rev 1.2

VTT60 VTT61 VTT62 VTT63 VTT64 VTT78 VTT65 VTT66 VTT67 VTT68 VTT69 VTT70 VTT71 VTT72 VTT73 VTT74 VTT75 VTT76 VTT77

T6 T7 T8 V7 V8 AB7 V6 W1 W6 L10 M10 M11 M9 N7 P6 P7 P8 T2 V2

+1P8V_S FR

AF7 AF8 AG8

Check PDG 0.7 & CPU EDS REV.0 .7 Ch6.12 POWER SI GNALS

12

GND

I

HCB2

HCB2 1UF/16V

1UF/16V

X7R 10%

X7R 10% mx_c0603

mx_c0603

GND

12

NI

HR117

HR117 0

0

mx_r0603

I

HU1H

A14 A15 A17 A18 B14 B15 B17 B18 C14 C15 C17 C18 C20 C21 D14 D15 D17 D18 D20 D21 E14 E15 E17 E18 E20 F14 F15 F17 F18 F19 G14 G15 G17 G18 H14 H15 H17

J14 J15

J16 K14 K15 K16 L14 L15 L16

M14 M15 M16

SOCKET_ 1156P

2

MCH POWER

VAXG1 VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36 VAXG37 VAXG38 VAXG39 VAXG40 VAXG41 VAXG42 VAXG43 VAXG44 VAXG45 VAXG46 VAXG47 VAXG48 VAXG49

NOTE:

HR117 FOR Lynnfield Only

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8

VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 VDDQ19

Rev 1.2

AJ11 AJ13 AJ15 AT18 AT21 AT10 AU11 AV13 AV16 AV19 AV22 AV25 AV28 AW9 AY11 AY14 AY17 AY23 AY26

12

GND

I

HCB1

HCB1 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% mx_c0805

mx_c0805

12

GND

1

I

HCB3

HCB3 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% mx_c0805

mx_c0805

PEGATRON DT-MB RESTRICTED SECRET

CPU 1160 + MEMORY - 5

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

4

3

2

Date: Sheet of

IPMIP-DP

Engineer:

Vic_Chen

14 68Tuesday, March 23, 2 010

1

14 68Tuesday, March 23, 2 010

Rev

1.01

5

I

HU1I

A16

VSS1

A25

VSS2

A28

VSS3

A34

VSS4

D D

C C

B B

A A

A37

VSS5

AA5

VSS6

AB3

VSS7

AB33

VSS8

AB34

VSS9

AB35

VSS10

AB36

VSS11

AB37

VSS12

AB38

VSS13

AB39

VSS14

AB40

VSS15

AB6

VSS16

AB8

VSS17

AC1

VSS18

AD5

VSS19

AD8

VSS20

AE3

VSS21

AE37

VSS22

AE7

VSS23

AF1

VSS24

AF40

VSS25

AF6

VSS26

AG34

VSS27

AG36

VSS28

AN9

VSS276

AG7

VSS30

AH3

VSS31

AH33

VSS32

AH38

VSS33

AJ1

VSS34

AJ12

VSS35

AJ14

VSS36

AJ16

VSS37

AJ18

VSS38

AJ20

VSS39

AJ22

VSS40

AJ24

VSS41

AJ26

VSS42

AJ28

VSS43

AJ30

VSS44

AJ33

VSS45

AJ34

VSS46

AJ40

VSS47

AJ6

VSS48

AJ9

VSS49

AK10

VSS50

AK17

VSS51

AK36

VSS52

AK5

VSS53

AK8

VSS54

AL11

VSS55

AL13

VSS56

AL16

VSS57

AL19

VSS58

AL22

VSS59

AL25

VSS60

AL28

VSS61

AL3

VSS62

AL31

VSS63

AL34

VSS64

AL38

VSS65

AL7

VSS66

AM1

VSS67

AM40

VSS68

AK4

VSS277

AN13

VSS70

AN20

VSS71

AN22

VSS72

AN25

VSS73

AN28

VSS74

AN31

VSS75

AN4

VSS278

AN36

VSS77

AP4

VSS279

AT8

VSS280

AP12

VSS80

AP15

VSS81

AP16

VSS82

AP17

VSS83

AP20

VSS84

AP24

VSS85

AP26

VSS86

AP27

VSS87

AP29

VSS88

AR30

VSS282

AT34

VSS283

AU6

GND GND GND

5

GND

VSS286

SOCKET_ 1156P

VSS91 VSS92

VSS281

VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS284 VSS287 VSS288 VSS110 VSS111 VSS289 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS285

Rev 1.2

AP33 AP38 AU7 AP7 AP9 AR1 AR20 AR23 AR40 AT12 AT14 AT16 AT2 AT24 AT27 AT30 AH5 AM9 AT37 AT5 AU32 AP35 AV3 AV31 AV34 AV38 AU36 AY33 AY36 AY4 AY7 B16 B24 B27 B30 B33 B36 B7 B9 C13 C16 C19 C22 C26 C29 C32 C35 C38 C5 D10 D12 D13 D16 D19 D22 D25 D28 D31 D34 D37 D4 D40 D5 D6 D8 E13 E16 E19 E21 E24 E27 E3 E30 E33 E36 E39 E4 F11 F13 F16 F2 F20 F23 F26 F29 F32 F35 F38 F8 G13 AM5

4

I

HU1J

G16

VSS181

G19

VSS182

G22

VSS183

G25

VSS184

G28

VSS185

G31

VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233 VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270

CGC_TP_NCTF

SA_DIMM_VR SB_DIMM_VR

RSVD_NCTF11

RSVD_NCTF7 RSVD_NCTF8 RSVD_NCTF3 RSVD_NCTF4 RSVD_NCTF9

RSVD_NCTF10

RSVD_NCTF5 RSVD_NCTF6

RSVD_NCTF1 RSVD_NCTF2

GND

G34 G37

G4

G40

G9 H11 H13 H16 H18

H2 H21 H24 H27 H30 H33 H36 H39

H5

H6

J13 J17 J20 J23 J26 J29 J32 J35 J38

J4 J7

J9 K11 K13 K19

K2 K22 K25 K28 K31 K34 K37 K40

K5

K6 L13 L18 L21 L24 L27 L30 L33 L36 L39

L4

L9 M13 M18

M2 M20 M23 M26 M29 M32 M35 M38

M5

M6

M7 N34 N37

N4 N40

P2

P5

R4

T33 T36 T37 T38

T5 U4 V5

W33 W34

SOCKET_ 1156P

4

VSS271 VSS272 VSS273 VSS274 VSS275

RSVD44

RSVD47 RSVD48

RSVD52 RSVD53

RSVD1 RSVD2 RSVD3 RSVD4

RSVD30 RSVD31 RSVD32 RSVD33 RSVD34 RSVD35 RSVD36 RSVD37 RSVD38 RSVD39 RSVD40 RSVD41 RSVD42

RSVD43

RSVD25 RSVD24

RSVD11 RSVD10 RSVD13 RSVD12

VSS

RSVD21 RSVD22

RSVD7

RSVD8 RSVD26 RSVD27

RSVD28 RSVD29

RSVD5

RSVD6 RSVD14 RSVD15

RSVD_TP

NP_NC1 NP_NC2 NP_NC3

NP_NC4 NP_NC5 NP_NC6 NP_NC7

Rev 1.2

W35 W36 W37 W38 Y7 B39

A12

AD2 AE2 AF3 AG3

AH40 AJ39

AM14 AM13 AK15 AK16

AM25 AL29 AM30 AK29 AK28 AM29 AM28 AL27 AK27 AM26 AM27 AL26 AK26

AK25

L12 M12

AM21 AM20 AM19 AM18 T39

AL18 AK18

AM15 AM16 AL15 AL14

AL17 AM17 AK14 AK13 AL12 AK12 AN11

AY3

C2 D1 AY37 AW38 AV1 AW2 AV39 AU40

A4 B3

1 2 3

4 5 6 7

TP_CPU_ B39

CPU_DIMMA _VREF_AF3 CPU_DIMMB _VREF_AG3

TP_CPU_ AY3

TP_CPU_ C2 TP_CPU_ D1 TP_CPU_ AY37 TP_CPU_ AW38 TP_CPU_ AV1 TP_CPU_ AW2 TP_CPU_ AV39 TP_CPU_ AU40

TP_CPU_ A4 TP_CPU_ B3

3

HT87 TPC26b NOBOMH T87 TPC 26b NOBOM

1

GND

1 2

I

1 2

I

HR270IHR270 HR800IHR800

IHR27 HR80 Change to I for QS CPU

NOTE:

QSNIProduction

ES2Lynnfield

HR27

HT13 TPC26b NOBOMH T13 TPC 26b NOBOM

1

HT14 TPC26b NOBOMH T14 TPC 26b NOBOM

1

HT15 TPC26b NOBOMH T15 TPC 26b NOBOM

1

HT17 TPC26b NOBOMH T17 TPC 26b NOBOM

1

HT18 TPC26b NOBOMH T18 TPC 26b NOBOM

1

HT19 TPC26b NOBOMH T19 TPC 26b NOBOM

1

HT22 TPC26b NOBOMH T22 TPC 26b NOBOM

1

HT23 TPC26b NOBOMH T23 TPC 26b NOBOM

1

HT27 TPC26b NOBOMH T27 TPC 26b NOBOM

1

HT30 TPC26b NOBOMH T30 TPC 26b NOBOM

1

HT31 TPC26b NOBOMH T31 TPC 26b NOBOM

1

3

NI

I I

IHR80

GND

I

2

DIMM_VREF _A 16,18 DIMM_VREF _B 17,18

2

1

ILM1

INTEL LGA1156 SOCKET ILM

SOCKET1 156_ILM

I

BACKPLATE1

INTEL LGA 1156P BACK PLATE,3 SCREW

PT44P11 -6401

I

PEGATRON DT-MB RESTRICTED SECRET

CPU 1160 + MEMORY - 6

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

IPMIP-DP

Engineer:

1

Vic_Chen

15 68Wednesd ay, April 07, 2010

Rev

1.01

5

NOTE:

Below 4 signals are different connection in Eaglelake DDR3 platform Channel A : CS1/WE/MA0 Channel B : ODT3

XMM1 COLOR: BLUE XMM2 COLOR: BLACK

D D

M_CHA_M AA0 M_CHA_M AA1 M_CHA_M AA2 M_CHA_M AA3 M_CHA_M AA4 M_CHA_M AA5 M_CHA_M AA6 M_CHA_M AA7 M_CHA_M AA8 M_CHA_M AA9

M_CHA_M AA11 M_CHA_M AA12 M_CHA_M AA13

NOTE:

Check clock source if CPU implemented

M_CHA_C LK110 M_CHA_C LK1#10 M_CHA_C LK010 M_CHA_C LK0#10

C C

M_CHA_C S#110 M_CHA_C S#010

M_CHA_C KE110 M_CHA_C KE010

M_CHA_B A210 M_CHA_B A110 M_CHA_B A010

SMB_DAT A_M8,17,4 9,57 SMB_CLK _M8,17,49,57

MA_ECC_ CB[0..7]10

NOTE:

For ECC DIMM

B B

A A

M_CHA_W E#1 0 M_CHA_R AS#10 M_CHA_C AS#10

M_CHA_O DT110 M_CHA_O DT010

DDR3_DR AMRST#10,17

M_CHA_D M710

M_CHA_D M610

M_CHA_D M510

M_CHA_D M410

M_CHA_D M310

M_CHA_D M210

M_CHA_D M110

M_CHA_D M010

M_CHA_D QS810 M_CHA_D QS8#10

M_CHA_M AA14 M_CHA_M AA14

MA_ECC_ CB7 MA_ECC_ CB6 MA_ECC_ CB5 MA_ECC_ CB4 MA_ECC_ CB3 MA_ECC_ CB2 MA_ECC_ CB1 MA_ECC_ CB0

GND

NOTE:

For ECC DIMM

GND GND

5

188

A0

181

A1

61

A2

180

A3

59

A4

58

A5

178

A6

56

A7

177

A8

175

A9

70

A10/AP

55

A11

174

A12

196

A13

172

A14

171

A15

63

CK1P/NU

64

CK1N/NU

184

CK0P

185

CK0N

76

CS1#

193

CS0#

169

CKE1

50

CKE0

52

BA2

190

BA1

71

BA0

238

SDA

118

SCL

165

CB7

164

CB6

159

CB5

158

CB4

46

CB3

45

CB2

40

CB1

39

CB0

237

SA1

117

SA0

73

WE#

192

RAS#

74

CAS#

77

ODT1

195

ODT0

168

RESET#

161

DM8/DQS17P

162

NC/DQS17N

230

DM7/DQS16P

231

NC/DQS16N

221

DM6/DQS15P

222

NC/DQS15N

212

DM5/DQS14P

213

NC/DQS14N

203

DM4/DQS13P

204

NC/DQS13N

152

DM3/DQS12P

153

NC/DQS12N

143

DM2/DQS11P

144

NC/DQS11N

134

DM1/DQS10P

135

NC/DQS10N

125

DM0/DQS9P

126

NC/DQS9N

43

NC/DQS8P

42

NC/DQS8N

198

FREE1

187

FREE2

49

FREE3

48

FREE4

DDR3_DIMM _240P

I

XMM1A

RESERVED

NC/PAR_IN

NC/ERR_OUT

DQ63 DQ62 DQ61 DQ60 DQ59 DQ58 DQ57 DQ56 DQ55 DQ54 DQ53 DQ52 DQ51 DQ50 DQ49 DQ48 DQ47 DQ46 DQ45 DQ44 DQ43 DQ42 DQ41 DQ40 DQ39 DQ38 DQ37 DQ36 DQ35 DQ34 DQ33 DQ32 DQ31 DQ30 DQ29 DQ28 DQ27 DQ26 DQ25 DQ24 DQ23 DQ22 DQ21 DQ20 DQ19 DQ18 DQ17 DQ16 DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

DQS7P DQS7N DQS6P DQS6N DQS5P DQS5N DQS4P DQS4N DQS3P DQS3N DQS2P DQS2N DQS1P DQS1N DQS0P DQS0N

NC/TEST4

M_CHA_D Q63

234

M_CHA_D Q62

233

M_CHA_D Q61

228

M_CHA_D Q60

227

M_CHA_D Q59

115

M_CHA_D Q58

114

M_CHA_D Q57

109

M_CHA_D Q56

108

M_CHA_D Q55

225

M_CHA_D Q54

224

M_CHA_D Q53M_CHA_M AA10

219

M_CHA_D Q52

218

M_CHA_D Q51

106

M_CHA_D Q50

105

M_CHA_D Q49

100

M_CHA_D Q48

99

M_CHA_D Q47

216

M_CHA_D Q46

215

M_CHA_D Q45

210

M_CHA_D Q44

209

M_CHA_D Q43

97

M_CHA_D Q42

96

M_CHA_D Q41

91

M_CHA_D Q40

90

M_CHA_D Q39

207

M_CHA_D Q38

206

M_CHA_D Q37

201

M_CHA_D Q36

200

M_CHA_D Q35

88

M_CHA_D Q34

87

M_CHA_D Q33

82

M_CHA_D Q32

81

M_CHA_D Q31

156

M_CHA_D Q30

155

M_CHA_D Q29

150

M_CHA_D Q28

149

M_CHA_D Q27

37

M_CHA_D Q26

36

M_CHA_D Q25

31

M_CHA_D Q24

30

M_CHA_D Q23

147

M_CHA_D Q22

146

M_CHA_D Q21

141

M_CHA_D Q20

140

M_CHA_D Q19

28

M_CHA_D Q18

27

M_CHA_D Q17 M_CHA_D Q17

22

M_CHA_D Q16

21

M_CHA_D Q15

138

M_CHA_D Q14

137

M_CHA_D Q13

132

M_CHA_D Q12

131

M_CHA_D Q11

19

M_CHA_D Q10

18

M_CHA_D Q9

13

M_CHA_D Q8

12

M_CHA_D Q7

129

M_CHA_D Q6

128

M_CHA_D Q5

123

M_CHA_D Q4

122

M_CHA_D Q3

10

M_CHA_D Q2

9

M_CHA_D Q1

4

M_CHA_D Q0

3

112 111 103 102 94 93 85 84 34 33 25 24 16 15 7 6

79

68 53 167

4

M_CHA_D QS7 10 M_CHA_D QS7# 10 M_CHA_D QS6 10 M_CHA_D QS6# 10 M_CHA_D QS5 10 M_CHA_D QS5# 10 M_CHA_D QS4 10 M_CHA_D QS4# 10 M_CHA_D QS3 10 M_CHA_D QS3# 10 M_CHA_D QS2 10 M_CHA_D QS2# 10 M_CHA_D QS1 10 M_CHA_D QS1# 10 M_CHA_D QS0 10 M_CHA_D QS0# 10

4

M_CHA_M AA0 M_CHA_M AA1 M_CHA_M AA2 M_CHA_M AA3 M_CHA_M AA4 M_CHA_M AA5 M_CHA_M AA6 M_CHA_M AA7 M_CHA_D Q56 M_CHA_M AA8 M_CHA_M AA9 M_CHA_M AA10 M_CHA_M AA11 M_CHA_M AA12

NOTE:

Check clock source if CPU implemented

M_CHA_C LK310 M_CHA_C LK3#10 M_CHA_C LK210 M_CHA_C LK2#10

M_CHA_C S#31 0 M_CHA_C S#21 0

M_CHA_C KE310 M_CHA_C KE210

M_CHA_B A210 M_CHA_B A110 M_CHA_B A010

SMB_DAT A_M8,17,4 9,57 SMB_CLK _M8,17,49,57

MA_ECC_ CB[0..7]10

NOTE:

For ECC DIMM

M_CHA_W E#1 0 M_CHA_R AS#10 M_CHA_C AS#10

M_CHA_O DT310 M_CHA_O DT210

DDR3_DR AMRST#10,17

M_CHA_D M710

M_CHA_D M610

M_CHA_D M510

M_CHA_D M410

M_CHA_D M310

M_CHA_D M210

M_CHA_D M110

M_CHA_D M010

M_CHA_D QS810 M_CHA_D QS8#10

M_CHA_M AA13

M_CHA_M AA15M_CHA_M AA15

MA_ECC_ CB7 MA_ECC_ CB6 MA_ECC_ CB5 MA_ECC_ CB4 MA_ECC_ CB3 MA_ECC_ CB2 MA_ECC_ CB1 MA_ECC_ CB0

+3P3V

NOTE:

For ECC DIMM

GND

188

A0

181

A1

61

A2

180

A3

59

A4

58

A5

178

A6

56

A7

177

A8

175

A9

70

A10/AP

55

A11

174

A12

196

A13

172

A14

171

A15

63

CK1P/NU

64

CK1N/NU

184

CK0P

185

CK0N

76

CS1#

193

CS0#

169

CKE1

50

CKE0

52

BA2

190

BA1

71

BA0

238

SDA

118

SCL

165

CB7

164

CB6

159

CB5

158

CB4

46

CB3

45

CB2

40

CB1

39

CB0

237

SA1

117

SA0

73

WE#

192

RAS#

74

CAS#

77

ODT1

195

ODT0

168

RESET#

161

DM8/DQS17P

162

NC/DQS17N

230

DM7/DQS16P

231

NC/DQS16N

221

DM6/DQS15P

222

NC/DQS15N

212

DM5/DQS14P

213

NC/DQS14N

203

DM4/DQS13P

204

NC/DQS13N

152

DM3/DQS12P

153

NC/DQS12N

143

DM2/DQS11P

144

NC/DQS11N

134

DM1/DQS10P

135

NC/DQS10N

125

DM0/DQS9P

126

NC/DQS9N

43

NC/DQS8P

42

NC/DQS8N

198

FREE1

187

FREE2

49

FREE3

48

FREE4

DDR3_DIMM _240P

I

3

XMM2A

RESERVED

NC/PAR_IN

NC/ERR_OUT

3

DQ63 DQ62 DQ61 DQ60 DQ59 DQ58 DQ57 DQ56 DQ55 DQ54 DQ53 DQ52 DQ51 DQ50 DQ49 DQ48 DQ47 DQ46 DQ45 DQ44 DQ43 DQ42 DQ41 DQ40 DQ39 DQ38 DQ37 DQ36 DQ35 DQ34 DQ33 DQ32 DQ31 DQ30 DQ29 DQ28 DQ27 DQ26 DQ25 DQ24 DQ23 DQ22 DQ21 DQ20 DQ19 DQ18 DQ17 DQ16 DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

DQS7P DQS7N DQS6P DQS6N DQS5P DQS5N DQS4P DQS4N DQS3P DQS3N DQS2P DQS2N DQS1P DQS1N DQS0P DQS0N

NC/TEST4

234 233 228 227 115 114 109 108 225 224 219 218 106 105 100 99 216 215 210 209 97 96 91 90 207 206 201 200 88 87 82 81 156 155 150 149 37 36 31 30 147 146 141 140 28 27 22 21 138 137 132 131 19 18 13 12 129 128 123 122 10 9 4 3

112 111 103 102 94 93 85 84 34 33 25 24 16 15 7 6

79

68 53 167

M_CHA_D Q63 M_CHA_D Q62 M_CHA_D Q61 M_CHA_D Q60 M_CHA_D Q59 M_CHA_D Q58 M_CHA_D Q57

M_CHA_D Q55 M_CHA_D Q54 M_CHA_D Q53 M_CHA_D Q52 M_CHA_D Q51 M_CHA_D Q50 M_CHA_D Q49 M_CHA_D Q48 M_CHA_D Q47 M_CHA_D Q46 M_CHA_D Q45 M_CHA_D Q44 M_CHA_D Q43 M_CHA_D Q42 M_CHA_D Q41 M_CHA_D Q40 M_CHA_D Q39 M_CHA_D Q38 M_CHA_D Q37 M_CHA_D Q36 M_CHA_D Q35 M_CHA_D Q34 M_CHA_D Q33 M_CHA_D Q32 M_CHA_D Q31 M_CHA_D Q30 M_CHA_D Q29 M_CHA_D Q28 M_CHA_D Q27 M_CHA_D Q26 M_CHA_D Q25 M_CHA_D Q24 M_CHA_D Q23 M_CHA_D Q22 M_CHA_D Q21 M_CHA_D Q20 M_CHA_D Q19 M_CHA_D Q18

M_CHA_D Q16 M_CHA_D Q15 M_CHA_D Q14 M_CHA_D Q13 M_CHA_D Q12 M_CHA_D Q11 M_CHA_D Q10 M_CHA_D Q9 M_CHA_D Q8 M_CHA_D Q7 M_CHA_D Q6 M_CHA_D Q5 M_CHA_D Q4 M_CHA_D Q3 M_CHA_D Q2 M_CHA_D Q1 M_CHA_D Q0

M_CHA_D QS7 10 M_CHA_D QS7# 10 M_CHA_D QS6 10 M_CHA_D QS6# 10 M_CHA_D QS5 10 M_CHA_D QS5# 10 M_CHA_D QS4 10 M_CHA_D QS4# 10 M_CHA_D QS3 10 M_CHA_D QS3# 10 M_CHA_D QS2 10 M_CHA_D QS2# 10 M_CHA_D QS1 10 M_CHA_D QS1# 10 M_CHA_D QS0 10 M_CHA_D QS0# 10

DIMM_VREF _A15,18

+1P5V_D UAL

12

M_CHA_D Q[0..63] 10

M_CHA_M AA[0..15] 10

+SM_VTT

GND

+SM_VTT

GND

+1P5V_D UAL

12

I

D3R1

D3R2

1K

1%

12

I

D3R3

D3R4

1K

1%

GND

2

12

I

D3CB1

4.7UF/6.3V

X5R 10%

X5R 10% mx_c0805

mx_c0805

12

I

D3CB3

0.1UF/16V

X7R 10%

12

I

D3CB5

4.7UF/6.3V

X5R 10%

X5R 10% mx_c0805

mx_c0805

GND

2

12

GNDGND

12

GND

12

GND

D3CB7

2.2UF/10V

X5R 10%

X5R 10% I

I

D3CB2

0.1UF/16V

X7R 10%

GND

DIMM_CA_V REF_A

DIMM_VREF _A

I

D3CB4

0.1UF/16V

X7R 10%

I

D3CB6

0.1UF/16V

X7R 10%

GND

DIMM_CA_V REF_ADIMM_CA_V REF_A

DIMM_VREF _ADIMM_VREF _A

12

D3CB8

D3CB8 1UF/6.3V

1UF/6.3V

X5R 10%

X5R 10% I

I

GNDGND

1

XMM1B

78

VDD10

75

VDD9

72

VDD8

69

VDD7

66

VDD6

65

VDD5

62

VDD4

60

VDD3

57

VDD2

54

VDD1

51

VDD0

240

VTT2

120

VTT1

113

GND27

110

GND26

107

GND25

104

GND24

101

GND23

98

GND22

95

GND21

92

GND20

89

GND19

86

GND18

83

GND17

80

GND16

47

GND15

44

GND14

41

GND13

38

GND12

35

GND11

32

GND10

29

GND9

26

GND8

23

GND7

20

GND6

17

GND5

14

GND4

11

GND3

8

GND2

5

GND1

2

GND0

67

VREFCA

1

VREFDQ

DDR3_DIMM _240P

I

XMM2B

78

VDD10

75

VDD9

72

VDD8

69

VDD7

66

VDD6

65

VDD5

62

VDD4

60

VDD3

57

VDD2

54

VDD1

51

VDD0

240

VTT2

120

VTT1

113

GND27

110

GND26

107

GND25

104

GND24

101

GND23

98

GND22

95

GND21

92

GND20

89

GND19

86

GND18

83

GND17

80

GND16

47

GND15

44

GND14

41

GND13

38

GND12

35

GND11

32

GND10

29

GND9

26

GND8

23

GND7

20

GND6

17

GND5

14

GND4

11

GND3

8

GND2

5

GND1

2

GND0

67

VREFCA

1

VREFDQ

DDR3_DIMM _240P

I

PEGATRON DT-MB RESTRICTED SECRET

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

VDD21 VDD20 VDD19 VDD18 VDD17 VDD16 VDD15 VDD14 VDD13 VDD12 VDD11 GND59 GND58 GND57 GND56 GND55 GND54 GND53 GND52 GND51 GND50 GND49 GND48 GND47 GND46 GND45 GND44 GND43 GND42 GND41 GND40 GND39 GND38 GND37 GND36 GND35 GND34 GND33 GND32 GND31 GND30 GND29

GND28 NP_NC1 NP_NC2 NP_NC3

VDDSPD

VDD21

VDD20

VDD19

VDD18

VDD17

VDD16

VDD15

VDD14

VDD13

VDD12

VDD11

GND59

GND58

GND57

GND56

GND55

GND54

GND53

GND52

GND51

GND50

GND49

GND48

GND47

GND46

GND45

GND44

GND43

GND42

GND41

GND40

GND39

GND38

GND37

GND36

GND35

GND34

GND33

GND32

GND31

GND30

GND29

GND28 NP_NC1 NP_NC2 NP_NC3

VDDSPD

197 194 191 189 186 183 182 179 176 173 170 239 235 232 229 226 223 220 217 214 211 208 205 202 199 166 163 160 157 154 151 148 145 142 139 136 133 130 127 124 121 119 116 241 242 243 236

Title :

Engineer:

IPMIP-DP

+1P5V_D UAL+1P5V_D UAL

GND

+1P5V_D UAL+1P5V_D UAL

GND

DDR3 CHANNEL A

Vic_Chen

1

16 68Wednesd ay, April 07, 2010

+3P3V

Rev

1.01

5

XMM3 COLOR: BLUE

D D

M_CHB_M AA0 M_CHB_M AA1 M_CHB_M AA2 M_CHB_M AA3 M_CHB_M AA4

M_CHB_M AA6 M_CHB_M AA7 M_CHB_M AA8 M_CHB_M AA9 M_CHB_M AA10 M_CHB_M AA11 M_CHB_M AA12 M_CHB_M AA13

NOTE: NOTE:

Check clock source if CPU implemented

M_CHB_C LK111 M_CHB_C LK1#11 M_CHB_C LK011 M_CHB_C LK211 M_CHB_C LK0#11

C C

M_CHB_C S#111 M_CHB_C S#011

M_CHB_C KE111 M_CHB_C KE011

M_CHB_B A211 M_CHB_B A111 M_CHB_B A011

SMB_DAT A_M8,16,4 9,57

SMB_CLK _M8,16,49,57

MB_ECC_ CB[0..7]11

NOTE:

For ECC DIMM

B B

A A

M_CHB_W E#1 1 M_CHB_R AS#11 M_CHB_C AS#11

M_CHB_O DT111 M_CHB_O DT011

M_CHB_D M711

M_CHB_D M611

M_CHB_D M511

M_CHB_D M411

M_CHB_D M311

M_CHB_D M211

M_CHB_D M111

M_CHB_D M011

M_CHB_D QS811 M_CHB_D QS8#11

M_CHB_M AA14

MB_ECC_ CB7 MB_ECC_ CB6 MB_ECC_ CB5 MB_ECC_ CB4 MB_ECC_ CB3 MB_ECC_ CB2 MB_ECC_ CB1 MB_ECC_ CB0

+3P3V

GND

NOTE:

For ECC DIMM

GND GND

5

188

A0

181

A1

61

A2

180

A3

59

A4

58

A5

178

A6

56

A7

177

A8

175

A9

70

A10/AP

55

A11

174

A12

196

A13

172

A14

171

A15

63

CK1P/NU

64

CK1N/NU

184

CK0P

185

CK0N

76

CS1#

193

CS0#

169

CKE1

50

CKE0

52

BA2

190

BA1

71

BA0

238

SDA

118

SCL

165

CB7

164

CB6

159

CB5

158

CB4

46

CB3

45

CB2

40

CB1

39

CB0

237

SA1

117

SA0

73

WE#

192

RAS#

74

CAS#

77

ODT1

195

ODT0

168

RESET#

161

DM8/DQS17P

162

NC/DQS17N

230

DM7/DQS16P

231

NC/DQS16N

221

DM6/DQS15P

222

NC/DQS15N

212

DM5/DQS14P

213

NC/DQS14N

203

DM4/DQS13P

204

NC/DQS13N

152

DM3/DQS12P

153

NC/DQS12N

143

DM2/DQS11P

144

NC/DQS11N

134

DM1/DQS10P

135

NC/DQS10N

125

DM0/DQS9P

126

NC/DQS9N

43

NC/DQS8P

42

NC/DQS8N

198

FREE1

187

FREE2

49

FREE3

48

FREE4

DDR3_DIMM _240P

I

XMM3A

RESERVED

NC/PAR_IN

NC/ERR_OUT

DQ63 DQ62 DQ61 DQ60 DQ59 DQ58 DQ57 DQ56 DQ55 DQ54 DQ53 DQ52 DQ51 DQ50 DQ49 DQ48 DQ47 DQ46 DQ45 DQ44 DQ43 DQ42 DQ41 DQ40 DQ39 DQ38 DQ37 DQ36 DQ35 DQ34 DQ33 DQ32 DQ31 DQ30 DQ29 DQ28 DQ27 DQ26 DQ25 DQ24 DQ23 DQ22 DQ21 DQ20 DQ19 DQ18 DQ17 DQ16 DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

DQS7P DQS7N DQS6P DQS6N DQS5P DQS5N DQS4P DQS4N DQS3P DQS3N DQS2P DQS2N DQS1P DQS1N DQS0P DQS0N

NC/TEST4

234 233 228 227 115 114 109 108 225 224 219 218 106 105 100 99 216 215 210 209 97 96 91 90 207 206 201 200 88 87 82 81 156 155 150 149 37 36 31 30 147 146 141 140 28 27 22 21 138 137 132 131 19 18 13 12 129 128 123 122 10 9 4 3

112 111 103 102 94 93 85 84 34 33 25 24 16 15 7 6

79

68 53 167

M_CHB_D Q63 M_CHB_D Q62 M_CHB_D Q61 M_CHB_D Q60 M_CHB_D Q59 M_CHB_D Q58 M_CHB_D Q57 M_CHB_D Q56 M_CHB_D Q55 M_CHB_D Q54 M_CHB_D Q53 M_CHB_D Q52 M_CHB_D Q51 M_CHB_D Q50 M_CHB_D Q49 M_CHB_D Q48 M_CHB_D Q47 M_CHB_D Q46 M_CHB_D Q45 M_CHB_D Q44 M_CHB_D Q43 M_CHB_D Q42 M_CHB_D Q41 M_CHB_D Q40 M_CHB_D Q39 M_CHB_D Q38 M_CHB_D Q37 M_CHB_D Q36 M_CHB_D Q35 M_CHB_D Q34 M_CHB_D Q33 M_CHB_D Q32 M_CHB_D Q31 M_CHB_D Q30 M_CHB_D Q29 M_CHB_D Q28 M_CHB_D Q27 M_CHB_D Q26 M_CHB_D Q25 M_CHB_D Q24 M_CHB_D Q23 M_CHB_D Q22 M_CHB_D Q21 M_CHB_D Q20 M_CHB_D Q19 M_CHB_D Q18 M_CHB_D Q17 M_CHB_D Q16 M_CHB_D Q15 M_CHB_D Q14 M_CHB_D Q13 M_CHB_D Q12 M_CHB_D Q11 M_CHB_D Q10 M_CHB_D Q9 M_CHB_D Q8 M_CHB_D Q7 M_CHB_D Q6 M_CHB_D Q5 M_CHB_D Q4 M_CHB_D Q3 M_CHB_D Q2 M_CHB_D Q1 M_CHB_D Q0

4

M_CHB_D QS7 11 M_CHB_D QS7# 11 M_CHB_D QS6 11 M_CHB_D QS6# 11 M_CHB_D QS5 11 M_CHB_D QS5# 11 M_CHB_D QS4 11 M_CHB_D QS4# 11 M_CHB_D QS3 11 M_CHB_D QS3# 11 M_CHB_D QS2 11 M_CHB_D QS2# 11 M_CHB_D QS1 11 M_CHB_D QS1# 11 M_CHB_D QS0 11 M_CHB_D QS0# 11

4

M_CHB_M AA0 M_CHB_M AA1 M_CHB_M AA2 M_CHB_M AA3 M_CHB_M AA4 M_CHB_M AA5M_CHB_M AA5 M_CHB_M AA6 M_CHB_M AA7 M_CHB_M AA8 M_CHB_M AA9 M_CHB_M AA10 M_CHB_M AA11 M_CHB_M AA12 M_CHB_M AA13 M_CHB_M AA14

Check clock source if CPU implemented

M_CHB_C LK311 M_CHB_C LK3#11

M_CHB_C LK2#11

M_CHB_C S#31 1 M_CHB_C S#21 1

M_CHB_C KE311 M_CHB_C KE211

M_CHB_B A211 M_CHB_B A111 M_CHB_B A011

SMB_DAT A_M8,16,4 9,57 SMB_CLK _M8,16,49,57

MB_ECC_ CB[0..7]11

NOTE:

For ECC DIMM

M_CHB_W E#1 1 M_CHB_R AS#11 M_CHB_C AS#11

M_CHB_O DT311 M_CHB_O DT211

DDR3_DR AMRST#10,16DDR3_DR AMRST#10,16

M_CHB_D M711

M_CHB_D M611

M_CHB_D M511

M_CHB_D M411

M_CHB_D M311

M_CHB_D M211

M_CHB_D M111

M_CHB_D M011

M_CHB_D QS811 M_CHB_D QS8#11

M_CHB_M AA15M_CHB_M AA15

MB_ECC_ CB7 MB_ECC_ CB6 MB_ECC_ CB5 MB_ECC_ CB4 MB_ECC_ CB3 MB_ECC_ CB2 MB_ECC_ CB1 MB_ECC_ CB0

NOTE:

For ECC DIMM

+3P3V

188

A0

181

A1

61

A2

180

A3

59

A4

58

A5

178

A6

56

A7

177

A8

175

A9

70

A10/AP

55

A11

174

A12

196

A13

172

A14

171

A15

63

CK1P/NU

64

CK1N/NU

184

CK0P

185

CK0N

76

CS1#

193

CS0#

169

CKE1

50

CKE0

52

BA2

190

BA1

71

BA0

238

SDA

118

SCL

165

CB7

164

CB6

159

CB5

158

CB4

46

CB3

45

CB2

40

CB1

39

CB0

237

SA1

117

SA0

73

WE#

192

RAS#

74

CAS#

77

ODT1

195

ODT0

168

RESET#

161

DM8/DQS17P

162

NC/DQS17N

230

DM7/DQS16P

231

NC/DQS16N

221

DM6/DQS15P

222

NC/DQS15N

212

DM5/DQS14P

213

NC/DQS14N

203

DM4/DQS13P

204

NC/DQS13N

152

DM3/DQS12P

153

NC/DQS12N

143

DM2/DQS11P

144

NC/DQS11N

134

DM1/DQS10P

135

NC/DQS10N

125

DM0/DQS9P

126

NC/DQS9N

43

NC/DQS8P

42

NC/DQS8N

198

FREE1

187

FREE2

49

FREE3

48

FREE4

DDR3_DIMM _240P

I

3

XMM4 COLOR: BLACK

XMM4A

DQ63 DQ62 DQ61 DQ60 DQ59 DQ58 DQ57 DQ56 DQ55 DQ54 DQ53 DQ52 DQ51 DQ50 DQ49 DQ48 DQ47 DQ46 DQ45 DQ44 DQ43 DQ42 DQ41 DQ40 DQ39 DQ38 DQ37 DQ36 DQ35 DQ34 DQ33 DQ32 DQ31 DQ30 DQ29 DQ28 DQ27 DQ26 DQ25 DQ24 DQ23 DQ22 DQ21 DQ20 DQ19 DQ18 DQ17 DQ16 DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

DQS7P DQS7N DQS6P DQS6N DQS5P DQS5N DQS4P DQS4N DQS3P DQS3N DQS2P DQS2N DQS1P DQS1N DQS0P DQS0N

RESERVED

NC/PAR_IN

NC/ERR_OUT

NC/TEST4

3

234 233 228 227 115 114 109 108 225 224 219 218 106 105 100 99 216 215 210 209 97 96 91 90 207 206 201 200 88 87 82 81 156 155 150 149 37 36 31 30 147 146 141 140 28 27 22 21 138 137 132 131 19 18 13 12 129 128 123 122 10 9 4 3

112 111 103 102 94 93 85 84 34 33 25 24 16 15 7 6

79

68 53 167

M_CHB_D Q63 M_CHB_D Q62 M_CHB_D Q61 M_CHB_D Q60 M_CHB_D Q59 M_CHB_D Q58 M_CHB_D Q57 M_CHB_D Q56 M_CHB_D Q55 M_CHB_D Q54 M_CHB_D Q53 M_CHB_D Q52 M_CHB_D Q51 M_CHB_D Q50 M_CHB_D Q49 M_CHB_D Q48 M_CHB_D Q47 M_CHB_D Q46 M_CHB_D Q45 M_CHB_D Q44 M_CHB_D Q43 M_CHB_D Q42 M_CHB_D Q41 M_CHB_D Q40 M_CHB_D Q39 M_CHB_D Q38 M_CHB_D Q37 M_CHB_D Q36 M_CHB_D Q35 M_CHB_D Q34 M_CHB_D Q33 M_CHB_D Q32 M_CHB_D Q31 M_CHB_D Q30 M_CHB_D Q29 M_CHB_D Q28 M_CHB_D Q27 M_CHB_D Q26 M_CHB_D Q25 M_CHB_D Q24 M_CHB_D Q23 M_CHB_D Q22 M_CHB_D Q21 M_CHB_D Q20 M_CHB_D Q19 M_CHB_D Q18 M_CHB_D Q17 M_CHB_D Q16 M_CHB_D Q15 M_CHB_D Q14 M_CHB_D Q13 M_CHB_D Q12 M_CHB_D Q11 M_CHB_D Q10 M_CHB_D Q9 M_CHB_D Q8 M_CHB_D Q7 M_CHB_D Q6 M_CHB_D Q5 M_CHB_D Q4 M_CHB_D Q3 M_CHB_D Q2 M_CHB_D Q1 M_CHB_D Q0

M_CHB_D QS7 11 M_CHB_D QS7# 11 M_CHB_D QS6 11 M_CHB_D QS6# 11 M_CHB_D QS5 11 M_CHB_D QS5# 11 M_CHB_D QS4 11 M_CHB_D QS4# 11 M_CHB_D QS3 11 M_CHB_D QS3# 11 M_CHB_D QS2 11 M_CHB_D QS2# 11 M_CHB_D QS1 11 M_CHB_D QS1# 11 M_CHB_D QS0 11 M_CHB_D QS0# 11

DIMM_VREF _B15,18

+1P5V_D UAL

12

GND

M_CHB_D Q[0..63] 11

M_CHB_M AA[0..15] 11

+SM_VTT

GND

+SM_VTT

GND

+1P5V_D UAL

12

I

D3R6

D3R5

1K

1%

12

I

D3R8

D3R7

1K

1%

GND

2

12

I

D3CB9

4.7UF/6.3V

X5R 10%

X5R 10% mx_c0805

mx_c0805

12

I

D3CB11

0.1UF/16V

X7R 10%

12

I

D3CB13

4.7UF/6.3V

X5R 10%

X5R 10% mx_c0805

mx_c0805

2

GND

12

I

D3CB10

0.1UF/16V

X7R 10%

GND

12

I

D3CB12

0.1UF/16V

X7R 10%

GND

12

I

D3CB14

0.1UF/16V

X7R 10%

GND

D3CB15

2.2UF/10V

X5R 10%

X5R 10% I

I

GND

DIMM_CA_V REF_B

DIMM_VREF _B

+1P5V_D UAL

GND

DIMM_CA_V REF_B

DIMM_VREF _B

12

D3CB16

D3CB16 1UF/6.3V

1UF/6.3V

X5R 10%

X5R 10% I

I

GND

1

XMM3B

78

VDD10

75

VDD9

72

VDD8

69

VDD7

66

VDD6

65

VDD5

62

VDD4

60

VDD3

57

VDD2

54

VDD1

51

VDD0

240

VTT2

120

VTT1

113

GND27

110

GND26

107

GND25

104

GND24

101

GND23

98

GND22

95

GND21

92

GND20

89

GND19

86

GND18

83

GND17

80

GND16

47

GND15

44

GND14

41

GND13

38

GND12

35

GND11

32

GND10

29

GND9

26

GND8

23

GND7

20

GND6

17

GND5

14

GND4

11

GND3

8

GND2

5

GND1

2

GND0

67

VREFCA

1

VREFDQ

DDR3_DIMM _240P

I

XMM4B

78

VDD10

75

VDD9

72

VDD8

69

VDD7

66

VDD6

65

VDD5

62

VDD4

60

VDD3

57

VDD2

54

VDD1

51

VDD0

240

VTT2

120

VTT1

113

GND27

110

GND26

107

GND25

104

GND24

101

GND23

98

GND22

95

GND21

92

GND20

89

GND19

86

GND18

83

GND17

80

GND16

47

GND15

44

GND14

41

GND13

38

GND12

35

GND11

32

GND10

29

GND9

26

GND8

23

GND7

20

GND6

17

GND5

14

GND4

11

GND3

8

GND2

5

GND1

2

GND0

67

VREFCA

1

VREFDQ

DDR3_DIMM _240P

I

PEGATRON DT-MB RESTRICTED SECRET

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

VDD21 VDD20 VDD19 VDD18 VDD17 VDD16 VDD15 VDD14 VDD13 VDD12 VDD11 GND59 GND58 GND57 GND56 GND55 GND54 GND53 GND52 GND51 GND50 GND49 GND48 GND47 GND46 GND45 GND44 GND43 GND42 GND41 GND40 GND39 GND38 GND37 GND36 GND35 GND34 GND33 GND32 GND31 GND30 GND29

GND28 NP_NC1 NP_NC2 NP_NC3

VDDSPD

VDD21

VDD20

VDD19

VDD18

VDD17

VDD16

VDD15

VDD14

VDD13

VDD12

VDD11

GND59

GND58

GND57

GND56

GND55

GND54

GND53

GND52

GND51

GND50

GND49

GND48

GND47

GND46

GND45

GND44

GND43

GND42

GND41

GND40

GND39

GND38

GND37

GND36

GND35

GND34

GND33

GND32

GND31

GND30

GND29

GND28 NP_NC1 NP_NC2 NP_NC3

VDDSPD

197 194 191 189 186 183 182 179 176 173 170 239 235 232 229 226 223 220 217 214 211 208 205 202 199 166 163 160 157 154 151 148 145 142 139 136 133 130 127 124 121 119 116 241 242 243 236

Engineer:

IPMIP-DP

GND

+1P5V_D UAL

Title :

1

+1P5V_D UAL+1P5V_D UAL

+3P3V

GND

DDR3 CHANNEL B

Vic_Chen

17 68Wednesd ay, April 07, 2010

Rev

1.01

5

+3P3VSB

1 2

D D

SMB_CLK _R

SMB_DAT A_R

SMB_CLK _R

SMB_DAT A_R

+1P5V_D UAL

NI

1 2

D3R90NID3R90

D3R100NID3R100

+3P3VSB

D3R110NID3R110

D3R120NID3R120

12

GND

12

NI

D3C11

0.1UF/16V

X7R 10%

U3SCL

U4SCL

NI

D3C12

0.1UF/16V

X7R 10%

4

GND

NI

U3

1

VDD

2

GND

3

SCL

SDA

ISL90728W IE627Z-TK

NI

U4

1

VDD

2

GND

3

SCL

SDA

ISL90728W IE627Z-TK

RH

RW

RH

RW

U3SDA

U4SDA

+1P5V_D UAL

6 5 4

NI

D3R17

12.1K 1%

1 2

U4RW

GND

12

NI

D3R19

12.1K

1%

GND

U3RW

NI

12

D3C1

D3C1 10PF/50V

10PF/50V

NPO 5%

3

+1P5V_D UAL

1 2

NI

D3R18

12.1K 1%

GND

12

NI

D3R20

12.1K

1%

GND

NI

12

D3C7

D3C7 10PF/50V

10PF/50V

NPO 5%

2

+5VSB

12

NI

D3C4

GND

D3C4 1UF/16V

1UF/16V

X7R 10%

GND

12

NI

D3R21

D3R21 1K

1K

NI

D3R22

D3R22 1K

1K

NI

D3R23

2.2

1 2

NI

D3R24

2.2

1 2

U5_1

U5_2U5_OUT2

GND

GNDGNDGND

12

NI

D3C9

D3C9 1UF/16V

1UF/16V

X7R 10%

NI

D3C10

D3C10 1UF/16V

1UF/16V

X7R 10%

D3R25

D3R25 0

0

1 2

D3R26

D3R26 0

0

1 2

U5_OUT1

NI

U5

A+

3

8

VCC

+

1

A-

AO

2

-

B+

5

+

BO

7

B-

4

6

-

GND

LM358

1

DIMM_VREF _A 15,16

DIMM_VREF _B 15,17

12

+

I

D3CE4

D3CE4 1800UF/6 .3V

1800UF/6 .3V

12

I

D3CB37

D3CB37 1UF/10V

1UF/10V

mx_c0603

12

I

D3CB45

D3CB45 1UF/10V

1UF/10V

mx_c0603

C C

B B

12

I

D3CB33

D3CB33 1UF/10V

1UF/10V

mx_c0603

GND

12

I

D3CB41

D3CB41 1UF/10V

1UF/10V

mx_c0603

GND GND GNDGND GNDGND

12

I

D3CB34

D3CB34 1UF/10V

1UF/10V

mx_c0603

GND GND GND G ND GND

12

I

D3CB42

D3CB42 1UF/10V

1UF/10V

mx_c0603

12

I

D3CB35

D3CB35 1UF/10V

1UF/10V

mx_c0603

12

I

D3CB43

D3CB43 1UF/10V

1UF/10V

mx_c0603

GND GND GND GND

12

NI

+

D3CE3

D3CE3 680UF/4V

680UF/4V

12

I

D3CB36

D3CB36 1UF/10V

1UF/10V

mx_c0603

12

I

D3CB44

D3CB44 1UF/10V

1UF/10V

mx_c0603

12

+

I

D3CE5

D3CE5 1800UF/6 .3V

1800UF/6 .3V

12

I

D3CB38

D3CB38 1UF/10V

1UF/10V

mx_c0603

12

I

D3CB46

D3CB46 1UF/10V

1UF/10V

mx_c0603

GND

12

NI

+

D3CE6

D3CE6 680UF/4V

680UF/4V

12

I

D3CB39

D3CB39 1UF/10V

1UF/10V

mx_c0603

12

I

D3CB47

D3CB47 1UF/10V

1UF/10V

mx_c0603

GND

12

I

D3CB40

D3CB40 1UF/10V

1UF/10V

mx_c0603

12

I

D3CB48

D3CB48 1UF/10V

1UF/10V

mx_c0603

GND

12

NI

D3CB49

4.7UF/6.3V

X5R 10%

X5R 10% mx_c0805

mx_c0805

IP 1.00 Change

NOTE:

DIMM Placement for different platform

DIMM

4 312

A A

LGA 775

LGA1160

Eaglelake

CH A CH B

5

DIMM

3 421

CH A CH B

4

PEGATRON DT-MB RESTRICTED SECRET

DDR3 DECOUPLING

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

3

2

Date: Sheet of

Engineer:

IPMIP-DP

DDR3 DECOUPLING

Vic_Chen

18 68Wednesd ay, April 07, 2010

1

Rev

1.01

5

4

3

2

1

P55 ES2: 0200-006T000

I

U1A

PCH_PCIRS T#40,41 PME#40,41

Strap

(GNT0#~GNT3# have IPU)

D D

TOP Block SWAP

GNT3#

GNT2#

GNT1#

C C

0

Normal(Default)

1

ESI mode

0

(Server Only)

DMI(Default)

1

GNT0# 1 0 1 0

0 1 1 0

SMB_CLK _R18,38,39,4 0,41,49,50 SMB_DAT A_R18,38,39,4 0,41,49,50

BOOT BIOS RESERVED

PCI SPI LPC

+3P3VSB +3P3VSB +3P3VSB

12

I

SR154

2.2K

12

I

SR155

2.2K

12

I

SR152

2.2K

+3P3VSB

12

I

SR153

2.2K

PAR40,41 DEVSEL#40,41 CK_33M_ PCH2 4 IRDY#40,41 SERR#40,41 STOP#40,41 PLOCK#40,41 TRDY#40,41 PERR#40,41 FRAME#40,41

GNT0#40

+3P3VSB +3P3VSB

12

I

SR131

2.2K

I

SR132

2.2K

PCH_GNT 3 PCH_GNT 2

GNT1#41

12

NI

SR1

SR2

1K

GND

GND GND

REQ3#41 REQ2#41 REQ1#41 REQ0#40,41

INTA#40,4 1 INTB#40,4 1 INTC#40,41 INTD#40,41 INTE#41 INTF#4 1 INTG#41

PCH_GNT 1

12

NI

SR9

SR40

1K

AH10

IPU

AH11

AP6

AL11

AP7 AV6 AN8

AK12

IPU

AM3

IPU

BA9

IPU

AK6

IPU

AK11

AH8 AY4

AW5

AP4

AR4

AT11

BA5 AU8 AH7

AP12

AW4

AV32 AM31

PCIRST# PME# PAR

AT6

DEVSEL# CLKIN_PCILOOPBACK IRDY# SERR# STOP# PLOCK#

AL6

TRDY#

AT4

PERR#

AL7

FRAME#

GNT3#/GPIO55 GNT2#/GPIO53 GNT1#/GPIO51 GNT0#

REQ3#/GPIO54 REQ2#/GPIO52 REQ1#/GPIO50 REQ0#

AT8

PIRQA# PIRQB# PIRQC# PIRQD# PIRQE#/GPIO2 PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5

SMBCLK SMBDATA

PCI

SMBUS

SMBALERT#/GPIO11

C/BE0# C/BE1# C/BE2# C/BE3#

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8

AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

AV3 AY6 AP5 AW10

AT9 AP11 AU6 AY10 AP9 AV8 AR9 AV7 AW9 AR3 AW7 AR8 AU3 AP2 AU1 AN3 AM2 AM11 AM4 AY8 AL10 AT5 AL2 AT2 AL4 AV10 AL9 AN7 AK7 AN6 AH12 AN11

AL31

A_D0 A_D1 A_D2 A_D3 A_D4 A_D5 A_D6 A_D7 A_D8 A_D9 A_D10 A_D11 A_D12 A_D13 A_D14 A_D15 A_D16 A_D17 A_D18 A_D19 A_D20 A_D21 A_D22 A_D23 A_D24 A_D25 A_D26 A_D27 A_D28 A_D29 A_D30 A_D31

SMBALER T#

C/BE0# 40,41 C/BE1# 40,41 C/BE2# 40,41 C/BE3# 40,41

A_D[0..31] 4 0,41

12

I

SR3

SR3 10K

10K

+3P3VSB+3P3VSB+3P3VSB

12

I

SR4

SR4 10K

10K

12

I

SR5

SR5 10K

10K

SML0ALE RT#

SPI

SPI_CS1# SPI_CS0# SPI_MOSI SPI_MISO

SPI_CLK

BA33

AY32

T32 V32 T34 V30 V31

SML1ALE RT#

ICH_SPI_CS1# ICH_SPI_CS# ICH_SPI_MOSI

IPD IPU

ICH_SPI_CLK

GND

+3P3V_M E

12

NI

SR14

SR14 1K

1K

12

NI

SR8

SR8 1K

1K

Strap

SPI_MOSI (IPD)

Disable ITPM

0

(Default)

Enable ITPM

1

ST26 TPC26 b N OBOMST2 6 TPC 26b NOBOM

1

SPI_CS# 49 SPI_MOSI 49 SPI_MISO 49 SPI_CLK 49

PEGATRON DT-MB RESTRICTED SECRET

INTEL_PCH - 1

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

2

Date: Sheet of

IPMIP-DP

Engineer:

Vic_Chen

19 68Thursday, April 08, 2010

1

19 68Thursday, April 08, 2010

Rev

1.01

PCH_RTC X1

PCH_RTC X2

SC2

SC2 15PF/50V

15PF/50V

NPO 5%

NPO 5% I

I

AW33

AT34

AV31 AR31

AK24

AP28

AW30

BA30

SML0CLK SML0DATA

SML1CLK/GPIO58 SML1DATA/GPIO75

RTC

RTCRST#

SRTCRST#

RTCX1

RTCX2

IBEXPEAK

Rev 1.0

SML0ALERT#/GPIO60

SML1ALERT#/GPIO74

3

SML0_LA N_CLK36 SML0_LA N_DATA36

B B

12

I

SC6

SC6 150PF/50 V

150PF/50 V

NPO 5%

GNDGND

CRB R1.0 (page.39) suggests that don't change it to 0402 package type

A A

5

12

I

SC7

150PF/50 V

NPO 5%

I

XY5

Crystal Holder

12

I

SC25

SC25 150PF/50 V

150PF/50 V

NPO 5%

12

I

SC26

150PF/50 V

NPO 5%

GNDGND

I

SC4

SC4 150PF/50 V

150PF/50 V

NPO 5%

GNDGND

12

SC1

SC1 15PF/50V

15PF/50V

NPO 5%

NPO 5% I

I

12

SRTCRST #53

I

SC5

150PF/50 V

NPO 5%

RTCRST#53

1

I

SR13

SR13 10MOhm

10MOhm

1 2

I

Y5

32.768Kh z

GND GND

324

3

4

GND

2

4

MX_R060 3

Y5_R

NOBOM

SR15

1 2

0

PCH_SML 1CLK PCH_SML 1DATA

12

GNDGND

5

4

3

2

1

I

U1B

DMICOMP

G22

G24

G18

G20

G16

G14

G12

G11

H22

B20 C19

F22

E20 D20 H24

H18

K24

D21 C21

H20

D15 C16 D18 D17

B17 A16 H16

B15 C14 H14

D14 D13 K14

C12 B13 H12

H11

A12 B11 D11 D10

K12

A19 B18 J22

L24

L14

J12

D8 C9

C7 B8

DMI0RXN DMI0RXP DMI0TXN DMI0TXP

DMI1RXN DMI1RXP DMI1TXN DMI1TXP

DMI2RXN DMI2RXP DMI2TXN DMI2TXP

DMI3RXN DMI3RXP DMI3TXN DMI3TXP

DMI_IRCOMP DMI_ZCOMP

CLKIN_DMI_N CLKIN_DMI_P

PERn1 PERp1 PETn1 PETp1

PERn2 PERp2 PETn2 PETp2

PERn3 PERp3 PETn3 PETp3

PERn4 PERp4 PETn4 PETp4

PERn5 PERp5 PETn5 PETp5

PERn6 PERp6 PETn6 PETp6

PERn7 PERp7 PETn7 PETp7

PERn8 PERp8 PETn8 PETp8

USBP0N USBP0P

USBP1N USBP1P

USBP2N USBP2P

DMI PCI-E

USBP3N USBP3P

USBP4N USBP4P

USBP5N USBP5P

USBP6N USBP6P

USBP7N USBP7P

USBP8N USBP8P

USBP9N USBP9P

USBP10N USBP10P

USBP11N

USB

USBP11P

USBP12N USBP12P

USBP13N USBP13P

OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43

OC5#/GPIO9 OC6#/GPIO10 OC7#/GPIO14

USBRBIAS#

USBRBIAS

D D

C C

B B

PORT1 TO PCI_EXP_J31

PORT6 TO PCI_EXP_LAN1 THE TRACES TOGETHER CLOSE TO PINS WITH LENGTH NO

FOR H55 USB PORT 6 AND 7 DISABLED

NOTE:

DMI_TXN012 DMI_TXP012 DMI_RXN012 DMI_RXP012

DMI_TXN112 DMI_TXP112 DMI_RXN112 DMI_RXP112

DMI_TXN212 DMI_TXP212 DMI_RXN212 DMI_RXP212

DMI_TXN312 DMI_TXP312 DMI_RXN312 DMI_RXP312

I

+1P05V_ FILTER

CK_100M _PCH_DMI#8 CK_100M _PCH_DMI8

PE1_RXN 139 PE1_RXP 139

PE1_TXN 13 9 PE1_TXP 139

LAN_RXN 136 LAN_RXP 136

LAN_TXN 136 LAN_TXP 13 6

SC9 0.1UF/16V X7R 10%

I

I I

I

12

SC10 0 .1UF/16V X7R 1 0%

12

I

SR16

49.9

1%

1 2

ST9TPC26bNO BOM ST 9TPC26bNOB OM ST10T PC26bNOB OM ST10T PC26bNOB OM ST11T PC26bNOB OM ST11T PC26bNOB OM ST12T PC26bNOB OM ST12T PC26bNOB OM

ST13T PC26bNOB OM ST13T PC26bNOB OM ST14T PC26bNOB OM ST14T PC26bNOB OM ST15T PC26bNOB OM ST15T PC26bNOB OM ST16T PC26bNOB OM ST16T PC26bNOB OM

PCH_LAN _TXN_C PCH_LAN _TXP_C

TP_PCH_ PERn7

1

TP_PCH_ PERp7

1

TP_PCH_ PETn7

1

TP_PCH_ PETp7

1

TP_PCH_ C7

1

TP_PCH_ B8

1

TP_PCH_ K12

1

TP_PCH_ J12

1

NOTE: USB[0:13] have a internal pull down resistor

AW25 AY25

BA23 AY24

AW23 AY22

AR22 AP22

AV21 AV22

AY20 AW21

AK20 AL20

AV20 AW19

BA19 AY18

AM20 AN20

AV17 AV18

AR20 AT20

AK18 AL18

AY17 BA16

AT31 AT30 AK28 AP30 AP31 AL28 AL30 AM30

AY15 AV15

PCH_OC# 01 PCH_OC# 23 PCH_OC# 45 PCH_OC# 67 PCH_OC# 89 PCH_OC# 1011 OC#6/GPIO1 0 OC7#/GPIO1 4

USBRBIAS_ PCH

12

I

SR25

22.6

LONGER THAN 200 MILS TO RESISTOR

1%

GND

USBN0 37 USBP0 37

USBN1 37 USBP1 37

USBN2 35 USBP2 35

USBN3 35 USBP3 35

USBN4 34 USBP4 34

USBN5 34 USBP5 34

USBN8 45 USBP8 45

USBN9 45 USBP9 45

USBN10 45 USBP10 45

USBN11 45 USBP11 45

USBN12 46 USBP12 46

USBN13 46 USBP13 46

+3P3VSB

OC01# 37 OC23# 35 OC45# 34 OC67# 46 OC89# 45 OC1011# 45

12

+3P3VSB

I

10K

10K SR116

SR116

12

I

10K

10K SR125

SR125

SKU

Feature Set

PCI Express 2.0

A A

USB 2.0

SATA

HDMI/DVI/VGA/SDVO/DisplayPort

5

Q57 H57 H55 P55

8 8 6 8 8

14 14 14 1412

6 6 6 6 6

YES

YES YES NO NO

4

P57

IBEXPEAK

Rev 1.0

PEGATRON DT-MB RESTRICTED SECRET

INTEL_PCH - 2

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

3

2

Date: Sheet of

IPMIP-DP

Engineer:

Vic_Chen

20 68Wednesd ay, April 07, 2010

1

20 68Wednesd ay, April 07, 2010

Rev

1.01

5

4

3

2

1

NOTE:

Install SR32, SR68, NI SR26 if M3 support

Install SR26, SR68, NI SR32 if no M3 support

1 1

GND

12

NI

SC13

SC13 220PF/50 V

220PF/50 V

X7R 10%

12

NI

SC15

0.1UF/16V

Y5V +80-20%

Y5V +80-20% mx_c0402

mx_c0402

PCH_SGP 22

PCH_SGP 39 PCH_SGP 40

NP_NC1 NP_NC2 NP_NC3

ST23T PC26bNOB OM ST23T PC26bNOB OM

TP_PCH_ AN36 TP_PCH_ AU39

PCH_MEP WROK

ST35T PC26bNOB OM ST35T PC26bNOB OM

1

ST49T PC26bNOB OM ST49T PC26bNOB OM

1

ST27T PC26bNOB OM ST27T PC26bNOB OM

1

ST33T PC26bNOB OM ST33T PC26bNOB OM

1

1 2 5

TP_PCH_ AF15

1

1 2 1 2 1 2 1 2

MFGIN

GND

ST18T PC26bNOB OM ST18T PC26bNOB OM

ST19T PC26bNOB OM ST19T PC26bNOB OM

GND+3P3V

NOBOM

MFG1

MFG1 PEGATRO N_MFG

PEGATRO N_MFG

3

GPI1

4

GPI2

6

GND

4

SR32 0

NI/AMTI

MEPW ROK66

D D

C C

PWRO K22,54

PCH_LAN RST#22

NI/AMTI

I/AMTNI

1 2

SR26 0

1 2

SR68 0

1 2

I

SR29 10K

1 2

I

SR31 4.7K

1 2

I

SR30 10K

1 2

I

SR36 10K

1 2

I

+3P3V

SR51 8.2K

I

SR67 8.2K

I

SR74 8.2K

I

SR80 8.2K

I

NOTE: EDS_Rev2_1 add H55 AHCI support.

Feature Set

B B

LVDS

PAVP 1.5

FIS Based Port Multiplier Support

QST

Braidwood

Coral Harbor

AHCI

Raid 0/1/5/10

Q57NOH57NOH55

NO

YES YES

YES

YES YES YES

NO

YES YES YES YES

lgnition ME FW only

A A

AT-p

iAMT 6.0

IRPA for Business

IRPA for Consumer

IRWT

YES

NO

NO NO NO

5

SKU

P55

NO

YES YES YES

NO NO NO

NO NO

YES

NO

YES YES

NO

P57

NO NO

NO

YES

NO

NO NO

YES

NO NO NO

NO NO

YES

NO

NO NO

NO

YES YES

SST

AK35 AN36 AU39

AL33

BA12 AR12

AW12

AY13

AW11

AL14 AV11 AY11

AN31

AN41 AM38

AL39 AG38

AF15

I

U1C

IBEXPEAK

TP18 TP19 TP20

MEPWROK

CLINK

FAN

PWM0 PWM1 PWM2 PWM3

TACH0/GPIO17 TACH1/GPIO1 TACH2/GPIO6 TACH3/GPIO7

SST

GPIO

SCLOCK/GPIO22 SLOAD/GPIO38 SDATAOUT0/GPIO39 SDATAOUT1/GPIO48

CLKIN_SATA_N/CKSSCD_N CLKIN_SATA_P/CKSSCD_P

NC1

Rev 1.0

SATA0RXN SATA0RXP SATA0TXN SATA0TXP

SATA1RXN SATA1RXP SATA1TXN SATA1TXP

SATA2RXN SATA2RXP SATA2TXN SATA2TXP

SATA3RXN SATA3RXP SATA3TXN SATA3TXP

SATA4RXN

SATA

SATA4RXP SATA4TXN SATA4TXP

SATA5RXN SATA5RXP SATA5TXN SATA5TXP

SATA0GP/GPIO21 SATA1GP/GPIO19 SATA2GP/GPIO36 SATA3GP/GPIO37 SATA4GP/GPIO16 SATA5GP/GPIO49

TP8

SATALED#

SATAICOMPI

SATAICOMPO

HOST

A20GATE

INIT3_3V#

RCIN#

SERIRQ

THRMTRIP#

PECI

PMSYNCH

3

W41 V40 U38 V38

Y38 Y37 AB36 AB35

AD36 AD35 AB31 AB32

AC41 AC39 AB37 AB38

AF41 AE40 AD38 AE38

AF35 AF34 AD33 AD32

AJ37 AH38 AK39 AR38 AH39 AG40

V34

AN39

T39 T41

Y34 Y35

AG37 AR39 AM40 AL40 C38 D36 C37

IPU

SATA0GP SATA1GP SATA2GP SATA3GP SATA4GP SATA5GP

TP_PCH_ V34

INIT3_3V#

SATA_RX N0 4 6 SATA_RX P0 46

SATA_TX N0 4 6 SATA_TX P0 46

SATA_RX N1 4 6 SATA_RX P1 46

SATA_TX N1 4 6 SATA_TX P1 46

SATA_RX N2 4 6 SATA_RX P2 46

SATA_TX N2 4 6 SATA_TX P2 46

SATA_RX N3 4 6 SATA_RX P3 46

SATA_TX N3 4 6 SATA_TX P3 46

SATA_RX N4 4 6 SATA_RX P4 46

SATA_TX N4 4 6 SATA_TX P4 46

SATA_RX N5 3 5 SATA_RX P5 35

SATA_TX N5 3 5 SATA_TX P5 35

SR28 10K

I

SR34 10K

I

SR33 10K

I

SR35 10K

I

SR37 10K

I

SR38 10K

I

1

SATARBIAS _PCH

CK_100M _PCH_SATA# 8 CK_100M _PCH_SATA 8

+3P3V +3P3V +3P3 V

12

I

SR42

SR42 10K

10K

12

I

SR43

SR43 10K

10K

ST22 TPC26 b N OBOMST2 2 TPC 26b NOBOM

12

I

SR44

SR44 10K

10K

Port5 is for eSATA

12 12 12 12 12 12

A20GATE 47

RST_KB# 47

SERIRQ 47,50 H_THMTR IP# 13 PECI 13 PM_SYNC 13

NOTE:

Check if Signal A20GATE, KBDRST#, SERIRQ have a PU resistor in SIO side

2

+3P3V

+1P05V_ FILTER

12

I

SR41

37.4Ohm

1%

+3P3V

12

I

SR39

SR39 10K

10K

HD_LED# 52

NOTE:

THE TRACES TOGETHER CLOSE TO PINS WITH LENGTH NO LONGER THAN 200 MILS TO RESISTOR

NOTE:

INIT3_3V# is reserved

12

GND

for Strap cpu output stronger if low.

NI

SR138

SR138 1K

1K

PEGATRON DT-MB RESTRICTED SECRET

INTEL_PCH - 3

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

IPMIP-DP

Engineer:

Vic_Chen

1

Rev

1.01

21 68Wednesd ay, April 07, 2010

1.01

5

NOTE:

Internal Pull-up in PCH

+3P3V+ 3P3V

12

NI

SR49

SR49 10K

12

I

SC22

SC22 10PF/50V

10PF/50V

NPO 5%

10K

GND GND

NOTE:

12

NI

SC23

SC23 10PF/50V

10PF/50V

NPO 5%

D D

LDRQ0#47

LFRAME#47,50

Strap

AZ_SDATA_OUT (IPD)

AZ_SYNC (IPD)

SDATA_O UT_142

C C

AZ_SYNC_142

AZ_BITCLK _142

AZ_RST# _142

SDATA_IN04 2

0 1

OnDie PLL VR USE

0

1.8V SUPPLY OnDie PLL VR USE

1

1.5V SUPPLY

12

I

SC8

SC8 10PF/50V

10PF/50V

NPO 5%

GND GND

PCH_LAN RST#21

USING CORE POWER FOR NAND FLASH USING EPW POWER FOR NAND FLASH

1 2

+3P3VSB

12

NI

SR50

SR50 10K

10K

NI

SC24

SC24 10PF/50V

10PF/50V

NPO 5%

1 2

NI

1 2

NI

SR63 33

I

SR53 33

I

SR54 33

I

SR55 33

I

Install for non-Intel LAN support

B B

CPUPW RGD13,5 7 DRAM_PW ROK13

PWRO K21,5 4

VRM_PW RGD8,59

+BATT

+3P3VSB

PLTRST#13 ,36,47,50,57 SYS_RESET #8,13,52,5 7 RSMRST#54

A A

5

1 2

SR81

4.7K

I

12

GND

ST32TPC26 bNO BOM ST32TPC26 bNO BOM ST31TPC26 bNO BOM ST31TPC26 bNO BOM ST28TPC26 bNO BOM ST28TPC26 bNO BOM

1 2

I

SR79

SR79 330K

330K

1%

NI

SR75

SR75 1K

1K

LDRQ1#50

12

GND

12

GND

4

1 1 1

SR1361KNISR1361K SR1371KNISR1371K

NI

SC3

0.1UF/16V

X7R 10%

NI

SC16

SC16 100PF/50 V

100PF/50 V

NPO 5%

4

LDRQ1#

LAD047 ,50 LAD147 ,50 LAD247 ,50 LAD347 ,50

LDRQ0#

TP_PCH_ SDIN3

HDA_SDO _R

HDA_SYNC_ R

HDA_BITCL K_R

HDA_AZR ST#_R

12

NI

SR69

SR69 0

0

12

GNDGND

IPMIP-GS ADD SC35

DRAM_PW ROK_R

SYSPWR OK

12

NI

SR77

SR77 10K

10K

12

GNDGND

PCH_INTVR MEN PCH_PLT RST#

12

GND

LAD0 LAD1 LAD2 LAD3

NI

SC14

SC14 1UF/10V

1UF/10V

I

SR78

SR78 100K

100K

I

SR82

SR82 100K

100K

IPU

IPU IPU IPU IPU

IPU

IPD IPD IPD IPD

IPD

IPU

IPU IPD IPU

NI

SC35

SC35 100PF/50 V

100PF/50 V

1 2

NPO 5%

GND

Strap

INTVRMEN

AP14

AT12

AK16

AL16

AM16

AL12

AR14

AV13 AP18 AU13 AN16

AP16

AU15

AW14

AV14

AY31

AL34

AN34

AL36

AK33

AL35

B38 AW32 AM24

AT38

AW31

AV34

AL38 AL24

I

U1D

LDRQ1#/GPIO23

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

LDRQ0#

FWH4/LFRAME#

LPC

HDA_SDIN0 HDA_SDIN1 HDA_SDIN2 HDA_SDIN3

AUDIO

HDA_SDO

HDA_SYNC

HDA_BCLK

HDA_RST#

LAN_RST#

JTAG_TMS JTAG_TDO JTAG_TDI JTAG_TCK JTAG_RST#

PROCPWRGD DRAMPWROK PWROK SYS_PWROK

INTVRMEN PLTRST# SYS_RESET# RSMRST#

IBEXPEAK

3

BMBUSY#/GPIO0

SLP_LAN#/GPIO29

SUS_PWR_ACK/GPIO30

LAN_PHY_PWR_CTRL/GPIO12

MEM_LED/GPIO24

ACPRESENT/GPIO31

STP_PCI#/GPIO34

PCIECLKRQ0#/GPIO73 PCIECLKRQ1#/GPIO18 PCIECLKRQ2#/GPIO20 PCIECLKRQ3#/GPIO25 PCIECLKRQ4#/GPIO26 PCIECLKRQ5#/GPIO44 PCIECLKRQ6#/GPIO45

PCIECLKRQ7#/GPIO46 PEG_A_CLKRQ#/GPIO47 PEG_B_CLKRQ#/GPIO56

SATACLKREQ#/GPIO35

SUS_STAT#/GPIO61

SUSCLK/GPIO62

SLP_S5#/GPIO63

Rev 1.0

Disable intergrated

0

1.05V VRM for GbE

Enable(Default)

1

3

GPIO8

GPIO13 GPIO15

GPIO27 GPIO28

GPIO32 GPIO33

GPIO57

WAKE#

INTRUDER#

SPKR

PWRBTN#

SLP_S3# SLP_S4#

GPIO72

SLP_M#

TP23

2

SR87 NI for power sequence t237

+3P3VSB+3P3VSB

GND

0

+3P3V

12

I

SR76

SR76 1K

1K

12

NI

SR61

SR61 10K

10K

12

LAN_CLK REQ# 36

12

I

SR59

SR59 10K

10K

GND

12

I

SR62

SR62 10K

10K

I

SKTOCC# 13

NI

SR66

SR66 10K

10K

+3P3VSB

12

I

SR64

SR64 10K

10K

SR91

1 2

Strap

GPIO8 (IPU)

GPIO15 (IPD)

GPIO27 (IPU)

CLKRUN# 50

AK41 AK30 BA35 AT37 AU34 AR16 AY36 AR34 AP37 AV40 AP40 AJ40 AT16 AT40 AL32

AN35 AM39 AP38 AP33 AW37 AW38 AV36 AP36 AV39 AW35 AR41

IPU

IPD IPD

GP24

1

IPU IPU

IPU

SKTOCC_ L

GP28

12

NI

SR65

SR65 10K

10K

GND

IPU

GP35

1

TPC26b

NOBOM

+3P3V

GP8

PCIECLKRQ 0 PCIECLKRQ 1 PCIECLKRQ 2 PCIECLKRQ 3 PCIECLKRQ 4 PCIECLKRQ 5 PCIECLKRQ 6 PCIECLKRQ 7 PEG_A_C LKRQ PEG_B_C LKRQ

12

NI

I

SR87

SR45

10K

GP30

GP15

ST40 TPC26 b N OBOMST4 0 TPC 26b NOBOM

GP27

GP31

GPIO33 PCI_STOP#

12

NI

SR99

SR113

10K

GND

ST73

12

I

SR150

SR150 10K

10K

12

I

SR58

SR58 100K

100K

I

12

SR16710KISR16710K

I

SR135

SR135 10K

10K

+3P3VSB

+3P3VSB+3P 3VSB+3P3VSB +3P3V

12

I

SR56

SR56 10K

10K

I

12

SR18910KISR18910K

SR16910KISR16910K

12

I

SR134

SR134 10K

10K

12

I

SR139

SR98

10K

+3P3VSB

I

12

SR16810KISR16810K

SR18810KISR18810K

SR18710KISR18710K

NI

SR93

12

I

NI

SR151

SR133

10K

GPIO33

GND

AK31

AH31

AT33

RI#

AR33

AN24

AJ38

AK36

AV35 AP35 AU36 AY34 AT36

AH35

SUS_CLK _C

PCH_RI#

IPD

IPU

TP_SLP_ S5#

IPU

TP_PCH_ AH35

SLP_S3# 13,48,64,66 SLP_S4# 48

GPIO72/BAT LOW#

SLP_M# 66,67

ST29 TPC26 b N OBOMST2 9 TPC 26b NOBOM

1

CKR41 33

1 2

I

12

I

SR70

SR70 10K

10K

GND

LDCPD#

Strap

SPKR (IPD)

Disable No-reboot option

0

Enable No-reboot option

1

GNDGND GND

12

I

SR71

SR71 1K

1K

SB_PW RBTN# 48

ST30 TPC26 b N OBOMST3 0 TPC 26b NOBOM

1

2

12

I

SR72

SR72 1M

1M

SUS_CLK 50

+3P3V+3P3VSB +3P3VS B +B ATT

12

I

SR73

SR73 1K

1K

+3P3VSB

12

I

SR60

SR60 10K

10K

12

NI

NOTE:

SR105

SR105 0

0

Just for measure

GND

PCH_RI1# 56

WAKE # 38,39

INTRUDER# 52

SPKR 52

PEGATRON DT-MB RESTRICTED SECRET

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

IPMIP-DP

1

GPIO33 ME update

F_AUDIO_D ET# 43

SLP_LAN # 67

LAN_DISAB LE 36

LPC_PME # 48

PASSW ORD_EN# 53

mx_r0603SR91

mx_r0603

1K

JE50:23

I JE50:23

I

MINI_JUMPER

INTEGRATED CLOCK

0

Chip ENABLE INTEGRATED CLOCK

1

Chip DISABLE TLS CONFIDENTIALITY

0

DISABLE TLS CONFIDENTIALITY

1

ENABLE OnDie PLL VccVRM

0

DISABLE OnDie PLL VccVRM

1

ENABLE Flash descriptor

0

overriden Flash descriptor

1

in effect

LPCPD# 50

Title :

Engineer:

1

1-2

2-3

IPMIP-GS ADD

GPIO33_E5 0

GND

INTEL_PCH - 4

Vic_Chen

OVERRIDEN

DEFAULT

I

E50

1 2 3

HEADER_ 1X3P

22 68Wednesd ay, April 07, 2010

Rev

1.01

5

D D

DDCA_CL K28 DDCA_DA TA28

CK_96M_ PCH_DREF8 CK_96M_ PCH_DREF#8

NOTE:

NOT INSTALL CKR24,25 for Non-Graphic sku

C C

I

SR117

I

SR120

0 Ohm

5%

GND

DDPC_CT RL_CLK33 DDPC_CT RL_DATA33

1 2

0 Ohm

5%

12

SR118

SR118 1K

1K

NI

GND

12

SR119

SR119 1K

1K

NI

DP_HPD_ R

+3P3V

12

I

SR108

SR109

2.2K

mx_r0402

DVI_HPD30

IPMIP-DP for not DVI

DPB_HPD32

B B

IPMIP-DP for not DP

1 2

DVI_HPD_R

SDVO_CT RL_CLK30 SDVO_CT RL_DATA30

DPC_AUX _DP_MUX33 DPC_AUX _DN_MUX33

4

I

U1E

T12

TP7

T13

IPD IPD

P13 P12

AG2 AG4

AL22

AM22

AD2 AE3 AE4

AB13 AB12

L10

AB10 AB11

J1

M1

L2

J3

L9

TP6 TP5 TP4

CRT_DDC_CLK CRT_DDC_DATA

CLKIN_DOT_96P CLKIN_DOT_96N

Vss1 Vss2 Vss3

DDPB_HPD

DDPB_AUXP DDPB_AUXN

SDVO_CTRLCLK SDVO_CTRLDATA

DDPC_HPD

DDPC_AUXP DDPC_AUXN

DDPC_CTRLCLK DDPC_CTRLDATA

1

TP_PCH_ DDPBAUXP

1

TP_PCH_ DDPBAUXN

1

TP_PCH_ P13

IPD 10K IPD 15K~40K

GND

ST34TPC26 bNO BOM ST34TPC26 bNO BOM

ST72TPC26 bNO BOM ST72TPC26 bNO BOM ST76TPC26 bNO BOM ST76TPC26 bNO BOM

CRT_HSYNC CRT_VSYNC

CRT_GREEN

SDVO_INTP

SDVO_INTN

SDVO_STALLP SDVO_STALLN

SDVO_TVCLKINP SDVO_TVCLKINN

CRT_RED

CRT_BLUE

CRT_IRTN

DAC_IREF

DDPB_0P DDPB_0N DDPB_1P DDPB_1N DDPB_2P DDPB_2N DDPB_3P DDPB_3N

DDPC_0P DDPC_0N DDPC_1P DDPC_1N DDPC_2P DDPC_2N DDPC_3P DDPC_3N

3

VGA_HSYNC_ 3P3V

AD4

VGA_VSYNC_ 3P3V

AD3

AC1 AC3 AB2

AB4

DACREFS ET

AE2

PLACED RESISTOR CLOSE TO THE PCH WITHIN 500 MIL LENGTH

K10 J8 K11 J11 H6 F6 G4 H4

M3 N4

N2 P3

L6 L7

E3 F4 F2 G3 B4 C4 D3 D2

SR88 22 OHM

NI/VGA-I

NI/VGA-I NI/VGA-I

NI/VGA-I

12

NI

SC17

SC17 22PF/50V

22PF/50V

PLACED CAPACITOR CLOSE TO PCH FOR EMI

1 2

SR83 22 OHM

1 2

12

NI

SC18

SC18 22PF/50V

22PF/50V

GNDGND GNDGND GND

GND

12

NI

SC19

SC19 22PF/50V

22PF/50V

12

I

SR90

1.02K

1%

2

I

SR89

SR89 150

150

1%

1% mx_r0402

mx_r0402

12

GND GND

PLACED RESISTOR CLOSE TO PCH WITHIN 250 MIL LENGTH

I

SR85

SR85 150

150

1%

1% mx_r0402

mx_r0402

12

I

SR86

SR86 150

150

1%

1% mx_r0402

mx_r0402

1

NOTE:

Change SR90 and SR85,86,89 to 0 OHM for non-Graphics SKU, KEEP PU resistor VR14~15 for DDCDATA/CLK

DVI_TMDSB _DATA2 30 DVI_TMDSB _DATA2# 30 DVI_TMDSB _DATA1 30 DVI_TMDSB _DATA1# 30 DVI_TMDSB _DATA0 30 DVI_TMDSB _DATA0# 30 DVI_TMDSB _CLK 30 DVI_TMDSB _CLK# 30

DP_TXP0 32 DP_TXN0 32 DP_TXP1 32 DP_TXN1 32 DP_TXP2 32 DP_TXN2 32 DP_TXP3 32 DP_TXN3 32

DVI

Display Port

VGA_HSYNC 28 VGA_VSYNC 28

VGA_RED 28 VGA_GRE EN 28 VGA_BLU E 2 8

SR1141K

12

I

TP_PCH_ DDPDAUXP

ST64TPC26 bNO BOM ST64TPC26 bNO BOM

1

GND

A A

ST65TPC26 bNO BOM ST65TPC26 bNO BOM

TP_PCH_ DDPDAUXN

1

PD_HPD

H2

DDPD_HPD

K4

DDPD_AUXP

L4

DDPD_AUXN

AB7

DDPD_CTRLCLK

AB9

DDPD_CTRLDATA

IBEXPEAK

Rev 1.0

DDPD_0P DDPD_0N DDPD_1P DDPD_1N DDPD_2P DDPD_2N DDPD_3P DDPD_3N

C5 B6 D6 D7 F8 G8 F9 G9

PEGATRON DT-MB RESTRICTED SECRET

INTEL_PCH - 5

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

5

4

3

2

Date: Sheet of

IPMIP-DP

Engineer:

Vic_Chen

23 68Wednesd ay, April 07, 2010

1

23 68Wednesd ay, April 07, 2010

Rev

1.01

5

FDI_TXN012 FDI_TXP012 FDI_TXN112 FDI_TXP112 FDI_TXN212 FDI_TXP212

D D

C C

FDI_TXN312 FDI_TXP312 FDI_TXN412 FDI_TXP412 FDI_TXN512 FDI_TXP512 FDI_TXN612 FDI_TXP612 FDI_TXN712 FDI_TXP712

4

Del ONFI

K30

H30 G30 D31 D32

G31 K31

C30 B31 A33 B32 C33 B34

M32

M31

E41 P32 H35 H36

P36

J30

F31

J31

J34 L35

J36 J35

F38

F40

L36

I

U1F

FDI_RXN0 FDI_RXP0 FDI_RXN1 FDI_RXP1 FDI_RXN2 FDI_RXP2 FDI_RXN3 FDI_RXP3 FDI_RXN4 FDI_RXP4 FDI_RXN5 FDI_RXP5 FDI_RXN6 FDI_RXP6 FDI_RXN7 FDI_RXP7

NV_ALE NV_CLE NV_RB# NV_WR#0_RE# NV_WR#1_RE# NV_WE#_CK0 NV_WE#_CK1

NV_CE#3 NV_CE#2 NV_CE#1 NV_CE#0

NV_DQS0 NV_DQS1

NV_RCOMP

FDILINK

NVRAM

NV_DQ10/NV_IO10 NV_DQ11/NV_IO11 NV_DQ12/NV_IO12 NV_DQ13/NV_IO13 NV_DQ14/NV_IO14 NV_DQ15/NV_IO15

3

FDI_FSYNC0 FDI_LSYNC0

FDI_FSYNC1 FDI_LSYNC1

FDI_INT

NV_DQ0/NV_IO0 NV_DQ1/NV_IO1 NV_DQ2/NV_IO2 NV_DQ3/NV_IO3 NV_DQ4/NV_IO4 NV_DQ5/NV_IO5 NV_DQ6/NV_IO6 NV_DQ7/NV_IO7 NV_DQ8/NV_IO8 NV_DQ9/NV_IO9

E34 C35

E36 D35

B36

T33 P35 T31 P33 M35 L33 M36 M34 M30 F36 H33 F37 E39 G33 D40 F33

2

DL_FSYNC_ 0 12 DL_LSYNC_ 0 12

DL_FSYNC_ 1 12 DL_LSYNC_ 1 12

DL_INT 12

1

CLKOUT_BCLK0_N/CLKOUT_PCIE8N

CLKOUT_BCLK0_P/CLKOUT_PCIE8P

CK_133M _PCH_IN#8 CK_133M _PCH_IN8

CK_14M_ PCH8

B B

SR92

1MOHM1%

1 2

I

Y12

25Mhz

1 2

GND

12

NI

12

SR6

I

SC20

0

33PF/50V

NPO 5%

A A

5

GND

3

I

GND GNDGN DG ND

Y10_R

NOBOM

SR27

1 2

0

12

I

SC21

SC21 33PF/50V

33PF/50V

NPO 5%

4

+1P05V_ PCH

12

I

SR94

90.9

1%

XCLK_RC OMP

XTAL_25 M_PCH_IN

XTAL_25 M_PCH_OUT

Y32

CLKIN_BCLK_N

Y31

CLKIN_BCLK_P

CLKOUT_DP_N/CLKOUT_BCLK1_N

CLKOUT_DP_P/CLKOUT_BCLK1_P

AF7

REFCLK14IN

AA3

XCLK_RCOMP

Y4

XTAL25_IN

Y2

XTAL25_OUT

IBEXPEAK

Rev 1.0

CLKOUT_DMI_N CLKOUT_DMI_P

CLKOUT_PCIE7N

CLKOUT_PCIE7P

CLKOUT_PCIE6N

CLKOUT_PCIE6P

CLKOUT_PCIE5N

CLKOUT_PCIE5P

CLKOUT_PCIE4N

CLKOUT_PCIE4P

CLKOUT_PCIE3N

CLKOUT_PCIE3P

CLKOUT_PCIE2N

CLKOUT_PCIE2P

CLKOUT_PCIE1N

CLKOUT_PCIE1P

CLKOUT_PCIE0N

CLKOUT_PCIE0P

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_PEG_B_N CLKOUT_PEG_B_P

CLKOUT_PCI0 CLKOUT_PCI1 CLKOUT_PCI2 CLKOUT_PCI3 CLKOUT_PCI4

CLKOUTFLEX0/GPIO64 CLKOUTFLEX1/GPIO65 CLKOUTFLEX2/GPIO66 CLKOUTFLEX3/GPIO67

L38 K38

H40 J41

CK_120M _IPL#_R

H37

CK_120M _IPL_R

H38

TP_CK_1 00M_SRC7#

T7

TP_CK_1 00M_SRC7

T6

TP_CK_1 00M_SRC6#

U4

TP_CK_1 00M_SRC6

V4

TP_CK_1 00M_SRC5#

Y8

TP_CK_1 00M_SRC5

Y9

TP_CK_1 00M_SRC4#

P7

TP_CK_1 00M_SRC4

P6

TP_CK_1 00M_SRC3#

M9

TP_CK_1 00M_SRC3

M10

M6 M7

T10 T9

V2 W1

Y6 Y7

TP_CK_1 00M_PEX16_SL 2#

V7

TP_CK_1 00M_PEX16_SL 2

V8

CKOUT0

IPD

AF6

CKOUT1

IPD

AD7

CKOUT2

IPD

AF9

CKOUT3

IPD

AD9

CKOUT4

IPD

AD12

TP_CK_3 3M_14M_0

IPD

AD10

TP_CK_33M_14M_1

IPD

AK1

TP_CK_3 3M_14M_2

IPD

AB6

TP_CK_4 8M_33M_14M

IPD

AL3

3

SR47 39 OHM 5%

1 2

I

SR46 39 OHM 5%

1 2

I

SR48 39 OHM 5%

1 2

I

SR52 39 OHM 5%

1 2

I

SR57 39 OHM 5%

1 2

I

ST41 TPC26 b N OBOMST4 1 TPC 26b NOBOM

1

ST42 TPC26 b N OBOMST4 2 TPC 26b NOBOM

1

ST36 TPC26 b N OBOMST3 6 TPC 26b NOBOM

1

ST37 TPC26 b N OBOMST3 7 TPC 26b NOBOM

1

ST38 TPC26 b N OBOMST3 8 TPC 26b NOBOM

1

ST39 TPC26 b N OBOMST3 9 TPC 26b NOBOM

1

ST48 TPC26 b N OBOMST4 8 TPC 26b NOBOM

1

ST62 TPC26 b N OBOMST6 2 TPC 26b NOBOM

1

ST63 TPC26 b N OBOMST6 3 TPC 26b NOBOM

1

ST66 TPC26 b N OBOMST6 6 TPC 26b NOBOM

1

ST74 TPC26 b N OBOMST7 4 TPC 26b NOBOM

1

ST75 TPC26 b N OBOMST7 5 TPC 26b NOBOM

1

ST70 TPC26 b N OBOMST7 0 TPC 26b NOBOM

1

ST71 TPC26 b N OBOMST7 1 TPC 26b NOBOM

1

ST43 TPC26 b N OBOMST4 3 TPC 26b NOBOM

1

ST47 TPC26 b N OBOMST4 7 TPC 26b NOBOM

1

ST45 TPC26 b N OBOMST4 5 TPC 26b NOBOM

1

ST46 TPC26 b N OBOMST4 6 TPC 26b NOBOM

1

2

CK_133M _PCH_OUT# 13 CK_133M _PCH_OUT 1 3

CK_100M _PEG_DMI# 13 CK_100M _PEG_DMI 13

CK_100M _LAN# 36 CK_100M _LAN 36

CK_100M _PE1# 39 CK_100M _PE1 3 9

CK_100M _PE16# 38 CK_100M _PE16 38

CK_33M_ PCH 19 CK_33M_ SL1 40 CK_33M_ SIO 47

CK_33M_ TPM 50

CK_33M_ SL2 41

PEGATRON DT-MB RESTRICTED SECRET

INTEL_PCH - 6

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

IPMIP-DP

Engineer:

Vic_Chen

24 68Wednesd ay, April 07, 2010

1

24 68Wednesd ay, April 07, 2010

Rev

1.01

5

4

3

2

1

NOTE:

Internal VRM straping pin:GPIO27 (page.23)

VccVRM powers VccSATAPLL, VccapllEXP, VccFDIPLL, and VccACLK

VccSATAPLL, VccAPLLEXP, VccFDIPLL & VccAClk can ne left NC in on-Die VR enable Mode

NI

SL1

SL1 10UH/125 mA

10UH/125 mA

mx_l0805

2 1

NI

SL2

mx_l0805

1UH/300m A

2 1

NI

SL3

mx_l0805

1UH/300m A

2 1

NI

SL4

SL4 10UH/125 mA

NI

I

SL5

mx_l0603

1 2

21

SL10

0

12

+3P3V

VCCA_DP LLA_R

VCCA_DP LLB_R

+1P05V_ PCH_SL4

10UH/125 mA

mx_l0805

2 1

I

SL6

SL6 10UH/125 mA

10UH/125 mA

mx_l0805

2 1

I

SL7

SL7 10UH/125 mA

10UH/125 mA

mx_l0805

2 1

PEGATRON DT-MB RESTRICTED SECRET

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

2

Date: Sheet of

IPMIP-DP

+1P05V_ FILTER

+1P05V_ PCH

Title :

Engineer:

1

INTEL_PCH - 7

Vic_Chen

25 68Friday, April 02, 2010

Rev

1.01

GND GND

SL9

0

+1P05V_ PCH_R

12

IP R1.02 I

GND GND

+1P05V_ FILTER

12

NI

SCB1

SCB1 1UF/16V

1UF/16V

X7R 10%

X7R 10% mx_c0603

mx_c0603

12

NI

SCB7

SCB7 1UF/16V

1UF/16V

X7R 10%

X7R 10% mx_c0603

mx_c0603

12

I

SCB10

SCB10 1UF/16V

1UF/16V

X7R 10%

X7R 10% mx_c0603

mx_c0603

12

I

SCB11

SCB11 1UF/16V

1UF/16V

X7R 10%

X7R 10% mx_c0603

mx_c0603

SJP1

1 2

SHORTPIN_ RECT

SHORTPIN_ RECT SJP2

1 2

SHORTPIN_ RECT

SHORTPIN_ RECT SJP3

1 2

SHORTPIN_ RECT

SHORTPIN_ RECT SJP4

1 2

SHORTPIN_ RECT

12

NI

SCB2

SCB2 10UF/6.3V

10UF/6.3V

X5R 10%

X5R 10% mx_c0805

mx_c0805

12

NI

SCB4

SCB4 10UF/6.3V

10UF/6.3V

X5R 10%

X5R 10% mx_c0805

mx_c0805

GND

12

NI

SCB6

SCB6 10UF/6.3V

10UF/6.3V

X5R 10%

X5R 10% mx_c0805

mx_c0805

GND

12

NI

SCB8

SCB8 10UF/6.3V

10UF/6.3V

X5R 10%

X5R 10% mx_c0805

mx_c0805

GNDGND

12

I

SCB9

SCB9 1UF/16V

1UF/16V

X7R 10%

X7R 10% mx_c0603

mx_c0603

GND GND

12

+

I

SCE2

SCE2 220UF/16 V

220UF/16 V

12

+

I

SCE3

SCE3 220UF/16 V

220UF/16 V

I

M16

M18

M20

M22

M24

M26

G26

AA27

AT28

AH20

AJ22 AH22 AH23

AA26

AE16 AD16 AB16

AH1 AH3

AH4

AG5 AH6

AF10 AH13

AF13 AD13 AE15 AD15 AB15 AA15

AA16

AA18

AF16

P15 P16 N16

P18 N18

N20

N22

P24 N24

D24 C24 B24 D25 C25 B25

L26 K26

H26

F26 Y29 V29 T29 T30 Y36 V36 T36 T37 R37 R38 P38 P39 R40

T19 P19 V15 U15 T15

U19 N26

Y26

A23

AJ4

AJ5

AF8

Y15

Y16

Y18 Y19

AJ2

J26

I

U1G

VccIO1 VccIO2 VccIO3 VccIO4 VccIO5 VccIO6 VccIO7 VccIO8 VccIO9 VccIO10 VccIO11 VccIO12 VccIO13 VccIO14 VccIO15 VccIO16 VccIO17 VccIO18 VccIO19 VccIO20 VccIO21 VccIO22 VccIO23 VccIO24 VccIO25 VccIO26 VccIO27 VccIO28 VccIO29 VccIO30 VccIO31 VccIO32 VccIO33 VccIO34 VccIO35 VccIO36 VccIO37 VccIO38 VccIO39 VccIO40 VccIO41 VccIO42 VccIO43 VccIO44 VccIO45 VccIO46 VccIO47 VccIO48 VccIO49 VccIO50 VccIO51 VccIO52 VccIO53 VccIO54 VccIO55

VccDMI

VccME1 VccME2 VccME3 VccME4 VccME5 VccME6 VccME7 VccME8 VccME9 VccME10 VccME11 VccME12 VccME13 VccME14 VccME15 VccME16 VccME17 VccME18 VccME19 VccME20 VccME21 VccME22 VccME23 VccME24 VccME25 VccME26 VccME27

IBEXPEAK

Rev 1.0

VccCore1 VccCore2 VccCore3 VccCore4 VccCore5 VccCore6 VccCore7 VccCore8

VccCore9 VccCore10 VccCore11 VccCore12 VccCore13 VccCore14 VccCore15 VccCore16 VccCore17 VccCore18 VccCore19 VccCore20 VccCore21 VccCore22 VccCore23 VccCore24 VccCore25 VccCore26 VccCore27 VccCore28 VccCore29 VccCore30 VccCore31 VccCore32 VccCore33 VccCore34 VccCore35 VccCore36 VccCore37 VccCore38 VccCore39 VccCore40 VccCore41 VccCore42 VccCore43 VccCore44 VccCore45 VccCore46 VccCore47 VccCore48 VccCore49 VccCore50 VccCore51 VccCore52 VccCore53 VccCore54 VccCore55 VccCore56 VccCore57 VccCore58

Vss4 Vss5

Vss6 Vss7

VccSATAPLL

VccAPLLEXP

VccFDIPLL

VccAClk

VccADAC

VccADPLLA

VccADPLLB

AE18 AD18 AF19 AE19 AF20 AE20 AD20 U20 T20 AF22 AE22 U22 T22 AF23 AE23 AD23 AA23 Y23 V23 U23 T23 AF24 AE24 AB24 AA24 Y24 V24 T24 AE26 AD26 AB26 V26 U26 T26 P26 E26 C26 A26 T27 P27 E27 D27 B27 N28 M28 L28 K28 J28 H28 G28 F28 D28 C28 A28 P29 E29 D29 B29

C23 B22

P22 P23

P41

A21

A37

AA1

AF1

R2

T1

+1P05V_ PCH

GND

VCCAPLL EXP

VCCFDIPLL

VCCCLKP LL

VCCADAC

VCCA_DP LLA

VCCA_DP LLB

GNDGND

12

I

SCB17

SCB17 1UF/16V

1UF/16V

X7R 10%

X7R 10% mx_c0603

mx_c0603

I

SCB5

4.7UF/6.3V

X5R 10%

12

VCCSATA PLL

VCCAPLL EXP

VCCFDIPLL

12

GND

IP R1.01 Add crb1.5

12

I

SCB24

SCB24 10UF/6.3V

10UF/6.3V

X5R 10%

X5R 10% mx_c0805

mx_c0805

I

SCB25

SCB25 10UF/6.3V

10UF/6.3V

X5R 10%

X5R 10% mx_c0805

mx_c0805

IP R1.01 Add crb1.5

NI

SL8

0

VCCADAC

VCCA_DP LLAVCCSATA PLL

+1P05V_ FILTER

D D

12

GND GND

C C

I

SCB39

SCB39 10UF/6.3V

10UF/6.3V

X5R 10%

X5R 10% mx_c0805

mx_c0805

12

I

SCB41

SCB41 10UF/6.3V

10UF/6.3V

X5R 10%

X5R 10% mx_c0805

mx_c0805

12

I

SCB37

X5R 10%

4.7UF/6.3V

mx_c0805

12

I

SCB38

SCB38 1UF/16V

1UF/16V

X7R 10%

X7R 10% mx_c0603

mx_c0603

GND GND GND

NOTE:

SU1.U15 and SU1.T15 can be shorted together

but no with SU1.V15 and Y26 for better electrical quality

on HDMI 1080P 60Hz Deep color mode base on WW34 2009.

+1P05V_ FILTER

VCCIO1

12

I

M1C15

+1P05V_ FILTER

VCCIO2

+1P1V_V TT

B B

I

SCB40

SCB40 1UF/16V

1UF/16V

X7R 10%

X7R 10% mx_c0603

mx_c0603

12

I

SCB36

SCB36 10UF/6.3V

10UF/6.3V

X5R 10%

X5R 10% mx_c0805

mx_c0805

GNDGND

12

I

SCB35

SCB35 1UF/16V

1UF/16V

X7R 10%

X7R 10% mx_c0603

mx_c0603

12

GND

A A

M1C15

0.1UF/16V

X7R 10%

X7R 10% mx_c0402

mx_c0402

GND

12

I

M1C18

0.1UF/16V

X7R 10%

X7R 10% mx_c0402

mx_c0402

GND

+1P05V_ ME

+1P05V_ PCH

NOBOMSJP1

NOBOM

NOBOMSJP2

NOBOM

NOBOMSJP3

NOBOM

NOBOMSJP4

NOBOM

IP R1.01 Add crb1.5

600Ohm/1 00Mhz/0.5A

12

+

I

SCE4

SCE4 220UF/16 V

220UF/16 V

SR142 0

I

12

NI

SR144

0

SR143 0

I

IP R1.01 Change to o OHM

IP R1.02 I

5

4

3

5

4

3

2

1

Note

Place SCB45 close to SU1.AJ18 for EMI issue

I

AJ18

I

SCB45

0.1UF/16V

X7R 10%

N38 N40

B39 A39

AH16 AH18 AE27 AD27

AW1

BA3 AV2 AY3

AK14

AJ14 AJ16

U40

I

U1H

VccSusHDA

VccME3_3_1 VccME3_3_2

V_CPU_IO V_CPU_IO_NCTF

Vcc3_3_1 Vcc3_3_2 Vcc3_3_3 Vcc3_3_4 Vcc3_3_NCTF1 Vcc3_3_NCTF2 Vcc3_3_5 Vcc3_3_6 Vcc3_3_7 Vcc3_3_8 Vcc3_3_9

A9

Vcc3_3_10 Vcc3_3_11

V5REF_Sus

V5REF

VccVRM1 VccVRM2 VccVRM3 VccVRM4

VccPNAND1 VccPNAND2 VccPNAND3

VccLAN1 VccLAN2

VccSus3_3_1 VccSus3_3_2 VccSus3_3_3 VccSus3_3_4 VccSus3_3_5 VccSus3_3_6 VccSus3_3_7 VccSus3_3_8

VccSus3_3_9 VccSus3_3_10 VccSus3_3_11 VccSus3_3_12 VccSus3_3_13 VccSus3_3_14 VccSus3_3_15 VccSus3_3_16 VccSus3_3_17

VccSus3_3_NCTF1 VccSus3_3_NCTF2

AW16

AN1

C2 C3 L40 L39

P30 M39 M41

Y20 Y22

AV29 AV25 BA26 AW26 AU26 AT26 AR26 AP26 AN26 AM26 AL26 AK26 AY27 AV27 AU27 AW39 AW40 BA40 AY40

V5REF_S US

V5REF

VCCLAN

12

I

SCB15

SCB15 1UF/16V

1UF/16V

X7R 10%

X7R 10% mx_c0603

mx_c0603

GND

VCCVRM1 VCCVRM2

GND GND

12

GND

+1P8V_S FR +1P05 V_PCH_R

Change for CRB1.5

+1P8V_S FR

I

12

SCB34

0.1UF/16V

X7R 10%

+3P3VSB

12

I

SCB31

0.1UF/16V

X7R 10%

+3P3VSB

D D

+3P3V_M E

C C

+3P3V

I

SCB13

0.1UF/16V

X7R 10%

12

B B

GND

I

SCB30

0.1UF/16V

X7R 10%

12

GNDGND

I

SCB27

0.1UF/16V

X7R 10%

12

GND

+1P1V_V TT

12

I

SCB3

4.7UF/6.3V

X5R 10%

GND

I

SCB28

0.1UF/16V

X7R 10%

12

I

SCB26

SCB26 1UF/16V

1UF/16V

X7R 10%

X7R 10% mx_c0603

mx_c0603

GND

12

I

SCB16

0.1UF/16V

X7R 10%

GND

12

GND

12

I

SCB29

0.1UF/16V

X7R 10%

GND GND

I

SCB12

0.1UF/16V

X7R 10%

12

+VCCME3 P3

I

SCB44

0.1UF/16V

X7R 10%

12

GND

I

SCB14

0.1UF/16V

X7R 10%

12

I

SR156

SR156 0

0

I

12

SCB42

0.1UF/16V

X7R 10%

12

I

SCB32

0.1UF/16V

X7R 10%

I

SR100

SR100 10

10

I

SR101

SR101 10

10

12

+5VSB

12

+5V

12

+1P8V_S FR +1P05 V_PCH

12

NI

SR159

I

SR148

0

12

GND GND

NI

SR102

SR102 0

0

mx_r0603

12

I

SCB33

SCB33 1UF/16V

1UF/16V

X7R 10%

X7R 10% mx_c0603

mx_c0603

NI

Q1

3

BAT54CW

I

Q2

3

BAT54CW

12

NI

SR149

SR149 0

0

NOTE:

VccVRM powers VccSATAPLL, VccapllEXP, VccFDIPLL, and VccACLK

I

SR103

SR103 0

0

mx_r0603

+1P05V_ ME

12

NOTE:

USE INTEL LAN

NON-INTEL LAN

SR102 SR103

NI I

I NI

+3P3VSB

1

2

+3P3V

1

2

+BATT

+1P5V_S TBY_INT +1P1V_D SW_INT +1P1V_S TBY_INT

12

I

SCB21

0.1UF/16V

X7R 10%

A A

GND GNDGND

12

GND

I

SCB43

0.1UF/16V

X7R 10%

12

I

SCB22

0.1UF/16V

X7R 10%

12

I

SCB23

0.1UF/16V

X7R 10%

AH33 AF27 AF30

DcpSST DcpSusByp DcpSus

IBEXPEAK

Rev 1.0

VccRTC_NCTF

NOTE:

MOW WW08 recommand to reserved SCB43.

5

4

VccRTC

DcpRTC

3

AY29 BA39 AY38

+1P5V_R TC_INT

12

I

SCB18

0.1UF/16V

X7R 10%

GND GND GND

12

I

SCB19

0.1UF/16V

X7R 10%

2

12

I

SCB20

SCB20 1UF/16V

1UF/16V

X7R 10%

X7R 10% mx_c0603

mx_c0603

PEGATRON DT-MB RESTRICTED SECRET

INTEL_PCH - 8

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

IPMIP-DP

Engineer:

Vic_Chen

26 68Tuesday, March 23, 2 010

1

26 68Tuesday, March 23, 2 010

Rev

1.01

5

I

U1I

AB19

Vss8

D D

C C

B B

A A

AB27

Vss9

Y27

Vss10

AH15

Vss11

AD19

Vss12

AA19

Vss13

V19

Vss14

E19

Vss15

AU20

Vss16

AP20

Vss17

AJ20

Vss18

AB20

Vss19

AA20

Vss20

P20

Vss21

L20

Vss22

K20

Vss23

F20

Vss24

BA21

Vss25

AU22

Vss26

AT22

Vss27

AN22

Vss28

AK22

Vss29

AD22

Vss30

AB22

Vss31

AA22

Vss32

V22

Vss33

L22

Vss34

K22

Vss35

E22

Vss36

D22

Vss37

AU23

Vss38

AB23

Vss39

E23

Vss40

AW24

Vss41

AV24

Vss42

AP24

Vss43

AJ24

Vss44

AH24

Vss45

AD24

Vss46

U24

Vss47

J24

Vss48

F24

Vss49

AJ26

Vss50

AH26

Vss51

AF26

Vss52

AH27

Vss53

V27

Vss54

U27

Vss55

BA28

Vss56

AW28

Vss57

AR28

Vss58

AN28

Vss59

AM28

Vss60

AJ28

Vss61

AU29

Vss62

AH29

Vss63

AF29

Vss64

AD29

Vss65

AB29

Vss66

AU30

Vss67

AR30

Vss68

AN30

Vss69

AD30

Vss70

AB30

Vss71

Y30

Vss72

L30

Vss73

F30

Vss74

E30

Vss75

A30

Vss76

AF31

Vss77

AD31

Vss78

P31

Vss79

L31

Vss80

H31

Vss81

C31

Vss82

AM32

Vss83

AK32

Vss84

AH32

Vss85

AF32

Vss86

IBEXPEAK

GND GND GND GND

Rev 1.0

Vss_NCTF1 Vss_NCTF2 Vss_NCTF3 Vss_NCTF4 Vss_NCTF5 Vss_NCTF6 Vss_NCTF7 Vss_NCTF8

Vss_NCTF9 Vss_NCTF10 Vss_NCTF11 Vss_NCTF12 Vss_NCTF13

NC2 NC3 NC4 NC5

Vss87 Vss88 Vss89

Vss90 Vss91 Vss92 Vss93 Vss94 Vss95 Vss96 Vss97 Vss98

Vss99 Vss100 Vss101 Vss102 Vss103 Vss104 Vss105 Vss106 Vss107 Vss108 Vss109 Vss110 Vss111 Vss112 Vss113 Vss114 Vss115 Vss116 Vss117 Vss118 Vss119 Vss120 Vss121 Vss122 Vss123 Vss124 Vss125 Vss126 Vss127 Vss128 Vss129 Vss130 Vss131 Vss132 Vss133 Vss134 Vss135 Vss136 Vss137 Vss138 Vss139 Vss140 Vss141 Vss142 Vss143

V11 Y12 V10 Y11

AV28 U39 B10 B41 C41 AW41 AY41 A40 B40 A5 B2 AY2 BA2 C1 E1 BA1 G41 AA38 AU38 D37 E37 J37 M37 N37 W37 AC37 AF37 AK37 AN37 AU37 BA37 AF36 AH36 A35 T35 V35 D34 F34 G34 L34 P34 AB34 AD34 AH34 U18 V18 AB18 AF18 AM18 AN18 AR18 AT18 AW18 C17 AW17 E16 F16 J16 K16 AK34 E33 M33 V33 Y33 AB33 AF33 AU33 C32 K32 L32

GND

4

I

U1J

R5

Vss144

R4

Vss145

AA41

Vss146

AH41

Vss147

AU41

Vss148

K40

Vss149

Y40

Vss150

AB40

Vss151

AD40

Vss152

C39

Vss153

D39

Vss154

G39

K39 V39

W39 AA39 AD39 AE39

AF39

G38 AH19 AU19

C18

F18

T18 L16 T16

U16

V16

AU16

E15 A14 F14

M14

N14 AM14 AN14

AT14

BA14

E13 V13 Y13 E12 F12 L12

M12

V12

AF12 AM12 AN12 AU12

C11

F11

M11

L11 P11 T11

AD11

AF11 AR11

C10

Y10 AK10 AM10

AH9 AK9 AU9

J39

J18

J14

E9

H9

V9

E8 L8

M8

P8

Vss155 Vss156 Vss157 Vss158 Vss159 Vss160 Vss161 Vss162 Vss163 Vss164 Vss165 Vss166 Vss167 Vss168 Vss169 Vss170 Vss171 Vss172 Vss173 Vss174 Vss175 Vss176 Vss177 Vss178 Vss179 Vss180 Vss181 Vss182 Vss183 Vss184 Vss185 Vss186 Vss187 Vss188 Vss189 Vss190 Vss191 Vss192 Vss193 Vss194 Vss195 Vss196 Vss197 Vss198 Vss199 Vss200 Vss201 Vss202 Vss203 Vss204 Vss205 Vss206 Vss207 Vss208 Vss209 Vss210 Vss211 Vss212 Vss213 Vss214 Vss215 Vss216 Vss217 Vss218 Vss219 Vss220

IBEXPEAK

Rev 1.0

TP22_NCTF1 TP22_NCTF2 TP22_NCTF3 TP22_NCTF4

TP10 TP12 TP13 TP21 TP11

Vss221 Vss222 Vss223 Vss224 Vss225 Vss226 Vss227 Vss228 Vss229 Vss230 Vss231 Vss232 Vss233 Vss234 Vss235 Vss236 Vss237 Vss238 Vss239 Vss240 Vss241 Vss242 Vss243 Vss244 Vss245 Vss246 Vss247 Vss248 Vss249 Vss250 Vss251 Vss252 Vss253 Vss254 Vss255 Vss256 Vss257 Vss258 Vss259 Vss260 Vss261 Vss262 Vss263 Vss264 Vss265 Vss266

TP1 TP2 TP3 TP9

L18 K18 J20 AT24 AR24 P10 P9 AH30 V20

AY1 A41 BA41 A3

AR1 P1 G1 U2 K2 AW3 AK3 AF3 W3 V3 U3 T3 L3 K3 AA4 P4 E4 AV5 AU5 AN5 AK5 AF5 AC5 AB5 Y5 W5 T5 N5 M5 J5 H5 F5 E5 AD6 V6 J6 E6 BA7 J7 H7 A7 AL8 AK8 AD8 AB8 T8

3

TP_PCH_ L18 TP_PCH_ K18 TP_PCH_ J20

TP_PCH_ P10 TP_PCH_ P9 TP_PCH_ AH30

TP_TP22 NCTF1 TP_TP22 NCTF2 TP_TP22 NCTF3 TP_TP22 NCTF4

ST51 TPC26 b N OBOMST5 1 TPC 26b NOBOM

1

ST53 TPC26 b N OBOMST5 3 TPC 26b NOBOM

1

ST54 TPC26 b N OBOMST5 4 TPC 26b NOBOM

1

ST57 TPC26 b N OBOMST5 7 TPC 26b NOBOM

1

ST58 TPC26 b N OBOMST5 8 TPC 26b NOBOM

1

ST59 TPC26 b N OBOMST5 9 TPC 26b NOBOM

1

ST61 TPC26 b N OBOMST6 1 TPC 26b NOBOM

1

ST67 TPC26 b N OBOMST6 7 TPC 26b NOBOM

1

ST68 TPC26 b N OBOMST6 8 TPC 26b NOBOM

1

ST69 TPC26 b N OBOMST6 9 TPC 26b NOBOM

1

2

NOTE:

BOM option depend on thermal result

I

SHS1

1 2 3 4

HEATSINK_ 2ANCHOR

GND

I

CLIP1

ANCHOR_ CLIP

ANGLE_4 5

I

CLIP2

ANCHOR_ CLIP

ANGLE_4 5

1

PEGATRON DT-MB RESTRICTED SECRET

INTEL_PCH - 9

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

5

4

3

2

Date: Sheet of

IPMIP-DP

Engineer:

Vic_Chen

27 68Tuesday, March 23, 2 010

1

27 68Tuesday, March 23, 2 010

Rev

1.01

5

+5V

1

NI/VGA-I

VD1

VD1 BAV99W -L

BAV99W -L

2

NI/VGA-I

VD2

VD2 BAV99W -L

BAV99W -L

3

1

2

D D

VGA_RED2 3

3

1

2

NI/VGA-I

VD3

VD3 BAV99W -L

BAV99W -L

3

GND

12

NI/VGA-I

VR1

VR1 150

150

1%

4

12

NI

VCB1

0.1UF/16V

GND

12

NI

VC1

3.3PF/50V

NPO 0.25P F

+5V_DAC _CLAMP

NOTE:

Install the VD1/VD2/VD3/VD4/VD5 diode to prevent from ESD issue

NI/VGA-I

VL2

VL2 0 Ohm

0 Ohm

1 2

mx_l0603

RA

12

NI/VGA-I

VC2

5.6PF/50V

NPO 0.25P F

NI/VGA-I

VL3

0.068UH/3 00mA

mx_l0603

21

12

NI/VGA-I

VC3

3.3PF/50V

NPO 0.25P F

3

2

1

2

NI/VGA-I

VD4

VD4 BAV99W -L

BAV99W -L

3

1

2

NI/VGA-I

VD5

VD5 BAV99W -L

BAV99W -L

3

GND

NI/DVI-I-I

VR10 0

1 2

VR11 0

1 2

VR12 0

1 2

1

R_BLUE 31

R_GREEN 31

R_RED 31

NI/VGA-I

VL4

VL4 0 Ohm

0 Ohm

12

NI

VC4

3.3PF/50V

NPO 0.25P F

GNDGND

12

NI

VC7

3.3PF/50V

NPO 0.25P F

1 2

mx_l0603

NI/VGA-I

VL6

VL6 0 Ohm

0 Ohm

1 2

mx_l0603

VGA_GRE EN23

C C

VGA_BLU E2 3

NOTE:

Place there VGA filter components

12

NI/VGA-I

VR2

VR2 150

150

1%

12

NI/VGA-I

VR4

VR4 150

150

1%

GNDGNDGND

NI/VGA-I

VL5

0.068UH/3 00mA

GA

mx_l0603

12

NI/VGA-I

VC5

5.6PF/50V

NPO 0.25P F

GND GND

NI/VGA-I

VL7

0.068UH/3 00mA

BA

mx_l0603

12

NI/VGA-I

VC8

5.6PF/50V

NPO 0.25P F

21

GND

12

NI/VGA-I

VC6

3.3PF/50V

NPO 0.25P F

NI/VGA-I

VC9

3.3PF/50V

NPO 0.25P F

NI/VGA-I

1 2

VR3 100

RED

GREEN BLUE VHSYNC

VGADATA

12

GND

NI/VGA-I

VR20

200KOhm

NI/DVI-I-I

VR13 0

1 2

VR22 0

1 2

RED

GREEN

BLUE +5V_VGA _CONN

R_VHSYNC 3 1

R_VVSYNC 31

VGADATA

J69

D_SUB_15P

10

I

1617

6 1 7 2 8 3 9 4

5

11

12

13

14

15

within 500 mils of the VGA connector

VHSYNC_OB

VVSYNC_OB

NI

VCB6

0.1UF/16V

GNDGND

1 2

VR8

30 OHM

5%

5% NI

NI

VR9

30 OHM

5%

5% NI

NI

VR21

1 2

4.7KOHM

5%

5% NI

NI

VR23

1 2

4.7KOHM

5%

5% NI

NI

+3P3V

1 2

NI/VGA-I

VR5

VR5 100

100

VVSYNC VGACLK

12

NI

VC10

VC10 470PF/50 V

470PF/50 V

X7R 10%

12

NI

VC11

VC11 12PF/50V

12PF/50V

NPO 5%

GNDGND GN D

12

NI/VGA-I

VR44

200KOhm

GND

12

NI

VC12

VC12 12PF/50V

12PF/50V

NPO 5%

12

GND

NI

VC13

VC13 470PF/50 V

470PF/50 V

X7R 10%

VGACLK

VVSYNC

VHSYNC

GND

GND GND

VR6 0

1 2

I

VR7 0

1 2

I

NI

VU1

74AHCT1 G125

1

OE#

Vcc

GND

2

A

3

GND

NI

VU2

74AHCT1 G125

1

OE#

2

A

3

GND

Y

Vcc

Y

VGA_HSYNC23

B B

VGA_VSYNC2 3

+5V

5

4

5

4

12

NI/VGA-I

2

NI/VGA-I

VL8

VL8 80Ohm/10 0Mhz/2A

80Ohm/10 0Mhz/2A

mx_l0805

+5V_VGA _CONN

21

12

NI/VGA-I

VCB3

0.1UF/16V

GND

PEGATRON DT-MB RESTRICTED SECRET

VGA PORT

1

VGA PORT

Vic_Chen

28 68Wednesd ay, April 07, 2010

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

Engineer:

IPMIP-DP

Rev

1.01

GND

+3P3V

VR144.7K

12

NI/VGA-I

VR154.7K

12

NI/VGA-I

DDCA_CL K_G DDCA_DA TA_G

A A

DDCA_DA TA23

DDCA_CL K23

5

NI/VGA-I

1

VQ2

G

2N7002

2

D

S

NI/VGA-I

1

VQ1

G

2N7002

3

2

3

2

D

S

3

4

NI/VGA-I

VR164.7K

12

NI/VGA-I

VR174.7K

12

NI/VGA-I

+5V +5V_VGA

NI/VGA-I

VD6

VD6 SS14

SS14

1 2

RDDCA_D ATA

RDDCA_C LK

12

NI/VGA-I

VR18

2.2K

NI/VGA-I

VF1

1.1A/6V

1 2

12

NI/VGA-I

VR19

2.2K

3

+5V_VGA _L

5

D D

+3P3V

12

NI/DVI-I

12

NI

M1CB24

M1CB24 15PF/50V

15PF/50V

NPO 5%

NI/DVI-I

M1R26

M1R26 1K

1K

NI/DVI-I

M1R33

1 2

10K

C C

PCIE_B430,38

PCIE_B4_R

PMBS390 4

4

1

+3P3V

NI/DVI-I

M1Q5

B

GNDGND

3

12

NI/DVI-I

M1R28

M1R28 1K

1K

OE_EN# 30

3

3 C

C

E

E 2

2

1

B B

A A

NOTE:

PCIE X16 PCIE_B4

Plugged

Unplugged

LOW

HI

SEL

(MUX) LOW

HI

DDC_EN#

(Level Shifter)

LOW

HI

OE_EN#

(Level Shifter)

HI

LOW

Function

PCIE x16

DVI , HDMI

PEGATRON DT-MB RESTRICTED SECRET

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

5

4

3

2

Date: Sheet of

IPMIP-DP

Engineer:

1

DVI Control

Vic_Chen

29 68Wednesd ay, April 07, 2010

Rev

1.01

5

4

3

2

1

CH7318: 02G480001000 ASM1442: 022U-0004000

MU5

+3P3V

D D

12

NI/DVI-I

MR25

2.2K

DVI_HPD23 SDVO_CT RL_DATA23 SDVO_CT RL_CLK23

PCIE_B429,38

C C

NOTE:

DVI_TMDSB _CLK23 DVI_TMDSB _CLK#23

DVI_TMDSB _DATA023 DVI_TMDSB _DATA0#23

DVI_TMDSB _DATA123 DVI_TMDSB _DATA1#23

DVI_TMDSB _DATA223 DVI_TMDSB _DATA2#23

OE_EN#29

Pericom PI3VDP411LS

R1.02G

Pin 3, 4, 6, 10,34, and 35 are internal 100K ohm pull-up

B B

OC_3

OC_2 OC_1 OC_0 Vswing

(Pin10)

0

(Pin6) (Pin4)

0

(Pin3)

0

1

0

0 0 1 0

0

1

0 1 0 0

1

0

1

0

0 1 1 0

1

0

1

1 0 0 0

0

1

0

1 0 1 0

0

1

A A

1 1 0 0

1

0

1 1 1 0

1

5

(mV)

500

600

750

1000

500

400

1000

Pre/Deemphasis

1.5dB

3.5dB

-3.5dB

0

6dB

0

6dB

9dB

0

-6dB

-9dB

12

NI/DVI-I

MR36

2.2K

+3P3V

ML1 120Ohm /100Mhz/0.6A

mx_l0603

12

NI

MCB7

MCB7 10UF/6.3V

10UF/6.3V

X5R 10%

12

NI

MCB6

MCB6 15PF/50V

15PF/50V

NPO 5%

GND

NOTE:

21

12

NI

MCB8

0.1UF/16V

GND GND GNDGND

12

NI

MCB17

MCB17 15PF/50V

15PF/50V

NPO 5%

GND

NI/DVI-I

NI/DVI-I NI/DVI-I

NI/DVI-I

NI/DVI-I NI/DVI-I

NI/DVI-I

NI/DVI-I NI/DVI-I

NI/DVI-I

NI/DVI-I NI/DVI-I

NI/DVI-I

12

MR21

NI

0

GND

Pericom PI3VDP411LS

EQ0

(Pin34)

EQ1 Equalization

(Pin35)

0

1

4

0

1

0

1

NI/DVI-I

12

NOTE:

NI

12

NI

MCB9

0.1UF/16V

NI

MCB10

0.1UF/16V

GND GND GND

M2C2 0.1UF/16V X7R 10%

M2C2 0.1UF/16V X7R 10% M2C4 0.1UF/16V X7R 10%

M2C4 0.1UF/16V X7R 10%

M2C1 0.1UF/16V X7R 10%

M2C1 0.1UF/16V X7R 10% M2C5 0.1UF/16V X7R 10%

M2C5 0.1UF/16V X7R 10%

M2C8 0.1UF/16V X7R 10%

M2C8 0.1UF/16V X7R 10% M2C7 0.1UF/16V X7R 10%

M2C7 0.1UF/16V X7R 10%

M2C9 0.1UF/16V X7R 10%

M2C9 0.1UF/16V X7R 10% M2C110.1UF/16 V X7R 10%

M2C110.1UF/16 V X7R 10%

Place near Level shifter

MR33

1 2

12

MR33 10KOhm

10KOhm

NI/DVI-I

MR23

MR23 0

0

MR35

MR35 10KOhm

10KOhm

NI

1 2

12

MR19

NI

0

(dB)

3

7.2

10

12

DVI_VDD3P 3V

NI/DVI-I

MCB11

0.1UF/16V

12

NI/DVI-I

MCB12

0.1UF/16V

DVI_LEV_S DA_SOCE DVI_LEV_S CL_SOCE

12

NOTE:

DDC_EN Passgate

0V

3.3V

12 12

DVI_TMDSB _CLK_C DVI_TMDSB _CLK#_C

DVI_TMDSB _DATA0_C DVI_TMDSB _DATA0#_C

DVI_TMDSB _DATA1_C DVI_TMDSB _DATA1#_C

DVI_TMDSB _DATA2_C DVI_TMDSB _DATA2#_C

+3P3V +3P 3V+3P3V +3P 3V

MR31

MR31 10KOhm

10KOhm

NI

1 2

12

MR20

NI

0

GNDGNDGND

NI

GND

NOTE:

OE* IN_D Termination

1

0

12

NI/DVI-I

MCB13

0.1UF/16V

Disable

Enable

MR32

MR32 10KOhm

10KOhm

NI

1 2

ANALOG2 _R_1

12

MR29

MR29 0

0

Hi-Z

50ohm

2

VCC1

26

VCC5

15

VCC3

21

VCC4

11

VCC2

33

VCC6

46

VCC8

40

VCC7

7

HPD

8

SDA

9

SCL

32

DDC_EN

39

IN_D1+

38

IN_D1-

42

IN_D2+

41

IN_D2-

45

IN_D3+

44

IN_D3-

48

IN_D4+

47

IN_D4-

25

OE#

R1.04G

10

RT_EN#

FUN_R1

3

4 34 35

PC0 PC1 DDCBUF_EN CFG

PS8101

NI/DVI-I

FUN_R2 FUN_R3 FUN_R4

IP R1.01 Change to PS8101

OUT_D Outputs

Hi-Z

Active

3

HPD_SINK SDA_SINK

SCL_SINK

OUT_D1+

OUT_D1-

OUT_D2+

OUT_D2-

OUT_D3+

OUT_D3-

OUT_D4+

OUT_D4-

REXT

GND1 GND2 GND3 GND5 GND4 GND8 GND7 GND6

GND10

GND9 GND11 GND12 GND13 GND14 GND15

30 29 28

22

23

19

20

16

17

13

14

6

1 5 12 24 18 36 31 27 43 37 49 50 51 52 53

REXT_DV I_R

+5V_DVI

12

NI/DVI-I

MR34

2.2K

12

NI

MCB14

MCB14 15PF/50V

15PF/50V

NPO 5%

GND GND

1 2

GND

MR30

MR30 499 Ohm

499 Ohm

1%

1% NI/DVI-I

NI/DVI-I

GND

2

12

NI/DVI-I

MR11

2.2K

12

NI

MCB15

MCB15 15PF/50V

15PF/50V

NPO 5%

MC3

NI

1 2

0.1UF/16V

MC6

NI

1 2

0.1UF/16V

MC10

NI

1 2

0.1UF/16V

MC12

NI

1 2

0.1UF/16V

NOTE:

HPD_SINK status (+5V tolerance)

NOTE:

HI

LOW

NI

MR12

OUT_D1

1 2

X7R 10%

390

NI

MR26

OUT_D2

1 2

X7R 10%

390

NI

MR27

OUT_D3

1 2

X7R 10%

390

NI

MR28

OUT_D4

1 2

X7R 10%

390

If using Parade PS8101 Level Shifter, pin 4 pin 3 Recommended Equalization[PC1,PC0]=01, 4dB

If using Asmedia ASM1442 Level Shifter, connect a 10.2K ohm 1% to GND.

If using Chrontel CH7318C Level Shifter, connect a 1.2K ohm 1% to GND.

plugged

unplugged

DVI_HP_DE TECT 31 DVI_DDCA_ DATA 31 DVI_DDCA_ CLK 31

DVI_TXC_P 31

DVI_TXC_N 31

DVI_TXD0_ P 3 1

DVI_TXD0_ N 31

DVI_TXD1_ P 3 1

DVI_TXD1_ N 31

DVI_TXD2_ P 3 1

DVI_TXD2_ N 31

PEGATRON DT-MB RESTRICTED SECRET

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

IPMIP-DP

Engineer:

1

DVI Level shifter

Vic_Chen

30 68Wednesd ay, April 07, 2010

Rev

1.01

5

MR1 0

1 2

NI/DVI-I

DVI_TXD0_P30

DVI_TXD0_N30

D D

DVI_TXD1_P30

DVI_TXD1_N30

DVI_TXD2_P30

DVI_TXD2_N30

C C

DVI_TXC_P30

DVI_TXC_N30

DVI_DDCA_DA TA30

DVI_DDCA_CLK30

B B

MR2 0

MR3 0

MR4 0

MR5 0

MR6 0

MR7 0

MR8 0

Change +5V to +5VSB

for leakage current risk

14

1 2

14

1 2

14

1 2

14

1 2

NI/DVI-I

NI

23

90OHM/100MHZ/330m A

90OHM/100MHZ/330m A ML6

ML6

NI/DVI-I

NI

23

90OHM/100MHZ/330m A

90OHM/100MHZ/330m A ML8

ML8

NI/DVI-I

NI

23

90OHM/100MHZ/330m A

90OHM/100MHZ/330m A ML7

ML7

NI/DVI-I

NI

23

90OHM/100MHZ/330m A

90OHM/100MHZ/330m A ML5

ML5

NI/DVI-I

NI

MU9

CM1213_04SO

CH1

CH4

CH1

CH4

1

6

VN

2

CH2 CH3

3 4

GND

NI

MU6

CM1213_04SO

CH1

1

VN

2

CH2 CH3

+5VSB

2

3

3 4

R_DVI_TXC_N

1

NI/DVI-I

MD10

MD10 BAT54SW

BAT54SW

GND

+5VSB

VP

5

+5VSB

CH4

6

VP

5

1

2

NI/DVI-I

MD9

MD9 BAT54SW

BAT54SW

3

4

R_DVI_TXD2_P R_DVI_TXD2_N

R_DVI_TXD1_P R_DVI_TXD1_N

R_DVI_TXD0_P R_DVI_TXD0_N

R_DVI_TXC_P R_DVI_TXC_N

R_DVI_DDCA_D ATA R_DVI_DDCA_C LK

12X525028000

J64

R_DVI_TXD2_P R_DVI_TXD2_N

R_DVI_TXD1_P R_DVI_TXD0_N R_DVI_TXD1_N

R_DVI_TXD0_P R_DVI_TXD0_N

R_DVI_TXC_P R_DVI_TXC_N

GND

J64

2

TMDS_DATA_2+

1

TMDS_DATA_2-

5

TMDS_DATA_4+

4

TMDS_DATA_4-

10

TMDS_DATA_1+

9

TMDS_DATA_1-

13

TMDS_3+

12

TMDS_DATA_3-

18

TMDS_DATA_0+

17

TMDS_DATA_0-

21

TMDS_DATA_5+

20

TMDS_DATA_5-

23

TMDS_CLK+

24

TMDS_CLK-

25

P_GND1

26

P_GND2

27

NP_NC1

28

NP_NC2

DVI_CON_30P

NI/DVI-I

DVI-I

GND

Shield: 1245-001W000 (12X525028000) No Shield: 1245-001S000 (12X525028W00)

DDC_DATA

HOT_PLUG_DETECT

GND_for+5V

+5V_POWER

TMDS_CLK_Shield

TMDS_2/4_Shield TMDS_DATA_1/3_Shield TMDS_DATA_0/5_Shield

DDC_CK

GREEN

BLUE

H_SYNC

A_GND1 A_GND2

GND1 GND2 GND3 GND4

RED

NC

R_DVI_DDCA_C LK

6

R_DVI_DDCA_D ATA

7

C_DVI_HPD

16

C1

C2

C3

C4 8

C51 C52 15

+5V_DVI_CONN

14

22 3 11 19

29 30 31 32

+5V_DVI_CONN

DVI_HP_DETEC T30

R_RED

R_GREEN

R_BLUE

R_VHSYNC R_VVSYNC

3

R_RED 28

R_GREEN 28

R_BLUE 28

R_VHSYNC 28 R_VVSYNC 28

GND

2 1

12

NI/DVI-I

MCB18

0.1UF/16V

GND

+3P3V

12

NI

MR15

4.7K

NI

MQ3

3

PMBS3904

C

B

1

B

1

E

E 2

2

GND

R_DVI_DDCA_D ATA R_DVI_DDCA_C LK

Just for Layout

MF2

1 2

1.1A/6V

NI/DVI-I

1

R_DVI_HPD

1245-000D000

+5V_DVI

NI/DVI-I

MR18

MR18 1K

1K

1

GND

NI

MR17

4.7K

12

+5V_POWER

GND_for+5V

HOT_PLUG_DETECT

TMDS_DATA_0/5_Shield TMDS_DATA_1/3_Shield

TMDS_2/4_Shield

TMDS_CLK_Shield

P_GND329P_GND430P_GND531P_GND6

32

NI/DVI-I

ML4

ML4 70Ohm/100Mhz/3A

70Ohm/100Mhz/3A

mx_l0805

+5V_DVI_L

+3P3V

12

NI

MR16

4.7K

DVI_HP_DETEC T#

R_DVI_TXD0_P

R_DVI_TXD1_P R_DVI_TXD1_N

R_DVI_TXD2_P R_DVI_TXD2_N

R_DVI_TXC_P R_DVI_TXC_N

R_VVSYNC

NI

MQ4

3

PMBS3904

C

B

E

E 2

2

GND

CON2

18

TMDS_DATA_0+

17

TMDS_DATA_0-

10

TMDS_DATA_1+

9

TMDS_DATA_1-

2

TMDS_DATA_2+

1

TMDS_DATA_2-

13

TMDS_DATA_3+

12

TMDS_DATA_3-

5

TMDS_DATA_4+

4

TMDS_DATA_4-

21

TMDS_DATA_5+

20

TMDS_DATA_5-

23

TMDS_CLK+

24

TMDS_CLK-

7

DDC_DATA

6

DDC_CK

8

NC

DVI_CON_24P

NI

PEGATRON DT-MB RESTRICTED SECRET

DVI-D Shield: 1245-000D000 (12X524283000) No Shield: 1245-0018000 (12X525024W00)

+5V

2

3

P_GND1 P_GND2

NP_NC1 NP_NC2

NI/DVI-I

MD1

MD1 SS14

SS14

12

NI

MD4

BAT54SW

12

14

15

16

19 11 3 22

25 26

27 28

2

+5V

+5V_DVI_CONN

C_DVI_HPD

1

C_DVI_HPD

GND

A A

Title :

DVI-I Connector

Vic_Chen

Engineer:

IPMIP-DP

1

Engineer:

Rev

1.01

31 68Wednesday, Ap ril 07, 2010

Pegatron Corp .

Size P roject Name

A2

Date: Sheet of

5

4

3

2

Date: Sheet of

5

VP

M1C7

1 2

I

DP_TXP023

DP_TXN02 3

D D

I

1 2

I

0.1UF/10VX7R 10%

mx_c0402

0.1UF/10VX7R 10%

mx_c0402

M1C5

M1L11

M1L12

M1L13

VP

1 2

0

M1RN4A

VP

3 4

0

M1RN4B

1

2

1

2

VP

M1C6

1 2

I

DP_TXP123

DP_TXN12 3

I

1 2

I

0.1UF/10VX7R 10%

mx_c0402

0.1UF/10VX7R 10%

mx_c0402

M1C8

VP

7 8

0

M1RN3D

VP

5 6

0

M1RN3C

4

NI

4

90Ohm/10 0MHz

90Ohm/10 0MHz L203

L203

3

NI

4

90Ohm/10 0MHz

90Ohm/10 0MHz L204

L204

3

ML_LANE _0P

ML_LANE _0N

ML_LANE _1P

ML_LANE _1N

3

GND

2

M1U2

I

CM1213_ 04SO

CH1

1

VN

2

CH2 CH3

ML_LANE _1P ML_LANE _1N

ML_LANE _2P ML_LANE _2N

GND

CH2 CH3

3 4

M1U3

I

CM1213_ 04SO

CH1

1

VN

2

CH2 CH3

3 4

1

CH4

ML_LANE _3NML_LAN E_3P

6

VP

5

CH4

ML_LANE _0NML_LANE _0P

6

VP

5

+5VSB

VP

I

2

VP

5 6

0

M1RN4C

VP

7 8

0

M1RN4D

1

2

1

2

VP

3 4

0

M1RN3B

VP

1 2

0

M1RN3A

3

1

GND

NI

4

90Ohm/10 0MHz

90Ohm/10 0MHz L205

L205

3

NI

4

90Ohm/10 0MHz

90Ohm/10 0MHz L206

L206

3

12

NI

M1C2

M1C2 100PF/50 V

100PF/50 V

mx_c0402

4

+5VSB

M1D2

BAV99W -L

I

ML_LANE _2P

ML_LANE _2N

ML_LANE _3P

ML_LANE _3N

3

12

NI

M1C3

M1C3 100PF/50 V

100PF/50 V

mx_c0402

GNDGND

mx_c0402

2N7002

M2Q1

+5V

I

12

M1R9

M1R9 10KOhm

10KOhm

5%

5% mx_r0402

mx_r0402

3

D

1

G

S

2

I

M2Q7

2N7002

I

3

+5V

I

12

M1R36

M1R36 10KOhm

10KOhm

5%

5% mx_r0402

mx_r0402

3

D

1

G

S

2

GND GND

12

mx_r0402

GND

I

M1R8

M1R8 1M

1M

I

M1R49

0

mx_r0402

1 2

1

2

GND

PIN13_R

CEC_R

J125

1

ML_LANE_0P

3

ML_LANE_0N

4

ML_LANE_1P

6

ML_LANE_1N

7

ML_LANE_2P

9

ML_LANE_2N

10

ML_LANE_3P

12

ML_LANE_3N

15

AUX_CH_P

17

AUX_CH_N

13

CONFIG1

14

CONFIG2

DISPLAYPORT_ CON_20P

I

12

I

M1C4

0.1UF/16V

mx_c0402

GNDGND

DP_PWR

RETURN

HOT_PLUG_DETECT

GND_0 GND_1 GND_2 GND_3 GND_6

P_GND1 P_GND2 P_GND3 P_GND4

2

20

19

18

2 5 8 11 16

21 22 23 24

GND

DP_DPD_ CONN

GND

DP_3P3V _POWER

12

NI

M1C1

0.1UF/16V

mx_c0402

GND

12

I

M1R5

M1R5 100K

100K

mx_r0402

GND

Date: Sheet of

I

M1F1

1.1A/6V

1.02

M2D5

BAV99W -L

+5VSB

I

2

PEGATRON DT-MB RESTRICTED SECRET

Pegatron Corp.

Size Project Name

A3

12

DP_3P3V _PWR_FUSE

12

3

1

GND

C C

B B

A A

DP_TXP223

DP_TXN22 3

DP_TXP323

DP_TXN32 3

DPC_AUX _DP33 DPC_AUX _DN33

CA_DET33

DP_DDPC _CTRL33

5

1 2

I

1 2

I

1 2

I

1 2

I

0.1UF/10VX7R 10%

mx_c0402

0.1UF/10VX7R 10%

mx_c0402

0.1UF/10VX7R 10%

mx_c0402

0.1UF/10VX7R 10%

mx_c0402

M1C9

M1C10

M1L21

M1L22

M1C11

M1C14

1.02 1.02

M1D1

BAV99W -L

+5VSB

+3P3V

I

M1D3

M1D3 SS14

SS14

1

G

2

D

S

M2Q8

I

2N7002

Title :

Engineer:

IPMIP-DP

1

12

NI

M1R4

M1R4 0

0

mx_r0603

+5V

12

I

M2R1

M2R1 100KOHM

100KOHM

mx_r0402

GND

DPB_HPD 2 3

DP CONNECTOR

Vic_Chen

32 68Wednesd ay, April 07, 2010

Rev

1.01

5

4

3

2

1

D D

C C

Display Port to HDMI/DVI Dongle control

12

NI

M1R3

PCH Side

DPC_AUX _DP_MUX2 3

DPC_AUX _DN_MUX23

DDPC_CT RL_DATA23

DDPC_CT RL_CLK2 3

I

M1C12

1 2

0.1UF/16V

X7R 10%

mx_c0402

I

M1C13

1 2

0.1UF/16V

X7R 10%

mx_c0402

DONGLE_ CTRL_AUX_DP

DONGLE_ CTRL_AUX_DN

M1Q15

2N7002

M1Q14

2N7002

I

M1Q11

M1Q11 2N7002

2N7002

3

I

M1Q12

2N7002

3

I

3

D

I

3

D

S

D

2

G

1

S

D

2

G

1

G

2

S

1

G

2

S

M1R3 100K

100K

mx_r0402

GND GND

12

mx_r0402

12

mx_r0402

I

M1R2

M1R2 100K

100K

NI

M1R50

M1R50 100K

100K

+3P3V+ 3P3V +3P3VS B+3P3VSB

12

mx_r0402

12

mx_r0402

NI

M1R1

M1R1 100K

100K

I

M1R51

M1R51 100K

100K

12

NI

M1R6

M1R6 100K

100K

mx_r0402

DPC_AUX _DP 32

CA_DET 32

DPC_AUX _DN 32

DP_DDPC _CTRL 32

DP Connector Side

B B

A A

PEGATRON DT-MB RESTRICTED SECRET

DP DONGLE

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

IPMIP-DP

1

Vic_Chen

33 68Wednesd ay, April 07, 2010

Rev

1.01

5

D D

+5V_DUA L_USB_A

OC45#20

C C

USBN420

USBP42 0

B B

USBN520

USBP52 0

1 2

UC7

0.1UF/16V

mx_c0402

UF5

1.6A/6V

I

12

I

UR9

8.2K

mx_r0402

UR11

mx_r0402

I

15K

GND

3 4

12

URN3B

0

12

GND

14

1 2

I

0

URN3A

URN3D

7 8

0

14

5 6

I

0

URN3C

+SBV45

12

GND

23

NI

UL7

UL7 90OHM/10 0MHZ/330mA

90OHM/10 0MHZ/330mA

23

NI

UL8

UL8 90OHM/10 0MHZ/330mA

90OHM/10 0MHZ/330mA

+

UCE611

UCE611 100UF/16 V

100UF/16 V

I

GND

UC1111

0.1UF/16V

mx_c0402

4

12

I

GND

NI

UU3

CM1213_ 04SO

CH1

1

VN

2

CH2 CH3

3 4

3

J14

8

LP4LP4+

LP5LP5+

CH4

6

VP

5

VCC2

7

2P-

6

2P+

5

GND2

4

VCC1

3

1P-

2

1P+

1

GND1

16

P_GND2 P_GND418P_GND3

MINI_DIN/2USB_1 4P

I

GND GND

+5VSB

NC2

KCLK-

VCC3

NC1 KDAT GND3

P_GND1

14 13 12 11 10 9

15 17

CKBDATA

CKBCLK

+5V_KBM S

2

3

1

NI

YD7

BAV99W -L

CMSCLK

CMSDATA

2

3

+5V_KBM S

1

NI

YD5

BAV99W -L

3

1

NI

YD8

BAV99W -L

+5V_KB

12

NI

YR1

634

1%

0.1UF/16V

mx_c0402

GND

1

2

NI

YD6

BAV99W -L

3

I

YC5 150PF/50 V NPO 5%

I

YC6 150PF/50 V NPO 5%

I

GND

2

12

I

UC14

GND GND

GND

YL7 120Ohm/1 00Mhz/0.6A

2 1

YL6 120Ohm/1 00Mhz/0.6A

2 1

mx_c0402

1 2 1 2

mx_c0402

Default as short pin 2-3

+5VSB_A TX

YL1

70Ohm/10 0Mhz/3A

mx_l0805

2 1

I

UC15

0.1UF/16V

mx_c0402

KDAT

KCLK

GND

YR7 0 Ohm 5%

1 2

NI/EVT

YR6 0 Ohm 5%

1 2

NI/EVT

YR8 0 Ohm 5%

1 2

I for S5 / NI

+5V_KBM S_F

12

NI

1 2

+5V_KBM S+5V_DUA L

+5V_KBM S+5VSB

+5V_KBM S

I

YF1

1.6A/6V

R8525

33 Ohm5% I

R8526

33 Ohm5%I

KR13 4.7K

1 2

KR14 4.7K

1 2

1

KR10

+5V_KBM S_R

12

KR11 4.7K

1 2

KR12 4.7K

1 2

+5V_KB

I

+5V_KBM S

0

I

1 2

I

+5V_KB

KBDATA 47

KBCLK 47

R8528

CMSDATA

A A

5

4

CMSCLK

3

YL9 120Ohm/1 00Mhz/0.6A

2 1

I

YL8 120Ohm/1 00Mhz/0.6A

2 1

I

mx_c0402

YC7 150PF/50 V NPO 5%

1 2

I

YC8 150PF/50 V NPO 5%

1 2

I

mx_c0402

MDAT

MCLK

GND

2

R8528

33 Ohm5% I

1 2

33 Ohm5% I

R8527

33 Ohm5%I

Title

<Title>

Size Documen t Number Rev

IPMIP-DP 1.01

A3

IPMIP-DP 1.01

A3

IPMIP-DP 1.01

A3

Date: Sheet of

MSDATA 47

MSCLK 47

1

34 68Wednesd ay, April 07, 2010

5

+3P3V

12

D D

SATA_TX P52 1

SATA_TX N521

I

GND

TC162 0.0 1UF/25V X7R 10%

1 2

TC118 0.0 1UF/25V X7R 10%

1 2

NI

TCB1

TCB1 1UF/10V

1UF/10V

mx_c0603

12

I

TCB2

0.1UF/16V

12

I

TCB3

0.01UF/25 V

X7R 10%

GNDGND

ESATA_T XP5_C

ESATA_T XN5_C

4

I

U94

6

VDD1

16

VDD2

7

EN

1

A_INp

2

A_INn

A_OUTp

A_OUTn

IPMIP-GS Change U94 to PS8511

ESATA_T XP5_CONN_C

15

ESATA_T XN5_CONN_C

14

TC161 0.0 1UF/25V X7R 10%

I

TC117 0.0 1UF/25V X7R 10%

I

1 2

3

SATA_TX P5_C

SATA_TX N5_C

2

1

SATA_RX P521

SATA_RX N521

NOTE:

TC109 0.0 1UF/25V X7R 10%

I

TC129 0.0 1UF/25V X7R 10%

I

+3P3V +3P 3V +3P3V

Parade PS8511B

12

NI

TR1

4.7K

ESATA_R XP5_C

ESATA_R XN5_C SATA_RX N5_C

12

NI

TR3

TR2

4.7K

PS8511B _AUTOPW_E N PS8511B _A_EQ PS8511B _B_EQ

5

4

17 19 18

B_OUTp

B_OUTn

AUTOPW_EN A_EQ B_EQ

B_INp

B_INn

A_PRE

B_PRE A_BST# B_BST#

Automatic Power Saving Enable: (pin 17) IPD ~150K ohm

C C

0: Disable

1: Enable

Input EQ Setting: (pin 19/18) IPD ~150K ohm

GND1 GND2 GND3

0: short and medium length PCB traces

1: long length PCB traces

PS8511B TQFN20GTR

ESATA_R XP5_CONN_C

11

ESATA_R XN5_CONN_C

12

PS8511B _A_PRE

9

PS8511B _B_PRE

8

PS8511B _A_BST#

20

PS8511B _B_BST#

10

3 13 21

GND

+3P3V

12

NI

TR4

4.7K

12

NI

TR6

TR6 0

0

GND GND

TC108 0.0 1UF/25V X7R 10%

I

+3P3V

12

TC128 0.0 1UF/25V X7R 10%

12

NI

TR5

4.7K

Parade PS8511B

NOTE:

12

NI

Output Pre-emphasis Setting: (pin 9/8) IPD ~150K ohm

TR7

TR7 0

0

0: Disable

1: Enable

Output Level Boost Setting: (pin 20/10) IPU ~150K ohm

0: 800~1200mVpp

1: 400~700mVpp

SATA_RX P5_C

SATA_TX P5_C SATA_TX N5_C

SATA_RX P5_C SATA_RX N5_C

J7B

36

TXP

35

TXN

32

RXP

33

RXN

USB_SAT A_15P

I

GND3

GND4

GND5

31

34

37

GND

E-SATA + Dual USB CONNECTOR

+SBV23

12

+5V_DUA L_USB_A

Title :

Engineer:

1

OC23# 20

RJ45+USB CONN.2

Vic_Chen

35 68Wednesd ay, April 07, 2010

Rev

1.01

J7A

B B

7 8

0

USBN220

USBP220

A A

USBN320

USBP320

5

VP

5 6

VP

2

1

2

1

3 4

VP

1 2

VP

0

URN2D

0

URN2C

0

URN2B

0

URN2A

3

UL11

UL11 90Ohm/10 0MHz

90Ohm/10 0MHz

4

NI

3

UL12

UL12 90Ohm/10 0MHz

90Ohm/10 0MHz

4

NI

GND

I

UU2

CM1213_ 04SO

CH1

1

VN

2

CH2 CH3

3 4

CH4

6

5

4

+5VSB

VP

LP2-

LP2+

LP3-

LP3+

12

USB0-

13

USB0+

22

USB1-

23

USB1+

USB_SAT A_15P

I

11

VCC0

21

VCC1

14

GND0

24

GND1

41

P_GND1

42

P_GND2

43

P_GND3

44

P_GND4

3

GND

12

GND

12

GND

I

UCB9

0.1UF/16V

NI

UCB10

0.1UF/16V

+SBV23

12

+

GND

I

UCE10

UCE10 820UF/6.3 V

820UF/6.3 V

12

I

UR23

8.2K

12

I

UR24

UR24 15K

15K

GNDGND

I

UF10

1.6A/6V

12

NI

UC12

0.1UF/16V

PEGATRON DT-MB RESTRICTED SECRET

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

2

Date: Sheet of

IPMIP-DP

5

+3P3V_L AN +2P5V_LAN

+3P3V_L AN

VP

LR5

LR5 0

0

mx_r0805

BC1

I

LQ1 B CP69-16

5

12

NI

LR6

4.99K

1%

LAN_RXP 120 LAN_RXN 120

LAN_TXP 120 LAN_TXN 120

CK_100M _LAN24 CK_100M _LAN#24

PLTRST#13 ,22,47,50,57

LAN_CLK REQ#22

I

LC8

4.7UF/6.3V

X5R 10%

X5R 10% mx_c0805

mx_c0805

12

3

3 E

E

24

D D

LAN_LQ1 E

12

GND GND

C C

B B

A A

I

LC2

4.7UF/6.3V

X5R 10%

X5R 10% mx_c0805

mx_c0805

12

NI

LCB2

0.01UF/25 V

X7R 10%

12

I

LCB7

LCB7 10UF/6.3V

10UF/6.3V

mx_c0805

mx_c0805 X5R 10%

X5R 10%

GND GND

VP

12

I

LCB1

LCB1 10UF/6.3V

10UF/6.3V

mx_c0805

mx_c0805 X5R 10%

X5R 10%

GND GND

12

I

LCB8

0.1UF/16V

LR29 0

1 2

+3P3V_L AN

12

I

LR21

LR21 10K

10K

12

I

LCB3

0.1UF/16V

Pin 48: For Mobile only, clock request funtion

LT2TP C26bNOBOM LT2TPC26bNOBOM

1

4

12

I

LCB4

LCB4 10UF/6.3V

10UF/6.3V

X5R 10%

X5R 10% mx_c0805

mx_c0805

GND GND

+1P8V_L AN

LC4

I

1 2

LC3

I

1 2

+3P3V_L AN+3P3V_LA N

12

NI

LR80

LR80 10KOhm

10KOhm

4

12

I

LCB5

0.1UF/16V

VP

0.1UF/16V X7R 1 0%

12

NI

LR30

LR30 10KOhm

10KOhm

TEST_EN

I

LR25

LR25 1KOhm

1KOhm

1 2

GND

12

I

LCB6

LCB6 1UF/16V

1UF/16V

X7R 10%

X7R 10% mx_c0603

mx_c0603

GND

LR13

LR13 0VPmx_r0603

0VPmx_r0603

1 2

12

LJP1

1 2

SHORTPIN_ RECT

NOBOM

12

GND

LAN_1P2 V_CTRL

LR30

mx_r0603

LR140

mx_r0603

LAN_RXP _C LAN_RXN _C

+3P3V_L AN+ 3P3V_LAN

12

NI

LR23

LR23 10KOhm

10KOhm

IPU

I

LCB10

0.1UF/16V

+1P2V_D VDD_LAN+1P2V_A VDD_LAN

82578_R ST

NI

LR24

LR24 10KOhm

10KOhm

L_JTAG_ TCK L_JTAG_ TMS TP_LAN_ LT3 TP_LAN_ LT2

+AVDD43

+AVDD11

GND

I

LU1

5

VDD3P3

4

CTRL_2P5

15

AVDD2P5_1

19

AVDD2P5_2

29

DVDD2P5

7

CTRL_1P2

37

DVDD1P2_1

47

DVDD1P2_2

46

DVDD1P2_3

8

AVDD1P2_1

16

AVDD1P2_3

22

AVDD1P2_4

40

AVDD1P2_5

43

AVDD1P2_6

11

AVDD1P2_2

6

VCT

38

PETp

39

PETn

41

PERp

42

PERn

44

PE_CLKP

45

PE_CLKN

36

PE_RST_N

O/D

48

CLK_REQ_N

35

JTAG_TCK

33

JTAG_TMS

32

JTAG_TDI

34

JTAG_TDO

30

TEST_EN

50

GND1

51

GND2

82578DC

Intel WG82578XX DC:0200-00EP000 DM C0: 0200-005O000

3

MDI_PLUS[0]

MDI_MINUS[0]

MDI_PLUS[1]

MDI_MINUS[1]

MDI_PLUS[2]

MDI_MINUS[2]

MDI_PLUS[3]

MDI_MINUS[3]

LED2 LED1 LED0

SMB_DATA

SMB_CLK

RSVD_VCC3P3_1 RSVD_VCC3P3_2

LAN_DISABLE_N

XTL_IN

XTL_OUT

RBIAS

VSS_EPAD

3

LAN_MDI0_ P

13

LAN_MDI0_ NSHORT

14

LAN_MDI1_ P

17

LAN_MDI1_ N

18

LAN_MDI2_ P

20

LAN_MDI2_ N

21

LAN_MDI3_ P

23

LAN_MDI3_ N

24

25 27 26

31 28

+3P3V_L AN +3P 3V_LAN +3P3V _LAN

12

I

LR16

LR16 3K

3K

RSVD1

1

RSVD2

2

LAN_DIS

3

LAN_XTA L_IN

10

LAN_XTA L_OUT

9

LAN_RBIAS

12

49

GND GND

2

12

GND GND GND GND

12

I

LC10

LC10 33PF/50V

33PF/50V

NPO 5%

12

I

LR7

49.9

1%

MDI0_PN

I

LC5

0.1UF/16V

X7R 10%

12

I

LR17

LR17 3K

3K

GND

I

Y10

1 2

Y10_X Y10_R X

GND

3

I

LR8

49.9

1%

12

I

LR18

LR18 10K

10K

NI

LR20

LR20 10K

10K

25Mhz

12

I

12

I

LR1

49.9

1%

MDI1_PN MDI2_PN MDI3_PN

I

LC6

0.1UF/16V

X7R 10%

1 2

LR22

LR22 0 Ohm

0 Ohm

NOBOM

1 2

GNDGNDGND

I

LR2

49.9

1%

LAN_LED 2 37 LAN_LED 1 37 LAN_ACT # 37

SML0_LA N_DATA 19 SML0_LA N_CLK 19

LR190ILR190

12

I

LC11

LC11 33PF/50V

33PF/50V

NPO 5%

12

I

LR9

49.9

1%

12

I

LC7

0.1UF/16V

X7R 10%

LAN_DISAB LE 22

NOTE:

12

I

LR10

49.9

1%

The 25MHz input Vswing cannot exceed 1.8 V dc,

if it from clock gen.

Refer 82578 datasheet and

12

I

LR26

2.37K

1%

2

Piketon/Kings Creek PDG for more detail.

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

12

I

LR11

49.9

1%

12

I

LC1

0.1UF/16V

X7R 10%

IPMIP-DP

12

I

LR12

49.9

1%

Title :

Engineer:

1

Intel 82578 GIGA

1

LAN_MDI0_ P 37 LAN_MDI0_ N 37 LAN_MDI1_ P 37 LAN_MDI1_ N 37 LAN_MDI2_ P 37 LAN_MDI2_ N 37 LAN_MDI3_ P 37 LAN_MDI3_ N 37

Vic_Chen

36 68Wednesd ay, April 07, 2010

Rev

1.01

5

4

3

2

1

Change +3p3V to +3P3V_LAN

LAN_ACT #36

12

I

LC14

LC14 470PF/50 V

470PF/50 V

X7R 10%

I

UU1

CM1213_ 04SO

1

2

3 4

X7R 10%

GND

CH4

6

VP

5

+5VSB

D D

LRN2D

VP

7 8

0

LAN_MDI0_ P36

LAN_MDI0_ N36

LAN_MDI1_ P36

LAN_MDI1_ N36

C C

LAN_MDI2_ P36

LAN_MDI2_ N36

LAN_MDI3_ P36

LAN_MDI3_ N36

B B

USBN020

USBP020

VP

0

LRN2C

VP

5 6

0

LL2

NI

1

2 3

4

90OHM/10 0MHz/400mA

LRN2B

VP

3 4

0

LRN2A

VP

1 2

0

LRN1D

VP

7 8

0

LRN1C

VP

5 6

0

LL1

1

2 3

4

90OHM/10 0MHz/400mA

NI

LRN1B

VP

3 4

0

LRN1A

VP

1 2

0

7 8

0

URN1D

5 6

0

URN1C

2

3

UL13

UL13 90Ohm/10 0MHz

90Ohm/10 0MHz

1

4

NI

2

3

UL14

UL14 90Ohm/10 0MHz

90Ohm/10 0MHz

1

4

NI

8

7 6

5

8

7 6

5

CH1

VN

CH2 CH3

GND

+3P3V_L AN

J9 to 12XA07MGYG00

12

I

LR27

LR27 200

200

mx_r0603

LANLED2 LANL ED1

12

I

LC12

LC12 470PF/50 V

470PF/50 V

X7R 10%

GND

LAN_MDI0_ P_C

LAN_MDI0_ N_C

LAN_MDI1_ P_C

LAN_MDI1_ N_C

LAN_MDI2_ P_C

LAN_MDI2_ N_C

LAN_MDI3_ P_C

LAN_MDI3_ N_C

LP0-

LP0+

LP1-

LP1+

J9

20

ACTLEDP

19

ACTLEDN

10

TD1+

11

TD1-

12

TD2+

13

TD2-

14

TD3+

15

TD3-

16

TD4+

17

TD4-

6

1P-

7

1P+

2

2P-

3

2P+

USB_LAN _LED

I

LILEDP

G

LAN_GND

LANGND30 LANGND29 LANGND28 LANGND27

USBGND26 USBGND25 USBGND24 USBGND23

Y

LILEDN

CTR

GND1

VCC1

GND2

VCC2

LAN_LED 1 36

12

I

LR28

LR28 200

200

mx_r0603

22

21

9

18

30 29 28 27

GND

8

5

4

1

26 25 24 23

GND

12

I

LC13

LC13 470PF/50 V

470PF/50 V

X7R 10%

GND

12

I

LC15

LC15 470PF/50 V

470PF/50 V

X7R 10%

GND

NIN_VCC_C TR

12

I

UCB5

0.1UF/16V

GND

12

NI

UCB6

0.1UF/16V

GND

12

I

LCB9

LCB9 1UF/16V

1UF/16V

X7R 10%

X7R 10% mx_c0603

mx_c0603

LAN_LED 2 36

+1P8V_L AN

+SBV01

12

I

+

UCE7

UCE7 820UF/6.3 V

820UF/6.3 V

GND

LAN_MDI0_ P_C

LAN_MDI1_ P_C LAN _MDI1_N_C

LAN_MDI2_ P_C

LAN_MDI3_ P_C

12

I

UR15

8.2K

12

I

UR16

UR16 15K

15K

I

LU3

CM1213_ 04SO

CH1

1

VN

2

CH2 CH3

3 4

I

LU4

CM1213_ 04SO

CH1

1

VN

2

CH2 CH3

3 4

I

UF7

1.6A/6V

12

NI

UC9

0.1UF/16V

GNDGND

CH4

LAN_MDI0_ N_C

6

VP

5

CH4

LAN_MDI2_ N_C

6

VP

5

LAN_MDI3_ N_C

+5V_DUA L_USB_A

OC01# 20

+5VSB_A TX

3 4

0

USBN120

A A

USBP120

5

VP

1 2

VP

0

URN1B

0

URN1A

PEGATRON DT-MB RESTRICTED SECRET

RJ45+USB CONN.1

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

4

3

2

Date: Sheet of

IPMIP-DP

Engineer:

RJ45+USB CONN.1

Vic_Chen

1

Rev

1.01

37 68Wednesd ay, April 07, 2010

1.01

5

4

3

2

1

PCI EXPRESS X16 Graphics Card Slot

+3P3V

+3P3VSB

D D

C C

B B

A A

12

+

I

XCE1

XCE1 470uF/16 V

470uF/16 V

GND GND

EXP_TXP 012 EXP_TXN 012

EXP_TXP 112 EXP_TXN 112

EXP_TXP 212 EXP_TXN 212

EXP_TXP 312 EXP_TXN 312

EXP_TXP 412 EXP_TXN 412

EXP_TXP 512 EXP_TXN 512

EXP_TXP 612 EXP_TXN 612

EXP_TXP 712 EXP_TXN 712

EXP_TXP 812 EXP_TXN 812

EXP_TXP 912 EXP_TXN 912

EXP_TXP 1012 EXP_TXN 1012

EXP_TXP 1112 EXP_TXN 1112

EXP_TXP 1212 EXP_TXN 1212

EXP_TXP 1312 EXP_TXN 1312

EXP_TXP 1412 EXP_TXN 1412

EXP_TXP 1512 EXP_TXN 1512

12

I

XCB1

0.1UF/16V

12

I

XCB2

0.1UF/16V

GND

I

5

SMB_CLK _R18,19,39,40 ,41,49,50 SMB_DAT A_R18,19,39,40 ,41,49,50

XR3

NI

0

1 2

XC2 0.1UF/16V X7R 10%

1 2

XC3 0.1UF/16V X7R 10%

1 2

XC4 0.1UF/16V X7R 10%

1 2

XC5 0.1UF/16V X7R 10%

1 2

XC6 0.1UF/16V X7R 10%

1 2

XC7 0.1UF/16V X7R 10%

1 2

XC8 0.1UF/16V X7R 10%

1 2

XC9 0.1UF/16V X7R 10%

1 2

XC10 0 .1UF/16V X7R 1 0%

1 2

XC11 0 .1UF/16V X7R 1 0%

1 2

XC12 0 .1UF/16V X7R 1 0%

1 2

XC13 0 .1UF/16V X7R 1 0%

1 2

XC14 0 .1UF/16V X7R 1 0%

1 2

XC15 0 .1UF/16V X7R 1 0%

1 2

XC16 0 .1UF/16V X7R 1 0%

1 2

XC17 0 .1UF/16V X7R 1 0%

1 2

XC18 0 .1UF/16V X7R 1 0%

1 2

XC19 0 .1UF/16V X7R 1 0%

1 2

XC20 0 .1UF/16V X7R 1 0%

1 2

XC21 0 .1UF/16V X7R 1 0%

1 2

XC22 0 .1UF/16V X7R 1 0%

1 2

XC23 0 .1UF/16V X7R 1 0%

1 2

XC24 0 .1UF/16V X7R 1 0%

1 2

XC25 0 .1UF/16V X7R 1 0%

1 2

XC26 0 .1UF/16V X7R 1 0%

1 2

XC27 0 .1UF/16V X7R 1 0%

1 2

XC28 0 .1UF/16V X7R 1 0%

1 2

XC29 0 .1UF/16V X7R 1 0%

1 2

XC30 0 .1UF/16V X7R 1 0%

1 2

XC31 0 .1UF/16V X7R 1 0%

1 2

XC32 0 .1UF/16V X7R 1 0%

1 2

XC33 0 .1UF/16V X7R 1 0%

1 2

PCIE_B429,30

PE16_TR ST#

WAKE #22,39

EXP_TXP 0_C EXP_TXN 0_C

EXP_TXP 1_C EXP_TXN 1_C

EXP_TXP 2_C EXP_TXN 2_C

EXP_TXP 3_C EXP_TXN 3_C

EXP_TXP 4_C EXP_TXN 4_C

EXP_TXP 5_C EXP_TXN 5_C

EXP_TXP 6_C EXP_TXN 6_C

EXP_TXP 7_C EXP_TXN 7_C

EXP_TXP 8_C

EXP_TXN 8_C

EXP_TXP 9_C EXP_TXN 9_C

EXP_TXP 10_C EXP_TXN 10_C

EXP_TXP 11_C EXP_TXN 11_C

EXP_TXP 12_C EXP_TXN 12_C

EXP_TXP 13_C EXP_TXN 13_C

EXP_TXP 14_C EXP_TXN 14_C

EXP_TXP 15_C EXP_TXN 15_C

4

+12V

GND

B1

+12V_1

B2

+12V_2

B3

RSVD1

B4

GND1

B5

SMCLK

B6

SMDAT

B7

GND2

B8

+3.3V_1

B9

JTAG1

B10

3.3Vaux

B11

WAKE#

B12

RSVD2

B13

GND3

B14

HSOP0

B15

HSON0

B16

GND4

B17

PRSNT2_1#

B18

GND5

B19

HSOP1

B20

HSON1

B21

GND6

B22

GND7

B23

HSOP2

B24

HSON2

B25

GND8

B26

GND9

B27

HSOP3

B28

HSON3

B29

GND10

B30

RSVD3

B31

PRSNT2_2#

B32

GND11

B33

HSOP4

B34

HSON4

B35

GND12

B36

GND13

B37

HSOP5

B38

HSON5

B39

GND14

B40

GND15

B41

HSOP6

B42

HSON6

B43

GND16

B44

GND17

B45

HSOP7

B46

HSON7

B47

GND18

B48

PRSNT2_3#

B49

GND19

B50

HSOP8

B51

HSON8

B52

GND20

B53

GND21

B54

HSOP9

B55

HSON9

B56

GND22

B57

GND23

B58

HSOP10

B59

HSON10

B60

GND24

B61

GND25

B62

HSOP11

B63

HSON11

B64

GND26

B65

GND27

B66

HSOP12

B67

HSON12

B68

GND28

B69

GND29

B70

HSOP13

B71

HSON13

B72

GND30

B73

GND31

B74

HSOP14

B75

HSON14

B76

GND32

B77

GND33

B78

HSOP15

B79

HSON15

B80

GND34

B81

PRSNT2_4#

B82

RSVD4

PCI_EXPRE SS_X16

I

J41

2

A1

PRSNT1#

A2

+12V_3 +12V_4

GND35

JTAG2 JTAG3 JTAG4

JTAG5 +3.3V_2 +3.3V_3 PWRGD

GND36

REFCLK+

REFCLK-

GND37

HSIP0 HSIN0

GND38

RSVD6 GND39

HSIP1

HSIN1 GND40 GND41

HSIP2

HSIN2 GND42 GND43

HSIP3

HSIN3 GND44 RSVD7

RSVD8 GND45

HSIP4

HSIN4 GND46 GND47

HSIP5

HSIN5 GND48 GND49

HSIP6

HSIN6 GND50 GND51

HSIP7

HSIN7 GND52 RSVD9 GND53

HSIP8

HSIN8 GND54 GND55

HSIP9

HSIN9 GND56 GND57

HSIP10 HSIN10

GND58 GND59

HSIP11 HSIN11

GND60 GND61

HSIP12 HSIN12

GND62 GND63

HSIP13 HSIN13

GND64 GND65

HSIP14 HSIN14

GND66 GND67

HSIP15 HSIN15

GND68

A3 A4 A5 A6 A7 A8 A9 A10 A11

A12 A13 A14 A15 A16 A17 A18

A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32

A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66 A67 A68 A69 A70 A71

A72 A73 A74 A75 A76 A77 A78 A79 A80 A81 A82

3

NP_NC11NP_NC2

+12V

GND

PE16_TC K PE16_A6

PE16_A8

+3P3V +3P 3V

12

NI

XR1

XR1 0

0

CK_100M _PE16 24 CK_100M _PE16# 24

EXP_RXP 0 12 EXP_RXN 0 12

EXP_RXP 1 12 EXP_RXN 1 12

EXP_RXP 2 12 EXP_RXN 2 12

EXP_RXP 3 12 EXP_RXN 3 12

EXP_RXP 4 12 EXP_RXN 4 12

EXP_RXP 5 12 EXP_RXN 5 12

EXP_RXP 6 12 EXP_RXN 6 12

EXP_RXP 7 12 EXP_RXN 7 12

EXP_RXP 8 12 EXP_RXN 8 12

EXP_RXP 9 12 EXP_RXN 9 12

EXP_RXP 10 12 EXP_RXN 10 12

EXP_RXP 11 12 EXP_RXN 11 12

EXP_RXP 12 12 EXP_RXN 12 12

EXP_RXP 13 12 EXP_RXN 13 12

EXP_RXP 14 12 EXP_RXN 14 12

EXP_RXP 15 12 EXP_RXN 15 12

NI

XR2

XR2 0

0

+3P3V

12

NI

XR4

XR4 0

0

GND GND

GND

12

I

XCB3

0.1UF/16V

PEGATRON DT-MB RESTRICTED SECRET

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

2

Date: Sheet of

12

NI

+

XCE2

XCE2 820UF/6.3 V

820UF/6.3 V

12

GND

NI

XC1

0.1UF/16V

PCIES_RST # 39,48

Title :

Engineer:

IPMIP-DP

1

PCI EXPRESS X16

Vic_Chen

38 68Wednesd ay, April 07, 2010

Rev

1.01

5

D D

4

3

PCI Express x1 SLOT

PCI Express x1 SLOTPCI Express x1 SLOT

2

1

+3P3V +3P3V

I

J31

SLOT 36P ,PCI-E X1

B1

+12V_1

B2

+12V_2

B3

+12V_5

B4

GND1

B5

SMCLK

B6

SMDAT

B7

GND2

B8

+3.3V_1

B9

JTAG1

B10

3.3Vaux

B11

WAKE#

B12

RSVD2

B13

GND3

B14

HSOP0

B15

HSON0

B16

GND4

B17

PRSNT2_1#

B18

GND5

PRSNT1#

+12V_3 +12V_4

GND6 JTAG2 JTAG3 JTAG4 JTAG5

+3.3V_2 +3.3V_3 PWRGD

GND7

REFCLK+

REFCLK-

GND8

HSIP0

HSIN0

GND9

NP_NC1 NP_NC2

A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11

A12 A13 A14 A15 A16 A17 A18

1 2

GND

PE1_TCK PE1_A6

PE1_A8

I

X1CB3

0.1UF/16V

+12V

GND

+3P3VSB

+3P3V

SMB_CLK _R18,19,38,40 ,41,49,50 SMB_DAT A_R18,19,38,40 ,41,49,50

PE1_TRS T#

WAKE #22,38

C C

PE1_TXP 120 PE1_TXN 12 0

B B

12

+

I

X1CE1

X1CE1 820UF/6.3 V

820UF/6.3 V

GND

X1C1 0 .1UF/16V X7R 1 0%

I

X1C2 0 .1UF/16V X7R 1 0%

I

1.Place Near to slot

2.Please check if another side already have installed serial capacitor

1 2 1 2

12

GND

NI

X1CB1

0.1UF/16V

12

GND

I

X1CB2

0.1UF/16V

GND

12

NI

X1R4

X1R4 0

0

12

GND

PE1_TXP 1_C PE1_TXN 1_C

12

NI

X1R3

X1R3 0

0

GND GNDGND

NI

X1R1

X1R1 0

0

12

NI

X1R2

+12V

0

+3P3V

PCIES_RST # 38,48

12

I

X1CB4

0.1UF/16V

12

NI

X1CB5

0.1UF/16V

CK_100M _PE1 2 4 CK_100M _PE1# 24

PE1_RXP 1 20 PE1_RXN 1 2 0

A A

PEGATRON DT-MB RESTRICTED SECRET

PCI EXPRESS X1

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

IPMIP-DP

1

Vic_Chen

39 68Wednesd ay, April 07, 2010

Rev

1.01

5

PCI2_PRSN T1#

NI

KC3

0.1UF/16V

Y5V +80-20%

A_D[0..31]19,41

PCI2_PRSN T2#

12

NI

KC4

0.1UF/16V

Y5V +80-20%

GNDGND

CK_33M_ SL124

REQ0#1 9,41

A_D3119,41 A_D2919,41

A_D2719,41 A_D2519,41

C/BE3#1 9,41 A_D2319,41

A_D2119,41 A_D1919,41

A_D1719,41 C/BE2#1 9,41

IRDY#19,41

DEVSEL#19,41

PLOCK#19,41 PERR#19,41

SERR#19,41

C/BE1#1 9,41 A_D1419,41

A_D1219,41 A_D1019,41

A_D81 9,41 A_D71 9,41

A_D51 9,41 A_D31 9,41

A_D11 9,41

D D

12

NOBOM

KR5

C C

B B

0Ohm

5%

12

GND

12

I

KCB3

0.1UF/16V

Y5V +80-20%

GND

PCI2_TCK

INTB#19,41 INTD#1 9,41

4

ACK64#_ 2

+5V

+3P3V

I

J20

SLOT 120 P, PCI

B1 B2 B3 B4 B5 B6 B7 B8

B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49

B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62

-12V TCK GND11 TDO +5V22 +5V23 INTB INTD PRSNT1 RESERVED5 PRSNT2 GND12 GND13 RESERVED6 GND14 CLK GND15 REQ +5V8 AD31 AD29 GND16 AD27 AD25 +3.3V7 C/BE3 AD23 GND17 AD21 AD19 +3.3V8 AD17 C/BE2 GND18 IRDY +3.3V9 DEVSEL GND19 LOCK PERR +3.3V10 SERR +3.3V11 C/BE1 AD14 GND20 AD12 AD10 GND21

AD8 AD7 +3.3V12 AD5 AD3 GND22 AD1 +5V9 ACK64 +5V10 +5V11

RESERVED1

RESERVED2

RESERVED3

RESERVED4

hold_NC11hold_NC2

2

TRST

+12V

TMS

+5V1

INTA INTC +5V2

+5V3

GND1 GND2

RST

+5V4

GNT

GND3

AD30

+3.3V1

AD28 AD26

GND4

AD24

IDSEL

+3.3V2

AD22 AD20

GND5

AD18 AD16

+3.3V3

FRAME

GND6 TRDY GND7 STOP

+3.3V4

SDONE

SBO

GND8

PAR

AD15

+3.3V5

AD13 AD11

GND9

AD9

C/BE0

+3.3V6

AD6 AD4

GND10

AD2 AD0

+5V5

REQ64

+5V6 +5V7

3

+3P3V

+5V-12V

12

I

KCB4

0.1UF/16V

Y5V +80-20%

GND

A1 A2 A3 A4

TDI

A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49

A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62

PCI2_TRST #

PCI2_TMS PCI2_TDI

INTA# 19,41 INTC# 19,41

REQ64#_ 2

12

+

I

KCE8

KCE8 820UF/6.3 V

820UF/6.3 V

GND

PCH_PCIRS T# 1 9,41

GNT0# 19

PME# 19,41 A_D30 19,4 1

A_D28 19,4 1 A_D26 19,4 1

A_D24 19,4 1

A_D22 19,4 1 A_D20 19,4 1

A_D18 19,4 1

FRAME# 19 ,41

TRDY# 19,41

STOP# 19,41

SMB_CLK _R 18,19,38,39,41,49,5 0 SMB_DAT A_R 1 8,19,38,39,41,49,5 0

PAR 19,41 A_D15 19,4 1

A_D13 19,4 1 A_D11 19,4 1

A_D9 19,41

C/BE0# 19,41

A_D6 19,41 A_D4 19,41

A_D2 19,41 A_D0 19,41

KRN8B

I

KRN8A

I

+5V

12

NOBOM

KR6

KR6 0Ohm

0Ohm

5%

A_D20

3 4

2.7KOHM

5%

1 2

2.7KOHM

5%

2

+5V

12

NOBOM

KR7

KR7 0Ohm

0Ohm

5%

+3P3VSB

12

I

KCB6

0.1UF/16V

Y5V +80-20%

GND

A_D16 19,4 1

+5V

GND

12

NOBOM

KR8

KR8 0Ohm

0Ohm

5%

1

+12V

GND

A A

GND

PEGATRON DT-MB RESTRICTED SECRET

PCI EXPRESS X4

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

IPMIP-DP

1

Vic_Chen

40 68Wednesd ay, April 07, 2010

Rev

1.01

5

4

3

2

1

A_D[0..31]19,40

12

+

I

D D

PCI1_PRSN T1#

NI

KC1

0.1UF/16V

PCI1_PRSN T2#

12

NI

KC2

0.1UF/16V

GNDGND

12

NOBOM

KR4

12

0Ohm

5%

C C

B B

GND

I

KCE1

KCE1 820UF/6.3 V

820UF/6.3 V

CK_33M_ SL224

REQ1#1 9

A_D3119,40 A_D2919,40

A_D2719,40 A_D2519,40

C/BE3#1 9,40 A_D2319,40

A_D2119,40 A_D1919,40

A_D1719,40 C/BE2#1 9,40

IRDY#19,40

DEVSEL#19,40

PLOCK#19,40 PERR#19,40

SERR#19,40

C/BE1#1 9,40 A_D1419,40

A_D1219,40 A_D1019,40

A_D81 9,40 A_D71 9,40

A_D51 9,40 A_D31 9,40

A_D11 9,40

12

GNDGND

INTC#1 9,40 INTA#19,40

+5V

I

KCB2

0.1UF/16V

I

J21

SLOT 120 P, PCI

B1

B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49

B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62

B2 B3 B4 B5 B6 B7 B8 B9

-12V TCK GND11 TDO +5V22 +5V23 INTB INTD PRSNT1 RESERVED5 PRSNT2 GND12 GND13 RESERVED6 GND14 CLK GND15 REQ +5V8 AD31 AD29 GND16 AD27 AD25 +3.3V7 C/BE3 AD23 GND17 AD21 AD19 +3.3V8 AD17 C/BE2 GND18 IRDY +3.3V9 DEVSEL GND19 LOCK PERR +3.3V10 SERR +3.3V11 C/BE1 AD14 GND20 AD12 AD10 GND21

AD8 AD7 +3.3V12 AD5 AD3 GND22 AD1 +5V9 ACK64 +5V10 +5V11

RESERVED1

RESERVED2

RESERVED3

RESERVED4

hold_NC11hold_NC2

PCI1_TCK

ACK64#_ 1 REQ64#_ 1

TRST

+12V

TMS

+5V1 INTA INTC +5V2

+5V3

GND1 GND2

RST

+5V4

GNT

GND3

AD30

+3.3V1

AD28 AD26

GND4

AD24

IDSEL

+3.3V2

AD22 AD20

GND5

AD18 AD16

+3.3V3

FRAME

GND6 TRDY GND7 STOP

+3.3V4

SDONE

SBO

GND8

PAR

AD15

+3.3V5

AD13 AD11

GND9

AD9

C/BE0

+3.3V6

AD6 AD4

GND10

AD2 AD0

+5V5

REQ64

+5V6 +5V7

A1 A2 A3 A4

TDI

A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49

A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62

-12V

+3P3V +5V

+3P3V

0201 modify (KCE2 & KCE8 choose one)

12

I

KCB1

0.1UF/16V

GND

PCI1_TRST #

PCI1_TMS PCI1_TDI

INTB# 19,40 INTD# 19,40

PCH_PCIRS T# 1 9,40

GNT1# 19

PME# 19,40 A_D30 19,4 0

A_D28 19,4 0 A_D26 19,4 0

A_D24 19,4 0

A_D22 19,4 0 A_D20 19,4 0

A_D18 19,4 0

FRAME# 19 ,40

TRDY# 19,40

STOP# 19,40

SMB_CLK _R 18,19,38,39,40,49,5 0 SMB_DAT A_R 1 8,19,38,39,40,49,5 0

PAR 19,40 A_D15 19,4 0

A_D13 19,4 0 A_D11 19,4 0

A_D9 19,40

C/BE0# 19,40

A_D6 19,40 A_D4 19,40

A_D2 19,40 A_D0 19,40

GND

12

+

NI

KCE2

KCE2 820UF/6.3 V

820UF/6.3 V

KRN8D

KRN8C

+5V

12

NOBOM

KR1

KR1 0Ohm

0Ohm

5%

A_D19

7 8

2.7KOHM

5 6

2.7KOHM

+5V

12

NOBOM

KR2

KR2 0Ohm

0Ohm

5%

+3P3VSB

12

I

KCB5

0.1UF/16V

GND

A_D16 19,4 0

5%I KRN8 D

5%I

5%I KRN8 C

5%I

+5V

GND

12

+

NI

KCE4

KCE4 820UF/6.3 V

820UF/6.3 V

GND

12

NOBOM

KR3

KR3 0Ohm

0Ohm

5%

+12V

GND

12

+

NI

KCE3

KCE3 470uF/16 V

470uF/16 V

2

GND

A A

INTA#1 9,40

+3P3V

KRN4B

3 4

I

REQ0#19,40 REQ1#19 REQ3#19 REQ2#19

I

KRN3B

I

KRN4C

I

KRN3D

I

5

8.2K

3 4

8.2K

5 6

8.2K

7 8

8.2K

INTC#19,4 0 INTF#19 INTG#19

INTB#1 9,40 INTD#19,4 0 INTE#1 9

4

I

I I

I

I I

I

KRN3A

KRN3A KRN2D

KRN2D KRN4D

KRN4D KRN2B

KRN2B

KRN4A

KRN4A KRN3C

KRN3C KRN2A

KRN2A KRN2C

KRN2C

1 2 7 8 7 8 3 4

1 2 5 6 1 2 5 6

8.2K

GND

+3P3V +5V

KRN6B

3 4

I

PERR#19,40 SERR#19,40 PLOCK#19,40

DEVSEL#19,40

IRDY#19,40 STOP#1 9,40 FRAME#19,40 TRDY#1 9,40

3

I

KRN6A

I

KRN6C

I

KRN7A

I

KRN7C

I

KRN6D

I

KRN7D

I

KRN7B

I

2.7K

1 2

2.7K

5 6

2.7K

1 2

2.7K

5 6

2.7K

7 8

2.7K

7 8

2.7K

3 4

2.7K

PEGATRON DT-MB RESTRICTED SECRET

PCI1 SLOT

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

2

Date: Sheet of

Engineer:

IPMIP-DP

1

Vic_Chen

41 68Wednesd ay, April 07, 2010

Rev

1.01

5

Note：(AD48)

For some power supply , +5VSB drop before +12V when AC power out (S0 --> G3) , +12V will current back to +5VSB If your power supply has this sequence issue , please

D D

install AD48 instead of AQ1

SDATA_IN02 2

SDATA_O UT_122

AZ_SYNC_122 AZ_RST# _122 AZ_BITCLK _122

1

2

C C

+12V

+5VSB

I

AR7

AR7 100K

100K

5%

1 2

Digital

B B

Region

A A

+12V

GND

I

12

ACB7

ACB7 10UF/16V

10UF/16V

X5R 10%

X5R 10% mx_c0805

mx_c0805

NI

/ALC888S -VC

AZ_AVDD _GATEAZ _AVDD_GATE

AC26

0.22UF/16 V

X7R 10%

mx_c0603

5

1 2

I

12

GND

I

AU2

8

Vin

7

GND4

6

GND3

5

NC2

78L05

1 2

PLACE NEAR front audio CODEC FOR EMI

Please noite: AZ_BITCLK need add a serial res(22 ohm) near SB side

1 2

12

NI

AD48

AD48 BAT54CW

BAT54CW

3

AR230

AQ1

AQ1 NTR4502 PT1G

NTR4502 PT1G

I

S

2

G

1

12

I

AR8

AR8 100K

100K

5%

GND

Vout

GND1

GND2

NC1

1M

1M AR9

AR9

I

AR73 0

AR72 0

AR71 0

AR74 0

AR69 0

AGND

Provision AR23 for ALC888S-VC codec

D

3

12

NI

ACB3

ACB3 10UF/6.3V

10UF/6.3V

X5R 10%

X5R 10% mx_c0805

mx_c0805

2

D

+5VA_AZ

AGND

NPO 5%

I

NI

I

NI

I

D

G

S

3

IPDH6N03L AG

12

+

AGNDAG ND

GND

1

I

NI

ACE11

ACE11 100uF/16 V

100uF/16 V

AGND

1

2

3

4

NI

AC41

100PF/50 V

1 2

JP4

1 2

SHORTPIN

NOBOM

I

AR1

AR1 33

33

NI

AC3

AC3 10PF/50V

10PF/50V

NPO 5%

4

12

NI

AC4

AC4 22PF/50V

22PF/50V

NPO 5%

GNDGND

12

I

+

ACE10

ACE10 100uF/16 V

100uF/16 V

AGND AGND

AQ3_G

AQ3

12

I

AC2

0.1UF/16V

GND

CD_R

CD_L

4

+3P3V

12

ACB1

0.1UF/16V

Y5V +80-20%

12

AGND

CD_R

CD_L

CG_R CD_G ND

AR43 1KOhm

1KOhm

1 2

AR44 1KOhm

1KOhm

1 2

NI

I

ACB4

0.1UF/16V

X7R 10%

5% I/EVTAR43

5% I/EVT

5% I/EVTAR44

5% I/EVT

12

I

ACB2

0.1UF/16V

Y5V +80-20%

GNDGND GND

RSDATA_ IN0

12

I

ACB5

0.1UF/16V

X7R 10%

ACE864

1UF/10V

12

I/EVT

ACE865

1UF/10V

12

I/EVT

AC6

1UF/10V

1 2

I/EVT

SPDIF_OUT 143

CD1

CD_R_R

4

CD_L_R

1

WAF ER_BOX_4P

I/EVT

+5VA

AGND

CG_R_R

3 2

CD_RC

CD_LC

AU22

1

DVDD1

9

DVDD2

4

DVSS1

7

DVSS2

8

SDATA_IN

5

SDATA_OUT

10

SYNC

11

RESET#

6

BIT_CLK

12

PCBEEP

2

GPIO0/DMIC-CLK/SPDIFO2

3

GPIO1/DMIC-DATA

25

AVDD1

38

AVDD2

26

AVSS1

42

AVSS2

20

CD_R

18

CD_L

19

CD_GND

47

SPDIFI/EAPD

48

SPDIFO

ALC888S _GR

I

AR45

1 2

1KOhm

5%

5% I/EVT

I/EVT

3

LINE1_R

LINE1_L

FRONT_OUT_R

FRONT_OUT_L

MIC1_R

MIC1_L

SENSE_A

LINE2_R

LINE2_L

MIC2_R

MIC2_L

SENSE_B

AGPIO

MIC1_VREFO_R

MIC1_VREFO_L

PIN37_VREFO

LINE1_VREFO

MIC2_VREFO

LINE2_VREFO

VREF

ALC888S Rev. A

SIDESURR_OUT_R

SIDESURR_OUT_L

LFE_OUT

CEN_OUT

SURR_OUT_R

SURR_OUT_L

JDREF

ALC662 02X611003200

CG_R

3

2

AR34 75

I

F_LIN1_RC

24

F_LIN1_LC

23

FRONT_R C

36

FRONT_L C

35

MIC1_RC

22

MIC1_LC

21

13

LIN2_RC

15

LIN2_LC

14

MIC2_RC

17

16

34

33

32

28

37

29

30

31

ALC_VRE F

27

SURB_RC

46

SURB_LC

45

LEFC

44

CENC

43

SUR_RC

41

SUR_LC

39

AUD_JD_ REF

40

AC5 4.7UF/6.3V X5R 10%

1 2

I

AC7 4.7UF/6.3V X5R 10%

1 2

I

ACE4 10UF/25V

1 2

I

+

ACE5 10UF/25V

1 2

I

+

AC11 4.7 UF/6.3V X5R 10%

1 2

I

AC18 4.7 UF/6.3V X5R 10%

1 2

I

ACE6 100uF/16V

1 2

I

ACE8 100uF/16V

I

ACE9 100uF/16V

I

I/662 NI

+

ACE7 100uF/16V

1 2

+

1 2

+

1 2

+

12

I

ACB6

ACB6 10UF/6.3V

10UF/6.3V

X5R 10%

AGND

ACE868 10UF/2 5V

1 2

+

ACE869 10UF/2 5V

1 2

+

ACE870 10UF/2 5V

1 2

+

ACE871 10UF/2 5V

1 2

+

ACE872 10UF/2 5V

1 2

+

ACE873 10UF/2 5V

1 2

+

12

I

AR11

AR11 20KOhm

20KOhm

1%

AGND

2

mx_c0805

I_F_LIN1_RC

I_F_LIN1_LC

I_FRONT_R _C

I_FRONT_L _C

I_MIC1_R_C

I_MIC1_L_C

R_LIN2_RC

R_LIN2_LC

I_MIC2_R_C

I_MIC2_L_CMIC2_LC

I_SURB_R_ C

I_SURB_L_ C

I_LEF_C

I_CEN_C

I_SUR_R_C

I_SUR_L_C

Date: Sheet of

I

1 2

AR35 75

I

1 2

AR15 75

I

1 2

AR16 75

I

1 2

AR30 75

I

1 2

AR31 75

I

1 2

AR2 75

I

1 2

AR5 75

I

1 2

AR4 75

I

1 2

AR6 75

I

1 2

AR17 75

I/662 NI

1 2

AR18 75

I/662 NI

1 2

AR19 75

I/662 NI

1 2

AR20 75

I/662 NI

1 2

AR21 75

I/662 NI

1 2

AR22 75

I/662 NI

1 2

PEGATRON DT-MB RESTRICTED SECRET

Pegatron Corp.

Size Project Name

A3

IPMIP-DP

1

LIN1_R_C 4 4

LIN1_L_C 44

FRONT_R _C 44

FRONT_L _C 44

MIC1_R_C 44

MIC1_L_C 44

SENSE_A 44

LIN2_R_C 4 3

LIN2_L_C 43

MIC2_R_C 43

MIC2_L_C 43

SENSE_B 43,44

MIC1_VREF _R 4 4

MIC1_VREF _L 44

MIC2_VREF 43

LIN2_VREF 43

SURB_R_ C 44

SURB_L_ C 44

LEF_C 44

CEN_C 44

SUR_R_C 44

SUR_L_C 44

Title :

Engineer:

1

AUDIO CODEC

Vic_Chen

42 68Wednesd ay, April 07, 2010

Rev

1.01

5

D D

4

3

2

1

But for other customers (ex, Intel, EPSON, FSC,

Dell......etc), they might don't

NI

AC30

AC30 100PF/50 V

100PF/50 V

NPO 5%

1 2

I

AR78

AR78 0

0

1 2

GNDAGND

C C

MIC2_VREF42

LIN2_VREF42

B B

A A

PLACE NEAR front audio header FOR EMI

AD4

3

BAW5 6WPT

I

AD5

3

BAW5 6WPT

I

MIC2_L_C42

MIC2_R_C4 2 LIN2_R_C42

LIN2_L_C4 2

5

2

1

2

1

MIC2_VREF _R

MIC2_VREF _L

LIN2_VREF _R

LIN2_VREF _L

12

AR47

AR47 22KOHM

22KOHM

5%

5% NI

NI

12

AR48

AR48 22KOHM

22KOHM

5%

5% NI

NI

12

AGND

4.7KOHM

12

AGNDAGNDAGND

ARN15A

ARN15B

ARN15C

ARN15D

AR50

AR50 22KOHM

22KOHM

5%

5% NI

NI

5%I ARN15A

5%I

1 2

5%I ARN15B

5%I

3 4

5%I ARN15C

5%I

5 6

5%I ARN15D

5%I

7 8

AR49

AR49 22KOHM

22KOHM

5%

5% NI

NI

4

J100

1

3 4

HEADER_1X4P_K2

I

GND

Front Audio Header

AL4 120Ohm/1 00Mhz/0.6AI AL4 120O hm/100Mhz/0.6AI AL3 120Ohm/1 00Mhz/0.6AI AL3 120O hm/100Mhz/0.6AI AR80 0Imx_r0603A R80 0Imx_r0603

1 2

AR81 0Imx_r0603A R81 0Imx_r0603

1 2

+5V

AR77

1 2

0Imx_r0603

SPDIF_OUT 1 42

GND

12

I

AC38

0.1UF/16V

SPDIF_O1_ L SP DIF_OUT1_L

120Ohm/1 00Mhz/0.6A

12

AR52

AC42

200

100PF/50 V

NI

1 2

GND

NPO 5%

NPO 5% I

I

AL8

2 1

I

Color = Green

P23

21 21

AGND

3

12

AC28

AC28 100PF/50 V

100PF/50 V

NPO 5%

NPO 5% I

I

SENSE_B42 ,44

12

AC29

AC29 100PF/50 V

100PF/50 V

NPO 5%

NPO 5% I

I

12

AC31

AC31 100PF/50 V

100PF/50 V

NPO 5%

NPO 5% I

I

AR53

47 Ohm

5%

5% I

I

MIC2_L MIC2_R LIN2_R

LIN2_L

12

AC43

AC43 100PF/50 V

100PF/50 V

NPO 5%

NPO 5% I

I

AGNDA GNDAGND

12

AC32

AC32 100PF/50 V

100PF/50 V

NPO 5%

NPO 5% NI

NI

AGND

P23

1

2 3 4 5 6 7 9 10

HEADER_ 2X5P_K8

I

2

MIC2_RTU

LIN2_RTU

need 6+3 configuration, just general 6+2 type. If so, please change LINE1 (Pin 23/24) to Rear Line-In port instead of CD-IN, because CD-IN (Pin 18/19/20) port is only dedicated input port and can't retasking

+3P3V

12

AR38

4.7KOHM

5%

5% I

I

12

ACB10

0.1UF/16V

Y5V +80-20%

Y5V +80-20% NI

12

AR39

39.2KOHM

1%

1% I

I

AGND

PEGATRON DT-MB RESTRICTED SECRET

Pegatron Corp.

Date: Sheet of

AGND

AR51

AR51 20KOhm

20KOhm

1%

1% I

I

Size Project Name

A3

IPMIP-DP

GND

NI

Title :

Engineer:

1

F_AUDIO_D ET# 22

FORNT AUDIO CONN.

Vic_Chen

43 68Wednesd ay, April 07, 2010

Rev

1.01

5

4

3

2

1

Azalia Rear Audio Connector

D D

SENSE_A42

SENSE_B42,43

AR56 0Imx_r0603A R56 0Imx_r0603

LIN1_L_C42

LIN1_R_C42

FRONT_L _C42 SUR_L_C 42

FRONT_R _C42

MIC1_L_C4 2

MIC1_R_C42

4.7K

AR10

AR12

I

C C

MIC1_VREF _R42 MIC1_VREF _L42

B B

I

1 2

LIN1_L LIN1_JD

LIN1_R

FRONT_L FRONT_J D

FRONT_R

MIC1_L MIC1_JD

MIC1_R AGND_C

1 2

AR68 10KOh m 1%I AR6 8 10KOhm 1%I

1 2

AR57 0Imx_r0603A R57 0Imx_r0603

1 2

AR58 0Imx_r0603A R58 0Imx_r0603

1 2

AR33 5.1KOH M 1 %I AR3 3 5.1KOHM 1%I

1 2

AR70 0Imx_r0603A R70 0Imx_r0603

1 2

AR60 0Imx_r0603A R60 0Imx_r0603

1 2

AR32 20KOh m 1%I AR3 2 20KOhm 1%I

1 2

AR61 0Imx_r0603A R61 0Imx_r0603

1 2

J86 & J87 colay

AGND

J87

L

32 33 34

R

35

L

22 23 24

R

25

L

2 3 4

R

5 1

G1

P_GND1

G2

P_GND2

G3

P_GND3

G4

P_GND4

AUDIO_3IN1_A ZA_13P

NI/662 I

PORT3

PORT2

PORT1

12

NP_NC1

B

L

P

AC14

AC14 100PF/50 V

100PF/50 V

NPO 5%

NPO 5% I

I

P1

12

AC15

AC15 100PF/50 V

100PF/50 V

NPO 5%

NPO 5% I

I

12

AC16

AC16 100PF/50 V

100PF/50 V

NPO 5%

I

12

AC17

AC17 100PF/50 V

100PF/50 V

NPO 5%

NPO 5% I

I

12

AC19

AC19 100PF/50 V

100PF/50 V

NPO 5%

NPO 5% I

I

12

AC25

AC25 100PF/50 V

100PF/50 V

NPO 5%

NPO 5% I

I

LIN1_L LIN1_JD

LIN1_R

FRONT_L FRONT_J D

FRONT_R

MIC1_L MIC1_JD

MIC1_R

AGND AGND

1 2

JP19

JP19 SHORTPIN

SHORTPIN

NOBOM

I/662 NI

J86

AUDIO_6IN1_A ZA_26P

L

10 11

PORT3

12

R

13

L

6 7 8

PORT2

R

9

L

2 3 4

PORT1

5

R

1

31

NC1

32

NC2

33

GND1

34

GND2

NI

C45

0.1UF/16V

1 2

L

23

B O

L

P

B

G

24

PORT6

25

R

26

L

19 20 21

PORT5

R

22

L

15 16 17

PORT4

18

R

14

27

GND3

28

GND4

29

GND5

30

GND6

AGND_C

GNDA GND GNDA GND

CEN CEN_JD

LEF

SUR_L SUR_JD

SUR_R

SURB_L SURB_JD

SURB_R

12

AC20

AC20 100PF/50 V

100PF/50 V

NPO 5%

I/662 NI

NI

C46

0.1UF/16V

1 2

12

AC21

AC21 100PF/50 V

100PF/50 V

NPO 5%

I/662 NI

12

AC22

AC22 100PF/50 V

100PF/50 V

NPO 5%

I/662 NI

AGNDAGNDAGND AGNDAGND AGNDAGND AGN DAGND AGNDAGND AGND

12

AC23

AC23 100PF/50 V

100PF/50 V

NPO 5%

I/662 NI

12

AC24

AC24 100PF/50 V

100PF/50 V

NPO 5%

I/662 NI

12

I/662 NI

NI

C71

0.1UF/16V

1 2

AC27

AC27 100PF/50 V

100PF/50 V

NPO 5%

AR62 0

1 2

AR36 10KOh m 1%I/662 NI AR3 6 10KOhm 1%I/662 N I

1 2

AR63 0

1 2

AR64 0

1 2

AR29 39.2KO HM 1%I/662 NI AR2 9 39.2KOHM 1 %I/662 NI

1 2

AR65 0

1 2

AR66 0

1 2

AR37 5.1KOH M 1 %I/662 NIAR37 5.1KOH M 1 %I/662 NI

1 2

AR67 0

1 2

IPMIP-GS R1.01 Change port

SENSE_A

mx_r0603A R62 0

mx_r0603

mx_r0603A R63 0

mx_r0603

mx_r0603A R64 0

mx_r0603

mx_r0603A R65 0

mx_r0603

mx_r0603A R66 0

mx_r0603

mx_r0603A R67 0

mx_r0603

0209 EMI request

NI

C72

0.1UF/16V

1 2

CEN_C 42

LEF_C 42

SUR_R_C 42

SURB_L_ C 42

SURB_R_ C 42

GNDA GNDGNDA GND

A A

PEGATRON DT-MB RESTRICTED SECRET

REAR AUDIO CONN.

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

5

4

3

2

Date: Sheet of

IPMIP-DP

Engineer:

REAR AUDIO CONN.

1

Vic_Chen

44 68Wednesd ay, April 07, 2010

Rev

1.01

5

4

3

2

1

NOTE:

+SBV89 +5V_DUA L_USB_B

12

I

UCB7

0.1UF/16V

D D

3 4

0

USBN820

USBP820

VP

1 2

VP

1

2

1

2

0

URN5B

0

URN5A

NI

4

90Ohm/10 0MHz

90Ohm/10 0MHz UL3

UL3

3

NI

4

90Ohm/10 0MHz

90Ohm/10 0MHz UL4

UL4

3

GND

I

UU5

CM1213_ 04SO

CH1

1

VN

2

CH2 CH3

3 4

CH4

6

5

+5VSB

VP

LP8LP8

GND

I

P151

HEADER_ 2X5P_K9

1

2 3 4 5 6 7 8

10

GND

LP9LP9+

0.1UF/16V

GND

Check USB cable internal whether h ad capacity NI:BPC I: CPC

12

+

I

UCE8

UCE8 470uF/6.3 V

470uF/6.3 V

GND

I

UF8

1.6A/6V

12

I

UR17

8.2K

OC89# 20

12

I

UR19

UR19 15K

15K

GND

12

NI

UC10

0.1UF/16V

C C

USBN920

USBP920

USBN1020

B B

USBP1020

USBN1120

USBP1120

A A

7 8

VP

5 6

VP

3 4

VP

1 2

VP

7 8

VP

5 6

VP

1

2

1

2

0

URN5D

0

URN5C

0

URN6B

0

URN6A

0

URN6D

0

URN6C

NI

4

90Ohm/10 0MHz

90Ohm/10 0MHz UL5

UL5

3

NI

4

90Ohm/10 0MHz

90Ohm/10 0MHz UL6

UL6

3

GND

I

UU6

CM1213_ 04SO

CH1

1

VN

2

CH2 CH3

3 4

CH4

6

5

NOTE:

+SBV101 1

12

I

UCB8

0.1UF/16V

I

P152

HEADER_ 2X5P_K9

1

LP10-

GND

+5VSB

VP

3 4 5 6 7 8

2

LP11LP11+LP10+

10

GND

0.1UF/16V

GND

Check USB cable internal whether h ad capacity NI: BPC I: CPC

12

+

I

UCE9

UCE9 470uF/6.3 V

470uF/6.3 V

GND

I

UF9

1.6A/6V

12

I

UR20

8.2K

12

I

UR22

UR22 15K

15K

GNDGND

12

NI

UC11

0.1UF/16V

+5V_DUA L_USB_B

12

OC1011# 20

PEGATRON DT-MB RESTRICTED SECRET

USB HEADER CON.

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

IPMIP-DP

USB HEADER CON.

Vic_Chen

1

Rev

1.01

45 68Wednesd ay, April 07, 2010

1.01

5

4

3

2

1

NOTE:

Check USB cable internal whether h ad capacity NI: BPC I: CPC

12

I

UCB11

0.1UF/16V

I

GND

I

P153

HEADER_ 2X5P_K9

1

2 3 4 5 6 7 8

10

GND

LP13LP13+LP12+

D D

3 4

0

USBN1220

USBP1220

C C

USBN1320

USBP1320

0

I

URN7B

1 2

0

I

URN7A

1

2

1

2

7 8

0

I

URN7D

5 6

0

I

URN7C

NI

4

90Ohm/10 0MHz

90Ohm/10 0MHz UL1

UL1

3

NI

4

90Ohm/10 0MHz

90Ohm/10 0MHz UL2

UL2

3

GND

I

UU7

CM1213_ 04SO

CH1

1

VN

2

CH2 CH3

3 4

CH4

6

5

+5VSB

VP

LP12-

0.1UF/16V

GND

12

+

I

UCE11

UCE11 470uF/6.3 V

470uF/6.3 V

12

I

UR21

8.2K

12

I

UR25

UR25 15K

15K

GNDGND

I

UF11

1.6A/6V

12

NI

UC13

0.1UF/16V

+5V_DUA L_USB_B+SBV121 3

12

OC67# 20

I

P60

SATA_CO N_7P

TC17 0.01UF/25 V X 7R 10%

1 2

I

SATA_TX P021

SATA_TX N021

SATA_RX N021

SATA_RX P021

B B

SATA_TX P221

SATA_TX N221

SATA_RX N221 SATA_RX N321

SATA_RX P221 SATA_RXP321

SATA_TX P421

SATA_TX N421

SATA_RX N421

SATA_RX P421

A A

I

TC18 0.01UF/25 V X 7R 10%

1 2

I

TC19 0.01UF/25 V X 7R 10%

1 2

I

TC20 0.01UF/25 V X 7R 10%

1 2

I

TC25 0.01UF/25 V X 7R 10%

1 2

I

TC26 0.01UF/25 V X 7R 10%

1 2

I

TC27 0.01UF/25 V X 7R 10%

1 2

I

TC28 0.01UF/25 V X 7R 10%

1 2

I

TC33 0.01UF/25 V X 7R 10%

1 2

I

TC34 0.01UF/25 V X 7R 10%

1 2

I

TC35 0.01UF/25 V X 7R 10%

1 2

I

TC36 0.01UF/25 V X 7R 10%

1 2

I

SATA_TX P0_C SATA_TX N0_C

SATA_RX N0_C SATA_RX P0_C

SATA_TX P2_C SATA_TX N2_C

SATA_RX N2_C SATA_RX P2_C

SATA_TX P4_C SATA_TX N4_C

SATA_RX N4_C SATA_RX P4_C

GND

SATA_CO N_7P

1

P_GND1

2

3

4

5

6

7

P_GND2

I

P62

SATA_CO N_7P

1

P_GND1

2

3

4

5

6

7

P_GND2

I

P64

SATA_CO N_7P

1

P_GND1

2

3

4

5

6

7

P_GND2

8

9

8

9

8

9

SATA CONNECTOR FOR CPC

SATA CONNECTOR FOR CPCSATA CONNECTOR FOR CPC

TC21 0.01UF/25 V X 7R 10%

1 2

I

SATA CONTROLLER #1 (PRIMARY MASTER)

SATA_TX P121

SATA_TX N121

SATA_RX N121

SATA_RX P121

SATA_TX P321

SATA_TX N321

COLOR = RED COLOR = RED

I

TC22 0.01UF/25 V X 7R 10%

1 2

I

TC23 0.01UF/25 V X 7R 10%

1 2

I

TC24 0.01UF/25 V X 7R 10%

1 2

I

TC29 0.01UF/25 V X 7R 10%

1 2

I

TC30 0.01UF/25 V X 7R 10%

1 2

I

TC31 0.01UF/25 V X 7R 10%

1 2

I

TC32 0.01UF/25 V X 7R 10%

1 2

I

SATA_TX P1_C SATA_TX N1_C

SATA_RX N1_C SATA_RX P1_C

SATA_TX P3_C SATA_TX N3_C

SATA_RX N3_C SATA_RX P3_C

GND

SATA CONTROLLER #2 (PRIMARY MASTER)

COLOR = RED

GND

I

P61

SATA_CO N_7P

1

P_GND1

2

3

4

5

6

7

P_GND2

I

P63

SATA_CO N_7P

1

P_GND1

2

3

4

5

6

7

P_GND2

8

SATA CONTROLLER #1 (SECONDARY MASTER)

COLOR = REDCOLOR = RED

9

8

SATA CONTROLLER #1 (SECONDARY MASTER)

9

PEGATRON DT-MB RESTRICTED SECRET

USB HEADER CON.

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

IPMIP-DP

1

Vic_Chen

46 68Wednesd ay, April 07, 2010

Rev

1.01

5

D D

Pin49:

System clock input: 24/48 MHz

Pin 39: SERIRQ

C C

Please check if SB side already have a pull-up resistor!

LAD022 ,50 LAD122 ,50 LAD222 ,50 LAD322 ,50

LFRAME#22 ,50

LDRQ0#22

PLTRST#13 ,22,36,50,57

CK_33M_ SIO24

SERIRQ21,5 0

CK_48M_ SIO8

KBDATA34 KBCLK34 MSDATA34 MSCLK34 RST_KB#21

B B

A A

A20GATE2 1

5

GND

DCD1#56 RI1#5 6 CTS1#56 DTR1#5 6 RTS1#56 DSR1#56 TXD156 RXD156

12

NI

O2C1

0.1UF/16V

12

NI

O2C3

O2C3 12PF/50V

12PF/50V

NPO 5%

+3P3V

12

I

O2R42

4.7K

12

NI

O2C4

0.1UF/16V

GNDGND

12

NI

O2R17

O2R17 680

680

GND GNDGND

12

NI

O2R16

O2R16 680

680

12

4

NI

O2R18

O2R18 680

680

4

GND

12

+3P3V

NI

O2R20

O2R20 680

680

1 2

XSTB#55 XAFD#5 5 ERROR#55 ACK#55 BUSY55

PE55 SLCT55 XPD055 XPD155 XPD255 XPD355 XPD455 XPD555 XPD655 XPD755 XSLIN#55 XINIT#55

+3P3V

12

I

O2R37

4.7K

I

O2R15

+3P3V +3 P3V

12

I

O2R38

4.7K

DCD2#5 6

RI2#5 6 CTS2#56 DTR2#56 RTS2#56

DSR2#56

TXD256

RXD256

12

I

O2R35

4.7K

O2U1A

I

O2U1A

I

51

DENSEL#

63

INDEX#

52

MTRA#

54

DRVA#

57

SMBC_R2/DIR#

58

SMBC_M2/STEP#

56

WDATA#

60

SMBD_M2/WGATE#

62

TRK0#

64

WPT#

61

RDATA#

59

SMBD_R2/HDSEL#

65

DSKCHG#

108

SMBC_M/STB#/GP87

107

SMBC_R/AFD#/GP86

106

ERR#

103

ACK#/GP83

102

BUSY/GP82

101

PE/GP81

100

SLCT/GP80

109

PD0/GP70

110

PD1/GP71

111

BUSSI0/PD2/GP72

112

BUSSI1/PD3/GP73

113

BUSSI2/PD4/GP74

114

BUSSO0/PD5/GP75

115

BUSSO1/PD6/GP76

116

BUSUO2/PD7/GP77

104

SMBD_R/SLIN#/GP84

105

SMBD_M/INIT#/GP85

41

LAD0

42

LAD1

43

LAD2

44

LAD3

40

LFRAME#

38

LDRQ#

37

LRESET#

47

PCICLK

39

SERIRQ

49

CLKIN

80

KDAT/GP61

81

KCLK/GP60

82

MDAT/GP57

83

MCLK/GP56

45

KRST#/GP62

46

GA20/JP5

127

DCD1#

128

RI1#

1

CTS1#

126

DTR1#/JP4

122

RTS1#

123

DSR1#

124

SOUT1/JP3

125

SIN1

26

DCD2#/GP21

28

RI2#/GP17

27

CTS2#/GP20

29

DTR2#

23

FAN_TAC5/RTS2#/GP24

22

FAN_TAC4/DSR2#/GP25

21

SOUT2/GP26

20

SIN2/GP27

IT8721F

3

99

AVCC3

4

3VSB1

35

3VSB2

67

3VSB3

69

VBAT

/MTRB#

70

SYS_3VSB

+5VSB_A TX

GNDA

GNDD1 GNDD2 GNDD3 GNDD4

16

86

15 50 74 117

5VSB_CTRL

12

NI

O2CB2

O2CB2 10UF/6.3V

10UF/6.3V

X5R 10%

GND

0210 ITE modify

+BATT

12

I

O2CB3

0.1UF/16V

+3P3VSB

GND

12

I/ NI for non-Eup

O2R71

4.7K

I/ NI for non-Eup

+3P3VSB _IO

12

I

O2R41

O2R41 100

100

1%

12

I

O2CB1

0.1UF/16V

O2R30

1 2

4.7K

NOTE：

O2Q1 MOS Selection Base on your plateform

2

I

ADJ/GND

4

Vout

LIN REG, 1117

12

I/ NI for non-Eup

O2R23

4.7K

3

C

PMBS390 4

E

E 2

2

12

I

O2CB5

0.1UF/16V

Q8512

1 2

OUT

3

IN

I/ NI for non-Eup

12

I

O2CB4

0.1UF/16V

GND GND GND

12

+

I

PCE322

PCE322 100uF/16 V

100uF/16 V

GND

+5VSB_A TX

I/ NI for non-Eup

O1Q1

B

1

B

1

GND

+3P3V

12

I

O2CB6

0.1UF/16V

+5VSB_A TX+3P3VSB_ IO

+3P3VSB _I/O_REF_A

PC313

0.1UF/16V

MLCC/+/-10 %

+3P3VSB _IO

12

I

PR314

PR314 120

120

1%

+3P3VSB _I/O_REF_A

+5VSB_A TX

12

I/ NI for non-Eup

O2C12

O2C12 1UF/10V

1UF/10V

mx_c0603

I/ NI for non-Eup

O2C11

O2C11 10UF/16V

10UF/16V

X5R 10%

X5R 10% mx_c0805

mx_c0805

+5VSB_A TX +5VS B

1%

12

I

PR315

PR315 200

200

1%

GND GND

I/ NI for non-Eup

O2Q1

1 2 3 4

SI4835DDY-T1-E 3

I/ NI for non-Eup

NI / I for non-Eup

PR63

PR63 0 Ohm

0 Ohm

mx_r0603

1 2

PR57

1 2

0 Ohm

NI / I for non-Eup

mx_r0603

DSG

I

12

GND

12

8 7 6 5

1

PC314

0.1UF/16V

I

MLCC/+/-10 %

+5VSB

12

+

O2CE1

O2CE1 100uF/16 V

100uF/16 V

GNDGNDGN D

Please check Power guy

GND

TSD

87

TSD-

GND

3

12

NI

O2R6

O2R6 680

680

TSD 48

2

PEGATRON DT-MB RESTRICTED SECRET

SIO NCT5571D

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

IPMIP-DP

Engineer:

1

Vic_Chen

47 68Wednesd ay, April 07, 2010

Rev

1.01

5

4

3

2

1

12

I

O2R46

O2R46 10KOhm

10KOhm

5%

I

O2R160

4.7KOHM

5%

+5V

GND

+1P5V_D UAL_OV

12

I

O2R4

4.7K

+3P3VSB

12

I

O2R5

7.15KOHM

1%

12

I

O2R44

O2C10

10KOhm

0.1UF/16V

5%

GND

+3P3VSB+ 5VSB_ATX +3 P3VSB

12

I

O2R19

4.7K

GND

+3P3VSB

NI

O2R11

4.7K

PECI_SIO13

ITE change 11/24

12

NI

O2R10

4.7K

I

1 2

12

NI

O2C21

O2C21 10PF/50V

10PF/50V

NPO 5%

12

I

O2R27

4.7K

VDIMM(VIN4)

+3P3V +3P 3V

12

I

O2R40

4.7K

I

12

O2C23

O2C23 1UF/10V

1UF/10V

GND

O2C7

33

+BATT

12

O2R3

O2R3 1MOhm

1MOhm

5%

5% NI

NI

12

I

O2R13

O2R13 1K

1K

1%

GND

I

12

O2R60

O2R60 100KOHM

100KOHM

1%

O2U1B

I

O2U1B

I

98

VIN0(+12V_SEN)

97

VIN1(+5V_SEN)

96

VIN2

94

VLDT_12/VIN4

93

VDDA25/VIN5

92

VDIMM_STR/VIN6

I

O2R43

4.7K

84

VDIMM_STR_EN/PCIRST3#/GP10

120

VDDA_EN/GP65

5

VCORE_EN/GP64

6

VCORE_GOOD/GP63

119

VLDT_EN/GP66

118

CPU_PG/GP67

91

VREF

36

VCORE

12

I

O2C13

0.022UF/1 6V

X7R 10%

GND

75

PANSWH#/GP43

72

PWRON#/GP44

76

PSON#/GP42

85

RSMRST#/CIRRX1/GP55

19

GP30

14

GP34

13

GP35

66

GP47

68

COPEN#

17

5VAUX_SW

79

3VSBSW#/GP40

53

SST/AMDTSI_D/PCH_D/PECI_AVA

55

PECI/AMDTSI_C/PCH_C/DRVB#

31

PECI_RQT/GP14

IT8721F

NI

O2C6

0.1UF/16V

FAN_CTL1 FAN_CTL2/GP51 FAN_CTL3/GP36

FAN_TAC1 FAN_TAC2/GP52 FAN_TAC3/GP37

TMPIN1 TMPIN2 TMPIN3

/MTRB#

PME#/GP54

SUSC#/GP53

SUSB#

ATXPG/VIN3

PWRGD3

PWRGD2 PWRGD1

PCIRST1#/GP12 PCIRST2#/GP11

PCIRSTIN#/CIRTX2/GP15

FAN_CTL5/CIRRX2/GP16

FAN_CTL4

CE_N/CIRTX1

SI/GP23

SO/GP50

SCK/GP22

8 10 12

7 9 11

90 89 88

73

77 71 95 78

18 32

33 34

O2R32

4.7K

3 2 121

30 24 48 25

I

+3P3V

TP_SO

+5V +5V

12

I

O2R165

4.7K

MB_THRM P

+3P3VSB

12

ATXPG_IN POWE ROK

12

+3P3VSB

12

I

O2R39

4.7K

I

O2R36

4.7K

12

NI

O2R51

O2R51 1K

1K

1%

1

I

O2R166

4.7K

+3P3VSB+3P3VSB

T54

NI NI

TSD47

12

NI

O2R52

O2R52 1K

1K

1%

NOBOM

Please check if another side already have a pull-up resistor!

1 2 1 2

12

GND

O2R244 .7KNIO2R244 .7K O2R294 .7KNIO2R294 .7K

I

12

O2C5

O2C5 2200PF/5 0V

2200PF/5 0V

X7R 10%

LPC_PME # 22

SLP_S4# 22 SLP_S3# 13,2 2,64,66

+3P3VSB

NI

O2R12

4.7K

NI

O2C16

O2C16 10PF/50V

10PF/50V

NPO 5%

+3P3VSB

12

I

O2R1

O2R2

4.7K

GND

3

C

E

E 2

2

+3P3VSB

I

4.7K

12

I

B

1

B

1

PMBS390 4

O2Q12

PLED 52

PLED2 5 2

+3P3VSB

12

I

O2R26

O2R26 1K

1K

CPUFAN_ PWM 51 CHAFAN_ PWM 51

CPUFAN_ TACH 51 CHAFAN_ TACH 51

+3P3V

12

I

O2R28

O2R28 1K

1K

1%

12

NI

O2C26

0.1UF/16V

1%

SIO_PW ROK 54PCIES_RST# 38,39

GND

Pin 73: PME#

Please check if another side already have a pull-up resistor!

ATX_PW RGD 58

GND

12

I

O2R167

O2R167 1K

1K

1%

12

I

O2C24

0.1UF/16V

1 2

VP

+12V

12

I

O2R45

31.6KOHM

1%

12

I

O2C15

0.1UF/16V

GND GND

+3P3VSB _IO

12

I

O2R14

4.7K

O2R250VPO2R250

+VCORE

+3P3V

12

I

O2R168

+1P5V_D UAL

D D

12

I

O2R9

4.7K

12

I

O2C2

0.1UF/16V

GND

C C

+1P5V_D UAL_OV65

O2R168 10K

10K

12

I

O2C25

0.1UF/16V

GND GND

12

I

O2R169

O2R169 10KOhm

10KOhm

5%

12

GND

+3P3VSB _IO

NI

O2R22

4.7K

NI

O2C14

O2C14 10PF/50V

10PF/50V

NPO 5%

Pin75/72/76: Please check if another side already have a pull-up resistor!

O2R21

NI

0

PWRB TN#52

SB_PW RBTN#22

PSON#58

SIO_RSMRS T#54

1 2

O2R21 O2R25 AC power loss function

NI

1

I

B B

2 Controlled by SB(Bypass)

Note: COPEN# should be connected to GND, when this function is not be used

Only S3 high

S0/S110

A A

Pin 79: 3VSBSW

Controlled by SIO

I

NI

+3VSBSW67

PMBS390 4

S4/S5

S3

O2Q4

+3P3VSB

3

C

I

E

E 2

2

GND

12

I

O2R159

4.7K

B

1

S0# Tri-state / S3# Low state / S5# Tri-State

Pin 17: 3VSBSW

S0# Low state / S3# Tri-State / S5# Low state

5

O2R60: avoid pre-bios floating

4

GNDGND

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

3

2

Date: Sheet of

IPMIP-DP

Title :

Engineer:

ONFI

Vic_Chen

48 68Wednesd ay, April 07, 2010

1

48 68Wednesd ay, April 07, 2010

Rev

1.01

5

4

3

2

1

SM BUS Control

D D

To PCH, PCI, and PCIE Slot

SMB_DAT A_R18,19,38,39 ,40,41,50 SMB_DAT A_M 8,16,17,5 7

SMB_CLK _R18,19,38,39 ,40,41,50 SMB_CLK _M 8,16,17,57

C C

I

E16

SPI_CS#19

B B

SPI_MISO19

E16

HEADER_ 2X4P_K4

1 2 3 5 6 7 8

1 2

NI

F3R1

F3R1 0

0

+3P3V_M E

GND

VP

1 2

D

3

NI

Q7

Q7 2N7002

2N7002

R14

0

G

1

S

2

PWRO K_R_Q

+3P3V_M E

VP

1 2

D

3

NI

Q14

Q14 2N7002

2N7002

12

I

F3R5

8.2K

R39

0

S

2

G

1

+3P3V

NI

R18

2.7K

12

NI

R15

8.2K

12

NI

R19

2.7K

12

+12V

SPI BIOS ROM - 64Mbit

U14

GND

U14

1

CS#

2

DO

3

WP#

4

GND

SOCKET_ 8P

NI

VCC

HOLD#

CLK

DIO

8 7 6 5

SPI_HOLD#

SPI_CS#_E 16

SPI_MISO FWH _WP#

To Clock Gen, DIMMs, and ITP Debug Port

+3P3V_M E

12

I

F3CB1

0.1UF/16V

F3R6

1 2

8.2K

I

+3P3V_M E

SPI_MOSI19

SPI_CLK19

JE16:12

IPMIP-GS Change SPI to 64Mb

GND

64Mb: 05X00Z2GE330

32Mb:05X00Z2FC330

MINI_JUMPER

I

A A

I

SPI_CS#_E 16

5

16Mb 05X00Z2EA330

U96

1

CS#

2

DO(IO1) WP#(IO2) GND

W25 Q64BVSSIG

I

4

HOLD#(IO3)

GND

3 4

VCC

CLK

DI(IO0)

+3P3V_M E

8

SPI_HOLD#SPI_MISO

7

SPI_CLKFW H_WP#

6

SPI_MOSI

5

3

2

PEGATRON DT-MB RESTRICTED SECRET

SPI FLASH - 8M

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

Engineer:

IPMIP-DP

SPI FLASH - 8M

1

Vic_Chen

49 68Wednesd ay, April 07, 2010

Rev

1.01

5

D D

CK_33M_ TPM24

LFRAME#22,47

PLTRST#13 ,22,36,47,57

LAD322,4 7

LAD022,4 7

LDRQ1#22

LPCPD#22

CK_33M_ TPM LFRAME# LRESET# LAD3

LAD0 LDRQ1# T PM_14

12

NI

CB15

0.1UF/16V

4

+3P3V+3P3VSB

12

NI

CB16

0.1UF/16V

I/EVT

P102

HEADER_ 2X10P_K4

1 3 5 7

9 11 13 15 17 19

2

6 8 10 12 14 16 18 20

CLKRUN# _L

12

3

+BATT

12

I/EVT

R20

R20 10M

10M

R38 0 O hm 5%I R38 0 Ohm 5%I

1 2

R37

TCM:

2.7KOHM

CLKRUN# to PCH GPIO32 (R6=I, R10=NI)

5%

PD 2.7K Ohm by CRB (R6=NI, R10=I)

NI

SMB_DAT A_R 18,19,38 ,39,40,41,49

LAD2 22 ,47 LAD1 22 ,47

SERIRQ 21,47

CLKRUN# 22

SMB_CLK _R 18,19,38,39 ,40,41,49

2

1

GND GND

C C

12

I

CB2

0.1UF/16V

LAD322,4 7 LAD222,4 7 LAD122,4 7 LAD022,4 7

B B

LFRAME#22,47

SERIRQ21 ,47

CK_33M_ TPM24

PLTRST#13 ,22,36,47,57

SUS_CLK22

A A

5

GND GND GND

+3P3V

19 24

GND

12

NI

CB9

0.1UF/16V

4

GND

LAD3 LAD2 LAD1 LAD0

LFRAME#

SERIRQ

CK_33M_ TPM

CLKRUN1 #

4 11 18 25

17 20 23 26

22

27

21

16

15

13

14

10 12

3

1

GND

GNDGND

12

I

CB8

0.1UF/16V

I

R36

4.7K

I

P101

VDD1 VDD2

GND1 GND2 GND3 GND4

LAD3 LAD2 LAD1 LAD0

LFRAME#

SERIRQ

LCLK

LRESET#

CLKRUN#

XTALI/32k_IN

XTALO

NC4 NC3 NC2 NC1

SLB9635 TT1.2-FW3.16

TESTBI/BADD

VSB

GPIO2

GPIO

LPCPD#

TESTI

+3P3VSB

5

12

I

CB13

0.1UF/16V

GND

LPCPD1#

TPM_PP

+3P3V

12

I

R6

4.7K

+3P3V +3P3V

GND GND

2 6

28

TESTBI_BA DD

9

8

7

PP

GND

3

12

NI

CB14

CB14 10UF/10V

10UF/10V

mx_c0805

GND

NOTE:

TPM_BASE_ADDR I/O SPACE

12

I

R35

4.7K

12

NI

R10

4.7K

12

NI

R5

4.7K

NOTE:

12

PP Have internal PULL-DOWN

NI

R34

4.7K

2

0

1

2E

4E

PEGATRON DT-MB RESTRICTED SECRET

SATA2 & TPM/TCM

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

Engineer:

IPMIP-DP

1

Vic_Chen

50 68Wednesd ay, April 07, 2010

Rev

1.01

5

4

3

2

1

CPU FAN

COLOR: WHITE

W/POST

I

P70

12

GND

I

C2

C2 100PF/50 V

100PF/50 V

NPO 5%

P70

WAF ER_HD_4P

1

2

3

4

5

NC

CPUFAN_ PWM_C

CPUFAN_ TACH_C

12

I

R1

4.7K

I

R3

R3 150

150

mx_r0805

1 2

I

R4

1.5K

RCPUFAN _TACH

+12V

D D

12

+

I

CE1

CE1 100uF/16 V

100uF/16 V

GND GND

12

NI

CB1

0.01UF/25 V

X7R 10%

GND

12

GND

I

C1

C1 100PF/50 V

100PF/50 V

NPO 5%

+5V

3

I

D1

D1 BAT54CW

BAT54CW

1

2

12

OR61 0 Ohm

mx_r0603

1 2

+5V+3P3V

12

I

R2

R2 1K

1K

RCPUFAN _PWM

RCPUFAN _TACH

I

CPUFAN_ TACH 48

3 & 4 PIN CO-LAYOUT Circuit ( Default 3 pin fan )

12

NI

R31

R31 0

0

mx_r1206

/4PIN FAN_I

12

+

I

CE6

CE6 100uF/16 V

100uF/16 V

GND

RCPUFAN _PWM

12

NI

CB12

0.01UF/25 V

X7R 10%

GND

FAN_OP_ FB

C C

+3P3V

12

I

R25

R25 1K

1K

/4PIN FAN_NI

RCHATEM _FANOUT

B B

A A

+5V

12

NI

R32

R32 1K

1K

/4PIN FAN_NI

1 2

/4PIN FAN_NI

I

R29

R29 100K

100K

GND

12

NI

CB10

0.01UF/25 V

X7R 10%

GND

3 PIN FAN

12

I

R28

R28 10K

10K

/4PIN FAN_NI

GND

FAN_VB+

FAN_VB-

I

U6

LM358

A+

3

VCC

+

A-

AO

2

-

B+

5

+

BO

B-

6

-

GND

/4PIN FAN_NI

I

C56

C56 1000PF/5 0V

1000PF/5 0V

X7R 10%

/4PIN FAN_NI

I

R27

R27 30K

30K

12

/4PIN FAN_NI

RCHAFAN IN

RCHATEM _FANOUT

8 1

7 4

GND

12

OR52 0 Ohm

OR56 0 Ohm

1 2

+12V

12

I

CB11

0.1UF/16V

/4PIN FAN_NI

GND

RSFAN_G

/NB_FAN/A FSC

I

mx_r0603

I

mx_r0603

12

I

R26

8.2K

/4PIN FAN_NI

1

CHAFAN_ TACH 48

CHAFAN_ PWM 48

G

+12V+12V

3

S

D

2

I

Q5

Q5 APM3095 PUC

APM3095 PUC

/4PIN FAN_NI

SFAN_PW R

GND

mx_r0603

COLOR: RED

W/POST

5

4

3

/SFSC

OR64 0 Ohm

1 2

NI

P72

WAF ER_HD_4P

1

2

3

4

5

NC

/4PIN FAN_I

4 PIN FAN

COLOR: WHITE

W/POST

CFAN_PW M_R RCHATEM _FANOUT

CFAN_D

I

CPUFAN_ PWM 48

1

2

I

D8

D8 BAW5 6WPT

BAW5 6WPT

3

3 2 1

/4PIN FAN_NI

12

I

R24

4.7K

I

P82

WAF ER_HD_3P

GND

+12V

SENSE

NC

4

NI

R30

R30 150

150

mx_r0805

/4PIN FAN_I

3 PIN FAN

COLOR: RED

W/POST

1 2

12

NI

D6

D6 1N4148W S

1N4148W S

/4PIN FAN_I

+5V+3P3V +5V

12

PEGATRON DT-MB RESTRICTED SECRET

R1.03G

2

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

NI

R23

R23 1K

1K

Engineer:

IPMIP-DP

RCHAFAN IN

Title :

1

4-PIN FAN CONN

Vic_Chen

51 68Thursday, April 08, 2010

Rev

1.01

5

+5VSB : GREEN

+5VSB

12

I/EVT

R21

GND

CR1_R

12

+

R21 300

300

mx_r0603

I/EVT

CR1

GREEN

SMD

SPKR22

D D

4

P13

1

3 4

HEADER_1X4P_K2

NI

+5V

GND

R11

1 2

4.7KOHM

5%

5% I

I

Q88_R64 7

+5V

Q18

B

1

B

1

PMBS390 4

I

GND GND

1 2

Q18_R156

C

3

E

E 2

2

3

BUZZER

I=5/(220+40)=19.2mA

R12

P=I*I*R=19.2*19.2*220

220 Ohm

5%

=0.0811W=1/12.33 W

I/EVT

BUZZ1_R SPKO

R13

R13 33 Ohm

33 Ohm

5%

5% I

I

12

CB346

0.1UF/16V

Y5V +80-20%

Y5V +80-20% NI

NI

P7

1 2

AC_1205 G

I/EVT

40Ohm Max 40mA

2

P305

1

3 4

HEADER_1X4P_K2

I/EVT/chas_intru

JP305:34

MINI_JUMPER

I/EVT

INTRUDER

+BATT

+5VSB

R17

R17 10MOhm

10MOhm

5%

1 2

I/EVT/chas_intru

R_INTRUDE R#

GND GND

I/EVT/chas_intru

1

G

+BATT

1 2

3

D

S

2

1

R22

R22 10MOhm

10MOhm

5%

5% NI

NI

Q56

2N7002

I/EVT/chas_intru

INTRUDER# 22

C C

B B

HD_LED#21

SYS_RESET #8,13,22,5 7

A A

+3P3V

1 2

12

GND

I

O3R4

8.2K

I

O3C1

0.1UF/16V

+3P3VSB

12

NI

O3R12

4.7K

1 2

I

O3R9

O3R9 33

33

FP_SYS_RS T#

HPD CONTROL PANEL / LED CIRCUITRY

+5V

GND

12

I

O3R3

O3R3 220

220

mx_r0805

HDLED+

I

P5

HEADER_ 2X5P_K10

1

2 3 4 5 6 7 8 9

FP_LED+ FP_LEDFP_PW RBTN#

GND

+3P3VSB

12

I

O3R5

4.7K

12

I

O3R8

12

33

I

O3C2

O3C2 1000PF/5 0V

1000PF/5 0V

X7R 10%

GND GND

12

NI

O3C3

0.1UF/16V

GND GND

12

NI

O3C4

0.1UF/16V

PWRB TN# 48

12

NI

O3R10

O3R10 0

0

mx_r0805

+5V_DUA L

12

I

O3R1

O3R1 220

220

mx_r0805

3

C

E

E 2

2

GND

+5V_DUA L

12

I

O3R6

O3R6 220

220

mx_r0805

3

C

E

E 2

2

GND

NI/Dual I

O3Q1

O3Q1 PMBS390 4

PMBS390 4

B

1

B

1

I

O3Q2

O3Q2 PMBS390 4

PMBS390 4

B

1

B

1

SIO_LED1_ G

SIO_LED2_ G

NI/Dual I

O3R2

O3R2 1K

1K

I

O3R11

O3R11 1K

1K

+3P3VSB

12

NI

O3R13

O3R13 1K

1K

12

NI

O3C5

0.1UF/16V

GND

+3P3VSB

12

NI

O3R7

O3R7 1K

1K

12

PLED2 48

PLED 48

FRONT POWER LED COLOR SUPPORT

SINGLE COLOR

DUAL COLOR

5

4

O3Q1 O3R2

NI

II

3

2

PEGATRON DT-MB RESTRICTED SECRET

FRONT PANEL

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

Engineer:

IPMIP-DP

1

Vic_Chen

52 68Wednesd ay, April 07, 2010

Rev

1.01

5

4

3

2

1

CLEAR CMOS & PASSWORD

External RTC Circuitry

SRTCRST # 19

CLEAR

Default

RTCRST# 1 9

I

E69

1

2 3 4 5 6

HEADER_ 2X3P

PASSW ORD_EN# 22

JE69:35

GNDGND

MINI_JUMPER

I

CLEAR PASSWORD & CMOS

Clear PW

DEFAULT

3 - 5

1 - 3CLEAR

JE69:46

MINI_JUMPER

I

Clear CMOS

4 - 6

2 - 4

+3P3VSB _IO

D D

I

BATT1

3V/220mA h

KTS

LITHIUM BATT

CR2032

BAT R303_D8

12

XBT2

BATT_HOLDER

I

GND

1 2

I

R33

R33 1K

1K

1%

Battery Socket

1

2

I

D20

BAT54CW

+BATT

R40

I

20K

3

1 2

R41

1 2

20KOhm

1%

I

GND

12

I

C3

C3 1UF/16V

1UF/16V

X7R 10%

X7R 10% mx_c0603

mx_c0603

GND

12

I

C4

C4 1UF/16V

1UF/16V

X7R 10%

X7R 10% mx_c0603

mx_c0603

ME DATA

1-2

2-3

SW5 1

1 2 3

HEADER_ 1X3P

I

C C

I

GND

I

JSW51:23

MINI_JUMPER

B B

NOBOM

H1

H1 SCREW HOLE_160_HP

SCREW HOLE_160_HP

1

GND1

2

GND2

3

GND3

4

GND4

NOBOM

H7

H7 SCREW HOLE_160_HP

5

SCREW HOLE_160_HP

1

GND1

2

GND2

3

GND3

4

GND4

A A

GND GND GND GND GND GND GND GND

AGND AGND AGND GND GND GND

GND8 GND7 GND6 GND5

9

NC

8 7 6 5

9

NC

8 7 6 5

NOBOM

H2

H2 SCREW HOLE_160_HP

SCREW HOLE_160_HP

1

GND1 GND2 GND3 GND4

GND8 GND7 GND6 GND5

NC

2 3 4

9 8 7 6 5

GND

4

NOBOM

H3

H3 SCREW HOLE_160_HP

SCREW HOLE_160_HP

1

GND1

2 3 4

1 2 3 4

NC

GND2

GND8

GND3

GND7

GND4

GND6 GND5

NOBOM

H8

H8 SCREW HOLE_160_HP

SCREW HOLE_160_HP

GND1

NC

GND2

GND8

GND3

GND7

GND4

GND6 GND5

9 8 7 6 5

NOBOM

H4

H4 SCREW HOLE_160_HP

SCREW HOLE_160_HP

1

GND1

2

GND2

3

GND3

4

GND4

GND8 GND7 GND6 GND5

9

NC

8 7 6 5

ONLY FOR SCREW HOLE

3

NOBOM

H5

H5 SCREW HOLE_160_HP

SCREW HOLE_160_HP

1

GND1 GND2 GND3 GND4

GND8 GND7 GND6 GND5

NC

2

2 3 4

9 8 7 6 5

GND GNDGND

NOBOM

H6

H6 SCREW HOLE_160_HP

SCREW HOLE_160_HP

1

GND1

2

GND2

3

GND3

4

GND4

GND8 GND7 GND6 GND5

9

NC

8 7 6 5

PEGATRON DT-MB RESTRICTED SECRET

Title :

RTC / CMOS / KBMS

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

Engineer:

IPMIP-DP

RTC / CMOS / KBMS

Vic_Chen

53 68Wednesd ay, April 07, 2010

1

53 68Wednesd ay, April 07, 2010

Rev

1.01

5

4

3

2

1

RSMRST CIRCUIT

D D

NI/SIO

1

G

1 2

470 OHM 5%

R_RSMRS T_R

3

D

NI

S

2

2N7002

Q17

GND

12

I

C14

0.1UF/16V

NI/SIO

R47

+3P3VSB

12

C C

B B

12

NI/SIO

R52

5.6KOHM

1%

NI/SIO

R53

1.02KOHM

1%

NI/SIO

C9

0.1UF/16V

X7R 10%

GND

RSMRST_ CTRL1

12

NI/SIO

C10

0.1UF/16V

X7R 10%

GND

10/02/01 Modify

1.Q17,3904 to 2N7002 (0201change)

2.R52,pull high form +5VSB to +3P3VSB

3.R51,pull high from +3P3VSB to +5VSB

4.Add,C70

12

C28

0.1UF/16V

NI

GND

+3P3V

12

I

C11

0.1UF/16V

1

NI

C70

4.7UF/6.3V

X5R 10%

B

+5VSB

+3P3V

12

NI/SIO

R51

4.7KOHM

1%

3

C

PMBS390 4

E

E 2

2

GND

I

C12

0.1UF/16V

RSMRST_ CTRL2

NI/SIO

Q19

+3P3V

12

I

C13

0.1UF/16V

12

GND

NI/SIO

C8

0.1UF/16V

X7R 10%

RSMRST_ R

+3P3VSB

12

I

C15

0.1UF/16V

12

GNDGND

1 2

NI

R49

R49 10KOhm

10KOhm

NI/SIO

R48

R48 0

0

+5V

12

RSMRST# 22

I

C16

0.1UF/16V

+5V+3 P3V

12

NI

C17

0.1UF/16V

+5VSB

12

I

C18

0.1UF/16V

+5VSB

12

SIO_RSMRS T#48

SIO_PW ROK48

I

C19

0.1UF/16V

+5VSB+3P3VSB

12

I

C20

0.1UF/16V

12

C39

C39 1UF/10V

1UF/10V

Y5V +80-20%

Y5V +80-20% NI

NI

GND

12

C41

2.2UF/6.3V

X5R 10%

X5R 10% NI

NI

GND GND GND

+5V_DUA L

Schmitt-trigger for RTC issue

+3P3VSB +3P3VSB

147

VCC

1 2

GND

+3P3VSB +3P3VSB

147

VCC

5 6

GND

+12V

12

I

C21

0.1UF/16V

12

74LVC14 AD

U95A

NI

74LVC14 AD

U95C

NI

I

C22

0.1UF/16V

NI/SIO I

R50

R50 0

0

1 2

U95_2_3

I

R54

R54 0

0

1 2

U95_6_9

-12V

12

I

C23

0.1UF/16V

147

74LVC14 AD

VCC

3 4

GND

U95B

NI

147

74LVC14 AD

VCC

9 8

GND

U95D

NI

+1P1V_V TT

12

I

C24

0.1UF/16V

12

C40

C40 1UF/10V

1UF/10V

Y5V +80-20%

Y5V +80-20% NI

NI

GNDGND GND

+1P1V_V TT

12

I

C25

0.1UF/16V

RSMRST# 22

PWRO K 21,22

+1P05V_ PCH

12

I

C26

0.1UF/16V

NI

C43

0.1UF/16V

GND

12

C47

0.1UF/16V

NI

GND

+3P3V

12

GND

C48

0.1UF/16V

I

GND

+3P3V

12

GND GND

C49

0.1UF/16V

NI

+5V + 3P3V

12

NI

C50

0.1UF/16V

GND

12

C51

0.1UF/16V

I

GND

+3P3V

12

GND

C52

0.1UF/16V

NI

GND

+3P3V

GND GND

12

C53

0.1UF/16V

NI

GND

+5V + 3P3V

12

NI

C54

0.1UF/16V

12

GND

C55

0.1UF/16V

NI

C29

0.1UF/16V

GND

GND GND

+3P3V +5V

NI

C42

0.1UF/16V

1 2

GND

1 2

GND

NI

C27

0.1UF/16V

1 2

GND

A A

GND

1 2

GND GND

NI

C44

0.1UF/16V

GND

GNDGND

+5V+3P3V +5V +3P3V

12

GND

PEGATRON DT-MB RESTRICTED SECRET

RSMRST CIRCUIT

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

IPMIP-DP

1

Vic_Chen

54 68Wednesd ay, April 07, 2010

Rev

1.01

5

4

3

2

1

+5V

D D

XPD747 XPD647 XPD547 XPD447

XPD347 XPD247 XPD147

C C

XPD047

XAFD#47

XSTB#47 XINIT#47 XSLIN#47

ERROR#47

12

GND

1 2

NI

CB3

0.1UF/16V

I

D2

1SS355P T

GND

12

CB4

0.01UF/25 V

X7R 10%

+5V_PRT

RN2B

3 4

2.2k

3 4

2.2k

7 8

2.2k

1 2

2.2k

3 4

2.2k

5 6

2.2k

7 8

2.2k

1 2

2.2k

12 12 12 12

RN2B

RN1B

RN1D

RN3A

RN3B

RN3C

RN3D

RN4A

SPD0

SPD1

SPD2SPD2

SPD3SPD3

SPD4SPD4

SPD5SPD5

SPD6SPD6

SPD7SPD7

C68 15 0PF/50V

1 2

I

C6 150PF/50 V

1 2

I

C78 15 0PF/50V

1 2

I

C67 15 0PF/50V

1 2

I

GND GND

I

RN7A

I

RN7B

I

RN7C

I

RN7D

I

RN6A

I

RN6B

I

RN6D

I

RN5B

I

RN5D

I

RN5C

I

RN5A

I

RN6C

I

1 2

22

3 4

22

5 6

22

7 8

22

1 2

22

3 4

22

7 8

22

3 4

22

7 8

22

5 6

22

1 2

22

5 6

22

C65 15 0PF/50V

I

C64 15 0PF/50V

I

C69 15 0PF/50V

I

C66 15 0PF/50V

I

R16

2.2K

1 2

RN4B

3 4

2.2k

5 6

2.2k

7 8

2.2k

5 6

2.2k

5 6

2.2k

1 2

2.2k

1 2

2.2k

7 8

2.2k

RN4B

RN4C

RN4D

RN2C

RN1C

RN1A

RN2A

RN2D

12 12 12 12

I

C63 15 0PF/50V

I

C62 15 0PF/50V

I

C61 15 0PF/50V

I

C60 15 0PF/50V

I

C5 150PF/50 V

I

C7 150PF/50 V

I

C59 15 0PF/50V

I

C57 15 0PF/50V

I

C58 15 0PF/50V

I

GNDGND

PARALLEL PORT

SLCT47

PE47

BUSY47

ACK#47

12 12 12 12 12

SLCT

PE

BUSY

ACK#

SPD7SPD7

SPD6

SPD5

SPD4

SPD3SPD3 SLIN# SPD2 PINIT# SPD1 ERROR# SPD0 AFD# STB#

HEADER_ 2X13P_K26 I

STB# SPD0 SPD1 SPD2 SPD3 SPD4 SPD5 SPD6 SPD7 ACK# BUSY PE SLCT

J50

1 3 4 5 6 7 8 91110

13 14

17 18 19 21 23 25

AFD#

2

ERROR# PINIT# SLIN#

12

1615

20 22 24

GND

B B

A A

PEGATRON DT-MB RESTRICTED SECRET

HDMI Connector

1

HDMI Connector

Vic_Chen

55 68Wednesd ay, April 07, 2010

1.01

Rev

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

IPMIP-DP

5

4

+12V

3

-12V

2

1

SERIAL PORT A

I/EVT

U2

INTERFACE RS-232

20

VCC

19

RY1

18

RY2

17

RY3

16

DA1

15

DA2

14

RY4

13

DA3

12

RY5

11

GND

RRI1_D

+5V

12

I/EVT

CB17

0.1UF/16V

GND

4

VCC+

VCC-

I

3

BAT54CW

RA1 RA2 RA3 DY1 DY2 RA4 DY3 RA5

DCD2#4 7 DSR2#47

DTR2#47 RI2#4 7

RTS2#47

CTS2#47

DDCD1#

2

DDSR1#

3

RRXD1

4

RRTS1#

5

TTXD1

6

CCTS1#

7

DDTR1#

8

RRI1

9

-12V_COM

10

D5

1

RRI2

2

DDCD2# TTXD2

RRTS2# RRI2

DCD2# DSR2# RXD2

RXD247

RTS2# TXD2

TXD247

CTS2# DTR2#

+12V_CO M

1

!!!!!COM2 PIN NOT DECIDE

PCH PU

5

+5V

12

GND

+3P3VSB

12

3

C

E

E 2

2

GND

I/EVT

CB7

0.1UF/16V

NI

R7

8.2K

I/EVT

Q4

Q4 PMBS390 4

PMBS390 4

B

1

B

1

12

GND

RRI1_B

I/EVT

C33

C33 1000PF/5 0V

1000PF/5 0V

X7R 10%

DCD1#4 7

GND

DCD1# DSR1#

DSR1#47

RXD1

RXD147

RTS1#

RTS1#47

TXD1

TXD147

CTS1#

CTS1#47

DTR1#

DTR1#47 RI1#4 7

GND

I/EVT

R9

4.7K

12

I/EVT

R8

2.2K

D D

PCH_RI1#22

C C

B B

A A

3

I/EVT

D3

D3 BAT54AW

BAT54AW

1

2

SERIAL PORT B

GND

C80 15 0PF/50VINPO 5%C80 1 50PF/50VINPO 5% C81 15 0PF/50VINPO 5%C81 1 50PF/50VINPO 5% C79 15 0PF/50VINPO 5%C79 1 50PF/50VINPO 5% C73 15 0PF/50VINPO 5%C73 1 50PF/50VINPO 5%

C74 15 0PF/50VINPO 5%C74 1 50PF/50VINPO 5% C75 15 0PF/50VINPO 5%C75 1 50PF/50VINPO 5% C76 15 0PF/50VINPO 5%C76 1 50PF/50VINPO 5% C77 15 0PF/50VINPO 5%C77 1 50PF/50VINPO 5%

I/EVT

U7

INTERFACE RS-232

20

VCC

19

RY1

18

RY2

17

RY3

16

DA1

15

DA2

14

RY4

13

DA3

12

RY5

11

GND

12

NI

CB5

0.01UF/25 V

X7R 10%

GND

P52

1

2 3 4 5 6 7 8 9

HEADER_ 2X5P_K10

I

1 2 1 2 1 2 1 2

1 2

GND

1 2 1 2 1 2

GND

VCC+

3

RA1 RA2 RA3 DY1 DY2 RA4 DY3 RA5

VCC-

1

2

I/EVT

12

D4

D4 BAT54AW

BAT54AW

3

RRXD2 DDTR2# DDSR2# CCTS2#

+12V_CO M

1

DDCD2#

2

DDSR2#

3

RRXD2

4

RRTS2#

5

TTXD2

6

CCTS2#

7

DDTR2#

8

RRI2RI2#

9

-12V_COM

10

GND

NI

CB6

0.01UF/25 V

X7R 10%

RRI1

C30 15 0PF/50V

DDTR1#

C31 15 0PF/50V

CCTS1#

C32 15 0PF/50V

TTXD1

C34 15 0PF/50V

RRTS1#

C35 15 0PF/50V

RRXD1

C36 15 0PF/50V

DDSR1#

C37 15 0PF/50V

DDCD1#

C38 15 0PF/50V

1 2 1 2 1 2 1 2

NPO 5%C30 1 50PF/50V

NPO 5% NPO 5%C31 1 50PF/50V

NPO 5% NPO 5%C32 1 50PF/50V

NPO 5% NPO 5%C34 1 50PF/50V

NPO 5%

NPO 5%C35 1 50PF/50V

NPO 5% NPO 5%C36 1 50PF/50V

NPO 5% NPO 5%C37 1 50PF/50V

NPO 5% NPO 5%C38 1 50PF/50V

NPO 5%

DDCD1# DDSR1# RRXD1

RRTS1# TTXD1 CCTS1# DDTR1# RRI1RI1#

GND

I/EVT

I/EVT I/EVT

I/EVT

I/EVT I/EVT

I/EVT

GND

P53

1

2 3 4 5 6 7 8 9

HEADER_ 2X5P_K10

I

PEGATRON DT-MB RESTRICTED SECRET

Title :

LED/COM/SPKR/INTRU

Vic_Chen

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

2

Date: Sheet of

IPMIP-DP

Engineer:

Vic_Chen

Rev

1.01

56 68Wednesd ay, April 07, 2010

1

56 68Wednesd ay, April 07, 2010

1.01

5

4

3

2

1

INTEL LGA-775 PROCESSOR ITP DEBUG PORT

IPT1

D D

H_PRDY#13 H_PREQ#13

9

BPM0#

7

BPM1#

6

BPM2#

4

BPM3#

3

BPM4#

1

BPM5#

TDO

TMS TCK

TRST#

23 29

TDI

31 30 25

TDO 13 TDI 1 3 TMS 13 TCK 13 TRST# 13

+1P1V_V TT

ITP_PW RGD

CK_ITP1 3 CK_ITP#13

13

BCLK0

15

BCKL1

PWRGOOD

10

+1P1V_V TT

NI

GR17

1.5K

12

NI

GR14

4.7K

NI

GR11

1K

GR10

1K

12

H_TAPPW RGOOD 13

CPUPW RGD 13,22

12

Place near cpu

NI

GR8

NI

GR8

1K

GR12

GR12 0

0

GR15

1K

12

H_RSTOU T# 1 3

SYS_RESET # 8,13,22,52

PLTRST# 13 ,22,36,47,50

C C

B B

H_TAPPW RGOOD13

NI

GR9

GR9 0

0

SMB_CLK _M8,16,17,49 SMB_DAT A_M8,16,1 7,49

1 2 1 2

NI

GR13

GR13 0

0

ITP_TAPPW RGD

ITP_SMBCL K ITP_SMBDA TA

+1P1V_V TT

12

NI

GCB2

0.1UF/16V

GND

16

GCLKp

18

GCLKn

22

SCL

24

SDA

28

NC

14

VTT

BtoB_CON _31P

NI

RESET#

DBR#

RESERVED

GND1 GND5 GND2 GND6 GND7 GND3 GND4 GND8

CPURST_ ITP#

19

MR_R#

21

ITP_PLTRS T#

12

2 5 8 11 17 20 26 27

ASUS P/N: 12G161300310 => HRS/DF9C-31S-1V(22)

GND

A A

PEGATRON DT-MB RESTRICTED SECRET

CPU ITP Debug CONN

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

IPMIP-DP

CPU ITP Debug CONN

Vic_Chen

1

Rev

1.01

57 68Wednesd ay, April 07, 2010

1.01

5

4

3

2

1

ATX POWER_24P SUPPLY CONNECTOR

NOTE:

ATX_PWRGD internal pull high in PSU

12

GND

+5VSB_A TX+12V

I

P1CB1

0.1UF/16V

12

GND GNDGND

+5V

D D

NI

P1R4

P1R4 100

100

ATX_PW RGD4 8

1 2

12

NI

P1R2

8.2K

ATX_PW RGD_C

12

I

P1C1

P1C1 470PF/50 V

470PF/50 V

X7R 10%

GND GND

I

P1CB2

0.1UF/16V

+5V

GND

12

I

P1CB4

0.1UF/16V

+3P3V

12

I

P1CB5

0.1UF/16V

GNDGND

I

P1

POWE R_CON_2X12P

1

+3V1

2

+3V2

3

GND1

4

+5V1

5

GND2

6

+5V2

7

GND3

8

PWR0K

9

5VSB

10

+12V1

11

+12V2

12

+3V3

25

26

hold1

hold2

+3V4

-12V

GND4

PSON#

GND5 GND6 GND7

+5V3 +5V4 +5V5

GND8

+5V +3P3V

13 14 15 16 17 18 19 20

-5V

21 22 23 24

GND

12

NI

P1CB6

0.1UF/16V

1 2

GND

I

P1CB7

0.1UF/16V

-12V

+

NI

P1CE1

P1CE1 100uF/16 V

100uF/16 V

1 2

12

NI

P1CB8

0.1UF/16V

GND

P1_PSON #

12

I

P1C2

P1C2 470PF/50 V

470PF/50 V

X7R 10%

I

P1R3

P1R3 47

47

12

PSON# 48

All of the Caps Around the ATX Power Connector

C C

PCB

I

PCB38

PCB

IPMIP-GS R1.00 R ED

08M1-0UX0200

B B

A A

VRM POWER_4P SUPPLY CONNECTOR

I

P3

GND

P3

POWE R_CON_2X2P

2

4

1

3

NP_NC

4 3 5

12

GND

NI

P1CB9

0.1UF/16V

+12V_CP U

12

GND

NI

P1CB10

0.1UF/16V

PEGATRON DT-MB RESTRICTED SECRET

ATX POWER

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

5

4

3

2

Date: Sheet of

IPMIP-DP

Engineer:

Vic_Chen

58 68Wednesd ay, April 07, 2010

1

58 68Wednesd ay, April 07, 2010

Rev

1.01

5

+12V_CP U

1 2

D D

I

VRM_PSI#13 VTTPW RGD13 ,64 VRM_PW RGD8,22

C C

1

2

12

NI

PR776

PR776 0

0

VCC_SEN SE_A13

+VCORE

1 2

B B

1 2

GND

VSS_SEN SE_A13

MCP_ISENS E_A13

A A

NI

PD402

PD402 BAT54CW

BAT54CW

3

DGNDDGND

PJP2

PJP2 SHORTPIN

SHORTPIN

NOBOM

PJP3

PJP3 SHORTPIN

SHORTPIN

GND DGND

I I

I

NI

PC793

PC793 56PF/50V

56PF/50V

NPO 5%

12

PR792 0

1 2

I

PR793 100

1 2

I

PR798 100

1 2

I

PR801 0

1 2

I

1 2

PJP406

1 2

SHORTPIN_ RECT

NOBOM

VRM_VCC 2_C

I

PR770

PR770 0 Ohm 5%

0 Ohm 5%

mx_r0805

PR782 0

PR782 0 PR135 0

PR135 0

0 Ohm

5%

5% I

I

PR1

12 12

I

PR772

PR772 0 Ohm 5%

0 Ohm 5%

1 2

mx_r0805

+1P1V_V TT

12

I

PR779

PR779 1K

1K

12

I

PC792

PC792 10PF/50V

10PF/50V

NPO 5%

DGND

PC797 1500 PF/50V

1 2

I

PR787 300

1 2

NI

12

I

PR786

PR786 51OHM

51OHM

1%

PR790 4.75KOHM

1 2

I

PR794

R_LTB_A

12

NI

PC803

PC803 120PF/50 V

120PF/50 V

NPO 5%

PR802 0

I

PR794

1 2

1KOhm

1%

1% I

I

PR799 9.09KOHM 1%

I

PR803 10KOhm

I

PR807 0

I

VRM_VCC 1_C

+3P3V

12

DGND

12

1 2

connect to the GND through 16 Vias unifomly distribuited

5

4

I

PR773

PR773 10 OHM

10 OHM

mx_r0603

1 2

+1P1V_V TT

12

I

PR774

PR774 1K

1K

NI

PCB47

0.1UF/16V

X7R 10%

I

PR780

PR780 1K

1K

12

I

PC795

PC795 10PF/50V

10PF/50V

NPO 5%

DGND

RC_COMP _A

PC798 10PF /50V NPO 5%

I

RC_VSEN _A

PR789 2.74KOHM

1 2

TR_FB_A

12

PC807 10PF /50V

I

NPO 5%

TR_IMON_A

12

DGND

4

I

12

PCB43

PCB43 1UF/16V

1UF/16V

X7R 10%

mx_c0603

DGND

VRM_VID[0..7]9,13

DGND

PR777 15KOhm 1%

1 2

I

12

PC799 270P F/50V

NI

I

1%

RC_LTB_ A

180PF/50 V

I

12

1 2

I

mx_r0603

PR791 10K 3%

1 2

I

1 2

NPO 5%

DGND

PR804

PR804 10K

10K

mx_r0603

3%

PR808 90.9K 1%

PR809 0

PR812 120K 1%

VRM_VCC _C VRM_VCC DR_C

DGND

VRM_VID0 VRM_VID1 VRM_VID2 VRM_VID3 VRM_VID4 VRM_VID5 VRM_VID6 VRM_VID7

VRM_PSI VRM_EN VRM_SSE ND_A

VRM_SSO SC_A

12

I

PR775

PR775 56K

56K

1%

VRM_FB_ A

VRM_COM P_A

12

VRM_VSE N_A

VRM_LTB _A

PC802

I

12

NI

PR796

PR796 1K

1K

DGND

VRM_FBG _A

I

PR805

PR805 1MOHM

1MOHM

1%

1 2

12

I

PC809

0.022UF/1 6V

X7R 10%

DGND

12

NI

PC804

PC804 120PF/50 V

120PF/50 V

NPO 5%

DGND

+3P3V

VRM_IMON_ A

VRM_OSC _A

VRM_OST _A

VRM_LTB GAIN_A

EXPOSED PAD ARE A 5.2x5.2 mm

3

I

PU4

PU4 L6716TR

L6716TR

3

VCC

2

SGND

26

VID0

27

VID1

28

VID2

29

VID3

30

VID4

31

VID5

32

VID6

33

VID7

34

PSI

16

OUTEN

35

SSEND

15

SSOSC

5

FB

4

COMP

6

VSEN

8

LTB

7

FBG

9

IMON

14

OSC/FAULT

11

OFFSET

10

LTBGAIN

GND150GND251GND352GND453GND554GND655GND756GND857GND958GND1059GND1160GND12

3

VCCDR

BOOT1

UGATE1

PHASE1 LGATE1

CS1+

CS1-

BOOT2

UGATE2

PHASE2 LGATE2

CS2+

CS2-

BOOT3

UGATE3

PHASE3 LGATE3

CS3+

CS3-

PWM4/PH_SEL

CS4+

CS4-

OCSET/PSI_A

OVPSEL

N.C.

PGND

2

I

PR771

2.2

mx_r0603

42

12

I

PCB45

PCB45 1UF/16V

1UF/16V

X7R 10%

mx_c0805

GND

1 48 47 45

R_ISEN1+_ A X_ISEN1+_ A

17

R_ISEN1-_A

18

39 40 41 44

R_ISEN2+_ A X_ISEN2+_ A

19

R_ISEN2-_A

20

36 37 38 43

R_ISEN3+_ A X_ISEN3+_ A

21

R_ISEN3-_A

22

VRM_PW M4_A

25

23

R_ISEN4-_A

24

VRM_OCS ET_A

13

VRM_OVP _A

12

46

49

GND

61

PR784 2.1KOHM 1%

I

PR788 2.1KOHM 1%

I

PR797 2.1KOHM 1%

I

PR806 2.1KOHM 1%

I

12

I

PCB44

PCB44 1UF/16V

1UF/16V

X7R 10%

mx_c0805

1 2

PR800 0

1 2

12

NI

PR810

PR810 10KOhm

10KOhm

5%

DGND

2

12

NI

PCB46

0.1UF/16V

X7R 10%

GNDGND

VRM_BOO T1_C 60 VRM_UGA TE1_D 60 VRM_PHA SE1_C 60 VRM_LGA TE1_D 60

VRM_BOO T2_C 60 VRM_UGA TE2_D 60 VRM_PHA SE2_C 60 VRM_LGA TE2_D 60

VRM_BOO T3_C 61 VRM_UGA TE3_D 61 VRM_PHA SE3_C 61 VRM_LGA TE3_D 61

12

I

PC810

PC810 100PF/50 V

100PF/50 V

NPO 5%

DGND DGNDGND

DGND

3

1

I

PD403

PD403 BAT54CW

BAT54CW

PD404

PD404 BAT54CW

BAT54CW

NI

12

1

2

1

2

I

PC794

0.01UF/25 V

X7R 10%

I

PC800

0.01UF/25 V

X7R 10%

I

PC805

0.01UF/25 V

X7R 10%

I

PR811

31.6K

1%

I

PR117 0 Ohm 5%

1 2

mx_r0805

D

S

D

VRM_VCC DR2_C

+5VSB

PR781 36KOHM

1 2

I

PC796 0.33U F/16VImx_c0603PC796 0.33UF/16VImx_c0603

1 2

PR785 36KOHM

1 2

I

PC801 0.33U F/16VImx_c0603PC801 0.33UF/16VImx_c0603

1 2

PR795 36KOHM

1 2

I

PC806 0.33U F/16VImx_c0603PC806 0.33UF/16VImx_c0603

1 2

PC808 0.33U F/16VImx_c0603PC808 0.33UF/16VImx_c0603

1 2

3

G

1

PQ730

FDN340P _NL

VRM_VCC DR1_C

1%

S

2

NI

12

3

3 C

C

E

E 2

2

GND

ISEN3-_A

NI

PR778

PR778 10KOhm

10KOhm

5%

B

GND

PEGATRON DT-MB RESTRICTED SECRET

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

IPMIP-DP

Engineer:

1

+12V_CP U

PQ731

PQ731 2SC3052

2SC3052

NI

1

VRM_PSI# 1 3

ISEN1+_A 60

ISEN1-_A 60

ISEN2+_A 60

ISEN2-_A 60

ISEN3+_A 61

ISEN3-_A 61

VCORE CONTROLLER

Michael Lee

59 68Wednesd ay, April 07, 2010

Rev

1.01

5

+12V_CP U

I

PL1

0.4UH/25A

21

D D

VRM_VCC 2_C

C C

Place near L6716 Place near L6716

I

1

2

I

PD405

PD405 BAV70W PT

BAV70W PT

VRM_BOO T2_C59

VRM_UGA TE2_D59

VRM_PHA SE2_C59

VRM_LGA TE2_D59

3

I

PR813

3.3 OHM

MX_R0603

1 2

VRM_BOO T2_RC_C

4

Place near L6716

PC811 0.22U F/16V

12

mx_c0603

I

mx_c0603

PR814 0 Ohm

1 2

I

1 2

mx_r0603

I

PR33

PR33 0 Ohm

0 Ohm

mx_r0603

VRM_UGR 2_D

12

I

PR34

8.2K

VRM_LGR 2_D

3

12

I

PCB4

4.7UF/16V

X7R 20%

12

GND

X7R 20% mx_c1206

mx_c1206

GND

I

PC12

PC12 4700PF/5 0V

4700PF/5 0V

X7R 10%

X7R 10% mx_c0603

mx_c0603

VRM_SN2 _C

PR36

PR36 1 Ohm

1 Ohm

5%

5% I

I

+12V_VC ORE_VIN

IPMIP-GS R1.01 Change to I

2

D

PQ201

1

G

9mΩ/10V T O-252

S

3

I

2

D

I

PQ203

1

G

IPDH6N03L AG

S

3

GND

2

D

I

PQ202

1

G

IPDH6N03L AG

S

3

GND

2

ISEN2+_A59

ISEN2-_A59

12

+

NI

PCE11

PCE11 1000UF/1 6V

1000UF/1 6V

GND

12

I

PC13

PC13 680PF/50 V

680PF/50 V

X7R 10%

X7R 10% mx_c0603

mx_c0603

GND

12

+

I

PCE10

PCE10 1000UF/1 6V

1000UF/1 6V

GND GNDGNDGND

12

+

I

PCE12

PCE12 1000UF/1 6V

1000UF/1 6V

12

+

NOBOM

PJP4

PJP4 SHORTPIN

SHORTPIN

1 2

+12V_VC ORE_VIN

I

PCE13

PCE13 1000UF/1 6V

1000UF/1 6V

I

PL201

0.4UH

12

+

NI

PCE14

PCE14 1000UF/1 6V

1000UF/1 6V

21

NOBOM

PJP5

PJP5 SHORTPIN

SHORTPIN

1 2

1

+VCORE

Place near L6716 Place near L6716

I

PD406

PD406 BAV70W PT

BAV70W PT

1

3

2

B B

A A

VRM_BOO T1_C59

VRM_UGA TE1_D59

VRM_PHA SE1_C59

VRM_LGA TE1_D59

I

PR815

3.3 OHM

MX_R0603

1 2

VRM_BOO T1_RC_C

Place near L6716

PC812 0.22U F/16V

12

mx_c0603

I

mx_c0603

PR816 0 Ohm

1 2

I

1 2

mx_r0603

I

PR38

PR38 0 Ohm

0 Ohm

mx_r0603

VRM_UGR 1_D

12

I

PR39

8.2K

VRM_LGR 1_D

2

D

PQ204

1

G

9mΩ/10V T O-252

S

3

I

12

I

PC15

12

GND

PC15 4700PF/5 0V

4700PF/5 0V

X7R 10%

X7R 10% mx_c0603

mx_c0603

2

D

I

PQ206

1

G

IPDH6N03L AG

S

3

GND

2

D

I

PQ207

1

G

IPDH6N03L AG

S

3

GND

PR41

PR41 1 Ohm

1 Ohm

5%

5% I

I

12

I

PCB5

4.7UF/16V

X7R 20%

X7R 20% mx_c1206

mx_c1206

GND

12

VRM_SN1 _C

GND

IPMIP-GS R1.01 Change to I

ISEN1+_A59

ISEN1-_A59

I

PC17

PC17 680PF/50 V

680PF/50 V

X7R 10%

X7R 10% mx_c0603

mx_c0603

NOBOM

PJP7

PJP7 SHORTPIN

SHORTPIN

1 2

I

PL202

0.4UH

21

NOBOM

PJP6

PJP6 SHORTPIN

SHORTPIN

1 2

PEGATRON DT-MB RESTRICTED SECRET

VCORE DRIVER-1

1

VCORE DRIVER-1

Michael Lee

60 68Wednesd ay, April 07, 2010

Rev

1.01

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

5

4

3

2

Date: Sheet of

IPMIP-DP

Engineer:

5

4

3

+12V_VC ORE_VIN

2

1

VRM_VCC 2_C

I

1

2

I

PD407

PD407 BAV70W PT

BAV70W PT

VRM_BOO T3_C59

VRM_UGA TE3_D59 VRM_PHA SE3_C59

VRM_LGA TE3_D59

3

D D

C C

Place near L6716Place near L6716

I

PR817

3.3 OHM

MX_R0603

1 2

VRM_BOO T3_RC_C

Place near L6716

PC813 0.22U F/16V

12

mx_c0603

I

mx_c0603

PR56 0 Ohm

I

1 2

I

PR69

PR69 0 Ohm

0 Ohm

mx_r0603

VRM_UGR 3_D

12

I

PR46

8.2K

VRM_LGR 3_D

2

D

PQ210

1

G

9mΩ/10V T O-252

S

3

I

12

2

D

I

PQ209

1

G

IPDH6N03L AG

S

3

2

D

I

PQ211

1

G

IPDH6N03L AG

S

3

12

GNDGND

GND

12

I

PCB50

4.7UF/16V

X7R 20%

X7R 20% mx_c1206

mx_c1206

GND

I

PC19

PC19 4700PF/5 0V

4700PF/5 0V

X7R 10%

X7R 10% mx_c0603

mx_c0603

VRM_SN3 _C

PR43

PR43 1 Ohm

1 Ohm

IPMIP-GS R1.01 Change to I

5%

5% I

I

12

GND

ISEN3+_A59

ISEN3-_A59

I

PC21

PC21 680PF/50 V

680PF/50 V

X7R 10%

X7R 10% mx_c0603

mx_c0603

NOBOM

PJP9

PJP9 SHORTPIN

SHORTPIN

1 2

I

PL203

0.4UH

+VCORE

21

NOBOM

PJP8

PJP8 SHORTPIN

SHORTPIN

1 2

B B

+VCORE+VCOR E

12

+

NI

PCE16

PCE16 150UF/2V

150UF/2V

BOTTOM

A A

12

+

I

PCE2

PCE1

820UF/2.5V

GNDGND

12

+

I

PCE3

820UF/2.5V

+

I

PCE4

820UF/2.5V

+

I

PCE5

820UF/2.5V

+

NI

PCE6

12

+

I

PCE7

820UF/2.5V

12

I

PR819

PR819 100 Ohm

100 Ohm

5%

mx_r0603

+VCORE

12

GND

I

12

PCB14

PCB14 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% MX_C080 5_RD9

MX_C080 5_RD9

I

12

PCB15

PCB15 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% MX_C080 5_RD9

MX_C080 5_RD9

I

12

PCB16

PCB16 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% MX_C080 5_RD9

MX_C080 5_RD9

I

12

PCB17

PCB17 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% MX_C080 5_RD9

MX_C080 5_RD9

I

12

PCB18

PCB18 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% MX_C080 5_RD9

MX_C080 5_RD9

I

12

PCB19

PCB19 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% MX_C080 5_RD9

MX_C080 5_RD9

I

12

PCB20

PCB20 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% MX_C080 5_RD9

MX_C080 5_RD9

I

12

PCB21

PCB21 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% MX_C080 5_RD9

MX_C080 5_RD9

I

12

PCB22

PCB22 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% MX_C080 5_RD9

MX_C080 5_RD9

I

12

PCB23

PCB23 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% MX_C080 5_RD9

MX_C080 5_RD9

I

12

PCB24

PCB24 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% MX_C080 5_RD9

MX_C080 5_RD9

I

12

PCB25

PCB25 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% MX_C080 5_RD9

MX_C080 5_RD9

I

12

PCB26

PCB26 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% MX_C080 5_RD9

MX_C080 5_RD9

I

12

PCB27

PCB27 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% MX_C080 5_RD9

MX_C080 5_RD9

I

12

PCB28

PCB28 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% MX_C080 5_RD9

MX_C080 5_RD9

I

12

PCB29

PCB29 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% MX_C080 5_RD9

MX_C080 5_RD9

I

PCB30

PCB30 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% MX_C080 5_RD9

MX_C080 5_RD9

+CPU VCORE OUTPUT CAPs

PEGATRON DT-MB RESTRICTED SECRET

VCORE DRIVER-2

1

VCORE DRIVER-2

Michael Lee

61 68Wednesd ay, April 07, 2010

Rev

1.01

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

5

4

3

2

Date: Sheet of

IPMIP-DP

Engineer:

5

D D

+1P1V_V TT

12

I

PR735

PR735 1K

1K

C C

GND

VSSAXG_ SENSE_A1 3

1 2

NOBOM

PJP402

PJP402 SHORTPIN

SHORTPIN

GND

+V_AXG

B B

VCCAXG_ SENSE_A13

A A

NOBOM

PJP403

PJP403 SHORTPIN

SHORTPIN

1 2

PC777 1000PF/5 0V

I

PR737

1 2

I

PR737

PR745

1 2

I

5

12

X7R 10%

100 Ohm

1%

100 Ohm

1%

V_GFX_V SS_SENSE_A

VAXG_VC C_C

PR746 0 Ohm

1 2

NI

PR748 20KOh m

I

+12V_CP U

PR750 1KOhm

1 2

I

+12V

PR752 1KOhm

1 2

NI

PR736 4.99KOhm

5%

12

1%

I

1%

4

+5V

PR732 10 Ohm

1 2

I

VAXG_VID[1 ..7]9

+1P1V_V TT

12

GFX_VR_ EN13

PC778 0.1UF/1 6V

PC780 0.1UF/1 6V

PR738 20 OHM

PR739 887 OH M

12

X7R 10%

I

PR747 1KOhm

I

PC785 22PF /50V NPO 5%

X7R 10%

12

1%

12

X7R 10%

12

1%

1 2

V_GFX_V CC_SENSE_RC_ A

1 2

VAXG_CO MP_RC_A

1%

VAXG_FB _RC_A

12

I

12

PC788

PC788 1000PF/5 0V

1000PF/5 0V

X7R 10%

GND

4

PR751 649KO HM

I

1 2

VAXG_VC C_C

5%

12

I

PC779

PC779 1UF/16V

1UF/16V

X7R 10%

X7R 10% mx_c0603

mx_c0603

GND GND

VAXG_VID1 VAXG_VID2 VAXG_VID3 VAXG_VID4 VAXG_VID5 VAXG_VID6

VAXG_INON _A

VAXG_FB RTN_AV_GFX_V SS_SENSE_A

VAXG_FB RTN_A

1 2

VAXG_FB _A

12

VAXG_FB _A

VAXG_CO MP_A

1%

VAXG_VID7

GFX_VR_ EN

VAXG_PW RGD_A

X7R 10%

I

PR62

PR62 1K

1K

PC781 220P F/50V

NI

PC784 470P F/50V

I

VAXG_VC C_C

VAXG_RA MP_A

GND

1 2

AXG_FB_ RC

I

PR820

PR820 1KOhm

1KOhm

1%

1 2

GND

24

7

31 30 29 28 27 26 25

32

1

2

4

I

PC814

PC814 6800PF/2 5V

6800PF/2 5V

X7R 10%

5

6

12

41 40 39 38 37 36 35 34

3

I

PU5

VCC

GND1

VID1 VID2 VID3 VID4 VID5 VID6 VID7

EN

PWRGD

IMON

FBRTN

FB

COMP

RAMP

GND11 GND10 GND9 GND8 GND7 GND6 GND5 GND4

NCP5380 MNTXG

3

PVCC

BST

SW

DRVH

DRVL

PGND

ILIM

CSCOMP

CSFB

CSREF

LLINE

RPM

IREF

N/C GND2 GND3

RT

VAXG_PV CC_C

20

VAXG_BO OT1_C

23

21

22

19

18

Modify in 2009/ 5/6

VAXG_ILIM_A

8

16

15

14

13

11

10

9

PU5_3

3

1 2 17 33

12

I

PC775

2.2UF/10V

X5R 10%

X5R 10% mx_c0603

mx_c0603

GND

1 Ohm

1 Ohm PR734

PR734

mx_r0603

I

GND

I

PR740

PR740 12KOHM

12KOHM

1%

VAXG_CS COMP_A

12

I

12

PR742

PR742 0 Ohm

0 Ohm

5%

VAXG_CS REF_A

VAXG_LL INE_A

VAXG_RT _A

VAXG_RP M_A

VAXG_IREF _A

I

PR760

PR760 0 Ohm

0 Ohm

5%

2

I

PR733

2.2 Ohm

mx_r0805

12

I

PC782

PC782 270PF/50 V

270PF/50 V

X7R 10%

PR749 1KOhm

12

I

PR753

82.5KOHM

1%

+5V

12

VAXG_BO OT1_RC_C

PRT3 100KOHM

I

PR743

PR743 200KOHM

200KOHM

1%

12

I

PC783

PC783 5600PF/2 5V

5600PF/2 5V

X7R10%

1 2

NI

12

I

PR754

PR754 332KOHM

332KOHM

1%

2

12

1%

PR743

12

VAXG_CS FB_A

1%

GNDG NDG NDGND

1

PR744

1 2

43KOHM

1%

1% I

I

PR722

PR722 10 OHM

10 OHM

1%

+5V

12

VAXG_ISEN 1+_A 63

VAXG_ISEN 1-_A 63

I

PC776

X7R 10%

0.1UF/16V

mx_c0603

12

GND

NI

PD401

3

I

PR741

PR741 51KOHM

51KOHM

1%

PC786

PC786 1000PF/5 0V

1000PF/5 0V

X7R 10%

X7R 10% I

I

2

1

BAV70W PT

VAXG_PH ASE1_C 63

VAXG_UG 1_D 6 3

VAXG_LG 1_D 63

12

R1.01 change

12

PR755

PR755 604KOhm

604KOhm

1%

I

PEGATRON DT-MB RESTRICTED SECRET

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

IPMIP-DP

Engineer:

1

VAGX CONTROLLER

Michael Lee

62 68Wednesd ay, April 07, 2010

Rev

1.01

5

+12V_VC ORE_VIN

D D

VAXG_UG 1_D62

VAXG_PH ASE1_C62

C C

VAXG_LG 1_D62

PR159 0 OhmVPmx_r1206PR1 59 0 OhmVPmx_r1206

PR160 0 OhmVPmx_r1206PR1 60 0 OhmVPmx_r1206

PR162 0 OhmVPmx_r1206PR1 62 0 OhmVPmx_r1206

VAXG_UG 1_D

VAXG_PH ASE1_C

VAXG_LG 1_D

1 2

4

VP

PR756

PR756 0

0

mx_r0603

1 2

2

1

G

3

GND

VAXG_UG R1_D

12

I

PR757

8.2K

D

PQ508

9mΩ/10V T O-252

S

I

3

2

D

PQ507

1

G

9mΩ/10V T O-252

S

3

I

2

D

PQ509

1

G

9mΩ/10V T O-252

S

3

I

GND GND

GND

12

PR758

12

I

PC789

4.7UF/16V

X7R 20%

X7R 20% mx_c1206

mx_c1206

I

PC790

PC790 4700PF/5 0V

4700PF/5 0V

X7R 10%

X7R 10% mx_c0603

mx_c0603

I

PR758

PR758 1 Ohm

1 Ohm

5%

5% mx_r1206

mx_r1206

2

+12V_VA X_VIN

12

I

+

PCE501

PCE501 1000UF/1 6V

1000UF/1 6V

GND

12

I

PC791

PC791 680PF/50 V

680PF/50 V

X7R 10%

GND

IPMIP-GS R1.01 Change to I

VAXG_ISEN 1+_A62

VAXG_ISEN 1-_A62

NOBOM

PJP404

PJP404 SHORTPIN

SHORTPIN

1 2

I

PL404

1.2UH/29A

1

+V_AXG

21

NOBOM

PJP405

PJP405 SHORTPIN

SHORTPIN

1 2

B B

12

I

+

PCE19

PCE19 820UF/2.5 V

820UF/2.5 V

+V_AXG

12

I

PCB37

PCB37 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% MX_C080 5_RD9

MX_C080 5_RD9

I

12

PCB39

PCB39 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% MX_C080 5_RD9

MX_C080 5_RD9

I

12

PCB40

PCB40 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% MX_C080 5_RD9

MX_C080 5_RD9

GND GNDGND GND

I

12

PCB41

PCB41 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% MX_C080 5_RD9

MX_C080 5_RD9

+V_AXG

12

I

+

PCE9

PCE9 820UF/2.5 V

820UF/2.5 V

GND

A A

12

I

+

PCE15

PCE15 820UF/2.5 V

820UF/2.5 V

PEGATRON DT-MB RESTRICTED SECRET

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

5

4

3

2

Date: Sheet of

IPMIP-DP

Engineer:

1

VAGX DRIVER

Michael Lee

63 68Wednesd ay, April 07, 2010

Rev

1.01

5

+5V

PR821 4.7 OHM

1 2

I

D D

GND

5%

PC815 1UF/1 6V

12

X7R 10%Imx_c0603

FS = 253KHZ

I

PR823

1 2

820KOHM

1%

12

NI

PR831

PR831 100KOHM

100KOHM

5%

+5VSB

12

PQ511_E N_A

3

D

1

G

S

2

GNDGND

I

PU400B

GND118GND2

RT8204A GQW

NI

PR827

PR827 10KOhm

10KOhm

1%

NI

PQ733

PQ733 2N7002

2N7002

19

+1P1V_V TT

3

D

1

G

S

2

VTTPW RGD13 ,59

GNDGND

I

12

PCB36

PCB36 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% MX_C080 5_RD9

MX_C080 5_RD9

NI

PQ732

PQ732 2N7002

2N7002

I

12

PCB42

PCB42 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% MX_C080 5_RD9

MX_C080 5_RD9

+1P1V_E N_A

C C

SLP_S3#13,22,48,66

B B

BOTTOM

+1P1V_V TT

A A

12

+

I

PCE22

PCE22 330UF/2V

330UF/2V

+1P1V_V TT

12

I

+

PCE413

PCE413 820UF/2.5 V

820UF/2.5 V

+1P1V_V TT

12

NI

PR832

PR832 1KOhm

1KOhm

1%

I

12

PCB12

PCB12 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% MX_C080 5_RD9

MX_C080 5_RD9

+1P1V_T ON_C

+5V

GNDGND

GND

+1P1V_V DD_C

12

GND

12

NI

PR828

PR828 10KOhm

10KOhm

1%

12

I

PC819

PC819 1000PF/5 0V

1000PF/5 0V

I

12

PCB13

PCB13 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% MX_C080 5_RD9

MX_C080 5_RD9

4

NI

PC818

PC818 1000PF/5 0V

1000PF/5 0V

X7R 10%

I

PU400A

2

VDD

16

TON

15

EN/DEM

4

PGOOD

14

LEN

5

LPGOOD

7

LDRV

6

LFB

17

GND

RT8204A GQW

I

12

PCB31

PCB31 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% MX_C080 5_RD9

MX_C080 5_RD9

VDDP

BOOT

UGATE

PHASE

LGATE

VOUT

I

12

PCB32

PCB32 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% MX_C080 5_RD9

MX_C080 5_RD9

9

13

+1P1V_H G_D +1P1V_HG _R_D

12

+1P1V_P HASE_D

11

+1P1V_ILIM_A +1P 1V_ILIM_R_A

10

OC

+1P1V_L G_D

8

+1P1V_V OUT_A

1

+1P1V_F B_A

3

FB

NI

12

PC821

PC821 20PF/50V

20PF/50V

NPO 5%

GND

NI

I

12

PCB33

PCB33 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% MX_C080 5_RD9

MX_C080 5_RD9

NI

12

PCB34

PCB34 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% MX_C080 5_RD9

MX_C080 5_RD9

PC816 1UF/1 6V

1 2

PR829

I

1 2

12KOHM

1%

I

PR830

1 2

0 Ohm

mx_r0603

5%

12

I

PR838

PR838 20KOhm

20KOhm

1%

GND

I

12

PCB35

PCB35 22UF/6.3V

22UF/6.3V

X5R 20%

X5R 20% MX_C080 5_RD9

MX_C080 5_RD9

1 2

I

PR824

1 2

0 Ohm

5%

PC817 0.1UF /25V

1 2

I

PR402

PR402 0 Ohm

0 Ohm

5%

3

X7R 10%Imx_c0603

+1P1V_L G_R_D

12

+1P1V_V TT_EN_A

I

PQ734

2N7002

+5V

GND

P_+1P1V _BOOT_C+1P1V_BOOT _C

I

PR403

8.2KOHM

5%

1 2

PJP407

PJP407 SHORTPIN

SHORTPIN

NOBOM

12

NI

PR87

8.2KOHM

5%

GND

PR105 510KO HM

NI

1 2

PC822 56PF/50V

I

PR839

PR839 120KOHM

120KOHM

1%

1% I

I

3

D

1

+1P1V_V TT_EN#_A

G

S

2

PC823

0.1UF/16V

X7R 10%

mx_c0603

GND

I

PD408

PD408 BAT54CW

BAT54CW

3

+1P1V_IN+1P1V_IN

2

D

I

PQ26

1

G

S

3

9mΩ/10V T O-252

GND GND

12

1%

PR837

7.68KOHM1% I

12

+3P3VSB

12

3

PQ735

PMBS390 4

3

I

C

E

E 2

2

I

PR841

PR841 1KOhm

1KOhm

5%

B

1

2

+1P1V_IN

1

G

1

G

9mΩ/10V T O-252

PR835 0 Ohm

1

VTT_SEL ECT_R

+5V

2

D

S

3

2

D

S

3

2

I

PQ25

9mΩ/10V T O-252

I

PQ34

GND GND

+1P1V_V OUT_R2_A

12

5%VPmx_r0603

12

GND

PR177

1 2

1KOhm

5%

5% I

I

+1P1V_VTT ....(1.1V)

Imax=30A

VP

12

I

PC401

4.7UF/16V

X7R 20%

X7R 20% mx_c1206

mx_c1206

GND GND

12

I

PC404

4700PF/5 0V

X7R 10%

+1P1V_S UR_C

12

I

PR406

PR406 1 Ohm

1 Ohm

5%

I

PC820

0.1UF/16V

X7R 10%

mx_c0603

VTT_SEL ECT 13

12

I

+

PCE400

PCE400 1000UF/1 6V

1000UF/1 6V

12

NI

PC405

PC405 680PF/50 V

680PF/50 V

X7R 10%

mx_c0603

VSSVTT_ SENSE_A13

PR836 10

I

PR840

1 2

0 Ohm

5%

I

PL4

0.3UH/48A

12

H--->1.05 L--->1.1

VP

21

12

NI

+

PCE410

PCE410 820UF/2.5 V

820UF/2.5 V

GND GND GND

PJP408

1 2

SHORTPIN

NOBOM

+1P1V_V OUT_R1_A

PJP410

12

SHORTPIN

NOBOM

1

+12V_VC ORE_VIN

PR822 0 Ohm

1 2

mx_r1206

PR825 0 Ohm

1 2

mx_r1206

PR826 0 Ohm

1 2

mx_r1206

+1P1V_V TT

I

+

PCE411

PCE411 820UF/2.5 V

820UF/2.5 V

I

PR833

PR833 0 Ohm

0 Ohm

5%

1 2

PJP409

PJP409 SHORTPIN

SHORTPIN

NOBOM

12

I

+

PCE412

PCE412 820UF/2.5 V

820UF/2.5 V

12

VCCVTT_ SENSE_A 13

12

ASUS OEM-DT MB RESTRICTED SECRET

Title :

+1P1V_VTT

GNDGND

5

GND GND GND GND GND GNDGND GND GND

4

GNDGND

3

2

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

Engineer:

+1P1V_VTT

IPMIP-DP

1

Michael Lee

64 68Wednesd ay, April 07, 2010

Rev

1.01

5

4

3

2

1

+5V_DUAL ==> +1P5V_DUAL

D D

+12V+5V _DUAL

C C

I

PD1

PD1 BAT54CW

BAT54CW

3

I

PC9

0.1UF/16V

X7R 10%

X7R 10% mx_c0603

mx_c0603

1 2 3 4

5

1 2

I

PU1

PU1 APW7 120

APW7 120

BOOT UGATE GND LGATE

B B

1P5V_DU AL_BST_C 1P5V_DU AL_HG_D

1P5V_DU AL_LG_D

GND GNDGND

A A

1

2

PHASE

OCSET

VCC

I

PD2

PD2 BAT54CW

BAT54CW

2

1

8 7 6

FB

5

1P5V_PW M_PWR

3

1P5V_VC C_C

1P5V_DU AL_PHASE_C 1P5V_DU AL_OCSET_A 1P5V_DU AL_FB_C 1P5V_DU AL_VCC_C

Imax=19.628A

1P5V_DU AL_HG_D

Please this shortpin close to low-side MOSFET drain pin

12

I

PR23

4.7

mx_r0603

12

I

PC10

0.47UF/16 V

mx_c0603

mx_c0603 X7R 10%

X7R 10%

4

+5V_DUA L

12

NI

PCB2

0.1UF/16V

X7R 10%

GND

1 2

1P5V_DU AL_OCSET_R

12

PR7

PR7 15KOhm

15KOhm

1%

1% I

I

OCP Point: 38.22A

NOBOM

PR113

PR113 0

0

mx_r0603_sho rt

1 2

12

I

PR8

PR8 1K

1K

1%

PL3

1UH/14A

I

1P5V_DU AL_HGR_D

12

NOBOM

PJP18

SHORTPIN

I

PR80

1 2

6.8KOHM

1%

21

I

PR114

8.2K

+1P5V_D UAL_VIN

2

D

I

PQ1

1

G

S

3

9mΩ/10V T O-252

2

D

I

PQ3

1

G

S

3

9mΩ/10V T O-252

GND GND

I

PR9

PR9 887 OHM

887 OHM

1%

12

NI

PC18

0.47UF/16 V

X7R 10%

X7R 10% mx_c0603

mx_c0603

R_R_+1P 5V_DUAL_OV

3

2

D

NI

PQ2

1

AOD452

G

S

3

2

D

I

PQ4

1

G

S

3

9mΩ/10V T O-252

GND

1P5V_DU AL_FB2_C 1P5V_DU AL_FB1_C

I

3

2N7002

D

HQ8

1

G

S

2

12

I

PC11

X5R 10%

10UF/6.3V

mx_c0805

GND GNDGN D

12

I

PC16

PC16 4700PF/5 0V

4700PF/5 0V

X7R 10%

X7R 10% mx_c0603

mx_c0603

+1P5V_D UAL_SN_C

12

I

PR26

PR26 1

1

mx_r1206

1 2

+5V_DUA L

12

I

HR88

HR88 10K

10K

I

3

HQ7

C

E

E 2

2

GNDGND

超超超

B

1

B

1

PMBS390 4

R1_+1P5 V_DUAL_OV

I

PR97

0 Ohm

mx_r0603

mx_r0603 5%

5%

12

R2_+1P5V_DUAL_OV

12

+

12

GND

1.614V

I

HR87

HR87 1K

1K

PCE20

PCE20 560UF/6.3 V

560UF/6.3 V

I

NI

PC7

PC7 680PF/50 V

680PF/50 V

X7R 10%

12

NI

PR176

0

IPMIP-GS ADD

2

12

+

PCE21

PCE21 560UF/6.3 V

560UF/6.3 V

I

PL2

1.2UH/29A

21

GND

+1P5V_D UAL_OV 48

12

+

I

PCE17

PCE17 1800UF/6 .3V

1800UF/6 .3V

12

GND

12

+

I

PCE18

PCE18 1800UF/6 .3V

1800UF/6 .3V

I

PCE29

PCE29 1800UF/6 .3V

1800UF/6 .3V

GND GND

12

PEGATRON DT-MB RESTRICTED SECRET

Title :

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

IPMIP-DP

Engineer:

1

+1P5V_D UAL

I

PC14

PC14 10UF/6.3V

10UF/6.3V

X5R 10%

X5R 10% mx_c0805

mx_c0805

12

PJP10

PJP10 SHORTPIN

SHORTPIN

NOBOM

+1P5V_DUAL_SW

Michael Lee

65 68Wednesd ay, April 07, 2010

Rev

1.01

5

R1.01 add for PCH CORE LVR CONTROL

+3P3VSB

+3P3V

12

D D

12

GND

PQ18_B

C C

NI

PR131

PR179

1K

PQ17_G

3

PQ28

C

B

1

B

1

PMBS390 4

E

E 2

2

NI

PC522

0.1UF/16V

R1.01 add for PCH CORE LVR CONTROL

PR180

1 2

1K

NI

PR128 0

1 2

PQ17_D

3

D

1

G

S

2

NI

GNDGND

12

I

PC521

0.1UF/16V

GND

SLP_S3# 13,22,48,64

PQ18

2N7002

NI

12

0.1UF/16V

GND

+3P3VSB

12

I

PR511

PR511 20K

20K

1%

12

I

PR507

PR507 24K

24K

1%

I

PC520

+3P3VSB

12

I

PR508

PR508 20K

20K

1%

OP1_REF _A

12

I

PR505

9.31K

1%

GND

12

I

PR509

PR509 20K

20K

1%

12

PC503

PC503 3900PF/5 0V

3900PF/5 0V

X7R 10%

OP1_FB_ A

OP2_REF _AOP2_REF_A

I

4

+1P05V_PCH

Imax=5.598A

OP1_VG_ C

I

12

PC501

PC501 470PF/50 V

470PF/50 V

I

PR506

X7R 10%

1K

1 2

I

PU3

A+

3

8

VCC

+

1

A-

AO

2

-

B+

5

+

BO

7

B-

4

6

-

GND

LM358

GND

OP2_FB_ A

GND

OP2_VG_ C

12

I

PR178

PR178 100K

100K

1%

PC69_PR 80

12

I

PC71

PC71 3300PF/2 5V

3300PF/2 5V

X7R 10%

R1.01 ADD OP2

12

PR124

4.7K

I

+12V

12

GND

I

12

PC502

PC502 470PF/50 V

470PF/50 V

X7R 10%

X7R 10%12PR129

I

PR512

PR512 1K

1K

1 2

1

G

I

PC561

0.1UF/25V

mx_c0603

+1P5V_D UAL

2

D

I

PQ22

IPDH6N03L AG

S

3

PR129

4.7K

I

GNDGND

OP2_FB_ R_A

PJP21

1 2

SHORTPIN

NOBOM

3

2

D

1

G

S

3

+3P3V

2

D

PQ32

1

P3055LD G

G

I

S

3

Imax=1.84A

I

PQ23

IPDH6N03L AG

+1P05V_ PCH

GND

+1P8V_S FR

12

+

I

PCE36

PCE36 820UF/6.3 V

820UF/6.3 V

GND

12

I

+

PCE8

PCE8 820UF/2.5 V

820UF/2.5 V

12

I

PC554

0.1UF/25V

mx_c0603

GND

2

Install for AMT support

I/AMTNI

PR47

12

0

mx_r1206

+1P05V_ME

PR52

NI/AMTI

1 2

30.1KOHM

1%

NI/AMTI

12

PR53

PR53 301K

301K

1%

GND GND

GND

+1P05V_ PCH+1P05V_ME

PQ14B

12

NI/AMTI

PC29

0.47UF/16 V

X7R 10%

1

NI/AMTI

PQ14

PQ14 PMBS390 4

PMBS390 4

1

+3P3V_ME+3P3VSB

12

NI/AMTI

R43

R43 0 Ohm

0 Ohm

12

NI/AMTI

PR54

PR54 33KOHM

33KOHM

3

C

B

E

E 2

2

GND

R42R43

PQ1415

3

C

E

E 2

2

GND

12

NI

PR127

PR127 0 Ohm

0 Ohm

12

NI/AMTI

PR55

5.6KOHM

B

1

B

1

NI/AMTI

PQ15

PQ15 PMBS390 4

PMBS390 4

NI/AMTI

PD3

BAT54CW

1

3

2

12

NI/AMTI

PC30

0.1UF/16V

X7R 10%

GND

IP R1.01 CRB1.5

12

PC31

PC31 100PF/50 V

100PF/50 V

NPO 5%

NI/AMTI

SLP_M# 22,6 7

MEPW ROK 2 1

Install for AMT support

Fsw = 500KHz

B B

+5VSB

12

PR73

PR73 1MOhm

1MOhm

NI/AMTI

5%

PR731

NI/AMTI

750KOhm

1 2

3

D

PQ17

D

NI/AMTI

PQ17

1

2N7002

G

S

2

NI/AMTI

PR74

1 2

SLP_M#22,67

A A

100K

1P05VME _FSW1P05VME_E N_A

1P05MEL X 1P05MEL X

PU763

1

SHDN/RT

2

GND1

3

LX1

4

LX2 PGND5PVDD1

RT8015A PQW

NI/AMTI

GND2

COMP

VDD

PVDD2

FB

11 10 9 8 7 6

1P05MEC OM_A 1P05MEF B_A

+5VSB

12

GNDGND

NI/AMTI

PC722

PC722 22UF/6.3V

22UF/6.3V

X5R 10%

+1P05V_ME

NI/AMTI

PR728

PR728 13KOHM

13KOHM

1%

1P05MEC OM_A PR72 8_A

1P05MEF B_A

1P05MEL X

1%

12

PR729 154KO HM

1 2

NI/AMTI

PR730 49.9KOHM

NI/AMTI

PC42 22PF/50V

NI

NI/AMTI

PL402

4.7UH

1P05MEL X_R

21

Imax=2.222A

NI/AMTI

PC771

PC771 1000PF/5 0V

1000PF/5 0V

X7R 10%

1%

12

1P05MEF B1_A

12

NI/AMTI

PR78

PR78 0 Ohm

0 Ohm

5%

12

NI/AMTI

PC723

PC723 22UF/6.3V

22UF/6.3V

X5R 10%

GND

+1P05V_ME

12

GNDGNDGNDGND

NI/AMTI

PC724

PC724 22UF/6.3V

22UF/6.3V

X5R 10%

+5VSB

SLP_M#22,67

NI

PR76

8.2K

1 2

NI

PR13

4.7K

1 2

B

1

B

1

+1P05V_ ME

GND

PQ13_G

3

C

NI

PQ37

PQ37 PMBS390 4

PMBS390 4

E

E 2

2

+1P05V_ PCH

1

G

3

D

NI

PR45

2

S

NI

PQ13FDN34 0P_NL

12

+1P05V_PCH_PR45

mx_r1206

0

PEGATRON DT-MB RESTRICTED SECRET

Title :

+1P05V_PCH & +1P05V_ME

Michael Lee

1

Michael Lee

66 68Wednesd ay, April 07, 2010

Rev

1.01

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

5

4

3

2

Date: Sheet of

IPMIP-DP

Engineer:

5

I

PR28

PR28 1K

1K

I

PR32

PR32 1K

1K

+5V_DUA L_MAIN

GND

+5V_DUA L_AUX

GND

1 2

D D

+3VSBSW48

C C

1 2

12

NI

PC25

PC25 2200PF/5 0V

2200PF/5 0V

X7R 10%

12

NI

PC20

PC20 2200PF/5 0V

2200PF/5 0V

X7R 10%

4

+12V

+5VSB

I

PR842

8.2K

1 2

I

PR35

8.2K

1 2

B

1

B

1

GND

B

1

B

1

GND

+5V_DUA L_MAIN_GATE

3

C

I

PQ6

E

PMBS390 4

2

+5V_DUA L_AUX_GATE

3

C

I

PQ5

PQ5 PMBS390 4

PMBS390 4

E

E 2

2

+5VSB

1

+5V

3

G

2

3

G

2

3

+5V_DUAL....7.8605A

I

S

APM2014 NUC

PQ9

D

+5V_DUAL

12

+

NI

PCE27

GND

PCE27 820UF/6.3 V

820UF/6.3 V

D

I

PQ8

PQ8 NTR4502 PT1G

NTR4502 PT1G

S

2

+5V_DUA L_MAIN_GATE

+5V_DUA L_AUX_GATE

+5V_DUA L_MAIN_GATE

+5V_DUA L_AUX_GATE

1

+5V_DUAL_USB_B......2A

+5VSB

I

PQ7

PQ7 APM9932 CKC

APM9932 CKC

1

S1 D1

2

G1

3

S2G2D2

+5V_DUAL_USB_A+5V

8

7

N

D1

6

54

P

D2

+5V_DUAL_USB_F......2A

I

PQ10

PQ10 APM9932 CKC

APM9932 CKC

1

S1 D1

2

G1

3

S2G2D2

+5V_DUAL_USB_B+5V+5 VSB

8

7

N

D1

6

54

P

D2

+5VSB

PR79

13KOHM

1%

NI/AMTI

PC67

PC67 10UF/16V

10UF/16V

X5R 10%

X5R 10% I

I

PQ21_B

+5VSB

NI/AMTI

PR77

4.7K

1 2

12

GND

SLP_LAN #22

SLP_M#22,66

B B

A A

1 2

I

PR81

8.2K

1 2

12

PC45

4.7UF/6.3V

X5R 10%

X5R 10% I

I

GND

I

PR42

8.2K

1 2

PQ20_G

3

D

Q8513

1

2N7002

G

S

2

I

GND

PQ12_G

3

C

NI/AMTI

B

1

B

1

PQ11

PQ11 PMBS390 4

PMBS390 4

E

E 2

2

GND

NI

12

PC41

4.7UF/6.3V

X5R 10%

mx_c0805

NI/AMTI

12

PC80

4.7UF/6.3V

X5R 10%

mx_c0805

+3P3V_L AN

+3P3V_M E

1

G

3

D

I

NTR4502 PT1G

NTR4502 PT1G PQ20

PQ20

1

G

3

D

NTR4502 PT1G

NTR4502 PT1G PQ12

PQ12

LAN chip choose INTEL LAN,PR192/I RTL LAN,PR191/I

2

NI/AMTI

+3P3VSB

+3P3VSB_PR75

12

S

+3P3VSB _IO

PR192

PR192 0

0

I

mx_r0805

12

PR191

PR191 0

0

NI

mx_r0805

+3P3VSB

12

PR189

PR189 0

0

NI

mx_r0805

+3P3V_M E +3 P3V

12

PR190

PR190 0

0

I/AMTNI

mx_r0805

+5V_DUAL => P_+3.3V_CL for WOL function(LAN:0.7A+others:0.1A)

WOL_EN & SLP_M#: For AMT

1

0

WOL_EN & SLP_M#: For non-AMT

S0/S1

1

0

S0/S1

S3 S4 S5

S0/S1

S3 S4 S5

PEGATRON DT-MB RESTRICTED SECRET

Title :

+5V_DUAL & +3P3V_ME

Michael Lee

1

Michael Lee

67 68Wednesd ay, April 07, 2010

Rev

1.01

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

5

4

3

2

Date: Sheet of

IPMIP-DP

Engineer:

5

4

3

2

1

+1P5V_DUAL ==> +0P75V_VTT_DDR

D D

+1P5V_D UAL

+SM_VTT

12

I

12

+

PCE25

PCE25 330UF/6.3 V

330UF/6.3 V

NI

C C

I

12

PC26

GND GND GND GND GND GND GNDGND

I

12

PC27

10UF/6.3V

I

PCB9

0.1UF/16V

X7R 10%

X7R 10% mx_c0603

mx_c0603

10UF/6.3V

I

PU2

1

VIN

2

GND1

3

REFEN VOUT4NC1

RT9045G SP

GND2

NC3 NC2

VCNTL

Imax=0.83A

9 8 7 6 5

+5V

12

I

PCB8

PCB8 1UF/16V

1UF/16V

X7R 10%

mx_c0603

0P75V_R EF_A

+1P5V_D UAL

I

PR21

PR21 100KOHM

100KOHM

1%

I

PR19

PR19 100KOHM

100KOHM

1%

I

12

PC8

PC8 1000PF/5 0V

1000PF/5 0V

X7R 10%

4/28 MODIFY

+5VSB ==> +3P3VSB....3.44A

I

B B

+5VSB +3P3VSB

12

I

PC53

0.1UF/16V

X7R 10%

GND

I

PQ19

PQ19 LIN REG, 1085

LIN REG, 1085

3

VIN

VOUT

ADJ

1

12

NI

PC68

0.1UF/16V

2

3P3VSB_ ADJ

12

I

PR44

PR44 120

120

1%

12

I

PR29

PR29 200

200

1%

12

+

I

PCE23

PCE23 820UF/6.3 V

820UF/6.3 V

GND GND

12

I

PC59

PC59 10UF/6.3V

10UF/6.3V

X5R 10%

X5R 10% mx_c0805

mx_c0805

GND GND

A A

PEGATRON DT-MB RESTRICTED SECRET

Title :

+0P75V_VTT_ & +1P8V_SFR

Michael Lee

1

Michael Lee

68 68Thursday, April 01, 2010

Rev

1.01

Engineer:

Pegatron Corp.

Size Project Name

A3

Date: Sheet of

5

4

3

2

Date: Sheet of

IPMIP-DP

Engineer:

PEGATRON IPMIP-DP Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual