Pegatron F83Vf, F83Vf Schematic

5

4

3

2

1

Power

VCORE

F83Vf MonteVina BLOCK DIAGRAM

D D

CPU

MEROM / PENRYN

Page 3~5

FSB 1066MHz

LVDS

Page 45

CRT

Page 46

HDMI

Page 48

C C

NVIDIA

N10P-GV2

Page 70~79

PCIE x16 DDR3 1066MHz

PM-45

Page 10~15

x4 DMI

Dual Channel DDR3

SO-DIMM X 2

Page 7 ~ 9

System

1.5VS & 1.05VS

DDR & VTT

1.8VS

VGA_VCORE

Charger

Detect

Load Switch

Power Protect

10/100 LAN

PCI-E LAN
AR8132

Page 33 ~ 34

PCI-E

ICH9-M

Page 20 ~ 24

NEWCARD

B B

Page 53

SATA HDD

SATA ODD

USB 2.0
X4

FAN + SENSOR

Page 50

Power On Sequence

Page 02

PWR / EXGATE Switch

A A

Page 55

PWR Discharge

Page 57

5

4

SATA

Page 51

Page 51

USB

Page 52

LPC
33MHz

Azalia

USB CCD

Page 45

BLUE TOOTH
Module

Page 61

Card Reader

Alcor AU6433

Finger Printer
(NO STUFF)

Page 63

RLT ALC269

Page 40

3

Debug Conn.

EC ITE8512 SPI ROM

Page 30 ~ 31

AUDIO AMP

Page 36

AUDIO JACK &
MIC

4 in 1 Card
Reader

Page 40

Page 44

Page 30

Page 37

Page 38

Power Protect

Title :

Title :

Title :

Engineer:

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

C

C

C

P/N

P/N

P/N

Date: Sheet

Date: Sheet

2

Date: Sheet

Engineer:

F83Vf

F83Vf

F83Vf

<OrgAddr2>

<OrgAddr2>

<OrgAddr2>

1

Page 80

Page 81

Page 82

Page 83

Page 84

Page 85

Page 88

Page 90

Page 91

Page 92

Page 93

Block Diagram

Block Diagram

Block Diagram

Zack Kuo

Zack Kuo

Zack Kuo

of

of

of

1 100Thursday, July 16, 2009

1 100Thursday, July 16, 2009

1 100Thursday, July 16, 2009

Rev

Rev

Rev

1.1

1.1

1.1

5

4

3

2

1

Reset

IC

D D

2

AC_BAT_SYS

+5VA

+3VA
+3VA_EC

+3VSUS
+5VSUS
+12VSUS

1

3

4

+3VA_EC

VSUS_ON

VSUS_GD#

EC

IT8511E

8

C C

B B

SUSC_ON

9

SUSB_ON

+1.5V
+3V
+5V
+12V

+VGA_VCORE
+1.8VS
+1.25VS
+2.5VS
+3VS
+5VS
+12VS

10

ALL_SYSTEM_PWRGD

CPU_PWRGD

12

PWRSW#_EC

7

PM_PWRBTN#

5

PM_RSMRST#

EC_CLK_EN

SUSC_ON

SUSB_ON

15

ICH8_PWROK

13

6

Power On

SWITCH

ICH9

VRMPWRGD
CL_PWROK

PWROK

PM45

CL_PWROK
PWROK

CLK
Gen.

SLP_S4#

SLP_S3#

16

PLT_RST#

17

H_CPURST#

14

CLK_PWRGD

CLK_PWRGD asserted when both
PM_SUSB# and VRM_PWRGD are
high.

To EC

16

H_PWRGD

PENRYN

Delay
99ms

A A

5

11

4

CPU_VRON

+VCORE

Power On Sequence

1

3

2

17

Title :

Title :

Title :

Engineer:

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

C

C

C

P/N

P/N

P/N

Date: Sheet

Date: Sheet

Date: Sheet

Engineer:

F83Vf

F83Vf

F83Vf

<OrgAddr2>

<OrgAddr2>

<OrgAddr2>

1

Power Sequence

Power Sequence

Power Sequence

Zack Kuo

Zack Kuo

Zack Kuo

of

of

of

2 100Thursday, July 16, 2009

2 100Thursday, July 16, 2009

2 100Thursday, July 16, 2009

Rev

Rev

Rev

1.1

1.1

1.1

5

4

3

2

1

U0301A

U0301A

ADDR GROUP 0 ADDR GROUP 1

ADDR GROUP 0 ADDR GROUP 1

A[3]#
A[4]#
A[5]#
A[6]#
A[7]#
A[8]#
A[9]#
A[10]#
A[11]#
A[12]#
A[13]#
A[14]#
A[15]#
A[16]#
ADSTB[0]#

REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#

A[17]#
A[18]#
A[19]#
A[20]#
A[21]#
A[22]#
A[23]#
A[24]#
A[25]#
A[26]#
A[27]#
A[28]#
A[29]#
A[30]#
A[31]#
A[32]#
A[33]#
A[34]#
A[35]#
ADSTB[1]#

ICH

ICH

A20M#
FERR#
IGNNE#

STPCLK#
LINT0
LINT1
SMI#

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10

SOCKET478B

SOCKET478B

B

1

B

1

1 2

R0333 10KOhm

R0333 10KOhm

H_D#[63:0]

H_A#[35:3]

H_REQ#[4:0]

ADS#
BNR#
BPRI#

DEFER#

DRDY#
DBSY#

BR0#

IERR#

INIT#

LOCK#

CONTROL

CONTROL

RESET#

RS[0]#
RS[1]#
RS[2]#

TRDY#

HITM#

BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#

PRDY#
PREQ#

TRST#

XDP/ITP SIGNALS

XDP/ITP SIGNALS

DBR#

THERMAL

THERMAL

PROCHOT#

THRMDA
THRMDC

THERMTRIP#

H CLK

H CLK

BCLK[0]
BCLK[1]

RESERVED

RESERVED

@

@

HIT#

TCK

TDI
TDO
TMS

+VCCP_CPU

1 2

H1
E2
G5

H5
F21
E1

F1

H_IERR#

D20
B3

H4
C1

F3
F4
G3
G2

G6
E4

AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20

H_PROCHOT_S#

D21
A24
B25

C7

A22
A21

R0334

R0334
10KOhm

10KOhm

@

@

T0318T0318

T0319T0319

1

1

XDP_BPM#0
XDP_BPM#1
XDP_BPM#2

H_PRDY#
H_PREQ#
H_TCK
H_TDI
H_TDO
H_TMS
H_TRST#
H_DBR#

T0302T0302

1

R0339

R0339

100Ohm

100Ohm

1% @

1% @

1 2

1

T0303T0303

GTLREF_CTRL <4>

H_ADS# <10>
H_BNR# <10>
H_BPRI# <10>

H_DEFER# <10>
H_DRDY# <10>
H_DBSY# <10>

H_BR0# <10>

R0309 49.9OhmR0309 49.9Ohm

1 2

H_INIT# <20>
H_LOCK# <10>
H_CPURST# <10>

H_RS#0 <10>
H_RS#1 <10>
H_RS#2 <10>
H_TRDY# <10>

H_HIT# <10>
H_HITM# <10>

CPU_THRM_DA <50>
CPU_THRM_DC <50>

H_THRMTRIP# <5,11,20,32>

CLK_CPU_BCLK <29>

CLK_CPU_BCLK# <29>

+VCCP_CPU

QC

C0301

C0301

0.1UF/10V

0.1UF/10V

@

@

Zo=55 Ohm, 0.5" max
for GTL_REF

Default Strapping When Not Used

H_PRDY#
H_PREQ#
H_TDI
H_TDO

R0304 54.9Ohm 1%@R0304 54.9Ohm 1%@

H_TMS
H_DBR#

R0306 1KOhm 1%@R0306 1KOhm 1%@

H_TCK

R0307 54.9Ohm 1%R0307 54.9Ohm 1%

H_TRST#

R0308 54.9Ohm 1%R0308 54.9Ohm 1%

Place R0304 & R0306 for XDP function

H_TDI_M

R0337 54.9Ohm 1% @R0337 54.9Ohm 1% @

H_TDO_M

R0338 54.9Ohm 1% @R0338 54.9Ohm 1% @

XDP_BPM#0

R0321 54.9Ohm 1% @R0321 54.9Ohm 1% @

XDP_BPM#1

R0301 54.9Ohm 1% @R0301 54.9Ohm 1% @

XDP_BPM#2

R0322 54.9Ohm 1% @R0322 54.9Ohm 1% @

XDP_BPM#3

R0323 54.9Ohm 1% @R0323 54.9Ohm 1% @

R0315

R0315

1KOhm

1KOhm

1%

1%

12

R0316

R0316

2KOhm

2KOhm

1%

1%

5 6
7 8
3 4

1 2

1 2
1 2
1 2

1 2

1 2
1 2

1 2
1 2
1 2
1 2

+VCCP_CPU

1 2

1 2

56Ohm

56Ohm
56Ohm

56Ohm
56Ohm

56Ohm
56Ohm

56Ohm

H_DSTBN#0<10>
H_DSTBP#0<10>
H_DINV#0<10>

R0317 1KOhm1%@R0317 1KOhm1%@
R0318 1KOhm1%@R0318 1KOhm1%@

RN0301C

RN0301C
RN0301D

RN0301D
RN0301B

RN0301B
RN0301A

RN0301A

H_DSTBN#1<10>
H_DSTBP#1<10>
H_DINV#1<10>

+VCCP_CPU

T0304T0304
T0305T0305
T0306T0306
T0307T0307

CPU_BSEL0<29>
CPU_BSEL1<29>
CPU_BSEL2<29>

+VCCP_CPU

+3VS

QC

U0301B

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4H_A#7
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15

H_D#16
H_D#17
H_D#18

H_D#20
H_D#21
H_D#22XDP_BPM#3

H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31

GTL_REF

12
12

U0301B

E22

D[0]#

F24

D[1]#

E26

D[2]#

G22

D[3]#

F23

D[4]#

G25

D[5]#

E25

D[6]#

E23

D[7]#

K24

D[8]#

G24

D[9]#

J24

D[10]#

J23

D[11]#

H22

D[12]#

F26

D[13]#

K22

D[14]#

H23

D[15]#

J26

DSTBN[0]#

H26

DSTBP[0]#

H25

DINV[0]#

N22

D[16]#

K25

D[17]#

P26

D[18]#

R23

D[19]#

L23

D[20]#

M24

D[21]#

L22

D[22]#

M23

D[23]#

P25

D[24]#

P23

D[25]#

P22

D[26]#

T24

D[27]#

R24

D[28]#

L25

D[29]#

T25

D[30]#

N25

D[31]#

L26

DSTBN[1]#

M26

DSTBP[1]#

N24

DINV[1]#

AD26

GTLREF

C23

TEST1

D25

TEST2

C24

1

TEST3

AF26

1

TEST4

AF1

1

TEST5

A26

1

TEST6

B22

BSEL[0]

B23

BSEL[1]

C21

BSEL[2]

SOCKET478B

SOCKET478B

BCLK FSB BSEL2 BSEL1 BSEL0

667 L H H

166

800 L H L

200

1067 L L L266

DATA GRP 0

DATA GRP 0

DATA GRP 2DATA GRP 3

DATA GRP 2DATA GRP 3

DSTBN[2]#
DSTBP[2]#

DATA GRP 1

DATA GRP 1

DSTBN[3]#
DSTBP[3]#

MISC

MISC

PWRGOOD

D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#

DINV[2]#

D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#

DINV[3]#
COMP[0]

COMP[1]
COMP[2]
COMP[3]

DPRSTP#

DPSLP#

DPWR#

SLP#

H_D#32

Y22

H_D#33

AB24

H_D#34

V24

H_D#35

V26

H_D#36

V23

H_D#37

T22

H_D#38

U25

H_D#39

U23

H_D#40

Y25

H_D#41

W22

H_D#42

Y23

H_D#43

W24

H_D#44

W25

H_D#45

AA23

H_D#46

AA24

H_D#47

AB25
Y26
AA26
U22

AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

R26
U26
AA1
Y1

E5
B5
D24
D6
D7
AE6

PSI#

PWRLIMIT#<30>

H_D#48
H_D#49
H_D#50
H_D#51H_D#19
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_COMP0

R0311 24.9Ohm 1%R0311 24.9Ohm 1%

H_COMP1

R0312 49.9Ohm 1%R0312 49.9Ohm 1%

H_COMP2

R0313 24.9Ohm 1%R0313 24.9Ohm 1%

H_COMP3

R0314 49.9Ohm 1%R0314 49.9Ohm 1%

H_PROCHOT_S#

D0301 RB751V-40

D0301 RB751V-40

H_DSTBN#2 <10>
H_DSTBP#2 <10>
H_DINV#2 <10>

QC
DC

H_DSTBN#3 <10>
H_DSTBP#3 <10>
H_DINV#3 <10>

1 2
1 2
1 2
1 2

H_DPRSTP# <11,20,80>
H_DPSLP# <20>
H_DPWR# <10>

H_CPUSLP# <10>
PM_PSI# <80>

@

@

12

Comp 0,2: Zo=25 Ohm, trace length < 0.5"
Comp 1,3: Z0=50 Ohm, trace length < 0.5"

Comp 0,2: Zo=27.4 Ohm, trace length < 0.5"
Comp 1,3: Z0=55 Ohm, trace length < 0.5"

H_PWRGD <20>

+VCCP_CPU

R0310

R0310
68Ohm

68Ohm

1 2
32

3

3

D

D

Q0301

Q0301
H2N7002

H2N7002

1

1

1

THRO_CPU <30>

G

G

S

S

2

2

H_D#[63:0]<10>

H_A#[35:3]<10>

D D

H_ADSTB#0<10>

C C

H_ADSTB#1<10>

H_A20M#<20>

H_FERR#<20>

H_IGNNE#<20>
H_STPCLK#<20>

H_INTR<20>
H_NMI<20>
H_SMI#<20>

T0308T0308
T0309T0309

CPU_THRM_DA_QC

T310T310

1

CPU_THRM_DC_QC

T311T311

1

T0312T0312
T0313T0313
T0314T0314

1%

1%

+VCCP_CPU

B B

12

R0335 1KOhm

R0335 1KOhm

@

@

1%

1%

12

R0336 1.74KOHM

R0336 1.74KOHM

@

@

12

C0302 0.1UF/10V

C0302 0.1UF/10V

@

@

Q0303

Q0303

2N7002

2N7002

@

@

H_REQ#[4:0]<10>

H_A#3

J4

H_A#4

L5

H_A#5

L4

H_A#6

K5

M3

H_A#8

N2

H_A#9

J1

H_A#10

N3

H_A#11

P5

H_A#12

P2

H_A#13

L2

H_A#14

P4

H_A#15

P1

H_A#16

R1
M1

H_REQ#0

K3

H_REQ#1

H2

H_REQ#2

K2

H_REQ#3

J3

H_REQ#4

L1

H_A#17

Y2

H_A#18

U5

H_A#19

R3

H_A#20

W6

H_A#21

U4

H_A#22

Y5

H_A#23 H_D#23

U1

H_A#24

R4

H_A#25

T5

H_A#26

T3

H_A#27

W2

H_A#28

W5

H_A#29

Y4

H_A#30

U2

H_A#31

V4

H_A#32

W3

H_A#33

AA4

H_A#34

AB2

H_A#35

AA3

BPM_2[1]#
BPM_2[0]#

BPM_2[2]#

GTL_REF2
H_TDO_M
H_TDI_M

1

1

1

G

G

PMBS3904

PMBS3904

Q0302

Q0302

@

@

V1

1

A6
A5

C4

1

D5
C6

B4
A3

M4
N5

T2
V3

B2
C3
D2

D22

D3

F6

+3VS

R0332

R0332
100KOhm

100KOhm

@

@

1 2

3

3

C

C

E

E
2

2

T0320T0320

T0321T0321

1
1

1
1
1

32

3

3

D

D

S

S

2

2

A A

Title :

Title :

Title :

Penryn(1)

Penryn(1)

Penryn(1)

Zack Kuo

Zack Kuo

F83Vf

F83Vf

F83Vf

Zack Kuo

3 100Thursday, July 16, 2009

3 100Thursday, July 16, 2009

3 100Thursday, July 16, 2009

Rev

Rev

Rev

1.1

1.1

1.1

of

of

of

Engineer:

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

C

C

C

P/N

P/N

P/N

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Engineer:

<OrgAddr2>

<OrgAddr2>

<OrgAddr2>

1

5

+VCORE

D D

C C

@

@

1 2

R0409 0Ohm

R0409 0Ohm

B B

AA10
AA12
AA13
AA15
AA17
AA18
AA20

AC10
AB10
AB12
AB14
AB15
AB17
AB18

A10
A12
A13
A15
A17
A18
A20

B10
B12
B14
B15
B17
B18
B20

C10
C12
C13
C15
C17
C18

D10
D12
D14
D15
D17
D18

E10
E12
E13
E15
E17
E18
E20

F10
F12
F14
F15
F17
F18
F20
AA7
AA9

AB9

A7
A9

B7
B9

C9

D9

E7
E9

F7
F9

U0301C

U0301C

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67

SOCKET478B

SOCKET478B

VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99

VCC100

VCCP1
VCCP2
VCCP3
VCCP4
VCCP5
VCCP6
VCCP7
VCCP8

VCCP9
VCCP10
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16

VCCA1

VCCA2

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

VCCSENSE

VSSSENSE

4

+VCORE

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

B26
C26

VR_VID0

AD6

VR_VID1

AF5

VR_VID2

AE5

VR_VID3

AF4

VR_VID4

AE3

VR_VID5

AF3

VR_VID6

AE2

AF7

AE7

+VCCP_CPU

12

C0402

C0402

0.01UF/16V

0.01UF/16V

VR_VID[0:6] <80>

1 2

R0401 100Ohm 1%R0401 100Ohm 1%

12

R0402

R0402
100Ohm

100Ohm

1%

1%

Max: 130 mA

12

C0401

C0401
10UF/6.3V

10UF/6.3V

@

@

+VCORE

VCCSENSE <80>
VSSSENSE <80>

GTLREF_CTRL<3>

+1.5VS

3

R0403 0Ohm@R0403 0Ohm@

1 2

SL401

SL401

GTLREF_CTRL_R

1 2

R0402

R0402

R0404 0Ohm

R0404 0Ohm

@

@

1 2

GTLREF_CTRL_R

2

U0301D

U0301D

A4

VSS1

A8

VSS2

A11

VSS3

A14

VSS4

A16

VSS5

A19

VSS6

A23

VSS7

AF2

VSS8

B6

VSS9

B8

VSS10

B11

VSS11

B13

VSS12

B16

VSS13

B19

VSS14

B21

VSS15

B24

VSS16

C5

VSS17

C8

VSS18

C11

VSS19

C14

VSS20

C16

VSS21

C19

VSS22

C2

VSS23

C22

VSS24

C25

VSS25

D1

VSS26

D4

VSS27

D8

VSS28

D11

VSS29

D13

VSS30

D16

VSS31

D19

VSS32

D23

VSS33

D26

VSS34

E3

VSS35

E6

VSS36

E8

VSS37

E11

VSS38

E14

VSS39

E16

VSS40

E19

VSS41

E21

VSS42

E24

VSS43

F5

VSS44

F8

VSS45

F11

VSS46

F13

VSS47

F16

VSS48

F19

VSS49

F2

VSS50

F22

VSS51

F25

VSS52

G4

VSS53

G1

VSS54

G23

VSS55

G26

VSS56

H3

VSS57

H6

VSS58

H21

VSS59

H24

VSS60

J2

VSS61

J5

VSS62

J22

VSS63

J25

VSS64

K1

VSS65

K4

VSS66

K23

VSS67

K26

VSS68

L3

VSS69

L6

VSS70

L21

VSS71

L24

VSS72

M2

VSS73

M5

VSS74

M22

VSS75

M25

VSS76

N1

VSS77

N4

VSS78

N23

VSS79

N26

VSS80
VSS81P3VSS162

SOCKET478B

SOCKET478B

VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161

VSS163

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

R0405 0Ohm@R0405 0Ohm@

1 2

R0406 0Ohm@R0406 0Ohm@

BPM_2[3]#

1 2

R0407

R0407

@

@

1 2

0Ohm

0Ohm

1

A A

Title :

Title :

Title :

Penryn(2)

Penryn(2)

Penryn(2)

Zack Kuo

Zack Kuo

F83Vf

F83Vf

F83Vf

Zack Kuo

4 100Thursday, July 16, 2009

4 100Thursday, July 16, 2009

4 100Thursday, July 16, 2009

Rev

Rev

Rev

1.1

1.1

1.1

of

of

of

Engineer:

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

C

C

C

P/N

P/N

P/N

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Engineer:

<OrgAddr2>

<OrgAddr2>

<OrgAddr2>

1

5

4

3

2

1

+VCORE

12

C0505

C0505
10UF/6.3V

10UF/6.3V

@

@

12

C0508

C0508
10UF/6.3V

10UF/6.3V

12

C0525

C0525
10UF/6.3V

10UF/6.3V

@

@

12

C0512

C0512
10UF/6.3V

10UF/6.3V

@

@

D D

C C

B B

12

C0531

C0531
10UF/6.3V

10UF/6.3V

12

C0517

C0517
10UF/6.3V

10UF/6.3V

@

@

12

C0539

C0539
10UF/6.3V

10UF/6.3V

@

@

12

C0532

C0532
10UF/6.3V

10UF/6.3V

@

@

12

C0518

C0518
10UF/6.3V

10UF/6.3V

@

@

12

C0524

C0524
10UF/6.3V

10UF/6.3V

@

@

12

C0516

C0516
10UF/6.3V

10UF/6.3V

12

C0515

C0515
10UF/6.3V

10UF/6.3V

@

@

12

C0528

C0528
10UF/6.3V

10UF/6.3V

@

@

12

C0504

C0504
10UF/6.3V

10UF/6.3V

38A for Penryn

12

12

C0523

C0523
10UF/6.3V

10UF/6.3V

@

@

12

12

C0522

C0522
10UF/6.3V

10UF/6.3V

@

@

12

12

C0507

C0507
10UF/6.3V

10UF/6.3V

@

@

C0502

C0502
10UF/6.3V

10UF/6.3V

@

@

C0511

C0511
10UF/6.3V

10UF/6.3V

C0501

C0501
10UF/6.3V

10UF/6.3V

12

C0530

C0530
10UF/6.3V

10UF/6.3V

@

@

12

C0520

C0520
10UF/6.3V

10UF/6.3V

@

@

12

C0506

C0506
10UF/6.3V

10UF/6.3V

12

C0521

C0521
10UF/6.3V

10UF/6.3V

@

@

12

C0503

C0503
10UF/6.3V

10UF/6.3V

12

C0513

C0513
10UF/6.3V

10UF/6.3V

@

@

12

C0519

C0519
10UF/6.3V

10UF/6.3V

@

@

12

C0510

C0510
10UF/6.3V

10UF/6.3V

@

@

12

C0526

C0526
10UF/6.3V

10UF/6.3V

12

C0527

C0527
10UF/6.3V

10UF/6.3V

12

C0509

C0509
10UF/6.3V

10UF/6.3V

@

@

12

C0529

C0529
10UF/6.3V

10UF/6.3V

@

@

+VCCP

Decoupling guide from Intel

VCORE 22uF/10V r 10uF * 32pcs
330uF/2V * 6pcs
VCCP 0.1uF * 6pcs
150uF * 1pcs ?
10uF * 1pcs ?

+VCORE Mid-Frequency Capacitor
Intel: 22UF *32
F83Vf: 10UF*12
+VCCP Decoupling Capacitor
Intel: 270UF *1, 0.1UF *6
F3S: 100UF *1, 0.1UF *3
V1V: ?

+VCCP

12

R0504

R0504

49.9KOhm

49.9KOhm

@

@

H_THRMTRIP#<3,11,20,32>

BUF_PLT_RST#<11,21,30,33,41,53,70>

12

+

+

CE0501

CE0501

100UF/2.5V

100UF/2.5V

+VCCP Decoupling Capacitor
(Place near CPU)

Max: 4500 mA

12

12

C0514

C0514

C0538

C0538

0.1UF/16V

0.1UF/16V

0.1UF/16V

0.1UF/16V

@

@

@

@

+VCCP

12

R0505

R0505
330Ohm

330Ohm

@

@

1 2

C0542 0.1UF/16V

C0542 0.1UF/16V

B

B

@

@

C

C

E12

3

E12

3

Q0502

Q0502
PMBS3904

PMBS3904

@

@

12

C0535

C0535

0.1UF/16V

0.1UF/16V

@

@

2

2

Q0503

Q0503
2N7002

2N7002

S

S

G

G

+VCCP_CPU

12

C0534

C0534

0.1UF/16V

0.1UF/16V

@

@

D

D

FORCE_OFF#

32

3

3

1

1

1

12

C0537

C0537

0.1UF/16V

0.1UF/16V

12

C0536

C0536

0.1UF/16V

0.1UF/16V

12

C0533

C0533
10UF/6.3V

10UF/6.3V

FORCE_OFF# <91,92>

Thermal Trip signal (From CPU to ICH-9M and sequence)

A A

Title :

Title :

Title :

CPU Decouple

CPU Decouple

CPU Decouple

Zack Kuo

Zack Kuo

F83Vf

F83Vf

F83Vf

Zack Kuo

5 100Thursday, July 16, 2009

5 100Thursday, July 16, 2009

5 100Thursday, July 16, 2009

Rev

Rev

Rev

1.1

1.1

1.1

of

of

of

Engineer:

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

C

C

C

P/N

P/N

P/N

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Engineer:

<OrgAddr2>

<OrgAddr2>

<OrgAddr2>

1

5

D D

C C

4

3

2

1

B B

A A

Title :

Title :

Title :

CPU_***

CPU_***

CPU_***

Zack Kuo

Zack Kuo

F83Vf

F83Vf

F83Vf

Zack Kuo

6 100Thursday, July 16, 2009

6 100Thursday, July 16, 2009

6 100Thursday, July 16, 2009

Rev

Rev

Rev

1.1

1.1

1.1

of

of

of

Engineer:

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

C

C

C

P/N

P/N

P/N

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Engineer:

<OrgAddr2>

<OrgAddr2>

<OrgAddr2>

1

5

4

3

2

1

12

C722
10UF/6.3V

10UF/6.3V

@C722

@

M_A_DQ[63:0] <12>

12

C723

C723
10UF/6.3V

10UF/6.3V

12

C724

C724
10UF/6.3V

10UF/6.3V

1 2

1 2

12

C712

C712
10PF/50V

10PF/50V

@

@

C713

C713
10PF/50V

10PF/50V

@

@

C725

C725
10UF/6.3V

10UF/6.3V

+3VS

12

C706

2.2UF/6.3V

2.2UF/6.3V

M_CLK_DDR0

M_CLK_DDR0#

M_CLK_DDR1

M_CLK_DDR1#

+1.5V_DDR3

12

C702

C702

0.1UF/10V

0.1UF/10V

12

@C706

@

C707

C707

0.1UF/10V

0.1UF/10V

+1.5V_DDR3 +1.5V

RX701

12

12

C705

C705

0.1UF/10V

0.1UF/10V

@

@

12

C708

C708

2.2UF/6.3V

2.2UF/6.3V

12

C710

C710

2.2UF/6.3V

2.2UF/6.3V

C714

C714
10UF/10V

10UF/10V

RX701

0Ohm @

0Ohm @

M_ODT0<11>
M_ODT1<11>

M_A_RAS#<12>

M_DRAMRST#<8,11>

M_CS#0<11>
M_CS#1<11>

SMB_CLK_S<8,24,29,44,53>
SMB_DAT_S<8,24,29,44,53>

12

@

@

C709

C709

0.1UF/10V

0.1UF/10V

12

@

@

C711

C711

0.1UF/10V

0.1UF/10V

12

C715

C715

@

@

10UF/10V

10UF/10V

PM_EXTTS#0<11>

12

12

C703

C703

C704

C704

0.1UF/10V

0.1UF/10V

0.1UF/10V

0.1UF/10V

@

@

@

@

SL701

SL701

1 2

R0603

R0603

SL702

SL702

1 2

R0603

R0603

M_VREFCA_DIMM0

M_VREFDQ_DIMM0

@

@

+0.75V

+0.75V

U701A

M_A_A[14:0]<12>

D D

M_A_BS0<12>
M_A_BS1<12>
M_A_BS2<12>

M_A_CAS#<12>
M_CLK_DDR0#<11>
M_CLK_DDR1#<11>

M_CLK_DDR0<11>
M_CLK_DDR1<11>

M_CKE0<11>

M_A_DM[0:7]<12>

C C

M_A_DQS[0:7]<12>

M_A_DQS#[0:7]<12>

B B

M_CKE1<11>

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

U701A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

115

CAS#

103

CK#0

104

CK#1

101

CK0

102

CK1

73

CKE0

74

CKE1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3

135

DQS#4

152

DQS#5

169

DQS#6

186

DQS#7

DDR3_DIMM_204P

DDR3_DIMM_204P

DDR3 DIMM 204P 0.6mm 9.2H REV

DDR3 DIMM 204P 0.6mm 9.2H REV
1202-003V000

1202-003V000

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

+1.5V_DDR3

12

+

+

CE701

CE701

100UF/2V

100UF/2V

@

@

+1.5V_DDR3

12

C701

10UF/6.3V

10UF/6.3V

M_A_DQ5

5

M_A_DQ1

7

M_A_DQ7

15

M_A_DQ6

17

M_A_DQ0

4

M_A_DQ4

6

M_A_DQ2

16

M_A_DQ3

18

M_A_DQ12

21

M_A_DQ8

23

M_A_DQ10

33

M_A_DQ15

35

M_A_DQ13

22

M_A_DQ9

24

M_A_DQ11

34

M_A_DQ14

36

M_A_DQ16

39

M_A_DQ17

41

M_A_DQ19

51

M_A_DQ22

53

M_A_DQ18

40

M_A_DQ20

42

M_A_DQ21

50

M_A_DQ23

52

M_A_DQ28

57

M_A_DQ29

59

M_A_DQ30

67

M_A_DQ31

69

M_A_DQ24

56

M_A_DQ25

58

M_A_DQ27

68

M_A_DQ26

70

M_A_DQ32

129

M_A_DQ37

131

M_A_DQ38

141

M_A_DQ39

143

M_A_DQ33

130

M_A_DQ36

132

M_A_DQ34

140

M_A_DQ35

142

M_A_DQ44

147

M_A_DQ45

149

M_A_DQ47

157

M_A_DQ46

159

M_A_DQ40

146

M_A_DQ41

148

M_A_DQ42

158

M_A_DQ43

160

M_A_DQ53

163

M_A_DQ48

165

M_A_DQ54

175

M_A_DQ52

177

M_A_DQ49

164

M_A_DQ50

166

M_A_DQ51

174

M_A_DQ55

176

M_A_DQ60

181

M_A_DQ61

183

M_A_DQ59

191

M_A_DQ57

193

M_A_DQ56

180

M_A_DQ63

182

M_A_DQ58

192

M_A_DQ62

194

12

@C701

@

C721

@C721

@

10UF/6.3V

10UF/6.3V

U701B

U701B

198

12

EVENT#

207

GND1

208

GND2

77

NC1

122

NC2

205

NP_NC1

206

NP_NC2

116

ODT0

120

ODT1

110

RAS#

30

RESET#

114

S#0

121

S#1

197

SA0

201

SA1

202

SCL

200

SDA

125

TEST

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

126

VREFCA

1

VREFDQ

DDR3_DIMM_204P

DDR3_DIMM_204P

+0.75V

C716

C716
10UF/10V

10UF/10V

12

C717
1UF/6.3V

1UF/6.3V

@C717

@

12

@

@

12

C718

C718
1UF/6.3V

1UF/6.3V

12

@

C719

C719

@

1UF/6.3V

1UF/6.3V

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8

VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

VTT1
VTT2

12

WE#

C720

C720
1UF/6.3V

1UF/6.3V

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189

+0.75V

190
195
196

203
204

113

M_A_WE# <12>

A A

Title :

Title :

Title :

DIMM0

DIMM0

DIMM0

Zack Kuo

Zack Kuo

F83Vf

F83Vf

F83Vf

Zack Kuo

7 100Thursday, July 16, 2009

7 100Thursday, July 16, 2009

7 100Thursday, July 16, 2009

Rev

Rev

Rev

1.1

1.1

1.1

of

of

of

Engineer:

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

C

C

C

P/N

P/N

P/N

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Engineer:

<OrgAddr2>

<OrgAddr2>

<OrgAddr2>

1

5

U801A

+1.5V_DDR3

12

+

+

CE801

CE801
100UF/2V

100UF/2V

@

@

+1.5V_DDR3

12

C819

C819
10UF/6.3V

10UF/6.3V

@

@

98
97
96
95
92
91
90
86
89
85

107

84
83

119

80
78

109
108

79

115
103
104
101
102

73
74

11
28
46

63
136
153
170
187

12

29

47

64
137
154
171
188

10

27

45

62
135
152
169
186

U801A

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

BA0
BA1
BA2

CAS#
CK#0
CK#1
CK0
CK1
CKE0
CKE1

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

DDR3_DIMM_204P

DDR3_DIMM_204P

DDR3 DIMM 204P 0.6mm 5.2H REV.

DDR3 DIMM 204P 0.6mm 5.2H REV.
1202-003U000

1202-003U000

12

12

C820

C820

C821

C821

10UF/6.3V

10UF/6.3V

10UF/6.3V

10UF/6.3V

@

@

@

@

DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

12

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9

C822

C822
10UF/6.3V

10UF/6.3V

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

M_B_A[0:14]<12>

D D

M_B_BS0<12>
M_B_BS1<12>
M_B_BS2<12>

M_B_CAS#<12>
M_CLK_DDR2#<11>
M_CLK_DDR3#<11>

M_CLK_DDR2<11>
M_CLK_DDR3<11>

M_CKE2<11>

M_B_DM[0:7]<12>

C C

M_B_DQS[0:7]<12>

M_B_DQS#[0:7]<12>

B B

M_CKE3<11>

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

M_B_DQ4
M_B_DQ1
M_B_DQ7
M_B_DQ3
M_B_DQ5
M_B_DQ0
M_B_DQ2
M_B_DQ6
M_B_DQ9
M_B_DQ8
M_B_DQ14
M_B_DQ15
M_B_DQ13
M_B_DQ12
M_B_DQ11
M_B_DQ10
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ28
M_B_DQ29
M_B_DQ26
M_B_DQ30
M_B_DQ24
M_B_DQ25
M_B_DQ27
M_B_DQ31
M_B_DQ32
M_B_DQ36
M_B_DQ34
M_B_DQ39
M_B_DQ37
M_B_DQ33
M_B_DQ38
M_B_DQ35
M_B_DQ41
M_B_DQ44
M_B_DQ47
M_B_DQ42
M_B_DQ40
M_B_DQ45
M_B_DQ43
M_B_DQ46
M_B_DQ48
M_B_DQ53
M_B_DQ55
M_B_DQ49
M_B_DQ50
M_B_DQ52
M_B_DQ51
M_B_DQ54
M_B_DQ60
M_B_DQ61
M_B_DQ63
M_B_DQ57
M_B_DQ56
M_B_DQ58
M_B_DQ59
M_B_DQ62

12

C823

C823
10UF/6.3V

10UF/6.3V

4

12

C824

C824
10UF/6.3V

10UF/6.3V

M_B_DQ[0:63] <12>

1 2

1 2

C801

C801
10PF/50V

10PF/50V

@

@

C825

C825
10PF/50V

10PF/50V

@

@

M_CLK_DDR2

M_CLK_DDR2#

M_CLK_DDR3

M_CLK_DDR3#

+3VS

12

C806

2.2UF/6.3V

2.2UF/6.3V

@C806

@

+1.5V_DDR3

12

12

C802

C802

0.1UF/10V

0.1UF/10V

C807

C807

0.1UF/10V

0.1UF/10V

3

U801B

RX801

12

C805

C805

0.1UF/10V

0.1UF/10V

12

C808

C808

2.2UF/6.3V

2.2UF/6.3V

12

C810

C810

2.2UF/6.3V

2.2UF/6.3V

RX801

0Ohm @

0Ohm @

M_ODT2<11>
M_ODT3<11>

M_B_RAS#<12>

M_DRAMRST#<7,11>

M_CS#2<11>
M_CS#3<11>

SMB_CLK_S<7,24,29,44,53>
SMB_DAT_S<7,24,29,44,53>

@

@

12

C809

C809

0.1UF/10V

0.1UF/10V

@

@

12

C811

C811

0.1UF/10V

0.1UF/10V

@

@

PM_EXTTS#1<11>

+3VS

12

12

C804

C804

C803

C803

0.1UF/10V

0.1UF/10V

0.1UF/10V

0.1UF/10V

@

@

@

@

SL801

SL801

1 2

R0603

R0603

SL802

SL802

1 2

R0603

R0603

M_VREFCA_DIMM1

M_VREFDQ_DIMM1

+0.75V

+0.75V

U801B

198

12

207
208

77

122
205

206
116

120

110

30

114
121

197
201

202
200

125

75
76
81
82
87
88
93
94

99
100
105
106
111
112
117
118
123
124

199

126

1

DDR3_DIMM_204P

DDR3_DIMM_204P

12

C812

C812

@

@

10UF/10V

10UF/10V

EVENT#

GND1
GND2

NC1
NC2

NP_NC1
NP_NC2

ODT0
ODT1

RAS#
RESET#

S#0
S#1

SA0
SA1

SCL
SDA

TEST

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

VDDSPD

VREFCA
VREFDQ

2

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

44

VSS16

48

VSS17

49

VSS18

54

VSS19

55

VSS20

60

VSS21

61

VSS22

65

VSS23

66

VSS24

71

VSS25

72

VSS26

127

VSS27

128

VSS28

133

VSS29

134

VSS30

138

VSS31

139

VSS32

144

VSS33

145

VSS34

150

VSS35

151

VSS36

155

VSS37

156

VSS38

161

VSS39

162

VSS40

167

VSS41

168

VSS42

172

VSS43

173

VSS44

178

VSS45

179

VSS46

184

VSS47

185

VSS48

189

VSS49
VSS50
VSS51
VSS52

VTT1
VTT2

WE#

+0.75V

12

@

@

C813

C813
10UF/10V

10UF/10V

12

@

@

C814

C814
10UF/10V

10UF/10V

12

C815

C815
1UF/6.3V

1UF/6.3V

@

@

+0.75V

190
195
196

203
204

12

C817

C817
1UF/6.3V

1UF/6.3V

M_B_WE# <12>

12

C818

C818
1UF/6.3V

1UF/6.3V

113

12

C816

C816
1UF/6.3V

1UF/6.3V

@

@

1

A A

Title :

Title :

Title :

DIMM1

DIMM1

DIMM1

Zack Kuo

Zack Kuo

F83Vf

F83Vf

F83Vf

Zack Kuo

8 100Thursday, July 16, 2009

8 100Thursday, July 16, 2009

8 100Thursday, July 16, 2009

Rev

Rev

Rev

1.1

1.1

1.1

of

of

of

Engineer:

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

C

C

C

P/N

P/N

P/N

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Engineer:

<OrgAddr2>

<OrgAddr2>

<OrgAddr2>

1

5

D D

+1.5V_DDR3 +5V

12

R902

R902
2KOhm

2KOhm

@

@

C C

B B

12

C901

C901

0.1UF/10V

0.1UF/10V

@

@

12

C904

C904

0.1UF/10V

0.1UF/10V

@

@

12

R903

R903
2KOhm

2KOhm

@

@

+1.5V_DDR3 +5V

12

R906

R906
2KOhm

2KOhm

@

@

12

R907

R907
2KOhm

2KOhm

@

@

1
3

1
3

4

R901

R901

1 2

0Ohm

0Ohm

@

@

52

U901

U901

V+

V+

+

+

-

­V-

V-

LMV321AS5X_NL

LMV321AS5X_NL

@

@

R905

R905

1 2

0Ohm

0Ohm

@

@

52

U902

U902

V+

V+

+

+

-

­V-

V-

LMV321AS5X_NL

LMV321AS5X_NL

@

@

3

M_VREF_MCH <7,8,11>

M_VREFCA_DIMM0

M_VREFCA_DIMM1

12

C902

C902

0.1UF/10V

0.1UF/10V

@

@

4

12

C903

C903

0.1UF/10V

0.1UF/10V

@

@

4

12

R904

R904
0Ohm

0Ohm

@

@

M_VREFDQ_DIMM0

M_VREFDQ_DIMM1

2

1

A A

Title :

Title :

Title :

DIMM_TERM

DIMM_TERM

DIMM_TERM

Zack Kuo

Zack Kuo

F83Vf

F83Vf

F83Vf

Zack Kuo

9 100Thursday, July 16, 2009

9 100Thursday, July 16, 2009

9 100Thursday, July 16, 2009

Rev

Rev

Rev

1.1

1.1

1.1

of

of

of

Engineer:

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

C

C

C

P/N

P/N

P/N

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Engineer:

<OrgAddr2>

<OrgAddr2>

<OrgAddr2>

1

5

D D

1 2

C C

B B

+VCCP_GMCH

1 2

1 2

12

C1001

C1001

0.1UF/10V

0.1UF/10V

R1004

R1004
221Ohm

221Ohm

H_SWING

R1005

R1005
75Ohm

75Ohm

1%

1%

+VCCP_GMCH

1 2

1 2

R1001

R1001

16.9Ohm

16.9Ohm

1%

1%

12

C1002

C1002

0.1UF/10V

0.1UF/10V

R1008

R1008
1KOhm

1KOhm

1%

1%

R1007

R1007
2KOhm

2KOhm

1%

1%

4

H_RCOMP

H_CPURST#<3>
H_CPUSLP#<3>

T1001T1001

3

U1001A

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_SWING
H_RCOMP

1

HVREF

U1001A

F2

H_D#_0

G8

H_D#_1

F8

H_D#_2

E6

H_D#_3

G2

H_D#_4

H6

H_D#_5

H2

H_D#_6

F6

H_D#_7

D4

H_D#_8

H3

H_D#_9

M9

H_D#_10

M11

H_D#_11

J1

H_D#_12

J2

H_D#_13

N12

H_D#_14

J6

H_D#_15

P2

H_D#_16

L2

H_D#_17

R2

H_D#_18

N9

H_D#_19

L6

H_D#_20

M5

H_D#_21

J3

H_D#_22

N2

H_D#_23

R1

H_D#_24

N5

H_D#_25

N6

H_D#_26

P13

H_D#_27

N8

H_D#_28

L7

H_D#_29

N10

H_D#_30

M3

H_D#_31

Y3

H_D#_32

AD14

H_D#_33

Y6

H_D#_34

Y10

H_D#_35

Y12

H_D#_36

Y14

H_D#_37

Y7

H_D#_38

W2

H_D#_39

AA8

H_D#_40

Y9

H_D#_41

AA13

H_D#_42

AA9

H_D#_43

AA11

H_D#_44

AD11

H_D#_45

AD10

H_D#_46

AD13

H_D#_47

AE12

H_D#_48

AE9

H_D#_49

AA2

H_D#_50

AD8

H_D#_51

AA3

H_D#_52

AD3

H_D#_53

AD7

H_D#_54

AE14

H_D#_55

AF3

H_D#_56

AC1

H_D#_57

AE3

H_D#_58

AC3

H_D#_59

AE11

H_D#_60

AE8

H_D#_61

AG2

H_D#_62

AD6

H_D#_63

C5

H_SWING

E3

H_RCOMP

C12

H_CPURST#

E11

H_CPUSLP#

A11

H_AVREF

B11

H_DVREF

CANTIGA_CHIPSET

CANTIGA_CHIPSET

HOST

HOST

H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8

H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35

H_ADS#
H_ADSTB#_0
H_ADSTB#_1

H_BNR#

H_BPRI#

H_BREQ#

H_DEFER#

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_HIT#

H_HITM#
H_LOCK#
H_TRDY#

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4

H_RS#_0
H_RS#_1
H_RS#_2

A14
C15
F16
H13
C18
M16
J13
P16
R16
N17
M13
E17
P17
F17
G20
B19
J16
E20
H16
J20
L17
A17
B17
L16
C21
J17
H20
B18
K17
B20
F21
K21
L20

H12
B16
G17
A9
F11
G12
E9
B10
AH7
AH6
J11
F9
H9
E12
H11
C9

J8
L3
Y13
Y1

L10
M7
AA5
AE6

L9
M8
AA6
AE5

B15
K13
F13
B13
B14

B6
F12
C8

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_ADS# <3>
H_ADSTB#0 <3>
H_ADSTB#1 <3>
H_BNR# <3>
H_BPRI# <3>
H_BR0# <3>
H_DEFER# <3>
H_DBSY# <3>
CLK_MCH_BCLK <29>
CLK_MCH_BCLK# <29>
H_DPWR# <3>
H_DRDY# <3>
H_HIT# <3>
H_HITM# <3>
H_LOCK# <3>
H_TRDY# <3>

H_DINV#0 <3>
H_DINV#1 <3>
H_DINV#2 <3>
H_DINV#3 <3>

H_DSTBN#0 <3>
H_DSTBN#1 <3>
H_DSTBN#2 <3>
H_DSTBN#3 <3>

H_DSTBP#0 <3>
H_DSTBP#1 <3>
H_DSTBP#2 <3>
H_DSTBP#3 <3>

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#0 <3>
H_RS#1 <3>
H_RS#2 <3>

2

H_A#[35:3]<3>

H_REQ#[4:0]<3>

H_D#[63:0]<3>

H_A#[35:3]

H_REQ#[4:0]

H_D#[63:0]

1

Cap 0.1uF within 100 mils from GMCH

A A

Title :

Title :

Title :

Cantiga -- CPU (1)

Cantiga -- CPU (1)

Cantiga -- CPU (1)

Zack Kuo

Zack Kuo

Engineer:

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

P/N

P/N

P/N

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Engineer:

F83Vf

F83Vf

F83Vf

<OrgAddr2>

<OrgAddr2>

<OrgAddr2>

Zack Kuo

Rev

Rev

Rev

1.1

1.1

10 100Thursday, July 16, 2009

10 100Thursday, July 16, 2009

1

10 100Thursday, July 16, 2009

1.1

of

of

of

5

T1105T1105
T1116T1116
T1118T1118

D D

+1.5V

R1105

R1105
1KOhm

1KOhm

1%

1%

1 2

SM_RCOMP_VOH

12

C1101

C1101

2.2UF/6.3V

2.2UF/6.3V

R1106

R1106

3.01KOHM

3.01KOHM

1%

1%

1 2

SM_RCOMP_VOL

12

C1103

C1103

R1107

R1107

2.2UF/6.3V

2.2UF/6.3V

1KOhm

1KOhm

1%

1%

1 2

C C

MCH_BSEL0<29>
MCH_BSEL1<29>
MCH_BSEL2<29>

MCH_CFG_5<15>
MCH_CFG_6<15>
MCH_CFG_7<15>

MCH_CFG_9<15>
MCH_CFG_10<15>

MCH_CFG_12<15>
MCH_CFG_13<15>

MCH_CFG_16<15>

MCH_CFG_19<15>

B B

PM_SYNC#<22>

H_DPRSTP#<3,20,80>
PM_EXTTS#0<7>
PM_EXTTS#1<8>

PM_PWROK<22,30>

H_THRMTRIP#<3,5,20,32>

PM_DPRSLPVR<22,80>

+3VS

R1103 10KOhmR1103 10KOhm
R1104 10KOhmR1104 10KOhm

A A

MCH_CFG_20<15>

SL1102 R0402SL1102 R0402

PM_EXTTS#0
PM_EXTTS#1

SL1103 R0402SL1103 R0402

BUF_PLT_RST#<5,21,30,33,41,53,70>

SL1104 R0402SL1104 R0402

PM_EXTTS#0

12

PM_EXTTS#1

12

5

T1119T1119

SL1101

SL1101

1 2

R0402

R0402

12

C1102

C1102

0.01UF/16V

0.01UF/16V

12

C1104

C1104

0.01UF/16V

0.01UF/16V

T1102T1102
T1101T1101

T1115T1115

T1107T1107

T1103T1103
T1108T1108

T1104T1104
T1109T1109

1 2

1 2
1 2

RX1101 100OhmRX1101 100Ohm

1 2

M36
N36
R33

T33

AH9
AH10
AH12
AH13

K12

AL34

1

AK34

1

AN35

1

AM35

1

T24
B31

AJ6

M1

AY21

A47

BG23

BF23

BH18

BF18

T25

R25

P25
P20

1

P24

1

C25

N24

M24

E21

1

C23

C24

N21

1

P21
T21

R20

1

M20

1

L21

H21

1

P29

1

R28

T28

R29

B7

N33

P32
AT40
AT11

T20

R32

BG48

BF48

BD48
BC48
BH47
BG47
BE47
BH46

BF46

BG45
BH44
BH43

BH6
BH5
BG4
BH3
BF3
BH2
BG2
BE2
BG1
BF1
BD1
BC1

F1

CANTIGA_CHIPSET

CANTIGA_CHIPSET

U1001B

U1001B

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14

RSVD15
RSVD16
RSVD17

RSVD20

RSVD21
RSVD22
RSVD23
RSVD24
RSVD25

CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20

PM_SYNC#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR

NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_23
NC_24
NC_25

4

AP24

SA_CK_0

AT21

SA_CK_1

AV24

SB_CK_0

AU20

SB_CK_1

AR24

SA_CK#_0

AR21

SA_CK#_1

AU24

SB_CK#_0

AV20

SB_CK#_1

BC28

SA_CKE_0

AY28

SA_CKE_1

AY36

SB_CKE_0

RSVD

RSVD

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH

SM_RCOMP_VOL

SM_PWROK

DDR CONTROL/COMPENSATION

DDR CONTROL/COMPENSATION

SM_DRAMRST#
DPLL_REF_CLK

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

CLK

CLK

CFG

CFG

DMI

DMI

PM

NC

NC

PM

GFX_VR_EN

GRAPHICS VID

GRAPHICS VID

MEHDA

MEHDA

DDPC_CTRLCLK

DDPC_CTRLDATA

SDVO_CTRLCLK

SDVO_CTRLDATA

MISC

MISC

4

SB_CKE_1

SA_CS#_0
SA_CS#_1
SB_CS#_0
SB_CS#_1

SA_ODT_0
SA_ODT_1
SB_ODT_0
SB_ODT_1

SM_VREF
SM_REXT

PEG_CLK

PEG_CLK#

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3

DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3

GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4

CL_CLK

CL_DATA

CL_PWROK

CL_RST#

CL_VREF

CLKREQ#

ICH_SYNC#

TSATN#

HDA_BCLK
HDA_RST#

HDA_SDI

HDA_SDO

HDA_SYNC

BB36
BA17

AY16
AV16
AR13

BD17
AY17
BF15
AY13

BG22
BH21

BF28
BH28

AV42
AR36
BF17
BC36

B38
A38
E41
F41

F43
E43

AE41
AE37
AE47
AH39

AE40
AE38
AE48
AH40

AE35
AE43
AE46
AH42

AD35
AE44
AF46
AH43

B33
B32
G33
F33
E33

C34

AH37
AH36
AN36
AJ35
AH34

N28
M28
G36
E36
K36
H36

B12

B28
B30
B29
C29
A28

M_CLK_DDR0 <7>
M_CLK_DDR1 <7>
M_CLK_DDR2 <8>
M_CLK_DDR3 <8>

M_CLK_DDR0# <7>
M_CLK_DDR1# <7>
M_CLK_DDR2# <8>
M_CLK_DDR3# <8>

M_CKE0 <7>
M_CKE1 <7>
M_CKE2 <8>
M_CKE3 <8>

M_CS#0 <7>
M_CS#1 <7>
M_CS#2 <8>
M_CS#3 <8>

M_ODT0 <7>
M_ODT1 <7>
M_ODT2 <8>
M_ODT3 <8>

M_RCOMP
M_RCOMP#

SM_RCOMP_VOH
SM_RCOMP_VOL

1 2

R1121 499Ohm 1%R1121 499Ohm 1%

CLK_MCH_3GPLL <29>
CLK_MCH_3GPLL# <29>

DMI_TXN0 <21>
DMI_TXN1 <21>
DMI_TXN2 <21>
DMI_TXN3 <21>

DMI_TXP0 <21>
DMI_TXP1 <21>
DMI_TXP2 <21>
DMI_TXP3 <21>

DMI_RXN0 <21>
DMI_RXN1 <21>
DMI_RXN2 <21>
DMI_RXN3 <21>

DMI_RXP0 <21>
DMI_RXP1 <21>
DMI_RXP2 <21>
DMI_RXP3 <21>

CL_CLK0 <22>
CL_DATA0 <22>

CL_RST#0 <22>

T1120T1120

1

MCH_ICH_SYNC# <22>

T1117T1117

1

R1112 80.6Ohm 1%R1112 80.6Ohm 1%

1 2

R1117 80.6Ohm 1%R1117 80.6Ohm 1%

1 2

SL1105 R0402SL1105 R0402

1 2

12

C1105

C1105

0.01UF/16V

0.01UF/16V

@

@

PM_PWROK

CL_VREF

12

C1106

C1106

0.1UF/10V

0.1UF/10V

+VCCP_GMCH

R1126 56OHMR1126 56OHM

12

3

+1.5V

M_DRAMRST# <7,8>

+VCCP_GMCH

1 2

1 2

3

+0.75V

M_VREF_MCH <7,8,9>
DDR_PWRGD <83,92>

R1108

R1108
1KOhm

1KOhm

1%

1%

R1102

R1102
499Ohm

499Ohm

1%

1%

U1001C

U1001C

L32

L_BKLT_CTRL

G32

L_BKLT_EN

M32

L_CTRL_CLK

M33

L_CTRL_DATA

K33

L_DDC_CLK

J33

L_DDC_DATA

M29

L_VDD_EN

C44

LVDS_IBG

B43

LVDS_VBG

E37

LVDS_VREFH

E38

LVDS_VREFL

C41

LVDSA_CLK#

C40

LVDSA_CLK

B37

LVDSB_CLK#

A37

LVDSB_CLK

H47

LVDSA_DATA#_0

E46

LVDSA_DATA#_1

G40

LVDSA_DATA#_2

A40

LVDSA_DATA#_3

H48

LVDSA_DATA_0

D45

LVDSA_DATA_1

F40

LVDSA_DATA_2

B40

LVDSA_DATA_3

A41

LVDSB_DATA#_0

H38

LVDSB_DATA#_1

G37

LVDSB_DATA#_2

J37

LVDSB_DATA#_3

B42

LVDSB_DATA_0

G38

LVDSB_DATA_1

F37

LVDSB_DATA_2

K37

LVDSB_DATA_3

F25

TVA_DAC

H25

TVB_DAC

K25

TVC_DAC

H24

TV_RTN

C31

TV_DCONSEL_0

E32

TV_DCONSEL_1

E28

CRT_BLUE

G28

CRT_GREEN

J28

CRT_RED

G29

CRT_IRTN

H32

CRT_DDC_CLK

J32

CRT_DDC_DATA

J29

CRT_HSYNC

E29

CRT_TVO_IREF

L29

CRT_VSYNC

CANTIGA_CHIPSET

CANTIGA_CHIPSET

2

PEGCOMP

PEG_COMPI

PEG_COMPO

PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6

LVDS

LVDS

TV

TV

VGA

VGA

2

PEG_RX#_7
PEG_RX#_8

PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15

PEG_RX_10

PEG_RX_11

PEG_RX_12

PEG_RX_13

PEG_RX_14

PEG_RX_15

PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8

PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PEG_TX#_12

PCI-EXPRESS GRAPHICS

PCI-EXPRESS GRAPHICS

PEG_TX#_13
PEG_TX#_14
PEG_TX#_15

PEG_TX_10

PEG_TX_11

PEG_TX_12

PEG_TX_13

PEG_TX_14

PEG_TX_15

T37
T36

PCIENB_RXN0

H44

PCIENB_RXN1

J46

PCIENB_RXN2

L44

PCIENB_RXN3

L40

PCIENB_RXN4

N41

PCIENB_RXN5

P48

PCIENB_RXN6

N44

PCIENB_RXN7

T43

PCIENB_RXN8

U43

PCIENB_RXN9

Y43

PCIENB_RXN10

Y48

PCIENB_RXN11

Y36

PCIENB_RXN12

AA43

PCIENB_RXN13

AD37

PCIENB_RXN14

AC47

PCIENB_RXN15

AD39

PCIENB_RXP0

H43

PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9

PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9

PCIENB_RXP1

J44

PCIENB_RXP2

L43

PCIENB_RXP3

L41

PCIENB_RXP4

N40

PCIENB_RXP5

P47

PCIENB_RXP6

N43

PCIENB_RXP7

T42

PCIENB_RXP8

U42

PCIENB_RXP9

Y42

PCIENB_RXP10

W47

PCIENB_RXP11

Y37

PCIENB_RXP12

AA42

PCIENB_RXP13

AD36

PCIENB_RXP14

AC48

PCIENB_RXP15

AD40

PCIENB_TXN0

J41

PCIENB_TXN1

M46

PCIENB_TXN2

M47

PCIENB_TXN3

M40

PCIENB_TXN4

M42

PCIENB_TXN5

R48

PCIENB_TXN6

N38

PCIENB_TXN7

T40

PCIENB_TXN8

U37

PCIENB_TXN9

U40

PCIENB_TXN10

Y40

PCIENB_TXN11

AA46

PCIENB_TXN12

AA37

PCIENB_TXN13

AA40

PCIENB_TXN14

AD43

PCIENB_TXN15

AC46

PCIENB_TXP0

J42

PCIENB_TXP1

L46

PCIENB_TXP2

M48

PCIENB_TXP3

M39

PCIENB_TXP4

M43

PCIENB_TXP5

R47

PCIENB_TXP6

N37

PCIENB_TXP7

T39

PCIENB_TXP8

U36

PCIENB_TXP9

U39

PCIENB_TXP10

Y39

PCIENB_TXP11

Y46

PCIENB_TXP12

AA36

PCIENB_TXP13

AA39

PCIENB_TXP14

AD42

PCIENB_TXP15

AD46

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

P/N

P/N

P/N

Date: Sheet

Date: Sheet

Date: Sheet

1

+VCC_PEG

1%

1%

1 2

R1101 49.9Ohm

R1101 49.9Ohm

PCIENB_RXN[15:0] <70>

PCIENB_RXP[15:0] <70>

CX1138 0.1UF/10VCX1138 0.1UF/10V

1 2

CX1121 0.1UF/10VCX1121 0.1UF/10V

1 2

CX1148 0.1UF/10VCX1148 0.1UF/10V

1 2

CX1134 0.1UF/10VCX1134 0.1UF/10V

1 2

CX1147 0.1UF/10VCX1147 0.1UF/10V

1 2

CX1143 0.1UF/10VCX1143 0.1UF/10V

1 2

CX1133 0.1UF/10VCX1133 0.1UF/10V

1 2

CX1144 0.1UF/10VCX1144 0.1UF/10V

1 2

CX1137 0.1UF/10VCX1137 0.1UF/10V

1 2

CX1117 0.1UF/10VCX1117 0.1UF/10V

1 2

CX1118 0.1UF/10VCX1118 0.1UF/10V

1 2

CX1120 0.1UF/10VCX1120 0.1UF/10V

1 2

CX1122 0.1UF/10VCX1122 0.1UF/10V

1 2

CX1146 0.1UF/10VCX1146 0.1UF/10V

1 2

CX1140 0.1UF/10VCX1140 0.1UF/10V

1 2

CX1119 0.1UF/10VCX1119 0.1UF/10V

1 2

CX1127 0.1UF/10VCX1127 0.1UF/10V

1 2

CX1145 0.1UF/10VCX1145 0.1UF/10V

1 2

CX1128 0.1UF/10VCX1128 0.1UF/10V

1 2

CX1142 0.1UF/10VCX1142 0.1UF/10V

1 2

CX1139 0.1UF/10VCX1139 0.1UF/10V

1 2

CX1125 0.1UF/10VCX1125 0.1UF/10V

1 2

CX1123 0.1UF/10VCX1123 0.1UF/10V

1 2

CX1124 0.1UF/10VCX1124 0.1UF/10V

1 2

CX1135 0.1UF/10VCX1135 0.1UF/10V

1 2

CX1126 0.1UF/10VCX1126 0.1UF/10V

1 2

CX1141 0.1UF/10VCX1141 0.1UF/10V

1 2

CX1131 0.1UF/10VCX1131 0.1UF/10V

1 2

CX1129 0.1UF/10VCX1129 0.1UF/10V

1 2

CX1130 0.1UF/10VCX1130 0.1UF/10V

1 2

CX1136 0.1UF/10VCX1136 0.1UF/10V

1 2

CX1132 0.1UF/10VCX1132 0.1UF/10V

1 2

PCIEG_RXN[15:0] <70>
PCIEG_RXP[15:0] <70>

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

F83Vf

F83Vf

F83Vf

<OrgAddr2>

<OrgAddr2>

<OrgAddr2>

1

PCIEG_RXN0
PCIEG_RXN1
PCIEG_RXN2
PCIEG_RXN3
PCIEG_RXN4
PCIEG_RXN5
PCIEG_RXN6
PCIEG_RXN7
PCIEG_RXN8
PCIEG_RXN9
PCIEG_RXN10
PCIEG_RXN11
PCIEG_RXN12
PCIEG_RXN13
PCIEG_RXN14
PCIEG_RXN15

PCIEG_RXP0
PCIEG_RXP1
PCIEG_RXP2
PCIEG_RXP3
PCIEG_RXP4
PCIEG_RXP5
PCIEG_RXP6
PCIEG_RXP7
PCIEG_RXP8
PCIEG_RXP9
PCIEG_RXP10
PCIEG_RXP11
PCIEG_RXP12
PCIEG_RXP13
PCIEG_RXP14
PCIEG_RXP15

Cantiga-DDR2/PEG(2)

Cantiga-DDR2/PEG(2)

Cantiga-DDR2/PEG(2)

Zack Kuo

Zack Kuo

Zack Kuo

11 100Thursday, July 16, 2009

11 100Thursday, July 16, 2009

11 100Thursday, July 16, 2009

Rev

Rev

Rev

1.1

1.1

1.1

of

of

of

5

D D

M_A_DQ[0:63]<7> M_B_DQ[0:63]<8>

C C

B B

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

U1001D

U1001D

AJ38
AJ41

AN38

AM38

AJ36
AJ40

AM44
AM42

AN43
AN44
AU40
AT38
AN41
AN39
AU44
AU42
AV39
AY44
BA40
BD43
AV41
AY43
BB41
BC40
AY37
BD38
AV37
AT36
AY38
BB38
AV36

AW36

BD13
AU11
BC11
BA12
AU13
AV13
BD12
BC12

BB9
BA9

AU10

AV9

BA11

BD9
AY8
BA6
AV5
AV7
AT9
AN8
AU5
AU6
AT5

AN10

AM11

AM5

AJ9
AJ8

AN12

AM13

AJ11
AJ12

CANTIGA_CHIPSET

CANTIGA_CHIPSET

SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_BS_0
SA_BS_1
SA_BS_2

SA_RAS#
SA_CAS#

SA_WE#

SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6

SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8

SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14

4

BD21
BG18
AT25

BB20
BD20
AY20

AM37
AT41
AY41
AU39
BB12
AY6
AT7
AJ5

AJ44
AT44
BA43
BC37
AW12
BC8
AU8
AM7
AJ43
AT43
BA44
BD37
AY12
BD8
AU9
AM8

BA21
BC24
BG24
BH24
BG25
BA24
BD24
BG27
BF25
AW24
BC21
BG26
BH26
BH17
AY25

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14

M_A_BS0 <7>
M_A_BS1 <7>
M_A_BS2 <7>

M_A_RAS# <7>
M_A_CAS# <7>
M_A_WE# <7>

M_A_DM[0..7] <7>

M_A_DQS[0:7] <7>

M_A_DQS#[0:7] <7>

M_A_A[0:14] <7>

3

U1001E

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

U1001E

AK47

SB_DQ_0

AH46

SB_DQ_1

AP47

SB_DQ_2

AP46

SB_DQ_3

AJ46

SB_DQ_4

AJ48

SB_DQ_5

AM48

SB_DQ_6

AP48

SB_DQ_7

AU47

SB_DQ_8

AU46

SB_DQ_9

BA48

SB_DQ_10

AY48

SB_DQ_11

AT47

SB_DQ_12

AR47

SB_DQ_13

BA47

SB_DQ_14

BC47

SB_DQ_15

BC46

SB_DQ_16

BC44

SB_DQ_17

BG43

SB_DQ_18

BF43

SB_DQ_19

BE45

SB_DQ_20

BC41

SB_DQ_21

BF40

SB_DQ_22

BF41

SB_DQ_23

BG38

SB_DQ_24

BF38

SB_DQ_25

BH35

SB_DQ_26

BG35

SB_DQ_27

BH40

SB_DQ_28

BG39

SB_DQ_29

BG34

SB_DQ_30

BH34

SB_DQ_31

BH14

SB_DQ_32

BG12

SB_DQ_33

BH11

SB_DQ_34

BG8

SB_DQ_35

BH12

SB_DQ_36

BF11

SB_DQ_37

BF8

SB_DQ_38

BG7

SB_DQ_39

BC5

SB_DQ_40

BC6

SB_DQ_41

AY3

SB_DQ_42

AY1

SB_DQ_43

BF6

SB_DQ_44

BF5

SB_DQ_45

BA1

SB_DQ_46

BD3

SB_DQ_47

AV2

SB_DQ_48

AU3

SB_DQ_49

AR3

SB_DQ_50

AN2

SB_DQ_51

AY2

SB_DQ_52

AV1

SB_DQ_53

AP3

SB_DQ_54

AR1

SB_DQ_55

AL1

SB_DQ_56

AL2

SB_DQ_57

AJ1

SB_DQ_58

AH1

SB_DQ_59

AM2

SB_DQ_60

AM3

SB_DQ_61

AH3

SB_DQ_62

AJ3

SB_DQ_63

CANTIGA_CHIPSET

CANTIGA_CHIPSET

2

BC16

SB_BS_0

BB17

SB_BS_1

BB33

SB_BS_2

AU17

SB_RAS#

BG16

SB_CAS#

BF14

SB_WE#

AM47

SB_DM_0

AY47

SB_DM_1

BD40

SB_DM_2

BF35

SB_DM_3

BG11

SB_DM_4

BA3

SB_DM_5

AP1

SB_DM_6

AK2

SB_DM_7

AL47

SB_DQS_0

AV48

SB_DQS_1

BG41

SB_DQS_2

BG37

SB_DQS_3

BH9

SB_DQS_4

BB2

SB_DQS_5

AU1

SB_DQS_6

AN6

SB_DQS_7

SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8

SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14

AL46
AV47
BH41
BH37
BG9
BC2
AT2
AN5

AV17
BA25
BC25
AU25
AW25
BB28
AU28
AW28
AT33
BD33
BB16
AW33
AY33
BH15
AU33

SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

M_B_BS0 <8>
M_B_BS1 <8>
M_B_BS2 <8>

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14

M_B_RAS# <8>
M_B_CAS# <8>
M_B_WE# <8>

M_B_DM[0:7] <8>

M_B_DQS[0:7] <8>

M_B_DQS#[0:7] <8>

M_B_A[0:14] <8>

1

A A

Title :

Title :

Title :

Cantiga--DDR2 bus (3)

Cantiga--DDR2 bus (3)

Cantiga--DDR2 bus (3)

Zack Kuo

Zack Kuo

Engineer:

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

P/N

P/N

P/N

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Engineer:

F83Vf

F83Vf

F83Vf

<OrgAddr2>

<OrgAddr2>

<OrgAddr2>

Zack Kuo

Rev

Rev

Rev

1.1

1.1

12 100Thursday, July 16, 2009

12 100Thursday, July 16, 2009

12 100Thursday, July 16, 2009

1

1.1

of

of

of

5

U1001G

AP33
AN33
BH32
BG32
BF32
BD32
BC32
BB32
BA32
AY32

AW32

AV32
AU32
AT32
AR32
AP32
AN32
BH31
BG31
BF31
BG30
BH29
BG29
BF29
BD29
BC29
BB29
BA29
AY29

AW29

AV29
AU29
AT29
AR29
AP29

BA36
BB24
BD16

BB21
AW16
AW13

AT13

AE25

AB25

AA25

AE24

AC24

AA24

AE23

AC23

AB23

AA23

AJ21
AG21
AE21
AC21
AA21

AH20
AF20
AE20
AC20
AB20
AA20

AM15

AL15
AE15

AJ15
AH15
AG15
AF15
AB15
AA15

AN14

AM14

AJ14

1

AH14

1

U1001G

VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35

VCC_SM_36/NC
VCC_SM_37/NC
VCC_SM_38/NC
VCC_SM_39/NC
VCC_SM_40/NC
VCC_SM_41/NC
VCC_SM_42/NC

Y26

VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7

Y24

VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17

Y21

VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24

T17

VCC_AXG_25

T16

VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
VCC_AXG_35

Y15

VCC_AXG_36

V15

VCC_AXG_37

U15

VCC_AXG_38
VCC_AXG_39
VCC_AXG_40

U14

VCC_AXG_41

T14

VCC_AXG_42

VCC_AXG_SENSE
VSS_AXG_SENSE

VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22

POWER

POWER

VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30

VCC SMVCC GFX

VCC SMVCC GFX

VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55
VCC_AXG_NCTF_56

VCC GFX NCTF

VCC GFX NCTF

VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60

VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8
VCC_AXG_NCTF_9

VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7

VCC SM LF

VCC SM LF

+1.5V_GMCH

D D

C C

B B

Max: 3000 mA

T1301T1301
T1302T1302

W28
V28
W26
V26
W25
V25
W24
V24
W23
V23
AM21
AL21
AK21
W21
V21
U21
AM20
AK20
W20
U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
AA19
Y19
W19
V19
U19
AM17
AK17
AH17
AG17
AF17
AE17
AC17
AB17
Y17
W17
V17
AM16
AL16
AK16
AJ16
AH16
AG16
AF16
AE16
AC16
AB16
AA16
Y16
W16
V16
U16

AV44
BA37
AM40
AV21
AY5
AM10
BB13

4

+VCCP

12

C1309

C1309

0.1UF/10V

0.1UF/10V

12

C1310

C1310

0.1UF/10V

0.1UF/10V

12

C1311

C1311

0.22UF/6.3V

0.22UF/6.3V

12

C1312

C1312

0.22UF/6.3V

0.22UF/6.3V

+1.5V

12

C1313

C1313

0.47UF/6.3V

0.47UF/6.3V

3

12

12

+

+

C1314

C1314

1UF/6.3V

1UF/6.3V

CE1301

CE1301
100UF/2V

100UF/2V

12

+

+

CE1302

CE1302
100UF/2V

100UF/2V

12

Max: 1211 mA

12

C1302

C1302
22UF/6.3V

22UF/6.3V

Max: 4140 mA

12

C1306

C1306
22UF/6.3V

22UF/6.3V

C1301

C1301

1UF/6.3V

1UF/6.3V

12

C1303

C1303

0.22UF/6.3V

0.22UF/6.3V

12

C1307

C1307
22UF/6.3V

22UF/6.3V

12

C1304

C1304

0.22UF/6.3V

0.22UF/6.3V

+1.5V_GMCH

12

C1308

C1308

0.1UF/10V

0.1UF/10V

+VCCP_GMCH

12

C1305

C1305

0.1UF/10V

0.1UF/10V

2

U1001F

U1001F

AG34

VCC_1

AC34

VCC_2

AB34

VCC_3

AA34

VCC_4

Y34

VCC_5

V34

VCC_6

U34

VCC_7

AM33

VCC_8

AK33

VCC_9

AJ33

VCC_10

AG33

VCC_11

AF33

VCC_12

AE33

VCC_13

AC33

VCC_14

AA33

VCC_15

Y33

VCC_16

W33

VCC_17

V33

VCC_18

U33

VCC_19

AH28

VCC_20

AF28
AC28
AA28
AJ26

AG26

AE26
AC26
AH25

AG25

AF25

AG24

AJ23
AH23
AF23

T32

CANTIGA_CHIPSET

CANTIGA_CHIPSET

VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34

VCC_35

VCC CORE

VCC CORE

POWER

POWER

VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
VCC_NCTF_4
VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8

VCC_NCTF_9
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31

VCC NCTF

VCC NCTF

VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_NCTF_43
VCC_NCTF_44

AM32
AL32
AK32
AJ32
AH32
AG32
AE32
AC32
AA32
Y32
W32
U32
AM30
AL30
AK30
AH30
AG30
AF30
AE30
AC30
AB30
AA30
Y30
W30
V30
U30
AL29
AK29
AJ29
AH29
AG29
AE29
AC29
AA29
Y29
W29
V29
AL28
AK28
AL26
AK26
AK25
AK24
AK23

1

+VCCP_GMCH

A A

CANTIGA_CHIPSET

CANTIGA_CHIPSET

Title :

Title :

Title :

Cantiga--POWER (4)

Cantiga--POWER (4)

Cantiga--POWER (4)

Zack Kuo

Zack Kuo

Engineer:

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

P/N

P/N

P/N

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Engineer:

F83Vf

F83Vf

F83Vf

<OrgAddr2>

<OrgAddr2>

<OrgAddr2>

Zack Kuo

Rev

Rev

Rev

1.1

1.1

13 100Thursday, July 16, 2009

13 100Thursday, July 16, 2009

1

13 100Thursday, July 16, 2009

1.1

of

of

of

5

4

3

2

1

+VCCP_GMCH

D D

C C

B B

A A

L1403

L1403
120Ohm/100Mhz

120Ohm/100Mhz

21

10UF/6.3V

10UF/6.3V

L1404

L1404
120Ohm/100Mhz

120Ohm/100Mhz

21

L1405

L1405
120Ohm/100Mhz

120Ohm/100Mhz

21

C1407

C1407

C1408

C1408

10UF/6.3V

10UF/6.3V

12

12

+1.5VS

C1419

C1419

0.1UF/10V

0.1UF/10V

12

SL1404

SL1404

1 2

R0805

R0805

0.01UF/16V

0.01UF/16V

12

+VCCP_GMCH

DDR2: 720mA
DDR3: 748mA

C1451

C1451

C1412

C1412

0.1UF/10V

0.1UF/10V

12

C1446

C1446

4.7UF/6.3V

4.7UF/6.3V

12

C1426

C1426

0.1UF/10V

0.1UF/10V

1 2

+VCCP_PEGPLL

+VCCP_HPLL

+VCCP_MPLL

+VCCP_GMCH

DDR2: 26mA
DDR3: 38mA

12

C1443

C1443

0.1UF/10V

0.1UF/10V

+VCCP_GMCH

12

+

+

158mA

+1.5VS

0.414mA

SL1402

SL1402

1 2

R0805

R0805

CE1407

CE1407
100UF/2.5V

100UF/2.5V

@

@

1.1

SL1403

SL1403

1 2

R0805

R0805

12

C1440

C1440

0.1UF/10V

0.1UF/10V

24mA
140mA

SL1401

SL1401

1 2

R0603

R0603

C1448

C1448

4.7UF/6.3V

4.7UF/6.3V

+VCCASM_GMCH

12

C1409

C1409
10UF/6.3V

10UF/6.3V

12

1.1

+VCCP_PEGPLL

+VCCP_HPLL
+VCCP_MPLL

+VCCA_PEG_GMCH

12

C1411

C1411

0.1UF/10V

0.1UF/10V

+VCCP_PEGPLL

12

C1445

C1445

4.7UF/6.3V

4.7UF/6.3V

+VCCA_SM_CK

12

C1410

C1410
10UF/6.3V

10UF/6.3V

12

C1415

C1415
1UF/6.3V

1UF/6.3V

12

C1437

C1437

0.1UF/10V

0.1UF/10V

12

50mA

C1441

C1441

0.1UF/10V

0.1UF/10V

U1001H

U1001H

B27

VCCA_CRT_DAC_1

A26

VCCA_CRT_DAC_2

A25

VCCA_DAC_BG

B25

VSSA_DAC_BG

F47

VCC_DPLLA

L48

VCC_DPLLB

AD1

VCCA_HPLL

AE1

VCCA_MPLL

J48

VCCA_LVDS

J47

VSSA_LVDS

AD48

VCCA_PEG_BG

AA48

VCCA_PEG_PLL

AR20

VCCA_SM_1

AP20

VCCA_SM_2

AN20

VCCA_SM_3

AR17

VCCA_SM_4

AP17

VCCA_SM_5

AN17

VCCA_SM_6

AT16

VCCA_SM_7

AR16

VCCA_SM_8

AP16

VCCA_SM_9

AP28

VCCA_SM_CK_1

AN28

VCCA_SM_CK_2

AP25

VCCA_SM_CK_3

AN25

VCCA_SM_CK_4

AN24

VCCA_SM_CK_5

AM28

VCCA_SM_CK_NCTF_1

AM26

VCCA_SM_CK_NCTF_2

AM25

VCCA_SM_CK_NCTF_3

AL25

VCCA_SM_CK_NCTF_4

AM24

VCCA_SM_CK_NCTF_5

AL24

VCCA_SM_CK_NCTF_6

AM23

VCCA_SM_CK_NCTF_7

AL23

VCCA_SM_CK_NCTF_8

B24

VCCA_TV_DAC_1

A24

VCCA_TV_DAC_2

A32

VCC_HDA

M25

VCCD_TVDAC

L28

VCCD_QDAC

AF1

VCCD_HPLL

AA47

VCCD_PEG_PLL

M38

VCCD_LVDS_1

L37

VCCD_LVDS_2

CANTIGA_CHIPSET

CANTIGA_CHIPSET

CRTPLLA PEGA SM

CRTPLLA PEGA SM

A LVDS

A LVDS

POWER

POWER

A CK

A CK

TV

TV

HDA

HDA

D TV/CRT

D TV/CRT

LVDS

LVDS

VCC_AXF_1
VCC_AXF_2
VCC_AXF_3

AXF

AXF

VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4

SM CK

SM CK

VCC_TX_LVDS

HV

HV

VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
VCC_PEG_5

PEG

PEG

VCC_DMI_1
VCC_DMI_2
VCC_DMI_3
VCC_DMI_4

DMI

DMI

VTTLF

VTTLF

VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8

VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15

VTT

VTT

VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25

VCC_HV_1
VCC_HV_2
VCC_HV_3

VTTLF1
VTTLF2
VTTLF3

U13
T13
U12
T12
U11
T11
U10
T10
U9
T9
U8
T8
U7
T7
U6
T6
U5
T5
V3
U3
V2
U2
T2
V1
U1

B22
B21
A21

BF21
BH20
BG20
BF20

K47
C35

B35
A35

V48
U48
V47
U47
U46

AH48
AF48
AH47
AG47

A8
L1
AB2

12

C1433

C1433

0.47UF/6.3V

0.47UF/6.3V

+VCCP_GMCH_VTT

+VCCAXF_GMCH

12

C1416

C1416

0.1UF/10V

0.1UF/10V

12

12

C1406

C1406
1UF/6.3V

1UF/6.3V

Max:106 mA

Max: 1782 mA

12

C1434

C1434

0.47UF/6.3V

0.47UF/6.3V

+VCC_DMI

Max: 456 mA

C1450

C1450

4.7UF/6.3V

4.7UF/6.3V

+3VS_HV

12

C1435

C1435

0.47UF/6.3V

0.47UF/6.3V

12

C1405

C1405
10UF/6.3V

10UF/6.3V

@

@

852mA

12

C1463

C1463

4.7UF/6.3V

4.7UF/6.3V

322mA

12

12

C1417

C1417

0.1UF/10V

0.1UF/10V

12

L1409

L1409
120Ohm/100Mhz

120Ohm/100Mhz

C1418

C1418
10UF/6.3V

10UF/6.3V

106mA

C1447

C1447

4.7UF/6.3V

4.7UF/6.3V

12

C1421

C1421

0.1UF/10V

0.1UF/10V

12

C1404

C1404

0.47UF/6.3V

0.47UF/6.3V

SL1408

SL1408

1 2

R0805

R0805

+1.5V_GMCH

21

DDR2: 124mA
DDR3: 150mA

SL1407

SL1407

1 2

R0805

R0805

+VCC_PEG

12

C1444

C1444
22UF/6.3V

22UF/6.3V

SL1405

SL1405

1 2

R0805

R0805

1 2

12

+

+

CE1401

CE1401
100UF/2.5V

100UF/2.5V

+VCCP_GMCH

12

+

+

CE1406

CE1406
100UF/2V

100UF/2V

SL1409

SL1409

R0805

R0805

+VCCP_GMCH

1

2

3

R1402

R1402
10Ohm

10Ohm

1%

1%

1 2

SL1406

SL1406

1 2

R0805

R0805

+VCC_PEG

+VCCP_GMCH

D1401

D1401
BAT54C

BAT54C

+3VS

+VCCP_GMCH

Title :

Title :

Title :

Cantiga-POWER(5)

Cantiga-POWER(5)

Cantiga-POWER(5)

Zack Kuo

Zack Kuo

Engineer:

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

P/N

P/N

P/N

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Engineer:

F83Vf

F83Vf

F83Vf

<OrgAddr2>

<OrgAddr2>

<OrgAddr2>

Zack Kuo

Rev

Rev

Rev

1.1

1.1

14 100Thursday, July 16, 2009

14 100Thursday, July 16, 2009

1

14 100Thursday, July 16, 2009

1.1

of

of

of

5

4

3

2

1

AM36

AE36

P36

L36

J36

F36

B36

AH35

AA35

Y35

U35

T35

BF34

AM34

AJ34

AF34

AE34

W34

B34

A34

BG33

BC33

BA33

AV33

AR33

AL33

AH33

AB33

P33

L33

H33

N32

K32

F32

C32

A31

AN29

T29

N29

K29

H29

F29

A29

BG28

BD28

BA28

AV28

AT28

AR28

AJ28

AG28

AE28

AB28

Y28

P28

K28

H28

F28

C28

BF26

AH26

AF26

AB26

AA26

C26

B26

BH25

BD25

BB25

AV25

AR25

AJ25

AC25

Y25

N25

L25

J25

G25

E25

BF24

AT24

AH24

AB24

L24

AY24

AJ24

AD12

VSS_100

VSS_101

VSS_102

VSS_103

VSS_104

VSS_105

VSS_106

VSS_107

VSS_108

VSS_109

VSS_110

VSS_111

VSS_112

VSS_113

VSS_114

VSS_115

VSS_116

VSS_117

VSS_118

VSS_119

VSS_120

VSS_121

VSS_122

VSS_123

VSS_124

VSS_125

VSS_126

VSS_127

VSS_128

VSS_129

VSS_130

VSS_131

VSS_132

VSS_133

VSS_134

VSS_135

VSS_136

VSS_137

VSS_138

VSS_139

VSS_140

VSS_141

VSS_142

VSS_143

VSS_144

VSS_145

VSS_146

VSS_147

VSS_148

VSS_149

VSS_150

VSS_151

VSS_152

VSS_153

VSS_154

VSS_155

VSS_156

VSS_157

VSS_158

VSS_159

VSS_160

VSS_161

VSS_162

VSS_163

VSS_164

VSS_165

VSS_166

VSS_167

VSS_168

VSS_169

VSS_170

VSS_171

VSS_172

VSS_173

VSS_174

VSS_175

VSS_176

VSS_177

VSS_178

VSS_179

VSS_182

VSS_184

VSS_181

VSS_183

VSS_180

D D

VSS

VSS

VSS_1

VSS_2

VSS_3

VSS_4

VSS_5

VSS_6

VSS_7

VSS_8

VSS_9

VSS_10

VSS_11

VSS_12

VSS_13

VSS_14

VSS_15

VSS_16

VSS_17

VSS_19

VSS_20

VSS_21

VSS_22

VSS_23

VSS_24

VSS_25

VSS_26

VSS_27

VSS_28

VSS_29

VSS_30

VSS_31

VSS_32

VSS_33

VSS_34

VSS_35

VSS_36

VSS_37

VSS_38

VSS_39

VSS_40

VSS_41

VSS_42

VSS_43

VSS_44

VSS_45

VSS_46

VSS_47

VSS_48

VSS_49

VSS_50

VSS_51

VSS_52

VSS_53

VSS_54

VSS_55

VSS_56

VSS_57

VSS_58

VSS_59

VSS_60

VSS_61

VSS_62

VSS_63

VSS_64

VSS_65

VSS_66

VSS_67

VSS_68

VSS_69

VSS_70

VSS_71

VSS_72

VSS_73

VSS_74

VSS_75

VSS_76

VSS_77

VSS_78

VSS_79

VSS_80

VSS_81

VSS_82

VSS_83

VSS_84

Y38

AA38

AD38

BH1

A48

VSS_SCB_1

VSS_SCB_2

VSS_SCB_3

VSS_SCB_4C1VSS_SCB_5B2VSS_SCB_6

VSS_277

VSS_278

VSS_279

VSS_280

C11

AV10

BG10

VSS_85

J38

T38

U38

R1501 0Ohm@R1501 0Ohm@

A3

VSS_281

VSS_282

VSS_283

AJ10

AT10

AE10

VSS_18

L47

T47

Y47

N47

AJ47

AL48

AF47

BB47

AU48

AR48

AN47

AW47

AH8

AY7

AU7

AN7

VSS_297

VSS_298Y8VSS_299L8VSS_300E8VSS_301B8VSS_302

VSS_303

VSS_304

C C

VSS_199

VSS_201

VSS_202

VSS_203

VSS_204

VSS_205

VSS_206

VSS_200

L12

AF21

AP21

AU21

AN21

AH21

BG21

AW21

MCH_CFG_5<11>

R1509

R1509

2.21KOhm

2.21KOhm

@

@

1 2

MCH_CFG_6<11>

R1514

R1514

2.21KOhm

2.21KOhm

@

B B

MCH_CFG_7<11>

MCH_CFG_9<11>

1 2

1 2

1 2

@

R1511

R1511

2.21KOhm

2.21KOhm

@

@

R1512

R1512

2.21KOhm

2.21KOhm

@

@

G47

AB47

AD47

AJ7

AE7

VSS_305

VSS_306

VSS_207

VSS_208

R21

AB21

AA7

VSS_307

VSS_308N7VSS_309J7VSS_310

VSS_209

VSS_210

VSS_211

J21

G21

M21

BG6

BD6

VSS_311

VSS_212

VSS_213

BA20

BC20

BA46

BD46

AV6

AT6

VSS_312

VSS_313

VSS_214

VSS_215

AT20

AW20

AV46

AY46

AM6

VSS_314

VSS_315M6VSS_316C6VSS_317

VSS_216

VSS_217

AJ20

AG20

CFG5 : DMI STRAP

HIGH = DMI X 4 (Default)

LOW = DMI X 2

CFG6 : Integrated TPM Host Interface

HIGH = iTPM disable (Default)

LOW = iTPM enable

CFG7 : Intel ME Crypto Strap Transport
Layer Security cipher suite

HIGH = With confidentiality (Default)

LOW = Without confidentiality

CFG9 : PCIE GRAPHIC LANE

HIGH = Normal Operation (Default)

LOW = Reverse Lanes

AR46

AM46

BA5

VSS_218

VSS_219

Y20

N20

V46

AH5

VSS_318

VSS_220

K20

F46

P46

R46

H46

BF44

AH44

AD44

AD5

BE4

VSS_319

VSS_320Y5VSS_321L5VSS_322J5VSS_323H5VSS_324F5VSS_325

VSS_221

VSS_222

VSS_223

VSS_224

VSS_225

VSS_226

F20

A20

A18

C20

BC17

BG19

BG17

Y44

AA44

BC3

VSS_227

VSS_228

AT17

AW17

T44

U44

AV3

AL3

VSS_327

VSS_328

VSS_329

VSS

VSS

VSS_229

VSS_230

VSS_231

R17

M17

F44

M44

AV43

BC43

AU43

BA2

AW2

VSS_330R3VSS_331P3VSS_333

VSS_332F3VSS_334

VSS_232

VSS_233

VSS_235

H17

C17

BA16

J43

AM43

AR2

AU2

VSS_336

VSS_335

VSS_237

VSS_238

AU16

AN16

C43

BG42

AP2

AJ2

VSS_337

VSS_338

VSS_239

VSS_240

K16

N16

AT42

AY42

AF2

AH2

VSS_340

VSS_339

VSS_241

VSS_242

E16

G16

MCH_CFG_10<11>

MCH_CFG_12<11>

MCH_CFG_13<11>

AJ42

AN42

AE2

AD2

VSS_341

VSS_342

VSS_243

VSS_244

AC15

BG15

L42

N42

AE42

BD41

AC2

VSS_343

VSS_344Y2VSS_345M2VSS_346K2VSS_347

VSS_245

VSS_246

VSS_247

VSS_248

A15

W15

AA14

BG14

AU41

AM41

AM1

AA1

VSS_348

VSS_249

VSS_250

C14

BG13

AA41

AH41

AD41

H1

VSS_349P1VSS_350

VSS_251

VSS_252

BA13

BC13

Y41

U41

U24

U28

VSS_351

VSS_352

VSS_255

AN13

1 2

1 2

1 2

T41

B41

H40

G41

M41

BB40

AV40

AN40

BG40

U25

U29

AF32

AB32

V32

AJ30

AM29

VSS_353

VSS_354

VSS_NCTF_1

VSS_NCTF_2

VSS_NCTF_3

VSS_NCTF_4

VSS_NCTF_5

VSS_256

VSS_257

VSS_258

VSS_259

VSS_260

VSS_261

VSS_262

VSS_263

VSS_264

L13

E13

N13

G13

AJ13

BF12

AE13

R1508

R1508

2.21KOhm

2.21KOhm

@

@

R1513

R1513

2.21KOhm

2.21KOhm

@

@

AT12

AV12

CFG10 : PCIe Loopback

HIGH = Disable (Default)

LOW = Enable

CFG [13:12] : XOR/ALL-Z

00 = Reserved
01= XOR Mode Enabled

E40

AJ39

AT39

AM39

AF29

AB29

U26

U23

VSS_NCTF_6

VSS_NCTF_7

VSS_NCTF_8

VSS_NCTF_9

VSS_265

VSS_266

VSS_267

VSS_268

J12

A12

AA12

AM12

L39

N39

AE39

AL20

V20

AC19

VSS_NCTF_10

VSS_NCTF_11

VSS_NCTF_12

VSS_269

VSS_270

VSS_271

BB11

AY11

BD11

10= All-Z Mode Enabled
11= Normal Operation (Default)

R1510

R1510

2.21KOhm

2.21KOhm

@

@

B39

BA38

BH38

BC38

AU38

AL17

AJ17

AA17

U17

VSS_NCTF_13

VSS_NCTF_14

VSS_NCTF_15

VSS_NCTF_16

VSS NCTF

VSS NCTF

VSS_272

VSS_273

VSS_275

VSS_276

Y11

N11

AN11

AH11

AH38

BH48

G11

G24

AF24

R24

K24

J24

VSS_186

VSS_188

VSS_191

VSS_185

VSS_187

VSS_189

VSS_190

VSS_86

VSS_87

VSS_88

VSS_89

VSS_90

VSS_91

VSS_92

F38

C38

BF37

AT37

BB37

AN37

AW37

1 2

A43

NC_26E1NC_27D2NC_28C3NC_29B4NC_30A5NC_31A6NC_32

VSS SCB

VSS SCB

VSS_284

VSS_290

VSS_289

VSS_288

VSS_287

VSS_285

VSS_286

BF9

AD9

AN9

BC9

M10

AM9

AA10

E24

F24

VSS_192

VSS_93

H37

AJ37

A44

B45

NC_33

VSS_291

B9

G9

MCH_CFG_19<11>

MCH_CFG_20<11>

AG23

BH23

VSS_193

VSS_195

VSS_194

VSS_94

VSS_95

VSS_96

C37

BG36

C46

D47

NC_34

NC_35

NC_36

NC

NC

VSS_293

VSS_292

VSS_294

BB8

BH8

A23

B23

Y23

VSS_197

VSS_196

VSS_97

VSS_98

AK15

BD36

AU36

B47

A46

F48

NC_37

NC_38

VSS_295

VSS_296

AT8

AV8

U1001I

U1001I
CANTIGA_CHIPSET

CANTIGA_CHIPSET

VSS_198

VSS_99

E48

C48

B48

NC_39

NC_40

NC_41

NC_42

U1001J

U1001J
CANTIGA_CHIPSET

CANTIGA_CHIPSET

+3VS

R1503

R1503

4.02KOHM

4.02KOHM

@

@

1 2

+3VS

R1506

R1506

4.02KOHM

4.02KOHM

@

@

1 2

CFG19 : DMI Lane Reversal

LOW = NORMAL (default)

HIGH = Reverse Lanes

CFG20 : SDVO/PCIE CONCURRENT MODE

LOW = ONLY SDVO or PCIE is
Operational (Default)

HIGH = SDVO and PCIE are operating
simultaneously via the PEG port

MCH_CFG_16<11>

A A

1 2

5

CFG16 : FSB Dynamic ODT

R1507

R1507

HIGH = Ensable (Default)

2.21KOhm

2.21KOhm

@

@

LOW = Disable

Title :

Title :

Title :

Cantiga-GND

Cantiga-GND

Cantiga-GND

Zack Kuo

Zack Kuo

Engineer:

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

P/N

P/N

P/N

Date: Sheet

Date: Sheet

4

3

2

Date: Sheet

Engineer:

F83Vf

F83Vf

F83Vf

<OrgAddr2>

<OrgAddr2>

<OrgAddr2>

Zack Kuo

Rev

Rev

Rev

1.1

1.1

15 100Thursday, July 16, 2009

15 100Thursday, July 16, 2009

1

15 100Thursday, July 16, 2009

1.1

of

of

of

5

D D

C C

4

3

2

1

B B

A A

Title :

Title :

Title :

Engineer:

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

P/N

P/N

P/N

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Engineer:

F83Vf

F83Vf

F83Vf

<OrgAddr2>

<OrgAddr2>

<OrgAddr2>

Zack Kuo

Zack Kuo

Zack Kuo

16 100Thursday, July 16, 2009

16 100Thursday, July 16, 2009

1

16 100Thursday, July 16, 2009

Rev

Rev

Rev

1.1

1.1

1.1

of

of

of

5

4

3

2

1

Main Board

D D

C C

B B

A A

Title :

Title :

Title :

Engineer:

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

P/N

P/N

P/N

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Engineer:

F83Vf

F83Vf

F83Vf

<OrgAddr2>

<OrgAddr2>

<OrgAddr2>

Zack Kuo

Zack Kuo

Zack Kuo

17 100Thursday, July 16, 2009

17 100Thursday, July 16, 2009

1

17 100Thursday, July 16, 2009

Rev

Rev

Rev

1.1

1.1

1.1

of

of

of

5

4

3

2

1

Main Board

D D

C C

B B

A A

Title :

Title :

Title :

Engineer:

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

P/N

P/N

P/N

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Engineer:

F83Vf

F83Vf

F83Vf

<OrgAddr2>

<OrgAddr2>

<OrgAddr2>

Zack Kuo

Zack Kuo

Zack Kuo

18 100Thursday, July 16, 2009

18 100Thursday, July 16, 2009

1

18 100Thursday, July 16, 2009

Rev

Rev

Rev

1.1

1.1

1.1

of

of

of

5

D D

C C

4

3

2

1

B B

A A

Title :

Title :

Title :

Zack Kuo

Zack Kuo

F83Vf

F83Vf

F83Vf

Zack Kuo

19 100Thursday, July 16, 2009

19 100Thursday, July 16, 2009

19 100Thursday, July 16, 2009

Rev

Rev

Rev

1.1

1.1

1.1

of

of

of

Engineer:

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

C

C

C

P/N

P/N

P/N

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Engineer:

<OrgAddr2>

<OrgAddr2>

<OrgAddr2>

1

5

1.1

D D

ACZ_BCLK_VGA<74>
ACZ_BCLK_AUD<36>

ACZ_SYNC_VGA<74>

ACZ_SYNC_AUD<36>

ACZ_RST#_VGA<74>

ACZ_RST#_AUD<36,37>

C C

ACZ_SDOUT_VGA<74>

ACZ_SDOUT_AUD<36>

+VCC_RTC

+VCC_RTC

R2003 20KOhmR2003 20KOhm

1 2

R2008 20KOhm

R2008 20KOhm

1 2

R2018 56Ohm@R2018 56Ohm@

1 2

@

@

1 2

33OHM

33OHM

3 4

33OHM

33OHM

5 6

33OHM

33OHM

7 8

33OHM

33OHM

5 6

33OHM

33OHM

7 8

33OHM

33OHM

1 2

33OHM

33OHM

3 4

33OHM

33OHM

12

C2004

C2004
1UF/10V

1UF/10V

1

1
2

2

Place Near the Open Door

12

C2005

C2005
1UF/10V

1UF/10V

@

@

RN2001A

RN2001A
RN2001B

RN2001B

RN2002C

RN2002C
RN2002D

RN2002D

RN2001C

RN2001C
RN2001D

RN2001D

RN2002A

RN2002A
RN2002B

RN2002B

GPIO33

4

RTCRST#

JRST1

JRST1
1MM_OPEN_5MIL

1MM_OPEN_5MIL

@

@

+VCC_RTC

SRTCRST#

VccLAN1_05 & VccCL1_05
Internal VR

High = Enable ( Default )
Low = Disable

SATA_LED#<56>

SATA_RXN0<51>
SATA_RXP0<51>
SATA_TXN0<51>
SATA_TXP0<51>

SATA_RXN1<51>
SATA_RXP1<51>
SATA_TXN1<51>
SATA_TXP1<51>

SL2001

SL2001
R0603

R0603

1 2

12

R2004

R2004

560KOhm

560KOhm

+1.5VS_PCIE_ICH

ACZ_SDIN0_AUD<36>
ACZ_SDIN1_VGA<74>

RTC_X1
RTC_X2

1 2

1 2

SL2003

SL2003
R0402

R0402

VccSus1_05, VccSus1_5, &
VccCL1_5 Internal VR

SL2002

SL2002
R0402

R0402

High = Enable ( Default )
Low = Disable

R2017 10KOhmR2017 10KOhm

+3VSUS

1 2

R2009 24.9Ohm 1%R2009 24.9Ohm 1%

1 2

T2005T2005
T2004T2004

ICH_INTVRMEN

LAN_SLP

ACZ_BCLK
ACZ_SYNC

ACZ_RST#

T2012T2012

ACZ_SDOUT

GPIO33

1
1

3

C23
C24

A25
F20
C22

B22
A22

E25
C13
F14

G13
D14

D13
D12
E13

B10
B28

B27
AF6

AH4

AE7

AF4
AG4
AH3

AE5

1

AG5
AG7

AE8
AG8

AJ16
AH16
AF17
AG17

AH13
AJ13
AG14
AF14

ICH9M

ICH9M

U2001A

U2001A

RTCX1
RTCX2

RTCRST#
SRTCRST#
INTRUDER#

INTVRMEN
LAN100_SLP

GLAN_CLK
LAN_RSTSYNC
LAN_RXD0

LAN_RXD1
LAN_RXD2

LAN_TXD0
LAN_TXD1
LAN_TXD2

GLAN_DOCK#/GPIO56
GLAN_COMPI

GLAN_COMPO
HDA_BIT_CLK

HDA_SYNC
HDA_RST#
HDA_SDIN0

HDA_SDIN1
HDA_SDIN2
HDA_SDIN3

HDA_SDOUT
HDA_DOCK_EN#/GPIO33

HDA_DOCK_RST#/GPIO34
SATALED#
SATA0RXN

SATA0RXP
SATA0TXN
SATA0TXP

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

FWH4/LFRAME#

RTCLAN / GLAN

LPCCPU

RTCLAN / GLAN

LPCCPU

LDRQ0#

LDRQ1#/GPIO23

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

CPUPWRGD

IGNNE#

INIT#
INTR

RCIN#

SMI#

STPCLK#

THRMTRIP#

PECI

SATA4RXN

IHDA

IHDA

SATA4RXP
SATA4TXN

SATA4TXP

SATA5RXN
SATA5RXP
SATA5TXN

SATA5TXP

SATA_CLKN
SATA_CLKP

SATA

SATA

SATARBIAS#

SATARBIAS

2

K5
K4
L6
K2

K3
J3

J1
N7

AJ27
AJ25

AE23
AJ26
AD22
AF25
AE22

AG25
L3

AF23

NMI

AF24
AH27
AG26
AG27

AH11
AJ11
AG12
AF12

AH9
AJ9
AE10
AF10

AH18
AJ18

AJ7
AH7

T2006T2006

1

1

T2007T2007

1

T2008T2008

1

T2009T2009

PM_THRMTRIP#

T2003T2003

1

SATARBIAS#

3 4

LPC_AD0 <30,44>
LPC_AD1 <30,44>
LPC_AD2 <30,44>
LPC_AD3 <30,44>

LPC_FRAME# <30,44>

H_DPRSTP# <3,11,80>

RNX2005B

RNX2005B

49.9OHM

1
1
1
1

1
1
1
1

49.9OHM

H_PWRGD <3>
H_IGNNE# <3>
H_INIT# <3>

H_INTR <3>
RCIN# <30>

H_NMI <3>
H_SMI# <3>

H_STPCLK# <3>

T2010T2010
T2011T2011
T2013T2013
T2014T2014

T2015T2015
T2016T2016
T2017T2017
T2018T2018

CLK_PCIE_SATA# <29>
CLK_PCIE_SATA <29>

1 2

R2015 24.9Ohm 1%R2015 24.9Ohm 1%

A20GATE <30>
H_A20M# <3>

H_DPSLP# <3>

+VCCP

1 2

RX2005 49.9Ohm@RX2005 49.9Ohm@

1 2

RNX2005A

RNX2005A

49.9OHM

49.9OHM

5 6

49.9OHM

49.9OHM

1

RNX2005D

49.9OHM

49.9OHM

H_FERR# <3>

RNX2005C

RNX2005C

+VCCP

H_THRMTRIP# <3,5,11,32>

C2007 100PF/50V

C2007 100PF/50V

@

@

RNX2005D

7 8

SATA1 HDD 1
SATA2 ODD
SATA4 HDD 2
SATA5 ESATA

12

B B

T2001T2001

A A

5

15PF/50V

15PF/50V

15PF/50V

15PF/50V

1

J2001

J2001

BATT_HOLDER_2P

BATT_HOLDER_2P

C2002

C2002

C2003

C2003

3
4

12

12

+RTCBAT

4

2
3

1 2

12

14

R2001

R2001
1KOhm

1KOhm

X2001

X2001

32.768Khz

32.768Khz

RTC_X1

12

R2002

R2002
10MOhm

10MOhm

RTC_X2

+VCC_RTC+3VA

D2001

D2001

1

3

2

BAT54C

BAT54C

1

T2002T2002

12

C2001

C2001
1UF/10V

1UF/10V

[ICH_TP3, ACZ_SDOUT] : XOR Chain Entrance Strap

00 = Reserved
01= Enter XOR Chain
10= Normal Operation (Default)
11= Set PCIe Port Config Bit 1

+VCCHDA_ICH

ACZ_SDOUT

R2016 1KOhm@R2016 1KOhm@

1 2

3

2

Title :

Title :

Title :

Engineer:

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

P/N

P/N

P/N

Date: Sheet

Date: Sheet

Date: Sheet

Engineer:

F83Vf

F83Vf

F83Vf

<OrgAddr2>

<OrgAddr2>

<OrgAddr2>

1

SB-ICH9M(1)

SB-ICH9M(1)

SB-ICH9M(1)

Zack Kuo

Zack Kuo

Zack Kuo

20 100Thursday, July 16, 2009

20 100Thursday, July 16, 2009

20 100Thursday, July 16, 2009

of

of

of

Rev

Rev

Rev

1.1

1.1

1.1

5

U2001B

U2001B

D11

D D

C C

PCI_INTA#<22>
PCI_INTB#<22>
PCI_INTC#<22>
PCI_INTD#<22>

B B

AD0

C8

AD1

D9

AD2

E12

AD3

E9

AD4

C9

AD5

E10

AD6

B7

AD7

C7

AD8

C5

AD9

G11

AD10

F8

AD11

F11

AD12

E7

AD13

A3

AD14

D2

AD15

F10

AD16

D5

AD17

D10

AD18

B3

AD19

F7

AD20

C3

AD21

F3

AD22

F4

AD23

C1

AD24

G7

AD25

H7

AD26

D1

AD27

G5

AD28

H6

AD29

G1

AD30

H3

AD31

Interrupt I/F

Interrupt I/F

J5

PIRQA#

E1

PIRQB#

J6

PIRQC#

C4

PIRQD#

ICH9M

ICH9M

PLT_RST#

PCI

PCI

REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55

C/BE0#
C/BE1#
C/BE2#
C/BE3#

PCIRST#

DEVSEL#

PERR#

PLOCK#

SERR#

FRAME#

PLTRST#

PCICLK

PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

U2101

@

U2101

@

A

A

1

VCC

VCC

B

B

2
3 4

GND

GND

Y

Y

NC7SZ08P5X_NL

NC7SZ08P5X_NL

SL2101

SL2101

R0603

R0603

REQ0#
GNT0#

IRDY#

PAR

STOP#
TRDY#

PME#

5

12

+3V

4

F1

PCI_GNT#0

G4
B6

T2101T2101

A7

1

F13

T2102T2102

F12

1
E6
F6

1

T2103T2103

D8
B4
D6
A5

D3
E3
R1
C6
E4
C2
J4
A4
F5
D7

C14
D4
R2

H4
K6
F2
G2

PCI_IRDY# <22>

T2113T2113

1

PCI_DEVSEL# <22>
PCI_PERR# <22>
PCI_LOCK# <22>
PCI_SERR# <22>
PCI_STOP# <22>
PCI_TRDY# <22>
PCI_FRAME# <22>

PLT_RST#

CLK_ICHPCI <29>

PCI_INTE# <22>
PCI_INTF# <22>
PCI_INTG# <22>
PCI_INTH# <22>

BUF_PLT_RST# <5,11,30,33,41,53,70>

PCI_REQ#0 <22>
PCI_REQ#1 <22>
PCI_REQ#2 <22>
PCI_REQ#3 <22>

PLT_RST# <33>

PCIE_RXN2_MINICARD<53>

PCIE_RXP2_MINICARD<53>

PCIE_TXN2_C<53>

PCIE_TXP2_C<53>

PCIE_RXN3_NEWCARD<41>
PCIE_RXP3_NEWCARD<41>

PCIE_TXN3_C<41>

PCIE_TXP3_C<41>

PCIE_RXN6_LAN<33>

PCIE_RXP6_LAN<33>

PCIE_TXN6_C<33>

PCIE_TXP6_C<33>

SPI_MOSI
iTPM Enable

High = Enable
Low = Disable(Default)

3

PCIE1 NC
PCIE2 MiniCard
PCIE3 NewCard
PCIE4 NC
PCIE5 NC
PCIE6 LAN

CX2103 0.1UF/10VCX2103 0.1UF/10V
CX2104 0.1UF/10VCX2104 0.1UF/10V

CX2105 0.1UF/10VCX2105 0.1UF/10V
CX2106 0.1UF/10VCX2106 0.1UF/10V

CX2111 0.1UF/10VCX2111 0.1UF/10V
CX2112 0.1UF/10VCX2112 0.1UF/10V

1.1

+3VSUS

R2107 10KOhmR2107 10KOhm

1 2

R2108 10KOhmR2108 10KOhm

1 2

WLAN_ON#<53>

1
1
1

1
1

PCIE_TXN2_MIMICARD
PCIE_TXP2_MINICARD

PCIE_TXN3_NEWCARD
PCIE_TXP3_NEWCARD

PCIE_TXN6_LAN
PCIE_TXP6_LAN

SB_SPICLK
SB_SPICS0#
SB_SPICS1#

SB_SPISI

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#
CLK_DEC#
CLK_ACC

USB_OC11#

USBRBIAS_PN

12

R210518Ohm

R210518Ohm

1 2
1 2

1 2
1 2

1 2
1 2

T2108T2108
T2109T2109
T2107T2107

T2111T2111
T2110T2110

1%

1%

Place within 500 mils of ICH

2

U2001D

U2001D

N29

PERn1

N28

PERp1

P27

PETn1

P26

PETp1

L29

PERn2

L28

PERp2

M27

PETn2

M26

PETp2

J29

PERn3

J28

PERp3

K27

PETn3

K26

PETp3

G29

PERn4

G28

PERp4

H27

PETn4

H26

PETp4

E29

PERn5

E28

PERp5

F27

PETn5

F26

PETp5

C29

PERn6/GLAN_RXN

C28

PERp6/GLAN_RXP

D27

PETn6/GLAN_TXN

D26

PETp6/GLAN_TXP

D23

SPI_CLK

D24

SPI_CS0#

F23

SPI_CS1#/GPIO58/CLGPIO6

D25

SPI_MOSI

E23

SPI_MISO

N4

OC0#/GPIO59

N5

OC1#/GPIO40

N6

OC2#/GPIO41

P6

OC3#/GPIO42

M1

OC4#/GPIO43

N2

OC5#/GPIO29

M4

OC6#/GPIO30

M3

OC7#/GPIO31

N3

OC8#/GPIO44

N1

OC9#/GPIO45

P5

OC10#/GPIO46

P3

OC11#/GPIO47

AG2

USBRBIAS

AG1

USBRBIAS#

ICH9M

ICH9M

DMI0RXN
DMI0RXP

DMI0TXN
DMI0TXP

DMI1RXN
DMI1RXP

DMI1TXN
DMI1TXP

DMI2RXN
DMI2RXP

DMI2TXN
DMI2TXP

DMI3RXN
DMI3RXP

DMI3TXN
DMI3TXP

DMI_CLKN

PCI-Express

PCI-Express

DMI_CLKP

Direct Media Interface

Direct Media Interface

DMI_ZCOMP

DMI_IRCOMP

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N

SPI

SPI

USBP5P
USBP6N

USB

USB

USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N

USBP9P
USBP10N
USBP10P
USBP11N
USBP11P

ICH9 Boot BIOS select

GNT#0

LPC
PCI
SPI

11
10
01 0

1
1

V27
V26
U29
U28

Y27
Y26
W29
W28

AB27
AB26
AA29
AA28

AD27
AD26
AC29
AC28

T26
T25

AF29
AF28

AC5
AC4
AD3
AD2
AC1
AC2
AA5
AA4
AB2
AB3
AA1
AA2
W5
W4
Y3
Y2
W1
W2
V2
V3
U5
U4
U1
U2

CS#1

DMI_COMP

1
0
1

1
1
1
1
1
1

(default)

DMI_RXN0 <11>
DMI_RXP0 <11>
DMI_TXN0 <11>
DMI_TXP0 <11>

DMI_RXN1 <11>
DMI_RXP1 <11>
DMI_TXN1 <11>
DMI_TXP1 <11>

DMI_RXN2 <11>
DMI_RXP2 <11>
DMI_TXN2 <11>
DMI_TXP2 <11>

DMI_RXN3 <11>
DMI_RXP3 <11>
DMI_TXN3 <11>
DMI_TXP3 <11>

CLK_PCIE_ICH# <29>
CLK_PCIE_ICH <29>

R2103 24.9Ohm1%R2103 24.9Ohm1%

1 2

L<500mils

USB_PN0 <52>
USB_PP0 <52>
USB_PN1 <52>
USB_PP1 <52>
USB_PN2 <53>
USB_PP2 <53>
USB_PN3 <52>
USB_PP3 <52>
USB_PN4 <45>
USB_PP4 <45>
USB_PN5 <61>
USB_PP5 <61>
USB_PN6 <41>
USB_PP6 <41>
USB_PN7 <40>
USB_PP7 <40>

T2117T2117
T2116T2116
T2106T2106
T2112T2112
T2114T2114
T2115T2115

USB_PN11 <63>
USB_PP11 <63>

USB0 External Port 1
USB1 External Port 2
USB2 WLAN
USB3 External Port 3
USB4 CMOS Camera
USB5 BT
USB6 NEWCARD
USB7 CardReader
USB8 FREE
USB9 FREE
USB10 FREE
USB11 FingerPrinter

1

+1.5VS_PCIE_ICH

Place within 500 mils of ICH

PCI_GNT#0

SB_SPICS1#

A A

5

4

3

2

R2101 1KOhm@R2101 1KOhm@

1 2

R2102 1KOhm@R2102 1KOhm@

1 2

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

P/N

P/N

P/N

Date: Sheet

Date: Sheet

Date: Sheet of

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

F83Vf

F83Vf

F83Vf

<OrgAddr2>

<OrgAddr2>

<OrgAddr2>

1

SB-ICH9M(2)

SB-ICH9M(2)

SB-ICH9M(2)

Zack Kuo

Zack Kuo

Zack Kuo

21 100Thursday, July 16, 2009

21 100Thursday, July 16, 2009

21 100Thursday, July 16, 2009

of

of

Rev

Rev

Rev

1.1

1.1

1.1

5

+3VSUS

4

3

2

1

1 5

10KOhm

10KOhm

2 5

10KOhm

10KOhm

3 5

10KOhm

10KOhm

4 5

10KOhm

10KOhm

6 5

10KOhm

10KOhm

7 5

10KOhm

10KOhm

8 5

10KOhm

10KOhm

9 5

10KOhm

10KOhm

1 5

10KOhm

10KOhm

2 5

10KOhm

10KOhm

3 5

10KOhm

10KOhm

4 5

10KOhm

10KOhm

6 5

10KOhm

10KOhm

7 5

10KOhm

10KOhm

8 5

10KOhm

10KOhm

9 5

10KOhm

10KOhm

1 5

10KOhm

10KOhm

2 5

10KOhm

10KOhm

3 5

10KOhm

10KOhm

4 5

10KOhm

10KOhm

6 5

10KOhm

10KOhm

7 5

10KOhm

10KOhm

8 5

10KOhm

10KOhm

9 5

10KOhm

10KOhm

+3VS

10
10
10
10
10
10
10
10

10
10
10
10
10
10
10
10

10
10
10
10
10
10
10
10

R2202

R2202
10KOhm

10KOhm

+3VSUS

R2201

R2201
10KOhm

D D

PM_RSMRST#

STP_PCI#
STP_CPU#

PM_THERM#<50>

10KOhm

@

@

1 2

R2236 0Ohm

R2236 0Ohm

@

@

1 2

10KOHM

10KOHM

3 4

10KOHM

10KOHM

@

@

RN2203A

RN2203A
RN2203B

RN2203B

1 2

+3VS

remove CB_SD# and BT_DET#

T2202T2202

C C

+3VS

+3VSUS

T2221T2221
T2222T2222

R2249 10KOhmR2249 10KOhm

1 2

CLK_SATACLK_REQ#<29>

1 2

R2252 10KOhmR2252 10KOhm

SCL_3A<24>
SDA_3A<24>

SM_LINK0<24>
SM_LINK1<24>

T2205T2205

PM_SYNC#<11>

EXT_SCI#<30>
STP_PCI#<29>

STP_CPU#<29>
PM_CLKRUN#<30>
PCIE_WAKE#<33,44,53>

INT_SERIRQ<30>

@

@

1 2

R2237 0Ohm

R2237 0Ohm

EXT_SMI#<30>

1

CB_SD#

1

WLAN_LED<56>

1

BT_DET#

BT_ON#<61>
BT_LED<56>

GPU_RST#<70>

SB_SPKR<36>

MCH_ICH_SYNC#<11>

For UMA Design

T2220T2220

1

PM_RI#

1

PM_THERM#_SBPM_THERM#

VR_PWRGD_CLKEN

T2201T2201

HDTV_DET#

WLAN_LED

T2204T2204
T2203T2203

CLK_SATACLK_REQ#

PCB_ID1
PCB_ID2

GPU_RST#

SB_SPKR

T2207T2207
T2209T2209
T2210T2210
T2211T2211

U2001C

U2001C

1 2

G16

SMBCLK

A13

SMBDATA

E17

LINKALERT#/GPIO60/CLGPIO4

C17

SMLINK0

B18

SMLINK1

F19

RI#

R4

SUS_STAT#/LPCPD

G19

SYS_RESET#

M6

PMSYNC#/GPIO0

A17

SMBALERT#/GPIO11

A14

STP_PCI#

E19

STP_CPU#

L4

CLKRUN#

E20

WAKE#

M5

SERIRQ

AJ23

THRM#

D21

VRMPWRGD

A20

1

SST

AG19

TACH1/GPIO1

AH21

TACH2/GPIO6

AG21

TACH3/GPIO7

A21

GPIO8

C12

LAN_PHY_PWR_CTRL/GPIO12

C21

ENERGY_DETECT/GPIO13

AE18

TACH0/GPIO17

K1

1

GPIO18

AF8

1

GPIO20

AJ22

SCLOCK/GPIO22

A9

GPIO27

D19

GPIO28

L1

SATACLKREQ#/GPIO35

AE19

SLOAD/GPIO38

AG22

SDATAOUT0/GPIO39

AF21

SDATAOUT1/GPIO48

AH24

GPIO49

A8

GPIO57/CLGPIO5

M7

SPKR

AJ24

MCH_SYNC#

B21

1

TP3

AH20

1

PWM0

AJ20

1

PWM1

AJ21

1

PWM2

ICH9M

ICH9M

SATA0GP/GPIO21
SATA1GP/GPIO19
SATA4GP/GPIO36
SATA5GP/GPIO37

SATA

GPIO

SATA

GPIO

SMB

SMB

Clocks

Clocks

S4_STATE#/GPIO26

DPRSLPVR/GPIO16

SYS GPIO

SYS GPIO

Power MGTController Link

Power MGTController Link

CK_PWRGD

GPIO

GPIO

GPIO24/MEM_LED

GPIO10/SUS_PWR_ACK

GPIO14/AC_PRESENT

GPIO9/WOL_EN

MISC

MISC

CLK14
CLK48

SUSCLK

SLP_S3#
SLP_S4#
SLP_S5#

PWROK

BATLOW#
PWRBTN#

LAN_RST#

RSMRST#

CLPWROK

SLP_M#

CL_CLK0
CL_CLK1

CL_DATA0
CL_DATA1

CL_VREF0
CL_VREF1

CL_RST0#
CL_RST1#

AH23
AF19
AE21
AD20

H1
AF3

P1
C16

E16
G17

C10
G20
M2
B13
R3
D20
D22
R5
R6
B16
F24

B19
F22

C19
C25

A19
F21

D18
A16

C18
C11
C20

GPIO36
PCB_ID0

1

T2208T2208

1

T2214T2214

1

PM_PWROK_R

SL2203 R0603SL2203 R0603

BAT_LL#

SL2204 R0603SL2204 R0603
R2234 10KOhmR2234 10KOhm

1 2

RSMRST#_ICH

SL2205 R0603SL2205 R0603

PM_PWROK

T2213T2213

1

T2218T2218

1

T2219T2219

1

T2212T2212

1

T2215T2215

1

R2248 100KOhmR2248 100KOhm

T2206T2206

12

12

R2235 10KOhmR2235 10KOhm

1 2

12

CL_VREF0
CL_VREF1

FOR ATHEROS

T2216T2216

1

T2217T2217

1

F83

12

CLK_ICH14 <29>
CLK_USB48 <29,40>

PM_SUSB# <30>
PM_SUSC# <30>

PM_DPRSLPVR <11,80>

PM_PWRBTN# <30>

CLK_PWRGD <29>

CL_CLK0 <11>

CL_DATA0 <11>

CL_RST#0 <11>

PM_RSMRST# <30>

PCI_INTE#<21>

PCI_TRDY#<21>

PM_CLKRUN#

PCI_STOP#<21>

PCI_INTD#<21>

PCI_IRDY#<21>
PCI_PERR#<21>
PCI_LOCK#<21>

GPIO36

PCI_REQ#3<21>

PCI_DEVSEL#<21>

PCI_REQ#1<21>

INT_SERIRQ
PM_THERM#_SB

PCI_REQ#2<21>

PCI_FRAME#<21>

PCI_SERR#<21>

PCI_INTF#<21>
PCI_INTA#<21>

PCI_INTC#<21>

PCI_INTB#<21>

PCI_INTG#<21>
PCI_REQ#0<21>

PCI_INTH#<21>

RP2202A

RP2202A
RP2202B

RP2202B
RP2202C

RP2202C
RP2202D

RP2202D
RP2202E

RP2202E
RP2202F

RP2202F
RP2202G

RP2202G
RP2202H

RP2202H

RP2203A

RP2203A
RP2203B

RP2203B
RP2203C

RP2203C
RP2203D

RP2203D
RP2203E

RP2203E
RP2203F

RP2203F
RP2203G

RP2203G
RP2203H

RP2203H

RP2204A

RP2204A
RP2204B

RP2204B
RP2204C

RP2204C
RP2204D

RP2204D
RP2204E

RP2204E
RP2204F

RP2204F
RP2204G

RP2204G
RP2204H

RP2204H

Mount/unmount as same R2236

+3VSUS

EXT_SMI#
PCIE_WAKE#
PM_RI#
EXT_SCI#

B B

PCB_ID0
PCB_ID1
PCB_ID2

A A

CLK_SATACLK_REQ#
SDA_3A
SCL_3A
BAT_LL#

+3VS

R2213

R2213
10KOhm@

10KOhm@

1 2

R2215

R2215
10KOhm

10KOhm

1 2

1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8

+3VS +3VS

R2214

R2214
10KOhm

10KOhm

@

@

1 2

R2216

R2216
10KOhm

10KOhm

1 2

10KOhm

10KOhm

10KOhm

10KOhm
10KOhm

10KOhm
10KOhm

10KOhm

10KOhm

10KOhm

10KOhm

10KOhm
10KOhm

10KOhm
10KOhm

10KOhm

1 2

1 2

R2217

R2217
10KOhm

10KOhm

@

@

R2218

R2218
10KOhm

10KOhm

RN2201A

RN2201A
RN2201B

RN2201B
RN2201C

RN2201C
RN2201D

RN2201D
RN2202A

RN2202A
RN2202B

RN2202B
RN2202C

RN2202C
RN2202D

RN2202D

12

C2201

C2201

0.1UF/10V

0.1UF/10V

@

@

PM_RSMRST#
WLAN_LED
CB_SD#
GPU_RST#

+3VA

R2211

R2211

3.24KOhm

3.24KOhm

@

@

1 2

R2212

R2212
453Ohm

453Ohm

@

@

1 2

R2219 10KOhm@R2219 10KOhm@

1 2

R2259 10KOhmR2259 10KOhm

1 2

R2225 1KOhm@R2225 1KOhm@

1 2

R2223 1KOhm@R2223 1KOhm@

1 2

CL_VREF0/1 ~= 0.405 V

CL_VREF [0:1] routing rules
Width = 12 mils min
Spacing = 12 mils min
Break-out: 5 mils on 5 mils for 300 mils max

PM_PWROK_R

CL_VREF0CL_VREF1

12

C2202

C2202

0.1UF/10V

0.1UF/10V

SL2202 R0603SL2202 R0603

R2231

R2231
10KOhm

10KOhm

1 2

+3VS

R2210

R2210

3.24KOhm

3.24KOhm

1 2

R2226

R2226
453Ohm

453Ohm

1 2

12

PM_PWROK <11,30>

VR_PWRGD_CLKEN

PM_THERM#_EC<30>

Q2203

Q2203

2N7002

2N7002

12

@

@

1

1

1

R2224

R2224
100KOhm

100KOhm

+3VS

12

32

3

3

D

D

G

G

S

S

2

2

+3VSUS

R2233

R2233
10KOhm@

10KOhm@

12

R2232

R2232
10KOhm@

10KOhm@

32

3

3

D

D

S

S

2

2

2N7002

2N7002

SL2206 R0603SL2206 R0603
Q2201

Q2201
2N7002

2N7002

@

@

1

1

1

G

G

Q2204

Q2204

CLK_EN# <80>

PM_THERM#

32

3

3

D

D

@

@

1

1

1

G

G

S

S

2

2

12

EC_CLK_EN <30>

RSMRST#_ICH
PM_PWROK_R

VR_PWRGD_CLKEN

D2201

D2201

1

3

2

BAT54C

BAT54C

D2202

D2202

1

3

2

BAT54C

BAT54C

SUS_PWRGD <30,81,92>

Title :

Title :

Title :

SB-ICH9M(3)

SB-ICH9M(3)

SB-ICH9M(3)

Zack Kuo

Zack Kuo

Engineer:

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

P/N

P/N

P/N

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Engineer:

F83Vf

F83Vf

F83Vf

<OrgAddr2>

<OrgAddr2>

<OrgAddr2>

Zack Kuo

Rev

Rev

Rev

1.1

1.1

22 100Thursday, July 16, 2009

22 100Thursday, July 16, 2009

1

22 100Thursday, July 16, 2009

1.1

of

of

of

5

6uA in G3

+VCC_RTC +VCCP

D D

+5VSUS

646mA

C C

+1.5VS

ESR=18mOhm/Ir=2.5A

ESR=18mOhm/Ir=2.5A

+5VS

+3VS

2mA

+1.5VS_PCIE_ICH

L2304

L2304
80Ohm/100Mhz

80Ohm/100Mhz

47mA

12

R2319 10OhmR2319 10Ohm

3

R2320 10OhmR2320 10Ohm

1 2

21

+1.5VS

+1.5VS

1.342*5/6=1.12A

B B

+1.5VS

12

C2310

C2310

0.1UF/16V

0.1UF/16V

1 2

2

D2301

D2301
BAT54A

BAT54A

1

+5VREFSUS

12

+

+

CE2301

CE2301
100UF/2.5V

100UF/2.5V

@

@

80Ohm/100Mhz

80Ohm/100Mhz

SL2301 R0603SL2301 R0603

C2311

C2311

0.1UF/16V

0.1UF/16V

2mA

+V5REF_ICH

+1.5VS_PCIE_ICH

12

C2305

C2305
22UF/6.3V

22UF/6.3V

L2301

L2301

21

SL2302

SL2302

1 2

R0805

R0805

12

12

C2301

C2301

0.1UF/16V

0.1UF/16V

+3VSUS

D2302

D2302

3

BAT54A

BAT54A

1

2

12

C2306

C2306
22UF/6.3V

22UF/6.3V

+VCCSATAPLL_ICH

12

C2321

C2321
10UF/6.3V

10UF/6.3V

+VCC1_5_ICH

+VCCUSBPLL_ICH

1.342A*1/6+0.011=0.24A

C2336

C2336
10UF/6.3V

10UF/6.3V

5

12

12

@

@

+3VS

SL2303 R0603SL2303 R0603

78mA

SL2316

SL2316

+1.5VS

A A

23mA

R0603

R0603

12

12

C2337

2.2UF/6.3V

2.2UF/6.3V

12

@C2337

@

+3VM_VCCPAUX

C2335

C2335

0.1UF/16V

0.1UF/16V

+1.5VS

SL2304

SL2304

80mA

+3VS

@

@

C2342

C2342

1 2

+VCCGLAN1_5_ICH

12

R0603

R0603

@

@

SL2305 R0603SL2305 R0603

1mA

12

12

+

+

CE2303

CE2303
220UF/4V

220UF/4V

0.1UF/10V

0.1UF/10V

4

+5VREFSUS

12

C2302

C2302

0.1UF/16V

0.1UF/16V

12

C2307

C2307

2.2UF/6.3V

2.2UF/6.3V

12

C2327

C2327
1UF/6.3V

1UF/6.3V

12

C2324

C2324
1UF/6.3V

1UF/6.3V

12

C2328

C2328
1UF/6.3V

1UF/6.3V

12

C2333

C2333

0.1UF/10V

0.1UF/10V

12

C2309

C2309

0.1UF/10V

0.1UF/10V

+VCCGLANPLL_ICH

12

C2338

C2338

4.7UF/10V

4.7UF/10V

+VCCGLAN3_3_ICH

4

AA24
AA25
AB24
AB25
AC24
AC25
AD24
AD25
AE25
AE26
AE27
AE28
AE29

W24
W25

AJ19

AC16
AD15
AD16
AE15
AF15
AG15
AH15

AJ15

AC11
AD11
AE11
AF11
AG10
AG11
AH10

AJ10

AC18
AC19

AC21

AC12
AC13
AC14

A23

AE1

F25
G25
H24
H25

K24
K25
L23
L24
L25
M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27
T24
T27
T28
T29
U24
U25
V24
V25
U23

K23
Y24
Y25

AC9

G10

AJ5
AA7

AB6
AB7
AC6
AC7

A10
A11

A12
B12

A27
D28

D29
E26
E27

A26

A6

J24
J25

G9

U2001F

U2001F

VccRTC
V5REF
V5REF_Sus
Vcc1_5_B_1

Vcc1_5_B_2
Vcc1_5_B_3
Vcc1_5_B_4
Vcc1_5_B_5
Vcc1_5_B_6
Vcc1_5_B_7
Vcc1_5_B_8
Vcc1_5_B_9
Vcc1_5_B_10
Vcc1_5_B_11
Vcc1_5_B_12
Vcc1_5_B_13
Vcc1_5_B_14
Vcc1_5_B_15
Vcc1_5_B_16
Vcc1_5_B_17
Vcc1_5_B_18
Vcc1_5_B_19
Vcc1_5_B_20
Vcc1_5_B_21
Vcc1_5_B_22
Vcc1_5_B_23
Vcc1_5_B_24
Vcc1_5_B_25
Vcc1_5_B_26
Vcc1_5_B_27
Vcc1_5_B_28
Vcc1_5_B_29
Vcc1_5_B_30
Vcc1_5_B_31
Vcc1_5_B_32
Vcc1_5_B_33
Vcc1_5_B_34
Vcc1_5_B_35
Vcc1_5_B_36
Vcc1_5_B_37
Vcc1_5_B_38
Vcc1_5_B_39
Vcc1_5_B_40
Vcc1_5_B_41
Vcc1_5_B_42
Vcc1_5_B_43
Vcc1_5_B_44
Vcc1_5_B_45
Vcc1_5_B_46
Vcc1_5_B_47
Vcc1_5_B_48
Vcc1_5_B_49

VccSATAPLL
Vcc1_5_A_1

Vcc1_5_A_2
Vcc1_5_A_3
Vcc1_5_A_4
Vcc1_5_A_5
Vcc1_5_A_6
Vcc1_5_A_7
Vcc1_5_A_8

Vcc1_5_A_9
Vcc1_5_A_10
Vcc1_5_A_11
Vcc1_5_A_12
Vcc1_5_A_13
Vcc1_5_A_14
Vcc1_5_A_15
Vcc1_5_A_16

Vcc1_5_A_17
Vcc1_5_A_18

Vcc1_5_A_19
Vcc1_5_A_20
Vcc1_5_A_21

Vcc1_5_A_22
Vcc1_5_A_23

Vcc1_5_A_24
Vcc1_5_A_25

VccUSBPLL
Vcc1_5_A_26

Vcc1_5_A_27
Vcc1_5_A_28
Vcc1_5_A_29
Vcc1_5_A_30

VccLAN1_05_1
VccLAN1_05_2

VccLAN3_3_1
VccLAN3_3_2

VccGLANPLL
VccGLAN1_5_1

VccGLAN1_5_2
VccGLAN1_5_3
VccGLAN1_5_4

VccGLAN3_3

ICH9M

ICH9M

CORE

CORE

VCCA3GP ATXARX USB CORE

VCCA3GP ATXARX USB CORE

VCCP_CORE

VCCP_CORE

PCI

PCI

VccSus1_05_1
VccSus1_05_2

VCCPSUSVCCPUSB

VCCPSUSVCCPUSB

VccSus3_3_10
VccSus3_3_11
VccSus3_3_12
VccSus3_3_13
VccSus3_3_14
VccSus3_3_15
VccSus3_3_16
VccSus3_3_17
VccSus3_3_18
VccSus3_3_19
VccSus3_3_20

GLAN POWER

GLAN POWER

Vcc1_05_1
Vcc1_05_2
Vcc1_05_3
Vcc1_05_4
Vcc1_05_5
Vcc1_05_6
Vcc1_05_7
Vcc1_05_8

Vcc1_05_9
Vcc1_05_10
Vcc1_05_11
Vcc1_05_12
Vcc1_05_13
Vcc1_05_14
Vcc1_05_15
Vcc1_05_16
Vcc1_05_17
Vcc1_05_18
Vcc1_05_19
Vcc1_05_20
Vcc1_05_21
Vcc1_05_22
Vcc1_05_23
Vcc1_05_24
Vcc1_05_25
Vcc1_05_26

VccDMIPLL

VccDMI_1
VccDMI_2

V_CPU_IO_1
V_CPU_IO_2

Vcc3_3_1
Vcc3_3_2
Vcc3_3_3
Vcc3_3_4

Vcc3_3_5
Vcc3_3_6
Vcc3_3_7

Vcc3_3_8

Vcc3_3_9
Vcc3_3_10
Vcc3_3_11
Vcc3_3_12
Vcc3_3_13
Vcc3_3_14

VccHDA

VccSusHDA

VccSus1_5_1
VccSus1_5_2

VccSus3_3_1
VccSus3_3_2
VccSus3_3_3
VccSus3_3_4

VccSus3_3_5
VccSus3_3_6

VccSus3_3_7
VccSus3_3_8
VccSus3_3_9

VccCL1_05

VccCL1_5

VccCL3_3_1
VccCL3_3_2

A15
B15
C15
D15
E15
F15
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

R29
W23

Y23
AB23

AC23
AG29
AJ6
AC10
AD19

AF20
AG24
AC20

B9
F9
G3
G6
J2
J7
K7

AJ4
AJ3
AC8

F17
AD8
F18

A18
D16
D17
E22

AF1
T1

T2
T3
T4
T5
T6
U6
U7
V6
V7
W6
W7
Y6
Y7
T7

G22
G23
A24

B24

1
1

1

3

12

12

C2303

C2303

0.1UF/16V

0.1UF/16V

+VCCDMIPLL_ICH

SL2313 R0603SL2313 R0603

12

C2319

C2319

0.1UF/16V

0.1UF/16V

+VCC3_3_ICH

+VCC3_3_PCI

12

T2304T2304
T2306T2306

T2305T2305

C2340 0.1UF/10VC2340 0.1UF/10V

C2343 0.1UF/10VC2343 0.1UF/10V

+3VM_ICH_CL

3

12

C2323

C2323

0.1UF/16V

0.1UF/16V

C2325

C2325

0.1UF/16V

0.1UF/16V

+VCCHDA_ICH
+VCCSUSHDA_ICH

1 2

+3VSUS_ICH_1

+3VSUS_ICH

12

C2332

C2332

0.01UF/16V

0.01UF/16V

1 2

SL2306 R0603SL2306 R0603

C2304

C2304

0.1UF/16V

0.1UF/16V

12

C2317

C2317

0.1UF/16V

0.1UF/16V

@

@

12

C2334

C2334

0.01UF/16V

0.01UF/16V

12

12

12

1.634A

+VCCP_ICH +VCCP_ICH

12

+

+

CE2302

CE2302
100UF/2.5V

100UF/2.5V

C2312

C2312
10UF/6.3V

10UF/6.3V

11mA

12

12

12

12

1 2

1 2

@

@
@

@

+3VS

12

C2313

C2313

0.01UF/16V

0.01UF/16V

12

C2322

C2322

4.7UF/10V

4.7UF/10V

SL2315 R0603SL2315 R0603

C2315

C2315

4.7UF/10V

4.7UF/10V

1 2

C2320

C2320

0.1UF/16V

0.1UF/16V

1 2

SL2308

SL2308

R0805

R0805

SL2307

SL2307

R0805

R0805

12

+VCCDMI_ICH

12

C2316

C2316

0.1UF/16V

0.1UF/16V

SL2314 R0603SL2314 R0603

C2318

C2318

0.1UF/16V

0.1UF/16V

12

C2326

C2326

0.1UF/16V

0.1UF/16V

@

@

SL2311 R0603SL2311 R0603

12

C2330

C2330

0.1UF/16V

0.1UF/16V

12

C2331

C2331

0.1UF/16V

0.1UF/16V

C2308 1UF/6.3V

C2308 1UF/6.3V

1 2

C2339 0.1UF/16V

C2339 0.1UF/16V

1 2

L2303

L2303
80Ohm/100Mhz

80Ohm/100Mhz

L2305

L2305
80Ohm/100Mhz

80Ohm/100Mhz

SL2310

SL2310

R0805

R0805

SL2309

SL2309

R0805

R0805

+VCCHDA_ICH

+3VSUS

73mA

2

21

+1.5VS

21

+VCCP_ICH

12

+VCCP_ICH

+3VS

+3VS

SL2312 R0603SL2312 R0603

12

C2329

C2329

0.1UF/16V

0.1UF/16V

2

12

+3VSUS

U2001E

U2001E

AA26

Vss1

AA27

Vss2

AA3

Vss3

AA6

Vss4

AB1

Vss5

AA23

Vss6

AB28

Vss7

AB29

Vss8

AB4

Vss9

AB5

Vss10

23mA

48mA

2mA

308mA

+3VS

11mA

212mA

AC17

Vss11

AC26

Vss12

AC27

Vss13

AC3

Vss14

AD1

Vss15

AD10

Vss16

AD12

Vss17

AD13

Vss18

AD14

Vss19

AD17

Vss20

AD18

Vss21

AD21

Vss22

AD28

Vss23

AD29

Vss24

AD4

Vss25

AD5

Vss26

AD6

Vss27

AD7

Vss28

AD9

Vss29

AE12

Vss30

AE13

Vss31

AE14

Vss32

AE16

Vss33

AE17

Vss34

AE2

Vss35

AE20

Vss36

AE24

Vss37

AE3

Vss38

AE4

Vss39

AE6

Vss40

AE9

Vss41

AF13

Vss42

AF16

Vss43

AF18

Vss44

AF22

Vss45

AH26

Vss46

AF26

Vss47

AF27

Vss48

AF5

Vss49

AF7

Vss50

AF9

Vss51

AG13

Vss52

AG16

Vss53

AG18

Vss54

AG20

Vss55

AG23

Vss56

AG3

Vss57

AG6

Vss58

AG9

Vss59

AH12

Vss60

AH14

Vss61

AH17

Vss62

AH19

Vss63

AH2

Vss64

AH22

Vss65

AH25

Vss66

AH28

Vss67

AH5

Vss68

AH8

Vss69

AJ12

Vss70

AJ14

Vss71

AJ17

Vss72

AJ8

Vss73

B11

Vss74

B14

Vss75

B17

Vss76

B2

Vss77

B20

Vss78

B23

Vss79

B5

Vss80

B8

Vss81

C26

Vss82

C27

Vss83

E11

Vss84

E14

Vss85

E18

Vss86

E2

Vss87

E21

Vss88

E24

Vss89

E5

Vss90

E8

Vss91

F16

Vss92

F28

Vss93

F29

Vss94

G12

Vss95

G14

Vss96

G18

Vss97

G21

Vss98

G24

Vss99

G26

Vss100

G27

Vss101

G8

Vss102

H2

Vss103

H23

Vss104

H28

Vss105

H29

Vss106

ICH9M

GND

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

ICH9M

P/N

P/N

P/N

1

Vss107
Vss108
Vss109
Vss110
Vss111
Vss112
Vss113
Vss114
Vss115
Vss116
Vss117
Vss118
Vss119
Vss120
Vss121
Vss122
Vss123
Vss124
Vss125
Vss126
Vss127
Vss128
Vss129
Vss130
Vss131
Vss132
Vss133
Vss134
Vss135
Vss136
Vss137
Vss138
Vss139
Vss140
Vss141
Vss142
Vss143
Vss144
Vss145
Vss146
Vss147
Vss148
Vss149
Vss150
Vss151
Vss152
Vss153
Vss154
Vss155
Vss156
Vss157
Vss158
Vss159
Vss160
Vss161
Vss162
Vss163
Vss164
Vss165
Vss166
Vss167
Vss168
Vss169
Vss170
Vss171
Vss172
Vss173
Vss174
Vss175
Vss176
Vss177
Vss178
Vss179
Vss180
Vss181
Vss182
Vss183
Vss184
Vss185
Vss186
Vss187
Vss188
Vss189
Vss190
Vss191
Vss192
Vss193
Vss194
Vss195
Vss196
Vss197
Vss198

Vss199
Vss200
Vss201
Vss202
Vss203
Vss204
Vss205
Vss206
Vss207
Vss208
Vss209
Vss210

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

F83Vf

F83Vf

F83Vf

<OrgAddr2>

<OrgAddr2>

<OrgAddr2>

1

H5
J23
J26
J27
AC22
K28
K29
L13
L15
L2
L26
L27
L5
L7
M12
M13
M14
M15
M16
M17
M23
M28
M29
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
P12
P13
P14
P15
P16
P17
P2
P23
P28
P29
P4
P7
R11
R12
R13
R14
R15
R16
R17
R18
R28
T12
T13
T14
T15
T16
T17
T23
B26
U12
U13
U14
U15
U16
U17
AD23
U26
U27
U3
V1
V13
V15
V23
V28
V29
V4
V5
W26
W27
W3
Y1
Y28
Y29
Y4
Y5
AG28
AH6
AF2
B25

A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29

GND

SB-ICH9M(PWR)

SB-ICH9M(PWR)

SB-ICH9M(PWR)

Zack Kuo

Zack Kuo

Zack Kuo

23 100Thursday, July 16, 2009

23 100Thursday, July 16, 2009

23 100Thursday, July 16, 2009

of

of

of

Rev

Rev

Rev

1.1

1.1

1.1

5

4

3

2

1

ICH9-M

+3VS

D D

12

+12VS

2

SCL_3A<22>

SDA_3A<22>

C C

6 1

Q2401A

Q2401A
UM6K1N

UM6K1N

3 4

Q2401B

Q2401B
UM6K1N

UM6K1N

5

R2406

R2406

4.7KOhm

4.7KOhm

12

R2405

R2405

4.7KOhm

4.7KOhm

SMB_CLK_S <7,8,29,44,53>

SMB_DAT_S <7,8,29,44,53>

+3VSUS

+12VSUS

B B

SMB1_CLK<30,50,74>

SMB1_DAT<30,50,74>

A A

5

6 1

@

@

Q2404A

Q2404A
UM6K1N

UM6K1N

2

5

3 4

@

@

Q2404B

Q2404B
UM6K1N

UM6K1N

4

12

R2407

R2407

4.7KOhm

4.7KOhm

12

R2408

R2408

4.7KOhm

4.7KOhm

SM_LINK0 <22>

SM_LINK1 <22>

Title :

Title :

Title :

ICH9M-Other

ICH9M-Other

ICH9M-Other

Zack Kuo

Zack Kuo

Engineer:

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

P/N

P/N

P/N

Date: Sheet

Date: Sheet

3

2

Date: Sheet

Engineer:

F83Vf

F83Vf

F83Vf

<OrgAddr2>

<OrgAddr2>

<OrgAddr2>

Zack Kuo

Rev

Rev

Rev

1.1

1.1

24 100Thursday, July 16, 2009

24 100Thursday, July 16, 2009

1

24 100Thursday, July 16, 2009

1.1

of

of

of

5

4

3

2

1

Main Board

D D

C C

B B

A A

Title :

Title :

Title :

SB_****

SB_****

SB_****

Zack Kuo

Zack Kuo

Engineer:

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

P/N

P/N

P/N

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Engineer:

F83Vf

F83Vf

F83Vf

<OrgAddr2>

<OrgAddr2>

<OrgAddr2>

Zack Kuo

Rev

Rev

Rev

1.1

1.1

25 100Thursday, July 16, 2009

25 100Thursday, July 16, 2009

1

25 100Thursday, July 16, 2009

1.1

of

of

of

5

4

3

2

1

Main Board

D D

C C

B B

A A

Title :

Title :

Title :

SB_****

SB_****

SB_****

Zack Kuo

Zack Kuo

Engineer:

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

P/N

P/N

P/N

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Engineer:

F83Vf

F83Vf

F83Vf

<OrgAddr2>

<OrgAddr2>

<OrgAddr2>

Zack Kuo

Rev

Rev

Rev

1.1

1.1

26 100Thursday, July 16, 2009

26 100Thursday, July 16, 2009

1

26 100Thursday, July 16, 2009

1.1

of

of

of

5

4

3

2

1

Main Board

D D

C C

B B

A A

Title :

Title :

Title :

SB_****

SB_****

SB_****

Zack Kuo

Zack Kuo

Engineer:

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

P/N

P/N

P/N

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Engineer:

F83Vf

F83Vf

F83Vf

<OrgAddr2>

<OrgAddr2>

<OrgAddr2>

Zack Kuo

Rev

Rev

Rev

1.1

1.1

27 100Thursday, July 16, 2009

27 100Thursday, July 16, 2009

1

27 100Thursday, July 16, 2009

1.1

of

of

of

5

4

3

2

1

Main Board

D D

C C

B B

A A

Title :

Title :

Title :

SB_****

SB_****

SB_****

Zack Kuo

Zack Kuo

Engineer:

Engineer:

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

PEGATRON COMPUTER INC

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

P/N

P/N

P/N

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Engineer:

F83Vf

F83Vf

F83Vf

<OrgAddr2>

<OrgAddr2>

<OrgAddr2>

Zack Kuo

Rev

Rev

Rev

1.1

1.1

28 100Thursday, July 16, 2009

28 100Thursday, July 16, 2009

1

28 100Thursday, July 16, 2009

1.1

of

of

of