Pegatron EG70KB Schematics

5

4

3

2

1

SYSTEM PAGE REF.

01. Block Diagr am

02. ******

03. POWER DELIV ER CHART

04. POWER SEQUE NCE CHART

05. CLOCK DISTR IBUTION

06. SMBUS MAP

07. APU_MEM_&_P CIE_I_F

D D

C C

B B

08. APU_DISPLAY _CLK_MISC

09. APU_GEVENT_ GPIO_SD_AZ

10. APU_SATA_US B_LPC_SPI_C

11. APU_POWER_& _DECOUPLING

12. APU_STRAPS, SOCKET, HS

16. DDR3_SO-DIM M0

17. DDR3_SO-DIM M1

18. DDR3_CA/DQ Voltage

30. EC_IT8528

33. LAN Chip_BC M57780

34. ******

35. ******

36. ******

37. LVDS/eDP CO N

38. RGB_CONN

39. HDMI_CONN

40. Card Reader _RTS5209-GR

41. AUDIO_ALC32 25

42. AUDIO_HP/ M IC JACK

47. RESET CIRCU IT

48. KB/TP CONN

50. FAN/THERMAL SENSOR

55. MINI-PCIE C ARD (WLAN/BT)

60. HDD/ODD

61. USB CONN/ I O/B CONN

63. DC-IN/DISCH ARGE

65. PWR/B CONN/ DEBUG CONN

66. LED/NUT/SCR EW

70. GPU_MARS_PC IE_INTERFACE

71. GPU_MARS_MA IN

72. GPU_MARS_ X TAL

73. GPU_MARS_LV TMDS

74. GPU_MARS_ST RAPS/THERMAL/CT F

75. GPU_MARS_PO WER

76. GPU_MARS_DP _POWER/GND

77. GPU_MARS_ME M_INTERFACE

78. GPU_MARS_DD R3_CH_B

79. GPU_MARS_DD R3_CH_A

80. POWER_VCORE

81. POWER_SYSTE M

82. POWER_+0.95 VSUS

83. POWER_DDR & VTT

84. POWER_+1.8V SUS

85. POWER_+1.5V SUS

86. POWER_+1.5V S

87. POWER_VGA_V DDC

88. POWER_CHARG ER

89. POWER_***** *

90. POWER_DETEC T

91. POWER_LOAD SWITCH

92. POWER_PROTE CT

93. POWER_SIGNA L

94. GPU_MARS_PO WER_SEQUENCE

97. SB_PWR/B

98. SB_TP/B

99. SB_IO/B

CRT

LCD Panel

Touchpad
Keyboard

Page 48

PWM Fan

Speaker

Audio Jack
(IO DB)

RGB

*

eDP

Page 50

Page 38

Page 42

DMIC

*

EG70_KB BLOCK DIAGRAM

DDR3 1333/1600 MHz

DP0

SD

2

AMD FUSION APU

KABINI FT3

TPM

*

Debug Conn.

*

EC

NPCE795L

Page 30

SPI ROM

*

Azalia Codec

ALC3225

Page 41

NFC

LPC

SPI

SATA

Azalia

Page 7~12

SATA

0

HDD

SMB0

*

1

ODD

PCIEx1

USB 2.0

USB 3.0

Page 60

Page 60

0

1

3

8

0

DDR3 SO-DIMM

CardReader

MiniCard

WLAN + BT

1

CARD READER

RTS5209-GR

3

10/100/1000 LAN

BCM57780

USB 2.0
(M/B)

USB 2.0
(S/B)

CMOS Camera

internal MIC

USB3.0

*

Page 55

Page 40

Page 33

*

*

*

*

Page 16, 17

RJ45

*

Power

VCORE

Page 80

SYSTEM

Page 81

+0.95VSUS

Page 82

DDR3 & VTT

Page 83

+1.8VSUS

Page 84

+1.5VSUS

Page 85

VGA_VDDC

Page 87

CHARGER

Page 88

DETECT

Page 90

LOAD SWITCH

Page 91

PROTECT

Page 92

SIGNAL

Page 93

FLOWCHART

Page 94

A A

DISCHARGE

Page 63

RESET CIRCUIT

Page 47

5

DC & BATT. Conn.

SCREW HOLES

4

Page 63

Page 66

Title :

Title :

Title :

BLOCK DIAGRAM

BLOCK DIAGRAM

BLOCK DIAGRAM

Engineer:

Engineer:

EG70_KB

EG70_KB

EG70_KB

Engineer:

1

PEGATRON UNIHAN CORP.

‧

PEGATRON UNIHAN CORP.

‧

PEGATRON UNIHAN CORP.

‧

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

Mike_Chiu

Mike_Chiu

Mike_Chiu

1 99Monday, March 25, 2013

1 99Monday, March 25, 2013

1 99Monday, March 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

5

D D

C C

4

3

2

1

B B

A A

Title :

Title :

Title :

******

******

******

Mike_Chiu

Mike_Chiu

Engineer:

Engineer:

EG70_KB

EG70_KB

EG70_KB

Engineer:

1

PEGATRON UNIHAN CORP.

‧

PEGATRON UNIHAN CORP.

‧

PEGATRON UNIHAN CORP.

‧

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Mike_Chiu

2 99Monday, March 25, 2013

2 99Monday, March 25, 2013

2 99Monday, March 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

11.1V 65WHr

AC ADAPTER

15-16V 90W

AUXILIARY
AC ADAPTOR

AC ADAPTOR

15-16V 90W

SW

SW

SRJ

SRJ

SRJ

BATTERY

VIN_EXT

CHARGERBATTERY

MAX8731A

MOSFET

SWITCHED

SRJ

VIN_GFX

= FET PWR SW ITCH CONTROLLED BY GPIO

= FET PWR SW ITCH CONTROLLED BY JUMPER OR GPIO

= 1mO SENSE RESISTOR WITH JUMPER (KEVIN)

= 5mO SENSE RESISTOR WITH JUMPER (KEVIN)

= 50mO SENSE RESISTOR WITH JUMPER (KEVIN)

+VIN_ALW

CPU CORE PWM

(single phase)

CPU NB PWM

(single phase)

ISL62771

DDR3 PWM

LDO VTT

MAX8632

+0.95V SW

ISL6269A

+1.5V SW

ISL6269A

+1.8V SW

ISL6269A

+5V LDO

+3V LDO

+5V SW

+3V SW

MAX1533

+12V SW

MAX8792

+5V_ALW

+3.3V_ALW

SRJ

SRJ

SRJ

SRJ

SRJ

SRJ

SRJ

SRJ

SRJ

SRJ

SWITCH

SWITCH

APU_VDD_RUN@15A

APU_VDDNB_RUN@13A

APU_VDDIO_SUS@9A

MEM_VTT_RUN@1A

@8A

+0.95V_ALW

+1.5V_ALW@4A

+1.8V_ALW

@5A

+5V_MAIN

+3.3V_EC

SRJ

+3.3V_ALW@8A

+5V_ALW@8A

+12V_RUN

+5V_RUN

+3.3V_RUN

3V BATT

+1.5V_RUN

+3.3V_ALW

+3.3V_ALW

APU_VDD_RUN

APU_VDDNB_RUN

APU_VDDIO_SUS

+0.95V_RUN

+0.95V_RUN

+1.8_RUN

+1.8V_ALW

+3.3V_RUN

+3.3V_ALW

+1.5V_ALW

+12V_RUN

+3.3V_RUN

+3.3V_ALW

+1.5V_RUN

+3.3V_ALW

MXM_EN

+3.3V_RUN

+5V_RUN

+VIN_GFX

LDO

APU_VDDIO_SUS

MEM_VTT_RUN

SW

SW

Sensor
Resistor

SW

AMD KABINI FT3 APU

VDDCR_CPU

0.3-1.400V 15A

VDDCR_NB

0.7-1.325V @ 13A

VDDIO_MEM_S @ 3A

VDD_0.95 @ 5A

VDD_095_GFX @ 0.6A

VDD_095_USB3_DUAL+0.95V_DUAL
@ 1.0A

VDD_095_ALW @ 0.5A+0.95_ALW

VDD_18 @ 1.5A

VDD_18_ALW @ 0.5A

VDD_33 @ 0.2A

VDD_33_ALW @ 0.2A

VDDIO_AZ_ALW @ 100mA

VDDBT_RTC_G(1.5V)

DDRIII x2 SODIMM

VDD MEM 4A

VTT_MEM 0.5A

DESKTOP x1 PCIE Slot

+12V

+3.3V

+3.3VAux

MINI PCIE SLOT 2

1.5V(S0,S1) 0.5A
each

3.3V(S3,S5) 2.75A

SRJ

each

MINI PCIE SLOT 1(WLAN/BT)

1.5V(S0,S1) 0.5A
each

3.3V(S3,S5) 2.75A

SRJ

each

MXM3.0

SW

SW

BEAD

MXM_VDD_3.3V 1A

MXM_VDD_5V 2.5A

MXM_VDD_MAIN upto 10A

PCIe LAN

3.3V(S3,S5) TBD

+3.3V_RUN

+1.5V_RUN

+1.5V_RUN

+5V_RUN

+3.3V_RUN

+1.5V_ALW

+3.3V_EC

+3.3V_RUN

+5V_RUN

+5V_RUN

VDD_LED_BL_RUN

+VIN_ALW

+5V_ALW

+5V_ALW

+5V_ALW

+5V_ALW

+3.3V_RUN

+3.3V_RUN

+1.5V_RUN

+3.3V_RUN

+3.3V_ALW

+5V_RUN

+3.3V_RUN

+5V_RUN

+3.3V_RUN

SW

+VIN_ALW

+5V_RUN

+3.3V_RUN

+3.3V_RUN

BEAD

SW

SW

BEAD

SW

BEAD

CLOCK GEN

3.3V(S0,S1) 0.1A

1.5V 0.1A

1.5V 0.2A

HD AUDIO CODEC

5V(S0,S1) 22mA+1A(Class D)

BEAD

3.3V(S0,S1) 50mA

BEAD

1.5V(S3,S5) 30mA

BEAD

SMSC1308-EC

3.3V 0.5A

LCD PANEL

SRJ

SRJ

SRJ

3.3V 1.5A

5V 0.5A

BACK LIGHT

+5V

LED_BL

+VDD_MAIN

USB3 x2 REAR

5VDUAL

USB2 x1 MULTITOUCH

5VDUAL

USB2 x1 HDR

5VDUAL

USB TOUCHPAD

5VDUAL

USB WEBCAM/MIC

3.3V(S0,S1)0.2A

USB FINGERPRINT

3.3V(S0,S1)TBD

EXPRESSCARD

1.5V(S0,S1)0.7A

3.3V(S0,S1)1.3A

3.3V(S3,S5)0.3A

SATA HDD

5V(S0,S1) TBD

3.3V(S0,S1) TBD

SATA ODD

5V(S0,S1) TBD

USB BLUETOOTH

3.3V(S0,S1) TBD

MINI-DDI

+VIN_ALW

+5V

+3.3V

SD READER

+3.3V TBD

BEAD

SW

SW

SW

SW

SW

+1.8V_ALW

SPARE
LDO DNI

+1.8V_ALW

+1.5V_ALW

+0.95V_DUAL

SRJ

+0.95V_RUN

+0.95V_ALW

SWITCH

SWITCH

SRJ DNI

SRJ

SRJ

SRJ

+0.95V_DUAL

+1.8V_RUN

+1.5V_RUN

POWER DELIVER CHART

POWER DELIVER CHART

POWER DELIVER CHART

Title :

Title :

Title :

Mike_Chiu

Mike_Chiu

Mike_Chiu

Engineer:

Engineer:

EG70_KB

EG70_KB

EG70_KB

Engineer:

3 99Monday, March 25, 2013

3 99Monday, March 25, 2013

3 99Monday, March 25, 2013

PEGATRON UNIHAN CORP.

‧

PEGATRON UNIHAN CORP.

‧

PEGATRON UNIHAN CORP.

‧

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Rev

Rev

Rev

1.2

1.2

1.2

APU_PWRGD (LDT_PWROK)

APU_VDDNB_RUN (VDDCR_NB)

GROUP D

APU_VDD_RUN (VDDCR_CPU)

GROUP C

GROUP B

APU_VDDIO_SUS (VDDIO_MEM_S)

GROUP A

LDT_RST# (LDT_RST#)

APU_CLKIN (EXT)

APU_CLKIN (INT)

SYS_PWRGD

APU_VRM_PWRGD

+0.95V_RUN_PWRGD

+0.95V_RUN (VDD_10)

APU_GB_PG

+1.5V_RUN

+1.8V_RUN (VDD_18)

+3.3V_RUN(VDD_33)

MEM_VTT_RUN

PWR_BTN#_KB

RSM_RST_L

ALWRAILS_KB

EN_KB_ALW

+5V_RUN

SLP_S3#

SLP_S5#

+3.3V_EC

+5V_MAIN

+VIN_ALW

AC_OK

+VBAT

Power-up Sequencing for the KABINI Platform from Mechanic al Off

_ from S3 _

Power button pressed

5S delay

10mS

delay

+5V_ALW/+3.3V_ALW/+1.8V_ALW/+1.5V_ALW/+0.95V_ALW

0S for DT, >0S for NB

delay

Battery inserted/AC IN

31 mS Delay

running

15 mS Delay

AC not present scenario = LOW AC present = high

>1 uS

Req.

Req.

>1 mS

Req.

>1 mS

running

48mS chipset delay

_TO S3_

POWER SEQUENCE CHART

POWER SEQUENCE CHART

POWER SEQUENCE CHART

Title :

Title :

Title :

Mike_Chiu

Mike_Chiu

Mike_Chiu

Engineer:

Engineer:

EG70_KB

EG70_KB

EG70_KB

Engineer:

4 99Monday, March 25, 2013

4 99Monday, March 25, 2013

4 99Monday, March 25, 2013

PEGATRON UNIHAN CORP.

‧

PEGATRON UNIHAN CORP.

‧

PEGATRON UNIHAN CORP.

‧

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

Rev

Rev

Rev

1.2

1.2

1.2

INTERNAL CLOCK MODE

32.768K Hz

EC,LPC HEADER,

LPC TPM

SPI ROM & HEADER

HD AUDIO CODEC, AUDIO DSP

EC

A0_SODIMM

A1_SODIMM

LPC_CLK0
33MHZ

LPC_CLK1
33MHZ

SPI_CLK
xxHZ

HDA_BCLK_R AZ_BITCLK
24MHZ

RTC_CLK

32.768KHZ

M_A_DIM0_CLK0/M_A_DIM0_CLK#0
M_A_DIM0_CLK1/M_A_DIM0_CLK#1

M_A_DIM1_CLK2/M_A_DIM1_CLK#2
M_A_DIM1_CLK3/M_A_DIM1_CLK#3

LPCCLK0

LPCCLK1

SPI_CLK

RTCCLK

AMD FT3 CPU

CLOCK GENERATOR

48M HZ

FOR RTCFOR MASTER

32.768K Hz

GFX_CLKP/N

GPP_CLK0P/N

GPP_CLK1P/N

GPP_CLK2P/N

GPP_CLK3P/N

FOR SATA

25M Hz

NC

NC

CLK_PCIE1_WLAN/CLK_PCIE1_WLAN#
100MHZ

NC

CLK_PCIE3_LAN/CLK_PCIE3_LAN#
100MHZ

WLAN

LAN

25M Hz

CLOCK DISTRIBUTION

CLOCK DISTRIBUTION

CLOCK DISTRIBUTION

Title :

Title :

Title :

Mike_Chiu

Mike_Chiu

Engineer:

Engineer:

EG70_KB

EG70_KB

EG70_KB

Engineer:

PEGATRON UN IHAN CORP.

‧

PEGATRON UN IHAN CORP.

‧

PEGATRON UN IHAN CORP.

‧

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Mike_Chiu

5 99Monday, March 25, 2013

5 99Monday, March 25, 2013

5 99Monday, March 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

WLAN

Touch Pad

AMD

KABINI FT3 U0701

(MASTER)

SDA1
SCL1

SVC
SVD
SVT

ISL62771HRTZ-T

SVC
SVD

APU Core PWR PWM

SVT

GPU

GPU Thermal Sensor

SO-DIMMDDR 3

SDA0
SCL0

SO-DIMMDDR 3

BATTERY

SIC
SID

Plam Reset Thermal Sensor

ITE 8528

U3001

SMB1_DAT
SMB1_CLK

(MASTER)

SMB0_DAT
SMB0_CLK

BATTERY CHARGER

Title :

Title :

Title :

SMBUS MAP

SMBUS MAP

SMBUS MAP

Mike_Chiu

Mike_Chiu

Engineer:

Engineer:

EG70_KB

EG70_KB

EG70_KB

Engineer:

PEGATRON UN IHAN CORP.

‧

PEGATRON UN IHAN CORP.

‧

PEGATRON UN IHAN CORP.

‧

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Mike_Chiu

6 99Monday, March 25, 2013

6 99Monday, March 25, 2013

6 99Monday, March 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

+V_SM_VREF

+V_VREF_DDR3

M_A_A[15:0]<16,17>

M_A_BS[2:0]<16,17>

M_A_DM[7:0]<16,17>

M_A_DQS[7:0]<16,17>

M_A_DQS#[7:0]<16,17>

M_A_DIM0_CLK0<16>
M_A_DIM0_CLK#0<16>
M_A_DIM0_CLK1<16>
M_A_DIM0_CLK#1<16>
M_A_DIM1_CLK2<17>
M_A_DIM1_CLK#2<17>
M_A_DIM1_CLK3<17>
M_A_DIM1_CLK#3<17>

M_RESET#<16,17>
M_EVENT#<16,17>

M_A_DIM0_CKE0<16>
M_A_DIM0_CKE1<16>
M_A_DIM1_CKE0<17>
M_A_DIM1_CKE1<17>

M_A_DIM0_ODT0<16>
M_A_DIM0_ODT1<16>
M_A_DIM1_ODT0<17>
M_A_DIM1_ODT1<17>

M_A_DIM0_CS#0<16>
M_A_DIM0_CS#1<16>
M_A_DIM1_CS#0<17>
M_A_DIM1_CS#1<17>

M_A_RAS#<16,17>
M_A_CAS#<16,17>
M_A_WE#<16,17>

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

T0701 @

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

M_A_BS0
M_A_BS1
M_A_BS2

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

1

M_A_DQS0
M_A_DQS#0
M_A_DQS1
M_A_DQS#1
M_A_DQS2
M_A_DQS#2
M_A_DQS3
M_A_DQS#3
M_A_DQS4
M_A_DQS#4
M_A_DQS5
M_A_DQS#5
M_A_DQS6
M_A_DQS#6
M_A_DQS7
M_A_DQS#7

M_A_DIM0_CLK0
M_A_DIM0_CLK#0
M_A_DIM0_CLK1
M_A_DIM0_CLK#1
M_A_DIM1_CLK2
M_A_DIM1_CLK#2
M_A_DIM1_CLK3
M_A_DIM1_CLK#3

M_RESET#
M_EVENT#

M_A_DIM0_CKE0
M_A_DIM0_CKE1
M_A_DIM1_CKE0
M_A_DIM1_CKE1

M_A_DIM0_ODT0
M_A_DIM0_ODT1
M_A_DIM1_ODT0
M_A_DIM1_ODT1

M_A_DIM0_CS#0
M_A_DIM0_CS#1
M_A_DIM1_CS#0
M_A_DIM1_CS#1

M_A_RAS#
M_A_CAS#
M_A_WE#

U0701A

AG38

M_ADD0

W35

M_ADD1

W38

M_ADD2

W34

M_ADD3

U38

M_ADD4

U37

M_ADD5

U34

M_ADD6

R35

M_ADD7

R38

M_ADD8

N38

M_ADD9

AG34

M_ADD10

R34

M_ADD11

N37

M_ADD12

AN34

M_ADD13

L38

M_ADD14

L35

M_ADD15

AJ38

M_BANK0

AG35

M_BANK1

N34

M_BANK2

B32

M_DM0

B38

M_DM1

G40

M_DM2

N41

M_DM3

AG40

M_DM4

AN41

M_DM5

AY40

M_DM6

AY34

M_DM7

Y40

M_DM8

B33

M_DQS_H0

A33

M_DQS_L0

B40

M_DQS_H1

A40

M_DQS_L1

H41

M_DQS_H2

H40

M_DQS_L2

P41

M_DQS_H3

P40

M_DQS_L3

AH41

M_DQS_H4

AH40

M_DQS_L4

AP41

M_DQS_H5

AP40

M_DQS_L5

BA40

M_DQS_H6

AY41

M_DQS_L6

AY33

M_DQS_H7

BA34

M_DQS_L7

AA40

M_DQS_H8

Y41

M_DQS_L8

AC35

M_CLK_H0

AC34

M_CLK_L0

AA34

M_CLK_H1

AA32

M_CLK_L1

AE38

M_CLK_H2

AE37

M_CLK_L2

AA37

M_CLK_H3

AA38

M_CLK_L3

G38

M_RESET_L

AE34

M_EVENT_L

L34

M0_CKE0

J38

M0_CKE1

J37

M1_CKE0

J34

M1_CKE1

AN38

M0_ODT0

AU38

M0_ODT1

AN37

M1_ODT0

AR37

M1_ODT1

AJ34

M0_CS_L0

AR38

M0_CS_L1

AL38

M1_CS_L0

AN35

M1_CS_L1

AJ37

M_RAS_L

AL34

M_CAS_L

AL35

M_WE_L

AD40

M_VREF

AC38

M_VREFDQ

10369

12

Note: Open the sodlermask for Vias on Mem interface

C0704

1UF/6.3V

MEMORY

M_ZVDDIO_MEM_S

M_DATA0
M_DATA1
M_DATA2
M_DATA3
M_DATA4
M_DATA5
M_DATA6
M_DATA7

M_DATA8

M_DATA9
M_DATA10
M_DATA11
M_DATA12
M_DATA13
M_DATA14
M_DATA15

M_DATA16
M_DATA17
M_DATA18
M_DATA19
M_DATA20
M_DATA21
M_DATA22
M_DATA23

M_DATA24
M_DATA25
M_DATA26
M_DATA27
M_DATA28
M_DATA29
M_DATA30
M_DATA31

M_DATA32
M_DATA33
M_DATA34
M_DATA35
M_DATA36
M_DATA37
M_DATA38
M_DATA39

M_DATA40
M_DATA41
M_DATA42
M_DATA43
M_DATA44
M_DATA45
M_DATA46
M_DATA47

M_DATA48
M_DATA49
M_DATA50
M_DATA51
M_DATA52
M_DATA53
M_DATA54
M_DATA55

M_DATA56
M_DATA57
M_DATA58
M_DATA59
M_DATA60
M_DATA61
M_DATA62
M_DATA63

M_CHECK0
M_CHECK1
M_CHECK2
M_CHECK3
M_CHECK4
M_CHECK5
M_CHECK6
M_CHECK7

B30
A32
B35
A36
B29
A30
A34
B34

B37
A38
D40
D41
B36
A37
B41
C40

F40
F41
K40
K41
E40
E41
J40
J41

M41
N40
T41
U40
L40
M40
R40
T40

AF40
AF41
AK40
AK41
AE40
AE41
AJ40
AJ41

AM41
AN40
AT41
AU40
AL40
AM40
AR40
AT40

AV41
AW40
BA38
AY37
AU41
AV40
AY39
AY38

BA36
AY35
BA32
AY31
BA37
AY36
BA33
AY32

V41
W40
AB40
AC40
U41
V40
AA41
AB41

AD41

M_A_D0
M_A_D1
M_A_D2
M_A_D3
M_A_D4
M_A_D5
M_A_D6
M_A_D7

M_A_D8
M_A_D9
M_A_D10
M_A_D11
M_A_D12
M_A_D13
M_A_D14
M_A_D15

M_A_D16
M_A_D17
M_A_D18
M_A_D19
M_A_D20
M_A_D21
M_A_D22
M_A_D23

M_A_D24
M_A_D25
M_A_D26
M_A_D27
M_A_D28
M_A_D29
M_A_D30
M_A_D31

M_A_D32
M_A_D33
M_A_D34
M_A_D35
M_A_D36
M_A_D37
M_A_D38
M_A_D39

M_A_D40
M_A_D41
M_A_D42
M_A_D43
M_A_D44
M_A_D45
M_A_D46
M_A_D47

M_A_D48
M_A_D49
M_A_D50
M_A_D51
M_A_D52
M_A_D53
M_A_D54
M_A_D55

M_A_D56
M_A_D57
M_A_D58
M_A_D59
M_A_D60
M_A_D61
M_A_D62
M_A_D63

MEM_ZVDDIO

M_A_D[63:0] <16,17>

PCIE_RXP1_WLAN<55>
PCIE_RXN1_WLAN<55>

PCIE_RXP2_CR<40>
PCIE_RXN2_CR<40>

PCIE_RXP3_LAN<33>
PCIE_RXN3_LAN<33>

PEG_RXP0<70>
PEG_RXN0<70>

PEG_RXP1<70>
PEG_RXN1<70>

PEG_RXP2<70>
PEG_RXN2<70>

PEG_RXP3<70>
PEG_RXN3<70>

1 2

R0701 39.2Ohm

1%

R0701 connection to VDDIO_SUS should

be directly to the plane without a long trace

U0701B

R10

P_GPP_RXP0

R8

P_GPP_RXN0

R5

P_GPP_RXP1

R4

P_GPP_RXN1

N5

P_GPP_RXP2

N4

P_GPP_RXN2

N10

P_GPP_RXP3

N8

1 2

R0717 1.69KOhm

+0.95VS +0.95VS

+1.35V_DDR

+P_TX_ZVDD

ROUTE PCIE-LINK DIFF PAIR @ 85 OHM +/- 10%

P_GPP_RXN3

W8

P_TX_ZVDD_095

L5

P_GFX_RXP0

L4

P_GFX_RXN0

J5

P_GFX_RXP1

J4

P_GFX_RXN1

G5

P_GFX_RXP2

G4

P_GFX_RXN2

D7

P_GFX_RXP3

E7

P_GFX_RXN3

10369

PCIE

P_GPP_TXP0
P_GPP_TXN0

P_GPP_TXP1
P_GPP_TXN1

P_GPP_TXP2
P_GPP_TXN2

P_GPP_TXP3
P_GPP_TXN3

P_RX_ZVDD_095

P_GFX_TXP0
P_GFX_TXN0

P_GFX_TXP1
P_GFX_TXN1

P_GFX_TXP2
P_GFX_TXN2

P_GFX_TXP3
P_GFX_TXN3

L2
L1

K2

PCIE_TXP1_WLAN_C

K1

PCIE_TXN1_WLAN_C

J2

PCIE_TXP2_CR_C

J1

PCIE_TXN2_CR_C

H2

PCIE_TXP3_LAN_C

H1

PCIE_TXN3_LAN_C

W7

+P_RX_ZVDD

G2

PEG_TXP0_C

G1

PEG_TXN0_C

F2

PEG_TXP1_C

F1

PEG_TXN1_C

E2

PEG_TXP2_C

E1

PEG_TXN2_C

D2

PEG_TXP3_C

D1

PEG_TXN3_C

1 2

C0709 0.1UF/10V

1 2

C0710 0.1UF/10V

1 2

C0723 0.1UF/10V

1 2

C0724 0.1UF/10V

1 2

C0713 0.1UF/10V

1 2

C0714 0.1UF/10V

1 2

R0718 1KOhm

1 2

C0715 0.1UF/10V /DSC

1 2

C0716 0.1UF/10V /DSC

1 2

C0717 0.1UF/10V /DSC

1 2

C0718 0.1UF/10V /DSC

1 2

C0719 0.1UF/10V /DSC

1 2

C0720 0.1UF/10V /DSC

1 2

C0721 0.1UF/10V /DSC

1 2

C0722 0.1UF/10V /DSC

PCIE_TXP1_WLAN <55>
PCIE_TXN1_WLAN <55>

PCIE_TXP2_CR <40>
PCIE_TXN2_CR <40>

PCIE_TXP3_LAN <33>
PCIE_TXN3_LAN <33>

PEG_TXP0 <70>
PEG_TXN0 <70>

PEG_TXP1 <70>
PEG_TXN1 <70>

PEG_TXP2 <70>
PEG_TXN2 <70>

PEG_TXP3 <70>
PEG_TXN3 <70>

+1.35V_DDR

1 2

1 2

R0702
1KOhm

R0703
1KOhm

12

C0702

0.1UF/10V

+V_SM_VREF

12

C0703

1000PF/50V

Layout: Place within
1000 mils of the APU
socket.

1

T0702@

APU_MEM_&_PCIE_I_F

APU_MEM_&_PCIE_I_F

APU_MEM_&_PCIE_I_F

Title :

Title :

Title :

Mike_Chiu

Mike_Chiu

Engineer:

Engineer:

EG70_KB

EG70_KB

EG70_KB

Engineer:

PEGATRON UN IHAN CORP.

‧

PEGATRON UN IHAN CORP.

‧

PEGATRON UN IHAN CORP.

‧

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Mike_Chiu

7 99Monday, March 25, 2013

7 99Monday, March 25, 2013

7 99Monday, March 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

+1.8VS

R0801 300Ohm
R0804 300Ohm

+APU_VDD_33

R0803 1KOhm
R0805 1KOhm
R0806 1KOhm@
R0807 1KOhm@

APU_PROCHOT#<9,30>

VDDCR_NB_FB_H<80>
VDDCR_APU_FB_H<80>
VDDIO_SUS_FB_H<83>

VDDCR_APU_FB_L<80>

VDD_095_FB_H<82>
VDD_095_FB_L<82>

To Nano HDT

VR_HOT#<80>

1 2
1 2

1 2
1 2
1 2
1 2

T0850 @

LDT_RST#

APU_PWRGD

APU_ALERT#

PROCHOT#

APU_SIC
APU_SID

VCORE_PWROK<80>

1 2

R0860 0Ohm@

APU_PROCHOT#

1

VDDCR_NB_FB_L VSS_SENSE
VDDCR_NB_FB_H
VDDCR_APU_FB_H

VDDCR_APU_FB_L

APU_TCK<9>
APU_TMS<9>

APU_TDI<9>

APU_TDO<9>

APU_PWRGD_BUF<9>

LDT_RST#_BUF<9>

DBRDY<9>

DBREQ#<9>

APU_TRST#<9>

R0861 0Ohm

R0816 0Ohm

APU_TCK
APU_TMS
APU_TDI
APU_TDO
APU_PWRGD_BUF
LDT_RST#_BUF
DBRDY
DBREQ#
APU_TRST#

LDT_RST#

APU_PWRGD

R0859 0Ohm

R0812 0Ohm

1 2

1 2

HDMI_TXP2_APU<39>
HDMI_TXN2_APU<39>

HDMI_TXP1_APU<39>
HDMI_TXN1_APU<39>

HDMI_TXP0_APU<39>
HDMI_TXN0_APU<39>

HDMI_CLKP_APU<39>
HDMI_CLKN_APU<39>

1 2

1 2

APU_ALERT#<30>

EDP_TXP0<37>
EDP_TXN0<37>

EDP_TXP1<37>
EDP_TXN1<37>

APU_SVT<80>
APU_SVC<80>
APU_SVD<80>

APU_SIC<30,50,71>

APU_SID<30,50,71>

12

C0801

0.1UF/10V

@

1
2
3 4

+1.8VS

U0801

6

A1

Y1

5

VCC

GND

Y2

A2

SN74LVC2G07DCKR

@

DECOUPLING ON MINI-DDI CARD

HDMI_TXP2_APU
HDMI_TXN2_APU

HDMI_TXP1_APU
HDMI_TXN1_APU

HDMI_TXP0_APU
HDMI_TXN0_APU

HDMI_CLKP_APU
HDMI_CLKN_APU

EDP_TXP0
EDP_TXN0

EDP_TXP1
EDP_TXN1

APU_SVT
APU_SVC
APU_SVD

APU_SIC
APU_SID

1 2

R0810 0Ohm

1 2

R0811 0Ohm

PROCHOT#

1 2

R0864 0Ohm@

C0802

150PF/50V

@

1 2

R0813 0Ohm

1 2

R0814 0Ohm

12

R0817

49.9Ohm

@

close to APU

T0802 @

T0803 @

12

12

R0808
1KOhm

@

LDT_RST#
LDTRST_R

APU_PWRGD
LDTPWRGD_R

APU_ALERT#_R

12

C0803
150PF/50V

@

VSS_SENSE

VDD_095_FB_H
VDD_095_FB_L

1

1

close to APU

12

R0809
1KOhm

@

LDT_RST#_BUF

APU_PWRGD_BUF

T0813 @
T0814 @
T0815 @
T0816 @
T0817 @
T0818 @
T0819 @

VDD_095_FB_H

VDD_095_FB_L

1

APU_TDI

1

APU_TDO

1

APU_TCK

1

APU_TMS

1

APU_TRST#

1

DBRDY

1

APU_DBREQ#

VDDCR_NB_SENSE
VDDCR_CPU_SENSE
VDDIO_SUS_FB_HVDDIO_SUS_FB_H

U0701C

A9

TDP1_TXP0

B9

TDP1_TXN0

A10

TDP1_TXP1

B10

TDP1_TXN1

A11

TDP1_TXP2

B11

TDP1_TXN2

A12

TDP1_TXP3

B12

TDP1_TXN3

A4

LTDP0_TXP0

B4

LTDP0_TXN0

A5

LTDP0_TXP1

B5

LTDP0_TXN1

A6

LTDP0_TXP2

B6

LTDP0_TXN2

A7

LTDP0_TXP3

B7

LTDP0_TXN3

K15

DISP_CLKIN_H

H15

DISP_CLKIN_L

G31

SVT

D27

SVC

E29

SVD

B22

SIC

B21

SID

B20

APU_RST_L

A20

LDT_RST_L

B19

APU_PWROK

A19

LDT_PWROK

A22

PROCHOT_L

B18

ALERT_L

D29

TDI

D31

TDO

D35

TCK

D33

TMS

G27

TRST_L

B25

DBRDY

A25

DBREQ_L

D23

VDDCR_NB_SENSE

G23

VDDCR_CPU_SENSE

E25

VDDIO_MEM_S_SENSE

E23

VSS_SENSE

AV33

VDD_095_FB_H

AU33

VDD_095_FB_L

10369

+APU_VDD_33

R0862
1KOhm

1 2

CRT_HSYNC

R0863
1KOhm

@

1 2

DISPLAY/SVI2/JTAG/TEST

DP_150_ZVSS

DIECRACKMON

BYPASSCLK_H
BYPASSCLK_L

GIO_TSTDTM0_SERIALCLK

GIO_TSTDTM0_CLKINIT

M_ANALOGOUT

/DP_STEREOSYNC

DP_2K_ZVSS

DP_BLON

DP_DIGON

DP_VARY_BL

TDP1_AUXP

TDP1_AUXN

TDP1_HPD

LTDP0_AUXP
LTDP0_AUXN

LTDP0_HPD

DAC_RED

DAC_GREEN

DAC_BLUE

DAC_HSYNC
DAC_VSYNC

DAC_SCL
DAC_SDA

DAC_ZVSS

THERMDA
THERMDC

PLLTEST1
PLLTEST0

PLLCHRZ_H
PLLCHRZ_L

M_TEST

FREE_2

USB_ATEST0
USB_ATEST1
M_ANALOGIN

TMON_CAL

HDMI_EN

NOTE: DP_STEREOSYNC & APU_HSYNC PU FOR INTERNAL,
DP_STEREOSYNC & APU_HSYNC PD FOR CUSTOMER

B16

DP_150_ZVSS

A21

DP_2K_ZVSS

B17

ON_BLON_R

A17

ON_DIGON_R

A18

ON_VARY_R

D17

HDMI_DDC_CLK_APU

E17

HDMI_DDC_DATA_APU

H19

HDMI_HPD_APU

D15

EDP_AUXP

E15

EDP_AUXN

H17

EDP_HPD

B14

CRT_R_APU

A14

CRT_G_APU

B15

CRT_B_APU

G19

CRT_HSYNC

E19

CRT_VSYNC

D19

CRT_DDC_CLK

D21

CRT_DDC_DATA

A16

DAC_ZVSS

H27

APU_TEST4_THERMDA

H29

APU_TEST5_THERMDC

D25

APU_TEST6_DIRECRACKMON

A27

BP0
BP1
BP2
BP3

APU_TEST14_BP0

B27

APU_TEST15_BP1

A26

APU_TEST16_BP2

B26

APU_TEST17_BP3

B28

APU_TEST18_PLLTEST1

A28

APU_TEST19_PLLTEST0

B24

APU_TEST25_H_BYPASSCLK

A24

APU_TEST25_L_BYPASSCLK

AV35

APU_TEST28_H_PLLCHARZ

AU35

APU_TEST28_L_PLLCHARZ

E33

APU_TEST31_MEM_TEST

A29

APU_TEST34_L_TSTCLKIN_L

H21

APU_TEST36_GIO_TSTDTM0_SER_CLK

H25

APU_TEST37_GIO_TSTDTM0_CLKINIT

AJ10

USB_ATEST0

AJ8

USB_ATEST1

R32

M_ANALOGIN

N32

M_ANALOGOUT

AP29

TMON_CAL

E21

APU_TEST35_STEREOSYNC

1 2

R0818 150Ohm

1 2

R0819 2KOhm

1 2

R0820 0Ohm

1 2

R0821 0Ohm

1 2

R0822 0Ohm

HDMI_DDC_CLK_APU <39>
HDMI_DDC_DATA_APU <39>

HDMI_HPD_APU <39>

EDP_AUXP <37>
EDP_AUXN <37>

EDP_HPD <37>

CRT_HSYNC <38>
CRT_VSYNC <38>

CRT_DDC_CLK <38>
CRT_DDC_DATA <38>

1 2

R0826 499Ohm

1

T0846@

1

T0847@

1

T0826@

1

T0801@

1

1

1
1
1
1

LCDBL_EN_APU
LCDVDD_EN_APU
LCDBL_PWM_APU

12

R0827 1KOhm@

R0828 1KOhm@
R0829 1KOhm@
R0830 1KOhm
R0831 1KOhm
R0832 510Ohm
R0833 510Ohm
R0841 0Ohm@
R0842 0Ohm@

T0827@

R0836 1KOhm@
R0834 1KOhm@

T0828@

R0835 1KOhm@
R0837 1KOhm@

T0829@
T0830@
T0831@
T0832@

R0840 0Ohm@

R0838 1KOhm@
R0839 1KOhm@

NOTE: DP_STEREOSYNC PU FOR INTERNAL,

DP_STEREOSYNC PD FOR CUSTOMER

R0823
150Ohm

1%

1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

1 2
1 2
1 2
1 2

1 2

1 2
1 2

LCDBL_EN_APU <37>
LCDVDD_EN_APU <37>
LCDBL_PWM_APU <37>

JP0801 SHORT_PIN

JP0802 SHORT_PIN

JP0803 SHORT_PIN

12

12

R0825

R0824

150Ohm

150Ohm

1%

1%

+1.8VS

12

12

12

CRT_R <38>

CRT_G <38>

CRT_B <38>

Route BYPASSCLK_H/L
and PLLCHARZ_H/L differentially

APU_TEST35_STEREOSYNC
APU_TEST15_BP1
APU_TEST17_BP3

HDT+ header

+1.8VS

+1.8VS

12

R0858
1KOhm

@

12

R0855
10KOhm

@

12

R0856
10KOhm

@

APU_TRST#

12

R0857
10KOhm

@

1

T0843@

1

1

T0845@

T0844@

12

R0853
1KOhm

@

21

J0801 BTOB_CON_20P @

112
334

P_GND1

556
778
9910
111112
131314
151516
171718
191920

P_GND2

22

2

APU_TCK

4

APU_TMS

6

APU_TDI

8

APU_TDO

10

APU_PWRGD_BUF

12

LDT_RST#_BUF

14

DBRDY

16

DBREQ#

18

APU_TEST19_PLLTEST0

20

APU_TEST18_PLLTEST1

R0847 1KOhm@
R0848 1KOhm@
R0849 1KOhm@

12

C0805

0.01UF/25V

@

DBREQ# APU_DBREQ#

R0850 0Ohm@

1 2
1 2
1 2

1 2

+1.8VS

12

12

R0851
1KOhm

@

C0804
1UF/6.3V

@

APU_DISPLAY_CLK_MISC

APU_DISPLAY_CLK_MISC

APU_DISPLAY_CLK_MISC

Title :

Title :

Title :

Mike_Chiu

Mike_Chiu

Engineer:

Engineer:

EG70_KB

EG70_KB

EG70_KB

Engineer:

PEGATRON UN IHAN CORP.

‧

PEGATRON UN IHAN CORP.

‧

PEGATRON UN IHAN CORP.

‧

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet

Date: Sheet of

Date: Sheet of

Mike_Chiu

8 99Monday, March 25, 2013

8 99Monday, March 25, 2013

8 99Monday, March 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

of

PCIE_RST#_R

+3VSUS

+1.8VSUS

SATA_ODD_PRSNT#_R

+1.8VS

1 2

R0903
33Ohm

150PF/50V

1 2

R0912 47KOhm@

1 2

R0913 47KOhm@

+3VSUS

1 2

+3VS+3VSUS

+3VSUS +3VSUS

PCIE_RST#_U

12

C0901

R0935
10KOhm

@

Q0901
2N7002

@

1

G

3

2

D

S

07V040000001

1 2

R0994 0Ohm

/Zero_ODD

S5 Power Domain

SATA_ODD_DA#_R

CLK_REQ3_LAN#<33>

S0 Power Domain

HDA_BCLK<41>

HDA_SDO<41>

HDA_SDIN0<41>

HDA_SYNC<41>

HDA_RST#<41,42>

1 2

R0957 0Ohm@

1 2

R0956 0Ohm@

APU_TCK<8>

APU_TRST#<8>

DBRDY<8>

DBREQ#<8>

1
2

1 2

R0902 0Ohm

RSMRST#

12

C0903
1UF/6.3V

@

+3VS

R0993
10KOhm

@

1 2

HDA_BCLK
HDA_SDO

HDA_SYNC
HDA_RST#

JTAG_TRST#
JTAG_TDO
APU_TCK
APU_TRST#
DBRDY
DBREQ#

U0901

@

5

A

VCC

B

4

GND3Y

SN74LVC1G08DCKR

D0901

1 2

@

RB751V-40

1 2

R0997 0Ohm

SATA_ODD_PRSNT# <60>

1 2

R0958 0Ohm@

1 2

R0915 0Ohm

SATA_ODD_PRSNT#_R

1 2

R0925 33Ohm

1 2

R0926 33Ohm

1 2

R0927 33Ohm

1 2

R0928 33Ohm

+3V_J0901_1

BUF_PLT_RST# <33,40,47,55,70>

PM_RSMRST# <30>

PM_PWRBTN#<30>

PCIE_WAKE#<30,33>

PM_SUSB#<30>
PM_SUSC#<30>

PM_SUSB#
PM_SUSC#

RC_IN#<30>
A20GATE<30>
EXT_SCI#<30>
EXT_SMI#<30,65>

T0950@
T0951@
T0952@
T0953@
T0956@

T0939@

CLK_REQ1_WLAN#<55>
CLK_REQ2_CR#<40>

CLK_REQG_VGA#<71>

USB_OC#<61>

12

R0901
10KOhm

@

Nano HDT header

23

J0901 BTOB_CON_20P

9
11
13
15

112

SIDE424SIDE3

334
556
778
9

15
171718
191920

SIDE222SIDE1

21

2
4
6
8
10

10
121211
141413

16

16

18
20

@

12

R0963
10KOhm

@

+APU_VDD33_ALW

R0906

100KOhm

/Zero_ODD

1
1
1

1 2

R0910 2.2KOhm@

1 2

R0911 2.2KOhm@

12

LPC_RST#_R
PCIE_RST#_R

RSMRST#

PM_PWRBTN#
SYS_PWRGD
SYS_RST#_D
PCIE_WAKE#_APU

PM_SUSB#_R
PM_SUSC#_R

APU_TEST0

APU_TEST2

RC_IN#
A20GATE
EXT_SCI#
EXT_SMI#

IR_RX0
IR_TX0
IR_TX1
IR_RX1
IR_LED_R

GPIO60
CLK_REQ1_WLAN#
CLK_REQ2_CR#

APU_PCIE_LAN_CLKREQ#_R

CLK_REQG_VGA#

JTAG_TRST#
JTAG_TDI
JTAG_TCK
JTAG_TDO

HDA_BCLK_R
HDA_SDO_R
HDA_SDIN0
GPIO168
GPIO169
GPIO170
HDA_SYNC_R
HDA_RST#_R

APU_TMS <8>
APU_TDI <8>
APU_TDO <8>
APU_PWRGD_BUF <8>
LDT_RST#_BUF <8>

PM_SUSB#
PM_SUSC#

1 2

R0996 0Ohm@

1 2

R0907 0Ohm

1 2

R0908 0Ohm

R0909 0Ohm

1
1
1
1
1

1

R0930 0Ohm
R0905 0Ohm

T0902@
T0903@
T0904@

12

R0919
10KOhm

@

JTAG_TCK
JTAG_TMS
JTAG_TDI
APU_TMS
APU_TDI
APU_TDO
APU_PWRGD_BUF
LDT_RST#_BUF

1 2

1 2
1 2

APU_TEST1 JTAG_TMS

+3VSUS+1.8VSUS

XTAL_32K_IN

XTAL_32K_OUT

12

C0905

15PF/50V

12

R0962
10KOhm

SYS_RST#_D

+3VSUS

U0701D

AY4

LPC_RST_L

AY9

PCIE_RST_L

AY5

RSMRST_L

BA8

PWR_BTN_L

AM19

PWR_GOOD

AY7

SYS_RESET_L/GEVENT19_L

AW11

WAKE_L/GEVENT8_L

AY3

SLP_S3_L

BA5

SLP_S5_L

AU13

TEST0

AY10

TEST1/TMS

AY6

TEST2

AR23

KBRST_L

AR31

GA20IN/GEVENT0_L

AN5

LPC_PME_L/GEVENT3_L

AL7

LPC_SMI_L/GEVENT23_L

AP15

AC_PRES/IR_RX0/GEVENT16_L

AV13

IR_TX0/GEVENT21_L

BA9

IR_TX1/GEVENT6_L

BA10

IR_RX1/GEVENT20_L

AV15

IR_LED_L/LLB_L/GPIO184

AU29

CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/GPIO60

AW29

CLK_REQ1_L/GPIO61

AR27

CLK_REQ2_L/GPIO62

AV27

CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/GPIO63

AY29

CLK_REQG_L/GPIO65/OSCIN

AY8

USB_OC0_L/SPI_TPM_CS_L/TRST_L/GEVENT12_L

AW1

USB_OC1_L/TDI/GEVENT13_L

AV1

USB_OC2_L/TCK/GEVENT14_L

AY1

USB_OC3_L/TDO/GEVENT15_L

AN2

AZ_BITCLK

AN1

AZ_SDOUT

AK2

AZ_SDIN0/GPIO167

AK1

AZ_SDIN1/GPIO168

AM1

AZ_SDIN2/GPIO169

AL2

AZ_SDIN3/GPIO170

AM2

AZ_SYNC

AL1

AZ_RST_L

AJ2

X32K_X1

AJ1

X32K_X2

10369

X0901 32.768KHZ

1 4

2

3

R0918

1 2

20MOhm

SATA_ODD_DA#_R

12

C0904

15PF/50V

LPC_RST#<30>

LPC_RST#

150PF/50V

+3VS

1 2

R0975 10KOhm@

1 2

R0976 10KOhm

1 2

R0982 2.2KOhm

1 2

R0983 2.2KOhm

+3VA

1 2

R0981 10KOhm

+3VSUS

1 2

R0973 10KOhm

ACPI/SD/AZ/GPIO/RTC/MISC

R0936
10KOhm

@

1 2

C0902

R0995 0Ohm@

1 2

R0904 33Ohm

12

DGPU_PWROK

EDP_ON#

SCLK0_DIMM

SDATA0_DIMM

LID_SW#

USB_OC#

SD_PWR_CTRL
SD_CLK/GPIO73

SD_CMD/GPIO74

SD_CD/GPIO75

SD_WP/GPIO76

SD_DATA0/GPIO77
SD_DATA1/GPIO78
SD_DATA2/GPIO79
SD_DATA3/GPIO80

SD_LED/GPIO45

SCL0/GPIO43

SDA0/GPIO47

SCL1/GPIO227
SDA1/GPIO228

GPIO49
GPIO50
GPIO51
GPIO55
GPIO57
GPIO58
GPIO59
GPIO64

SPKR/GPIO66

GPIO68
GPIO69
GPIO70
GPIO71

GPIO174

GEVENT2_L
GEVENT4_L

GEVENT7_L
GEVENT10_L
GEVENT11_L
GEVENT17_L

BLINK/GEVENT18_L

GEVENT22_L

GENINT1_L/GPIO32
GENINT2_L/GPIO33

FANOUT0/GPIO52

FANIN0/GPIO56

RTCCLK

1

G

3

D

S

/Zero_ODD

1 2

Q0902
2N7002

07V040000001

2

BA23
AY22

AY23
AY20
BA20

BA22
AY21
AY24
BA24

AY25

AU25
AV25

AY11
BA11

AP27
AY28
BA28
AV23
AP21
BA26
AV19
AY27
BA27
AU21
AY26
AV21
AM21
BA3

AV17
BA4
AR15
AP17
AP11
AN8
AU17
BA6

BA29
AP23

AV31
AU31

AV11

LPC_RST#_R

+3VS+3VSUS

R0937
10KOhm

/Zero_ODD

1 2

R0942
10KOhm

R0943

2.2KOhm

@

1
1

1
1
1

1
1
1
1

1

T0925@

1

T0906@

1

T0926@

R0924 0Ohm@
R0944 0Ohm

R0923 0Ohm

1

T0929@

1

T0970@

1

T0971@

1

@

1

R0922 0Ohm

1
1

SATA_ODD_DA# <60>

SD_PWR_CTRL
SD_CLK_GPIO73

SD_CMD_GPIO74
SD_CMD_GPIO75
SD_CMD_GPIO76

SD_CMD_GPIO77
SD_CMD_GPIO78
SD_CMD_GPIO79
SD_CMD_GPIO80

GPIO45

SCLK0_DIMM
SDATA0_DIMM

APU_SCL1
APU_SDA1

SATA_ODD_PWRGT
BT_ON_OFF#
PCB_ID1
PCB_ID2
GPIO57
GPIO58
EDP_ON#_APU
DGPU_HOLD_RST#_APU
APU_SPKR
VGA_PWRON_APU
WLAN_RST#_APU
GPIO70
APU_PROCHOT#
PCB_ID0

WLAN_LED
SPKR_MUTE#
WLAN_ON
GEVENT10_L
GEVENT11_L
SATA_ODD_DA#_R
BLINK_GEVENT18_L

1 2

D0903 RB751V-40

GENINT1_L_GPIO32
DGPU_PWROK_APU

FANOUT0_GPIO52
FANIN0_GPIO56

+3VSUS

1 2

12

PCB_ID1
PCB_ID2

T0913@
T0914@

T0915@
T0916@
T0917@

T0918@
T0919@
T0920@
T0923@

1 2
1 2

1 2

T0982@

T0958@

1 2

T0946@
T0945@

PM_PWROK<30,91>

R1.0 R1.1 R2.0 R2.1

0
0 0

SCLK0_DIMM <16, 17>
SDATA0_DIMM <16,17>

APU_SCL1 <28>
APU_SDA1 <28>

SATA_ODD_PWRGT <60>
BT_ON_OFF# <55>

APU_PROCHOT# <8,30>

WLAN_LED <12,66>
SPKR_MUTE# <42>
WLAN_ON <55>

LID_SW# <30,37,65>

0 1

1

EDP_ON# <30>
DGPU_HOLD_RST# <70>
APU_SPKR <41>
VGA_PWRON <63,91>
WLAN_RST#_APU <55>

DGPU_PWROK <87,92>

PEGATRON UN IHAN CORP.

PEGATRON UN IHAN CORP.

PEGATRON UN IHAN CORP.

Date: Sheet of

Date: Sheet of

Date: Sheet of

PCB_ID0

PCB_ID1

PCB_ID2

11

1 2

1 2

R0992 0Ohm@

R0990 1KOhm

‧

‧

‧

Size Project Name

Size Project Name

Size Project Name

C

C

C

+3VSUS

R0920
10KOhm

/DSC

1 2

R0921
10KOhm

/UMA

1 2

+3VSUS

R0955

R0954

1KOhm

1KOhm

@

@

1 2

R0952

R0950

15KOhm

15KOhm

@

@

1 2

1 2

EG70_KB

EG70_KB

EG70_KB

+3VS +3VS

1 2

1 2

R0951
1KOhm

@

1 2

R0953
15KOhm

@

1 2

12

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

R0945
10KOhm

@

R0946
10KOhm

@

APU_TEST0
APU_TEST1
APU_TEST2

R0947
10KOhm

@

1 2

R0948
10KOhm

@

1 2

SYS_PWRGDPM_PWROK

R0991

1.27KOhm

1%

1 2

APU_GEVENT_GPIO_SD_AZ

APU_GEVENT_GPIO_SD_AZ

APU_GEVENT_GPIO_SD_AZ

Mike_Chiu

Mike_Chiu

Mike_Chiu

9 99Monday, March 25, 2013

9 99Monday, March 25, 2013

9 99Monday, March 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

LPC_CLK0_R<12>

LPC_CLK1_R<12>

1AV200000087

C1011 5.6PF/50V

4

2

C1012 5.6PF/50V

1AV200000087

U0701E

SATA_TXP0<60>

HDD

ODD

C1001

12

12PF/50V

@

4

2

C1002

12

12PF/50V

@

X1002
48MHZ

07V080000033

1 3

XTAL_48M_OUT_R

LPC_CLK0_R

LPC_CLK1_R SPI_WP_L_HSPI

1 2

R1050 0Ohm

SATA_TXN0<60>

SATA_RXN0<60>
SATA_RXP0<60>

SATA_TXP1<60>

SATA_TXN1<60>

SATA_RXN1<60>
SATA_RXP1<60>

R1001

X1001

1MOhm

25MHZ

@

@

1 2

1 3

R1006
1MOhm

1 2

SATA_TXP0
SATA_TXN0

SATA_RXN0
SATA_RXP0

SATA_TXP1
SATA_TXN1

SATA_RXN1
SATA_RXP1

+0.95VS

SATA_LED#<66>

CLK_PCIE0_VGA<70>

CLK_PCIE0_VGA#<70>

CLK_PCIE1_WLAN<55>

CLK_PCIE1_WLAN#<55>

CLK_PCIE2_CR<40>
CLK_PCIE2_CR#<40>

CLK_PCIE3_LAN<33>

CLK_PCIE3_LAN#<33>

X1002
For TV:25MHz (07V080000010)
For KB:48MHz (07V080000025)

LPC_CLK0_DEBUG<65>

LPC_CLK1_EC<30>

LPC_AD0<30,65>
LPC_AD1<30,65>
LPC_AD2<30,65>
LPC_AD3<30,65>

LPC_FRAME#<12,30,65>

LPC_SERIRQ<30,65>

1 2

R1003 1KOhm

1 2

R1004 1KOhm

+3VS

RN1001B
RN1001A

RN1003A
RN1003B

RN1004B
RN1004A

RN1005A
RN1005B

1

T1003@

LPC_CLK0_DEBUG
LPC_CLK1_EC

1

T1002@

1

T1011@

1

T1014@

1 2

R1020 560Ohm

34

0Ohm

12

0Ohm

12

0Ohm

34

0Ohm

34

0Ohm

12

0Ohm

12

0Ohm

34

0Ohm

1 2

R1002 22Ohm

1 2

R1007 22Ohm

LPC_PD_L_GEVENT5_L_SPI_TPM_CS_L

SATA_CALRN
SATA_CALRP

SATA_LED#

XTAL_25M_IN

XTAL_25M_OUT

CLK_PCIE0_VGA_APU
CLK_PCIE0_VGA#_APU

CLK_PCIE1_WLAN_APU
CLK_PCIE1_WLAN#_APU

CLK_PCIE2_CR_APU
CLK_PCIE2_CR#_APU

CLK_PCIE3_LAN_APU
CLK_PCIE3_LAN#_APU

INT_48M_R

XTAL_48M_IN

XTAL_48M_OUT

LPC_CLK0_R
LPC_CLK1_R

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_DRQ#0
LPC_SERIRQ
LPC_CLKRUN#_R

BA14

SATA_TX0P

AY14

SATA_TX0N

BA16

SATA_RX0N

AY16

SATA_RX0P

AY19

SATA_TX1P

BA19

SATA_TX1N

AY17

SATA_RX1N

BA17

SATA_RX1P

AR19

SATA_ZVSS

AP19

SATA_ZVDD_095

BA30

SATA_ACT_L/GPIO67

AY12

SATA_X1

BA12

SATA_X2

U4

GFX_CLKP

U5

GFX_CLKN

AC8

GPP_CLK0P

AC10

GPP_CLK0N

AE4

GPP_CLK1P

AE5

GPP_CLK1N

AC4

GPP_CLK2P

AC5

GPP_CLK2N

AA5

GPP_CLK3P

AA4

GPP_CLK3N

AP13

X14M_25M_48M_OSC

N2

X48M_X1

N1

X48M_X2

AY2

LPCCLK0

AW2

LPCCLK1

AT2

LAD0

AT1

LAD1

AR2

LAD2

AR1

LAD3

AP2

LFRAME_L

AP1

LDRQ0_L

AV29

SERIRQ/GPIO48

AP25

LPC_CLKRUN_L

AV2

LPC_PD_L/GEVENT5_L/SPI_TPM_CS_L

10369

CLK/SATA/USB/SPI/LPC

USBCLK/14M_25M_48M_OSC

USB_SS_ZVDD_095_USB3_DUAL

SPI_CS1_L/GPIO165
SPI_CS2_L/GPIO166

SPI_HOLD_L/GEVENT9_L

USB_ZVSS

USB_HSD0P

USB_HSD0N

USB_HSD1P

USB_HSD1N

USB_HSD2P

USB_HSD2N

USB_HSD3P

USB_HSD3N

USB_HSD4P

USB_HSD4N

USB_HSD5P

USB_HSD5N

USB_HSD6P

USB_HSD6N

USB_HSD7P

USB_HSD7N

USB_HSD8P

USB_HSD8N

USB_HSD9P

USB_HSD9N

USB_SS_ZVSS

USB_SS_0TXP
USB_SS_0TXN

USB_SS_0RXP

USB_SS_0RXN

USB_SS_1TXP
USB_SS_1TXN

USB_SS_1RXP

USB_SS_1RXN

SPI_CLK/GPIO162

SPI_DO/GPIO163

SPI_DI/GPIO164

SPI_WP_L/GPIO161

W4

AG4

AL4
AL5

AJ4
AJ5

AG7
AG8

AG1
AG2

AF1
AF2

AE1
AE2

AD1
AD2

AC1
AC2

AB1
AB2

AA1
AA2

AE10
AE8

T2
T1

V2
V1

R1
R2

W1
W2

AU7
AW9
AR4
AR11
AR7
AU11
AU9

USB_RCOMP

INT_48M

R1010 11.8KOHM

USB_PP0
USB_PN0

USB_PP1
USB_PN1

USB_PP2
USB_PN2

USB_PP3
USB_PN3

USB_PP5
USB_PN5

USB_PP8
USB_PN8

USB_SS_ZVSS
USB_SS_ZVDD

USB3_TXP0
USB3_TXN0

USB3_RXP0
USB3_RXN0

SPI_CLK_HSPI
SPI_CS1_L_HSPI
SPI_CS2_L_GPIO166
SPI_DO_HSPI
SPI_DI_HSPI
SPI_HOLD_L_HSPI

1

T1001@

1 2

USB_PP0 <61>
USB_PN0 <61>

USB_PP1 <61>
USB_PN1 <61>

USB_PP2 <55>
USB_PN2 <55>

USB_PP3 <37>
USB_PN3 <37>

USB_PP5 <61>
USB_PN5 <61>

USB_PP8 <61>
USB_PN8 <61>

1 2

R1012 1KOhm

1 2

R1013 1KOhm

USB3_TXP0 <61>
USB3_TXN0 <61>

USB3_RXP0 <61>
USB3_RXN0 <61>

1 2

R1021 0Ohm /SHARE

1 2

R1022 0Ohm /SHARE

1

T1004@

1 2

R1023 0Ohm /SHARE

1 2

R1024 0Ohm /SHARE

1 2

R1025 0Ohm /SHARE

1 2

R1026 0Ohm /SHARE

USB2.0 (MB)

USB2.0 (SB)

WLAN/BT

Camera

USB2.0 (SB) @

USB3.0 (MB)

+VDD_095_USB3_DUAL

USB3.0 (MB)

SPI_CLK_HSPI_R < 30>
SPI_CS1_L_HSPI_R <30>

SPI_DO_HSPI_R <30>
SPI_DI_HSPI_R <30>
SPI_HOLD_L_HSPI_R <30>
SPI_WP_L_HSPI_R <30>

+3VA_EC

+3VSUS

@

R1040 0Ohm

R1041 0Ohm

12

12

+3VM_SPI_R

R1042 0Ohm

+3VM_SPI

D1001

1

3

2

@

1V/0.2A

12

non-Share ROM

0.1UF/16V

/NONSHARE

U1001

SPI_CS1_L_HSPI
SPI_DI_HSPI SPI2_HOLD#
SPI_WP_L_HSPI SPI2_CLK

1 2

R1031 0Ohm /NONSHARE

1 2

R1032 33Ohm /NONSHARE

1 2

R1033 0Ohm /NONSHARE

SPI2_CS#1
SPI2_SO

3VM_SPI2_WP#

1

CS#

2

DO(IO1)

3

WP#(IO2)

4

GND

W25Q32FVSSIQ

05V000000022

HOLD#/RESET#(IO3)

(32Mb)

VCC

CLK

DI(IO0)

/NONSHARE

8
7
6
5

C1030

12

+3VM_SPI

R1035 0Ohm /NONSHARE
R1036 33Ohm /NONSHARE

SPI2_SI

R1037 33Ohm /NONSHARE

1 2
1 2
1 2

SPI_HOLD_L_HSPI
SPI_CLK_HSPI
SPI_DO_HSPI

LPC

APU EC

R

/SHARE

HSPI

FSPI

R R R

4MB
ROM

4MB
ROM

/SHARE/NONSHARE /NONSHARE

/SHARE

SPI_HOLD_L_HSPI

SPI_WP_L_HSPI

SPI_CS1_L_HSPI

1 2

R1027 10KOhm

1 2

R1018 10KOhm

1 2

R1019 10KOhm

/NONSHARE/NONSHARE

128KB
ROM

Title :

Title :

Title :

Engineer:

Engineer:

EG70_KB

EG70_KB

EG70_KB

Engineer:

PEGATRON UN IHAN CORP.

‧

PEGATRON UN IHAN CORP.

‧

PEGATRON UN IHAN CORP.

‧

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

+3VM_SPI

APU_SATA_USB_LPC_SPI_C

APU_SATA_USB_LPC_SPI_C

APU_SATA_USB_LPC_SPI_C

Mike_Chiu

Mike_Chiu

Mike_Chiu

1.2

1.2

1.2

10 99Monday, March 25, 2013

10 99Monday, March 25, 2013

10 99Monday, March 25, 2013

Rev

Rev

Rev

S5 DOMAIN S0 DOMAIN

1 2

R1108 0Ohm

+VDDCR_NB

12

C1151
10UF/6.3V

12

C1153
1UF/6.3V

12

C1162
1UF/6.3V

+VDDCR_CPU

12

C1165
10UF/6.3V

12

C1167
1UF/6.3V

12

C1175
1UF/6.3V

+3VSUS +APU_VDD33_ALW

1 2

R1102 0Ohm

12

C1102
1UF/6.3V

+APU_VDD18_ALW+1.8VSUS

12

R11030Ohm

C1105 4.7UF/6.3V
C1106 1UF/6.3V

+VDD_095_USB3_DUAL+0.95VS+0.95VSUS

1 2
1 2
1 2
1 2

C1107 1UF/6.3V
C1108 1UF/6.3V
C1109 1UF/6.3V
C1110 1UF/6.3V
C1111 1UF/6.3V
C1112 180PF/50V

1 2

C1113 10UF/6.3V

1 2

C1114 10UF/6.3V

1 2

C1115 1UF/6.3V

1 2

C1116 1UF/6.3V

1 2

C1117 1UF/6.3V

1 2

C1118 180PF/50V

12

C1104
180PF/50V

1 2

R1106 0Ohm@

1 2

R1107 0Ohm

+VDD_0.95_ALW+0.95VSUS

C1119 1UF/6.3V
C1120 1UF/6.3V
C1121 1UF/6.3V
C1122 1UF/6.3V

Layout Notice : Place on Bottom Layer

12

12

12

C1152
10UF/6.3V

C1154
1UF/6.3V

C1163
1UF/6.3V

12

12

C1157
10UF/6.3V

C1155
1UF/6.3V

C1164
1UF/6.3V

12

C1158
10UF/6.3V

C1159
1UF/6.3V

12

12

12

12

Layout Notice : Place on Bottom Layer

12

12

12

C1166
10UF/6.3V

C1168
1UF/6.3V

C1176
1UF/6.3V

12

12

12

C1171
10UF/6.3V

C1169
1UF/6.3V

C1177
1UF/6.3V

12

12

12

C1170
180PF/50V

C1172
1UF/6.3V

C1179
1UF/6.3V

12

12

12

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

C1156
180PF/50V

C1160
1UF/6.3V

C1196

0.1UF/10V

C1173
1UF/6.3V

C1178
1UF/6.3V

+3VS +APU_VDD_33

12

C1103
1UF/6.3V

+0.95VS

@

+APU_VDD18_ALW

+VDD_095_USB3_DUAL

+VDD_0.95_ALW

PLACE C1194 CLOSE TO PIN

12

C1161
1UF/6.3V

+1.35V_DDR

12

12

C1198

C1197

0.1UF/10V

0.1UF/10V

12

C1174
1UF/6.3V

12

R1105
0Ohm

+APU_VDD33_ALW

+VCC_RTC

C1194

0.22UF/6.3V

+1.35V_DDR

+APU_VDDIO_AZ

12

U0701F

J35

3A 18A/21A

VDDIO_MEM_S_1

L32

VDDIO_MEM_S_2

L37

VDDIO_MEM_S_3

N35

VDDIO_MEM_S_4

R31

VDDIO_MEM_S_5

R37

VDDIO_MEM_S_6

U32

VDDIO_MEM_S_7

U35

VDDIO_MEM_S_8

W31

VDDIO_MEM_S_9

W32

VDDIO_MEM_S_10

W37

VDDIO_MEM_S_11

AA31

VDDIO_MEM_S_12

AA35

VDDIO_MEM_S_13

AC32

VDDIO_MEM_S_14

AC37

VDDIO_MEM_S_15

AE31

VDDIO_MEM_S_16

AE35

VDDIO_MEM_S_17

AG32

VDDIO_MEM_S_18

AG37

VDDIO_MEM_S_19

AJ35

VDDIO_MEM_S_20

AL32

VDDIO_MEM_S_21

AL37

VDDIO_MEM_S_22

AR35

VDDIO_MEM_S_23

AL10

0.1A

VDDIO_AZ_ALW_1

AL11

VDDIO_AZ_ALW_2

B1

0.5A

VDD_18_ALW_1

B2

VDD_18_ALW_2

AL13

0.2A

VDD_33_ALW_1

AM13

VDD_33_ALW_2

AR5

1A

VDD_095_USB3_DUAL_1

AU4

VDD_095_USB3_DUAL_2

AV7

VDD_095_USB3_DUAL_3

AW5

VDD_095_USB3_DUAL_4

AE11

0.5A

VDD_095_ALW_1

AE13

VDD_095_ALW_2

AJ11

VDD_095_ALW_3

AJ13

VDD_095_ALW_4

AN4

VDDBT_RTC_G

10369

1 2

R1115 10KOhm

1

JRST1101

1

2

SGL_JUMP

@

2

Layout Notice : Place on Bottom Layer

12

12

12

C1183
10UF/6.3V

C1189
1UF/6.3V

12

12

C1182
180PF/50V

C1190
1UF/6.3V

12

12

C1180
10UF/6.3V

C1187
1UF/6.3V

12

C1181
10UF/6.3V

C1188
1UF/6.3V

1 2

POWER

12

L21

VDDCR_CPU_1

L23

VDDCR_CPU_2

L25

VDDCR_CPU_3

L27

VDDCR_CPU_4

L29

VDDCR_CPU_5

N21

VDDCR_CPU_6

N23

VDDCR_CPU_7

N27

VDDCR_CPU_8

R21

VDDCR_CPU_9

R23

VDDCR_CPU_10

R27

VDDCR_CPU_11

U21

VDDCR_CPU_12

U23

VDDCR_CPU_13

U27

VDDCR_CPU_14

W21

VDDCR_CPU_15

W23

VDDCR_CPU_16

W27

VDDCR_CPU_17

AA21

VDDCR_CPU_18

AA23

VDDCR_CPU_19

AA27

VDDCR_CPU_20

AC21

VDDCR_CPU_21

AC23

VDDCR_CPU_22

AC27

VDDCR_CPU_23

AE21

VDDCR_CPU_24

AE23

VDDCR_CPU_25

AE27

VDDCR_CPU_26

L13

VDDCR_NB_1

L17

VDDCR_NB_2

N11

VDDCR_NB_3

N13

VDDCR_NB_4

N17

VDDCR_NB_5

R11

VDDCR_NB_6

R13

VDDCR_NB_7

R17

VDDCR_NB_8

U13

VDDCR_NB_9

U17

VDDCR_NB_10

W13

VDDCR_NB_11

W17

VDDCR_NB_12

AA13

VDDCR_NB_13

AA17

VDDCR_NB_14

AC13

VDDCR_NB_15

AC17

VDDCR_NB_16

AE15

VDDCR_NB_17

AE17

VDDCR_NB_18

AE19

VDDCR_NB_19

AG17

VDDCR_NB_20

AG21

VDDCR_NB_21

A2

VDD_18_1

A3

VDD_18_2

B3

VDD_18_3

C3

VDD_18_4

AM15

VDD_33_1

AM17

VDD_33_2

AG23

VDD_095_1

AG27

VDD_095_2

AJ21

VDD_095_3

AJ27

VDD_095_4

AL21

VDD_095_5

AL23

VDD_095_6

AL27

VDD_095_7

AM23

VDD_095_8

AM25

VDD_095_9

U10

VDD_095_GFX_1

W10

VDD_095_GFX_2

AA10

VDD_095_GFX_3

+VCC_RTC_R +RTC_BAT

C1101
1UF/6.3V

CMOS Settings

Clear CMOS

Keep CMOS

+VDDCR_CPU

+VDDCR_NB

15A/17A

+1.8VS

1.5A

+APU_VDD_33

0.2A

5A

0.6A

FOR TV BOARD
+1.1V_CLK will be

1.1V but it will be

0.95V for Kabini.

@

1 2

R1112 1KOhm

U1101

1

GND

3

VIN

2

VOUT

AP2138N-1.5TRG1

06V280000027

JRST1101

Shunt

Open
(Default)

+0.95VS

R1109 0Ohm

+1.5VSUS +APU_VDDIO_AZ

1 2

R1110 0Ohm@

+1.5VS

1 2

R1116 0Ohm

1 2

C1149 1UF/6.3V

1 2

C1150 10UF/6.3V

+VCC_RTC_U

12

C1199
1UF/6.3V

+1.8VS

C1133 10UF/6.3V
C1126 1UF/6.3V
C1127 1UF/6.3V
C1128 1UF/6.3V
C1129 1UF/6.3V
C1130 1UF/6.3V
C1131 1UF/6.3V
C1134 1UF/6.3V
C1132 180PF/50V

+0.95VS

3

D1101

1V/0.2A

Layout Notice : Place C1183 and C1185 close to +1.5V_DDR plane Split

12

12

12

C1184
180PF/50V

12

C1191
1UF/6.3V

12

C1185
180PF/50V

C1192
1UF/6.3V

C1186
180PF/50V

12

C1193
1UF/6.3V

12

C1195
1UF/6.3V

12

12

C1123
1UF/6.3V

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

PLACE ON TOP LAYER

1 2

C1135 4.7UF/6.3V

1 2

C1137 1UF/6.3V

1 2

C1139 180PF/50V

1 2

C1136 1UF/6.3V

1 2

C1138 1UF/6.3V

1 2

C1140 1UF/6.3V

1 2

C1141 1UF/6.3V

1 2

C1142 1UF/6.3V

1 2

C1143 1UF/6.3V

1 2

C1144 1UF/6.3V

1 2

C1148 10UF/6.3V

1 2

C1147 10UF/6.3V

1 2

C1145 1UF/6.3V

1 2

C1146 180PF/50V

1

2

C1124
1UF/6.3V

12

C1125

180PF/50V

1 2

R11011KOhm

3
4

RTC battery

+RTCBAT+3VA

12

U0701G

A8

VSS_1

A13

VSS_2

A23

VSS_3

A31

VSS_4

A35

VSS_5

A39

VSS_6

B8

VSS_7

B13

VSS_8

B23

VSS_9

B31

VSS_10

B39

VSS_11

C1

VSS_12

C2

VSS_13

C5

VSS_14

C7

VSS_15

C9

VSS_16

C11

VSS_17

C13

VSS_18

C15

VSS_19

C17

VSS_20

C19

VSS_21

C21

VSS_22

C23

VSS_23

C25

VSS_24

C27

VSS_25

C29

VSS_26

C31

VSS_27

C33

VSS_28

C35

VSS_29

C37

VSS_30

C39

VSS_31

C41

VSS_32

D9

VSS_33

D11

VSS_34

D13

VSS_35

E3

VSS_36

E4

VSS_37

E9

VSS_38

E11

VSS_39

E13

VSS_40

E27

VSS_41

E31

VSS_42

E35

VSS_43

E38

VSS_44

E39

VSS_45

G3

VSS_46

G7

VSS_47

G11

VSS_48

G13

VSS_49

G15

VSS_50

G17

VSS_51

G21

VSS_52

G25

VSS_53

G29

VSS_54

G35

VSS_55

G37

VSS_56

G39

VSS_57

G41

VSS_58

H11

VSS_59

H13

VSS_60

H23

VSS_61

H31

VSS_62

10369

J1101
BATT_HOLDER_2P

12V20GBSM000

U0701H

GND

J3

VSS_63

J7

VSS_64

J8

VSS_65

J39

VSS_66

K11

VSS_67

K13

VSS_68

K17

VSS_69

K19

VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98

VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124

K21
K23
K25
K27
K29
K31
L3
L7
L8
L10
L11
L15
L19
L31
L39
L41
M1
M2
N3
N7
N15
N19
N25
N29
N31
N39
P1
P2
R3
R7
R15
R19
R25
R29
R39
R41
U1
U2
U3
U7
U8
U11
U15
U19
U25
U29
U31
U39
W3
W5
W11
W15
W19
W25

AA11
AA15
AA19
AA25
AA29
AA39

AC11
AC15
AC19
AC25
AC29
AC31
AC39
AC41

AE25
AE29
AE32
AE39

AG10
AG11
AG13
AG15
AG19
AG25
AG29
AG31
AG39
AG41

PEGATRON UNIHAN CORP.

‧

PEGATRON UNIHAN CORP.

‧

PEGATRON UNIHAN CORP.

‧

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

W29

VSS_125

W39

VSS_126

W41

VSS_127

Y1

VSS_128

Y2

VSS_129

AA3

VSS_130

AA7

VSS_131

AA8

VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138

AC3

VSS_139

AC7

VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148

AE3

VSS_149

AE7

VSS_150
VSS_151
VSS_152
VSS_153
VSS_154

AG3

VSS_155

AG5

VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166

AH1

VSS_167

AH2

VSS_168

AJ3

VSS_169

AJ7

VSS_170

AJ15

VSS_171

AJ17

VSS_172

AJ19

VSS_173

AJ23

VSS_174

AJ25

VSS_175

AJ29

VSS_176

AJ31

VSS_177

AJ32

VSS_178

AJ39

VSS_179

AL3

VSS_180

AL8

VSS_181

AL15

VSS_182

AL17

VSS_183

AL19

VSS_184

AL25

VSS_185

AL29

VSS_186

10369

EG70_KB

EG70_KB

EG70_KB

GND

VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242

VSSBG_DAC

VBURN

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

PSEN

AL39
AL41
AM11
AM27
AM31
AN3
AN7
AN39
AP31
AR3
AR13
AR17
AR21
AR25
AR29
AR39
AR41
AU1
AU2
AU3
AU15
AU19
AU23
AU27
AU39
AV9
AW3
AW7
AW13
AW15
AW17
AW19
AW21
AW23
AW25
AW27
AW31
AW33
AW35
AW37
AW39
AW41
AY13
AY15
AY18
AY30
BA2
BA7
BA13
BA15
BA18
BA21
BA25
BA31
BA35
BA39
A15
AL31
AM29

APU_PWR & DECOUPLING

APU_PWR & DECOUPLING

APU_PWR & DECOUPLING

Mike_Chiu

Mike_Chiu

Mike_Chiu

11 99Monday, M arch 25, 2013

11 99Monday, M arch 25, 2013

11 99Monday, M arch 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

STRAP PINS

+3VSUS +3VSUS +3VSUS +3VSUS

12

R1206

10KOhm

LPC_CLK1_R<10>

LPC_CLK0_R<10> LPC_FRAME# <10,30,65>

LPC_CLK1_R

LPC_CLK0_R LPC_FRAME#

1 2

R1207 22Ohm

12

R1208

@

10KOhm

12

R1210

2KOhm

12

R1209

10KOhm

12

R1211

@

2.2KOhm

12

R1212

@

10KOhm

WLAN_LED <9,66>

12

R1213

2.2KOhm

OVERLAP COMMON PADS WHERE

POSSIBLE FOR DUAL-OP RESISTORS.

PLACE STRAP RESISTORS DIRECTLY

ON CLK NETS (WITHOUT ST UBS)

LPC_CLK0

BOOT FAIL TIMER

ENABLED

1

BOOT FAIL TIMER CLKGEN

DISABLED

0

(DEFAULT)

LPC_CLK1

CLKGEN

ENABLED

(DEFAULT)

DISABLED

LFRAME_L

SPI ROM

(DEFAULT)

LPC ROM

WLAN_LED

+1.8V SPI ROM

+3.3V SPI ROM

(DEFAULT)

APU_STRAPS, SOCKET, HS

APU_STRAPS, SOCKET, HS

APU_STRAPS, SOCKET, HS

Title :

Title :

Title :

Mike_Chiu

Mike_Chiu

Engineer:

Engineer:

EG70_KB

EG70_KB

EG70_KB

Engineer:

PEGATRON UN IHAN CORP.

‧

PEGATRON UN IHAN CORP.

‧

PEGATRON UN IHAN CORP.

‧

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Mike_Chiu

12 99Monday, March 25, 2013

12 99Monday, March 25, 2013

12 99Monday, March 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

5

4

+1.35V_DDR

12

+

CE1603
220UF/4V

@

+1.35V_DDR

3

Layout Note: Place these caps near SO DIMM 0

12

C1609
10UF/6.3V

12

C1610
10UF/6.3V

12

C1611
10UF/6.3V

12

C1612
10UF/6.3V

@

12

C1613
10UF/6.3V

@

12

C1620
10UF/6.3V

@

2

+0.675VS

12

C1616
1UF/6.3V

12

C1617
1UF/6.3V

12

C1618
1UF/6.3V

@

12

C1619
1UF/6.3V

@

1

0~7

8~15

16~23

24~31

32~39

40~47

48~55

56~63

M_A_D[63:0] <7,17>M_A_A[15:0]<7,17>

+1.35V_DDR +1.35V_DDR

Layout Note: Place these caps near SO DIMM 0

+1.35V_DDR

M_EVENT#<7,17>

+V_VREF_DQ_DIMM0_1

MAX: 2.68A
TDC: 2.68A

12

C1605

0.1UF/10V

1 2

R1603 1KOhm

M_EVENT#

T1601 @

12

C1624

1000PF/16V

12

C1622

1000PF/16V

12

C1606

0.1UF/10V

1

W/S=20/20

12

C1623

0.1UF/10V

W/S=20/20

12

C1625

0.1UF/10V

J1601B

75

VDD1

81

VDD3

87

VDD5

93

VDD7

99

VDD9

105

VDD11

111

VDD13

117

VDD15

123

VDD17

2

VSS1

8

VSS3

13

VSS5

19

VSS7

25

VSS9

31

VSS11

37

VSS13

43

VSS15

48

VSS17

54

VSS19

60

VSS21

65

VSS23

71

VSS25

127

VSS27

133

VSS29

138

VSS31

144

VSS33

150

VSS35

155

VSS37

161

VSS39

167

VSS41

172

VSS43

178

VSS45

184

VSS47

189

VSS49

195

VSS51

198

EVENT#

125

TEST

77

NC1

122

NC2

126

VREFCA

1

VREFDQ

DDR3_DIMM_204P

12V02GIRM001

VDD2
VDD4
VDD6

VDD8
VDD10
VDD12
VDD14
VDD16
VDD18

VSS2
VSS4
VSS6

VSS8
VSS10
VSS12
VSS14
VSS16
VSS18
VSS20
VSS22
VSS24
VSS26
VSS28
VSS30
VSS32
VSS34
VSS36
VSS38
VSS40
VSS42
VSS44
VSS46
VSS48
VSS50
VSS52

GND1
GND2

NP_NC1
NP_NC2

VTT1

VTT2

VDDSPD

76
82
88
94
100
106
112
118
124

3
9
14
20
26
32
38
44
49
55
61
66
72
128
134
139
145
151
156
162
168
173
179
185
190
196

207
208

205
206

203
204

199

MAX: 0.75A
TDC: 0.75A

+0.675VS

12

C1615

0.1UF/10V

12

C1607

0.1UF/10V

+3VS+V_VREF_CA_DIMM0_1

12

12

C1608

0.1UF/10V

C1614

2.2UF/6.3V

@

vx_c0402_small

D D

M_A_DIM0_CLK1<7>

M_A_DIM0_CLK#1<7>

M_A_DIM0_CLK0<7>

M_A_DIM0_CLK#0<7>

M_A_DIM0_CS#1<7>
M_A_DIM0_CS#0<7>

M_A_DIM0_ODT1<7>
M_A_DIM0_ODT0<7>

M_A_WE#<7,17>
M_A_RAS#<7,17>
M_A_CAS#<7,17>

C C

SMBus Slave Address: A0H

M_A_DQS[7:0]<7,17>

M_A_DQS#[7:0]<7,17>

SCLK0_DIMM<9,17>

B B

SDATA0_DIMM<9,17>

M_A_DIM0_CKE1<7>
M_A_DIM0_CKE0<7>

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

M_A_BS[2:0]<7, 17>

R1601 10KOhm
R1602 10KOhm

M_A_DM[7:0]<7,17>

1 2
1 2

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

M_A_BS2
M_A_BS1
M_A_BS0

M_A_DQS7
M_A_DQS#7
M_A_DQS6
M_A_DQS#6
M_A_DQS5
M_A_DQS#5
M_A_DQS4
M_A_DQS#4
M_A_DQS3
M_A_DQS#3
M_A_DQS2
M_A_DQS#2
M_A_DQS1
M_A_DQS#1
M_A_DQS0
M_A_DQS#0

M_A_DM7
M_A_DM6
M_A_DM5
M_A_DM4
M_A_DM3
M_A_DM2
M_A_DM1
M_A_DM0

J1601A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

102

CK1

104

CK1#

101

CK0

103

CK0#

121

S1#

114

S0#

120

ODT1

116

ODT0

113

WE#

110

RAS#

115

CAS#

79

BA2

108

BA1

109

BA0

74

CKE1

73

CKE0

201

SA1

197

SA0

188

DQS7

186

DQS#7

171

DQS6

169

DQS#6

154

DQS5

152

DQS#5

137

DQS4

135

DQS#4

64

DQS3

62

DQS#3

47

DQS2

45

DQS#2

29

DQS1

27

DQS#1

12

DQS0

10

DQS#0

187

DM7

170

DM6

153

DM5

136

DM4

63

DM3

46

DM2

28

DM1

11

DM0

202

SCL

200

SDA

DDR3_DIMM_204P

12V02GIRM001

M:1202-00EE000
S:1202-00KB000

0

1

2

3

4

5

6

7

DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

RESET#

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9

5

M_A_D4

7

M_A_D5

15

M_A_D3

17

M_A_D2

4

M_A_D1

6

M_A_D0

16

M_A_D6

18

M_A_D7

21

M_A_D12

23

M_A_D13

33

M_A_D11

35

M_A_D10

22

M_A_D9

24

M_A_D8

34

M_A_D14

36

M_A_D15

39

M_A_D16

41

M_A_D17

51

M_A_D19

53

M_A_D18

40

M_A_D20

42

M_A_D21

50

M_A_D22

52

M_A_D23

57

M_A_D29

59

M_A_D28

67

M_A_D26

69

M_A_D31

56

M_A_D24

58

M_A_D25

68

M_A_D30

70

M_A_D27

129

M_A_D33

131

M_A_D36

141

M_A_D35

143

M_A_D34

130

M_A_D32

132

M_A_D37

140

M_A_D38

142

M_A_D39

147

M_A_D44

149

M_A_D41

157

M_A_D43

159

M_A_D42

146

M_A_D40

148

M_A_D45

158

M_A_D47

160

M_A_D46

163

M_A_D49

165

M_A_D48

175

M_A_D51

177

M_A_D55

164

M_A_D53

166

M_A_D52

174

M_A_D50

176

M_A_D54

181

M_A_D56

183

M_A_D57

191

M_A_D62

193

M_A_D58

180

M_A_D60

182

M_A_D61

192

M_A_D63

194

M_A_D59

30

M_RESET# <7,17>

A A

Title :

Title :

Title :

DDR3 DIMM0

DDR3 DIMM0

DDR3 DIMM0

Mike_Chiu

Mike_Chiu

Engineer:

Engineer:

EG70_KB

EG70_KB

EG70_KB

Engineer:

1

PEGATRON UN IHAN CORP.

‧

PEGATRON UN IHAN CORP.

‧

PEGATRON UN IHAN CORP.

‧

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Mike_Chiu

16 99Monday, March 25, 2013

16 99Monday, March 25, 2013

16 99Monday, March 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

5

4

3

2

1

VDD2
VDD4
VDD6

VDD8
VDD10
VDD12
VDD14
VDD16
VDD18

VSS2
VSS4
VSS6

VSS8
VSS10
VSS12
VSS14
VSS16
VSS18
VSS20
VSS22
VSS24
VSS26
VSS28
VSS30
VSS32
VSS34
VSS36
VSS38
VSS40
VSS42
VSS44
VSS46
VSS48
VSS50
VSS52

GND1
GND2

NP_NC1
NP_NC2

VTT1

VTT2

VDDSPD

+0.675VS

12

76
82
88
94
100
106
112
118
124

3
9
14
20
26
32
38
44
49
55
61
66
72
128
134
139
145
151
156
162
168
173
179
185
190
196

207
208

205
206

203
204

199

C1716
1UF/6.3V

12

C1717
1UF/6.3V

12

C1707

0.1UF/10V

+0.675VS

12

C1715

0.1UF/10V

12

12

C1718
1UF/6.3V

@

C1708

0.1UF/10V

+3VS

12

C1714

2.2UF/6.3V

@

12

C1719
1UF/6.3V

@

D D

M_A_A[15:0]<7,16>

M_A_DIM1_CLK3<7>

M_A_DIM1_CLK#3<7>

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

M_A_DIM1_CLK2<7>

M_A_DIM1_CLK#2<7>

M_A_DIM1_CS#1<7>
M_A_DIM1_CS#0<7>

M_A_DIM1_ODT1<7>
M_A_DIM1_ODT0<7>

M_A_WE#<7,16>
M_A_RAS#<7,16>
M_A_CAS#<7,16>

M_A_BS[2:0]<7,16>

M_A_DIM1_CKE1<7>
M_A_DIM1_CKE0<7>

RN1701B
RN1701A

+3VS

M_A_DM[7:0]<7,16>

SCLK0_DIMM<9,16>
SDATA0_DIMM<9,16>

C C

R1.1

SMBus Slave Address: A2H

M_A_DQS[7:0]<7,16>

M_A_DQS#[7:0]<7,16>

B B

10KOhm
10KOhm

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

M_A_BS2
M_A_BS1
M_A_BS0

34
12

M_A_DQS7
M_A_DQS#7
M_A_DQS6
M_A_DQS#6
M_A_DQS5
M_A_DQS#5
M_A_DQS4
M_A_DQS#4
M_A_DQS3
M_A_DQS#3
M_A_DQS2
M_A_DQS#2
M_A_DQS1
M_A_DQS#1
M_A_DQS0
M_A_DQS#0

M_A_DM7
M_A_DM6
M_A_DM5
M_A_DM4
M_A_DM3
M_A_DM2
M_A_DM1
M_A_DM0

J1701A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

102

CK1

104

CK1#

101

CK0

103

CK0#

121

S1#

114

S0#

120

ODT1

116

ODT0

113

WE#

110

RAS#

115

CAS#

79

BA2

108

BA1

109

BA0

74

CKE1

73

CKE0

201

SA1

197

SA0

188

DQS7

186

DQS#7

171

DQS6

169

DQS#6

154

DQS5

152

DQS#5

137

DQS4

135

DQS#4

64

DQS3

62

DQS#3

47

DQS2

45

DQS#2

29

DQS1

27

DQS#1

12

DQS0

10

DQS#0

187

DM7

170

DM6

153

DM5

136

DM4

63

DM3

46

DM2

28

DM1

11

DM0

202

SCL

200

SDA

DDR3_DIMM_204P

12V02GBRM001

+1.35V_DDR +1.35V_DDR

12

+

CE1703
220UF/4V

@

5

M_A_D1

DQ0

7

M_A_D0

DQ1

15

M_A_D3

DQ2

17

M_A_D2

DQ3

4

M_A_D4

DQ4

6

M_A_D5

DQ5

16

DQ6

18

DQ7

21

M_A_D8

DQ8

23

M_A_D9

DQ9

33

M_A_D11

35

M_A_D10

22

M_A_D12

24

M_A_D13

34

M_A_D14

36

M_A_D15

39
41
51
53
40
42
50
52
57

M_A_D24

59

M_A_D25

67

M_A_D30

69

M_A_D27

56

M_A_D29

58

M_A_D28

68

M_A_D26

70

M_A_D31

129
131
141
143
130
132
140
142
147

M_A_D41

149

M_A_D40

157

M_A_D47

159

M_A_D46

146

M_A_D45

148

M_A_D44

158

M_A_D42

160

M_A_D43

163
165
175
177
164
166
174
176
181

M_A_D60

183

M_A_D57

191

M_A_D63

193

M_A_D59

180

M_A_D61

182

M_A_D56

192

M_A_D58

194

M_A_D62

30

M_A_D7
M_A_D6

M_A_D17
M_A_D16
M_A_D19
M_A_D18
M_A_D20
M_A_D21
M_A_D23
M_A_D22

M_A_D33
M_A_D32
M_A_D34
M_A_D35
M_A_D36
M_A_D37
M_A_D39
M_A_D38

M_A_D49
M_A_D48
M_A_D50
M_A_D54
M_A_D53
M_A_D52
M_A_D51
M_A_D55

M:1202-00FG000
S:1202-00K8000

0

1

2

3

4

5

6

7

DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

RESET#

0~7

8~15

16~23

24~31

32~39

40~47

48~55

56~63

M_RESET# <7,16>

Layout Note: Place these caps near SO DIMM 1

12

C1709
22UF/6.3V

M_A_D[63:0] <7,16>

12

12

C1710
22UF/6.3V

+1.35V_DDR +1.35V_DDR

C1711
22UF/6.3V

12

C1705

0.1UF/10V

12

C1712
22UF/6.3V

@

12

Layout Note: Place these caps near SO DIMM 1

M_EVENT#<7,16>

M_EVENT#

T1701 @

+V_VREF_CA_DIMM0_1

12

C1724

1000PF/16V

+V_VREF_DQ_DIMM0_1

12

C1722

1000PF/16V

12

C1706

0.1UF/10V

1

W/S=20/20

12

C1723

0.1UF/10V

W/S=20/20

12

C1725

0.1UF/10V

C1713
22UF/6.3V

@

12

C1726
22UF/6.3V

@

J1701B

75

VDD1

81

VDD3

87

VDD5

93

VDD7

99

VDD9

105

VDD11

111

VDD13

117

VDD15

123

VDD17

2

VSS1

8

VSS3

13

VSS5

19

VSS7

25

VSS9

31

VSS11

37

VSS13

43

VSS15

48

VSS17

54

VSS19

60

VSS21

65

VSS23

71

VSS25

127

VSS27

133

VSS29

138

VSS31

144

VSS33

150

VSS35

155

VSS37

161

VSS39

167

VSS41

172

VSS43

178

VSS45

184

VSS47

189

VSS49

195

VSS51

198

EVENT#

125

TEST

77

NC1

122

NC2

126

VREFCA

1

VREFDQ

DDR3_DIMM_204P

12V02GBRM001

H:5.2mm

A A

DDR3 DIMM1

DDR3 DIMM1

DDR3 DIMM1

Title :

Title :

Title :

Mike_Chiu

Mike_Chiu

Engineer:

Engineer:

EG70_KB

EG70_KB

EG70_KB

Engineer:

1

PEGATRON UN IHAN CORP.

‧

PEGATRON UN IHAN CORP.

‧

PEGATRON UN IHAN CORP.

‧

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Mike_Chiu

17 99Monday, March 25, 2013

17 99Monday, March 25, 2013

17 99Monday, March 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

5

4

3

2

1

DDR3 Vref

D D

For DDR3_VREF command & address.

+1.35V_DDR

R1811
1KOhm

@

1 2

C C

M_VREF<30,83>

R1814 0Ohm

12

C1804

0.1UF/10V

@

12

C1803

0.1UF/16V

@

1 2

12

R1813
1KOhm

@

1 2

R1807 0Ohm

+V_VREF_CA_DIMM0_1

For DDR3_VREF Data

+V_VREF_DQ_DIMM0_1

+V_VREF_DDR3

B B

+V_VREF_DDR3

A A

5

4

Reserved

1 2

R1812 0Ohm@

12

C1802

0.01UF/16V

@

+1.35V_DDR

1 2

+1.35V_OP

1 2

R1806

20KOhm

@

R1805

20KOhm

@

1

3

R1809 0Ohm@

+5V

52

U1801

V+

+

­V-

@

LMV321IDBVR

3

1 2

12

C1801

0.1UF/16V

@

4

+V_VREF_DQ_DIMM0_1

12

C1805
1UF/6.3V

@

CA/DQ Voltage

CA/DQ Voltage

CA/DQ Voltage

Title :

Title :

Title :

Mike_Chiu

Mike_Chiu

Engineer:

Engineer:

EG70_KB

EG70_KB

EG70_KB

Engineer:

1

PEGATRON UN IHAN CORP.

‧

PEGATRON UN IHAN CORP.

‧

PEGATRON UN IHAN CORP.

‧

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Mike_Chiu

18 99Monday, March 25, 2013

18 99Monday, March 25, 2013

18 99Monday, March 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

5

4

3

2

1

APU_SCL1

APU_SDA1

D D

+3VSUS +3VS

1 2

R2801 2.2KOhm

1 2

R2802 2.2KOhm

C C

B B

APU_SCL1 < 9>

APU_SDA1 <9>

APU_SCL1

APU_SDA1

1 2

R2803 0Ohm@

Q2801A

UM6K1N

6 1

3 4

Q2801B

UM6K1N

1 2

R2804 0Ohm@

APU_SCL1_Q

1 2

R2805 4.7KOhm@

@

2

5

@

APU_SDA1_Q

1 2

R2806 47KOhm@

1 2

R2807 4.7KOhm@

APU_SCL1_Q <48 ,55>

+12VS

APU_SDA1_Q <48,55 >

A A

Title :

Title :

Title :

Engineer:

Engineer:

PEGATRON UNIHAN CORP.

‧

PEGATRON UNIHAN CORP.

‧

PEGATRON UNIHAN CORP.

‧

Size Project Name

Size Project Name

Size Project Name

B

B

B

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

EG70_KB

EG70_KB

EG70_KB

Engineer:

1

SMBUS

SMBUS

SMBUS

Mike_Chiu

Mike_Chiu

Mike_Chiu

28 96Monday, March 25, 2013

28 96Monday, March 25, 2013

28 96Monday, March 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

5

APU_PROCHOT# <8,9>

LAD0
LAD1
LAD2
LAD3

EDP_ON#_EC

EC_XIN

GPJ7

U3001

3

VBAT

127

VSTBY(PLL)

121

VSTBY5

114

VSTBY4

92

VSTBY3

50

VSTBY2

26

VSTBY1

74

AVCC

11

VCC

10

LAD0/GPM0

9

LAD1/GPM1

8

LAD2/GPM2

7

LAD3/GPM3

13

LPCCLK/GPM4

6

LFRAME#/GPM5

22

LPCRST#/GPD2

5

SERIRQ/GPM6

15

ECSMI#/GPD4

23

ECSCI#/GPD3

126

GA20/GPB5

4

KBRST#/GPB6

14

WRST#

58

KSI0/STB#

59

KSI1/AFD#

60

KSI2/INIT#

61

KSI3/SLIN#

62

KSI4

63

KSI5

64

KSI6

65

KSI7

36

KSO0/PD0

37

KSO1/PD1

38

KSO2/PD2

39

KSO3/PD3

40

KSO4/PD4

41

KSO5/PD5

42

KSO6/PD6

43

KSO7/PD7

44

KSO8/ACK#

45

KSO9/BUSY

46

KSO10/PE

51

KSO11/ERR#

52

KSO12/SLCT

53

KSO13

54

KSO14

55

KSO15

119

CRX0/GPC0

123

CTX0/TMA0/GPB2

85

PS2CLK0/TMB0/CEC/GPF0

86

PS2DAT0/TMB1/GPF1

87

PS2CLK1/DTR0#/GPF2

88

PS2DAT1/RTS0#/GPF3

89

PS2CLK2/GPF4

90

PS2DAT2/GPF5

110

SMCLK0/GPB3

111

SMDAT0/GPB4

115

SMCLK1/GPC1

116

SMDAT1/GPC2

117

SMCLK2/PECI/GPF6

118

SMDAT2/PECIRQT#/GPF7

81

DAC5/RIG0#/GPJ5

80

DAC4/DCD0#/GPJ4

79

DAC3/TACH1B/GPJ3

78

DAC2/TACH0B/GPJ2

77

HDIO3/GPJ1

76

TACH2/HDIO2/GPJ0

128

CK32K/GPJ6

2

CK32KE/GPJ7

101

FSCE#

105

FSCK

102

FMOSI

103

FMISO

IT8528E/AX

06V380000016

3

D

Q3002
2N7002

Battery + Charge

Thermal sensor

1

07V040000001

G

S

2

GND

WLAN_RST#_EC<55>

PM_PWRBTN#<9>

LCDBL_EN_EC<37>

USBSLP_EN<81>

SPI_HOLD_L_HSPI_R<10>

SPI_WP_L_HSPI_R<10>

LPC_AD0<10,65>
LPC_AD1<10,65>
LPC_AD2<10,65>

LPC_AD3<10,65>
LPC_CLK1_EC<10>
LPC_FRAME#<10,12,65>

LPC_RST#<9>

LPC_SERIRQ<10,65>

EC_RST#<47>

KSO0<48>
KSO1<48>
KSO2<48>
KSO3<48>
KSO4<48>
KSO5<48>
KSO6<48>
KSO7<48>
KSO8<48>
KSO9<48>
KSO10<48>
KSO11<48>
KSO12<48>
KSO13<48>
KSO14<48>
KSO15<48>

BAT_LEARN<88>

EDP_ON#<9,37>
TP_CLK<48>
TP_DAT<48>

SMB0_CLK<63,88>
SMB0_DAT<63,88>
APU_SIC<8,50,71>
APU_SID<8,50,71>

CTL_FAN<50>

IOAC_EN<55,81>

+3VA_EC

1 2

SP3004 R0402

1 2

SP3005 R0402

1 2

SP3006 R0402

1 2

SP3007 R0402

KSI0<48>
KSI1<48>
KSI2<48>
KSI3<48>
KSI4<48>
KSI5<48>
KSI6<48>
KSI7<48>

APU_PROCHOT_EC

R3002 0Ohm@

7 8

47OHM

5 6

47OHM

3 4

47OHM

1 2

47OHM

T3001@

1 2

T3002@

T3004@

T3007@

+3VACC

SCE#
SCK
SI
SO

+3VS

RN3004D
RN3004C
RN3004B
RN3004A

EXT_SMI#_EC
EXT_SCI#_EC
A20GATE_EC
RC_IN#_EC

1

1

1

1

APU_PROCHOT_EC

D D

EXT_SMI#<9,65>
EXT_SCI#<9>

A20GATE<9>

RC_IN#<9>

C C

B B

Share ROM

+3VA_EC_SPI+3VA_EC_SPI

12

R3071

4.7KOhm

A A

FDIO2

12

R3069 0Ohm /SHARE
R3029 15Ohm /SHARE

1 2

R3072 0Ohm /SHARE

/SHARE

SCE#_SSCE#
SO_SSO
ROM_WP#_S

U3003

1

CS#

2

DO(IO1)

3

WP#(IO2)

4

GND

W25Q32FVSSIQ

05V000000022

HOLD#/RESET#(IO3)

(32Mb)

need to check ROM P/N

5

DI(IO0)

/SHARE

C3098

0.1UF/16V

/SHARE

VCC

CLK

8
7
6
5

12

ROM_HD#_S
SCLK_S
SI_S

4

ADC5/DCD1#/GPI5
ADC6/DSR1#/GPI6
ADC7/CTS1#/GPI7

PWM6/SSCK/GPA6
PWM7/RIG1#/GPA7

RING#/PWRFAIL#/

CK32KOUT/LPCRST#/GPB7

KSO16/SMOSI/GPC3

KSO17/SMISO/GPC5

PWUREQ#/BBO/SMCLK2ALT/GPC7

GINT/CTS0#/GPD5

TACH1A/TMA1/GPD7

L80HLAT/BAO/GPE0

SSCE1#/FSCE1#/GPG0

FDIO2/DTR1#/SBUSY/GPG1/ID7

FDIO3/DSR0#/GPG6

CLKRUN#/GPH0/ID0

CRX1/SIN1/SMCLK3/GPH1/ID1

CTX1/SOUT1/GPH2/SMDAT3/ID2

12

R3070

4.7KOhm

/SHARE

1 2

R3073 0Ohm /SHARE
R3030 15Ohm / SHARE
R3067 15Ohm / SHARE

4

ADC0/GPI0
ADC1/GPI1
ADC2/GPI2
ADC3/GPI3
ADC4/GPI4

PWM0/GPA0
PWM1/GPA1
PWM2/GPA2
PWM3/GPA3
PWM4/GPA4
PWM5/GPA5

RXD/SIN0/GPB0

TXD/SOUT0/GPB1

TMRI0/GPC4

TMRI1/GPC6

RI1#/GPD0
RI2#/GPD1

TACH0A/GPD6

EGAD/GPE1
EGCS#/GPE2
EGCLK/GPE3

PWRSW/GPE4

RTS1#/GPE5

LPCPD#/GPE6

L80LLAT/GPE7

SSCE0#/GPG2

HSCE#/GPH3/ID3

HSCK/GPH4/ID4
HMISO/GPH5/ID5
HMOSI/GPH6/ID6

VSS1

VCORE

VSS2
VSS3
VSS4
VSS5
VSS6

AVSS

66
67

SUS_PWRGD_R

68

ALL_SYSTEM_PWRGD_R

69

VRM_PWRGD_R

70
71
72
73

24
25
28
29
30
31
32
34

108
109
112

56

KSO16

120
57

KSO17

124
16

18
21
33
47

FAN0_TACH

48

19

VSUS_ON_EC

82
83
84
125
35
17
20

PCIE_WAKE#_EC

106

RF_ON_R

107

FDIO2

100
104

FDIO3

93

EN_POC_PWR

94
95
96
97
98
99

1
12

C3008 0.1UF/16V

27
49
91
113
122

75

FDIO3
SCK
SI

3

AD_IINP <88>
SUS_PWRGD <81,92>
ALL_SYSTEM_PWRGD <92>
VRM_PWRGD <80,92>

APU_ALERT# <8>

WLAN_WAKE# <55>

IMON_VGA <87>

PWR_BLUE_LED# <65,66>
CHG_LED_BLUE# <66>
BAT_ORG_LED# <66>

PWR_AMBER_LED# <65,66>

USBP0_EN <61>
EC_SPKR <41>

LCDBL_PWM_EC <37>

LAN_PWR_ON# <33>

BT_ON_EC <55>

PM_RSMRST# <9>

KSO16 <48>
AC_IN_OC <71,88>

KSO17 <48>
BAT1_IN_OC# <90>

PM_SUSB# <9>
PM_SUSC# <9>

PM_PWROK <9,91>

FAN0_TACH <50>

USBP1_EN <61>

VSUS_ON <63,81,82,84,85,91,93>
SUSC_EC# <63,91>
SUSB_EC# <63,91,92>
CPU_VRON <80>
PWR_SW#_M <65>

RF_DET# <55>

LID_SW# <9,37,65>
PCIE_WAKE# <9,33>

USBP2_EN <61>

+3VA_EC +3VA_EC_SPI

R3039 0Ohm

D3001

1

2

0.8V/0.2mA

07V030000001

1 2

3

1 2

R3001 0Ohm@

1

1

1

SP3003

1 2

R3083 0Ohm

1

1

1 2

EC_AGND

1 2

R3036 0Ohm

1 2

R3037 0Ohm

1 2

R3010 0Ohm

T3012@

1 2

R3075 0Ohm

@

T3013@

T3014@

R04021 2

T3006@

T3003@

GND
GND

CHGCB0 <61>

SPI_CS1_L_HSPI_R <10>
SPI_CLK_HSPI_R <10>
SPI_DI_HSPI_R <10>
SPI_DO_HSPI_R <10>

non-Share ROM

+3VA_EC_SPI

R3077

3.3KOhm

/NONSHARE

12

R3078 0Ohm /NONSHARE

SO SO_NONS ROM_HD#_NONS

R3079 15Ohm /NONSHARE

1 2

GND

3

SCE#_NONSSCE#

ROM_WP#_NONS

U3004

1

CE#

2

SO

HOLD#

3

WP#

4

GND

PM25LD010C-SCE

/NONSHARE

8

VCC

7
6

SCK

5

SIO

(128KB)

2

1

T3011@

+3VA_EC

RN3001
Change value
from 4.7K to 2.2K

Change part number from
10VL40000001(4.7K) to
10L4-000O000(2.2K)

+3VSUS

R3080

3.3KOhm

/NONSHARE

1 2

SCK_NONS SCK
SI_NONS

+3VA_EC_SPI

12

C3097

0.1UF/16V

/NONSHARE

R308115Ohm /NONSHARE
R308215Ohm /NONSHARE

+3VS

PM_SUSB#
PM_SUSC#

CPU_VRON

EC_XIN

PM_RSMRST#

AC_IN_OC is pulled high at power

VSUS_ON

+3VSUS

+3VA_EC

2

M_VREF <18,83>

+3VA_EC

12

C3001

10UF/10V

GND

SP3001

1 2

R0603

GND

For PU / PD

1 2

R3062 10KOhm@

1 2

R3004 47KOhm

1 2

R3025 10KOhm

1 2

RN3001A 2.2KOHM

3 4

RN3001B 2.2KOHM

7 8

RN3001D 2.2KOHM

5 6

RN3001C 2.2KOHM

1 2

R3006 100KOHM

1 2

R3007 100KOHM

1 2

R3009 100KOHM

1 2

R3076 0Ohm

1 2

R3011 10KOhm

1 2

R3008 100KOHM

R3053 100KOHM@

1 2

R3054 10KOhm@

VSUS_ON Default Pull High to +3VSUS

RF_ON<55>

SI

12

C3002

0.1UF/16V

12

12

EC_AGND

AC_IN_OC

BAT1_IN_OC#

PWR_SW#_M
SMB0_CLK
SMB0_DAT

APU_SID
APU_SIC

C3003

0.1UF/16V

VSUS_ON

VSUS_ON

Q3001B
UM6K1N

R3074 0Ohm

@

1

+3VA_EC+3VA

@

L3001

1kOhm/100Mhz

21

1 2

+3VA_EC

12

C3004

10UF/10V

+3VACC

+3VS

12

12

R3085
0Ohm

/TP_3VS

+3VS

+3VA_EC

+3VSUS

+5VSUS

+5VA

+3VS_WLAN

12

R3040
10KOhm

@

34

5

Q3001A
UM6K1N

@

GND GND

R3035 0Ohm

@

PEGATRON UNIHAN CORP.

PEGATRON UNIHAN CORP.

PEGATRON UNIHAN CORP.

Date: Sheet of

Date: Sheet of

Date: Sheet of

SP3002

1 2

R0603

C3006

0.1UF/16V

+5VS+3VS

R1.3 2013/1/24
Follow EA70HW for TP

12

R3086
0Ohm

/TP_5VS

1 2

RN3002A 4.7KOHM

3 4

RN3002B 4.7KOHM

3 4

RN3003B 4.7KOHM

1 2

RN3003A 4.7KOHM

GND

1 2

R3017 10KOhm

1 2

R3018 10KOhm

1 2

R3060 10KOhm

1 2

R3038 10KOhm

1 2

R3061 10KOhm

1 2

R3064 10KOhm@

1 2

R3084 10KOhm

1 2

R3063 10KOhm

1 2

R3020 10KOhm

1 2

R3065 10KOhm@

R3041
10KOhm

@

2

‧

‧

‧

12

12

12

12

RF_ON_R

EG70_KB

EG70_KB

EG70_KB

R3014 47KOhm

R3027 47KOhm

R3015 47KOhm

R3022 47KOhm

+3VS_WLAN

12

61

12

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

EC_AGND

1

12

C3005

0.1UF/16V

12

C3007

0.1UF/16V

A20GATE

RC_IN#

FAN0_TACH

WLAN_WAKE#

IOAC_EN

RF_DET#

PCIE_WAKE#_EC

RF_DET#

PM_PWRBTN#

LAN_PWR_ON#

PWR_BLUE_LED#

PWR_AMBER_LED#

BAT_ORG_LED#

CHG_LED_BLUE#

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

TP_CLK
TP_DAT
SUSB_EC#
SUSC_EC#

ITE8528E

ITE8528E

ITE8528E

Mike_Chiu

Mike_Chiu

Mike_Chiu

30 99Monday, M arch 25, 2013

30 99Monday, M arch 25, 2013

30 99Monday, M arch 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

5

4

3

+VDD1.2_LAN

12

12

C3310

4.7UF/6.3V

1AV300000022

C3307

0.1UF/10V

12

C3304

0.1UF/10V

12

C3305

0.1UF/10V

2

+VDD_GPHYPLL

12

C3321

0.1UF/10V

12

C3320

4.7UF/6.3V

1AV300000022

L3301

21

1KOhm/100Mhz

09V010000038

1

+VDD1.2_LAN

+VDD1.2_LAN

21

+VDD1.2_LAN

L3306

21

R1.1 10/31 EMI CHANGE

+VDD33_LOM

21

+VDD33_LOM

L3303

21

C3324

0.1UF/10V

C3319

0.1UF/10V

9

11

LED_LINKN_R

10

G

Y

12

LED_BLINKINGN_R

1KOhm/100Mhz

09V010000038

+VDD33_LOM

L3305

21

1KOhm/100Mhz

09V010000038

R3322
510Ohm

1 2

1 2

R3321 0Ohm

@

1314

LAN_JACK_8P

P_GND1P_GND2

CON3301

12V23GBSD009

LAN_GND

<OrgName>

<OrgName>

<OrgName>

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

LAN_GND

R3323
510Ohm

1 2

EG70_KB

EG70_KB

EG70_KB

LAN_GND

LED_BLINKINGN

12

LAN_GND

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

1

LED_LINKN

12

C3336
470PF/50V

1AV200000033
@

C3335
470PF/50V

1AV200000033
@

Close Connector

LAN Chip_BCM57780

LAN Chip_BCM57780

LAN Chip_BCM57780

Frank_Chu

Frank_Chu

Frank_Chu

33 99Monday, March 25, 2013

33 99Monday, March 25, 2013

33 99Monday, March 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

49

48

47

GND

LINKLED#

XTALO13XTALVDDH14VDDC215PCIE_TXD_N16PCIE_TXD_P17PCIE_PLLVDDL118PCIE_REFCLK_N19PCIE_REFCLK_P20PCIE_PLLVDDL221PCIE_RXD_P22PCIE_RXD_N23GPHY_PLLVDDL

+VDD1.2_LAN

0Ohm

1

3

D

Q3303 2N7002

R3309 0Ohm@

+VDD33_LOM

+3VS

12

R3303
1KOhm

L_TRDP3
L_TRDN3

EEDAT

EECLK

+VDD1.2_LAN

+AVDDL

VDDO

42

41

VDDO

VDDC3

EEDATA

+VDD_LANPLL

12

C3311

4.7UF/6.3V

1AV300000022

40

39

AVDDL3

VMAIN_PRSNT

R1.0 chnge VP P/N.

38

37

TRD3_P

TRD3_N

AVDDH2

TRD2_N
TRD2_P
AVDDL2
TRD1_P
TRD1_N

AVDDH1

TRD0_N
TRD0_P
AVDDL1

RDAC

BIASVDDH

BCM57780A0KMLG

24

02V0H0000001

+VDD_GPHYPLL

PCIE_TXN3_LAN
PCIE_TXP3_LAN

CLK_PCIE_LAN
CLK_PCIE_LAN#

PCIE_RXP3_LOM
PCIE_RXN3_LOM

+VDD33_LOM

46

45

44

EECLK

SPD100LED#

TRAFFICLED#

SPD1000LED#

+VDD_LANPLL

R3313
10KOhm

G

PCIE_WAKE#_LAN

2

S

R1.1 IOAC 10/31

12

43

FAE suggestion 1003

23

MX1-

MX2-

MX3-

MX4-

L_TXP

24

L_CMT0

22

L_TXN

20

L_RXP

21

L_CMT1

19

L_RXN

17

L_TRLP2

18

L_CMT2

16

L_TRLM2

14

L_TRLP3

15

L_CMT3

13

L_TRLM3

MX1+

MCT1

MX2+

MCT2

MX3+

MCT3

MX4+

MCT4

EMI suggest to change 0805 size 0921

3

36

+AVDDH

35
34
33

+AVDDL

32
31
30

+AVDDH

29
28
27

+AVDDL

26

RDAC

25

+BIASVDD

C3315 0.1UF/10V
C3314 0.1UF/10V

Close to LAN chip within 250mils

12

C3306

0.1UF/10V

EECLK
EEDAT

L_TRDN2
L_TRDP2

L_TRDP1
L_TRDN1

L_TRDN0
L_TRDP0

1 2

R3302

10V220000198

12
12

+VDD33_LOM

R3305

R3304

1KOhm

1KOhm

@

1 2

1 2

R3307

R3306

1KOhm

1KOhm

@

1 2

1 2

1 2

R3318 75Ohm

1.24KOhm

+VDD33_LOM

From APU

PCIE_TXN3_LAN <7>
PCIE_TXP3_LAN <7>

CLK_PCIE3_LAN <10>
CLK_PCIE3_LAN# <10>

To APU

PCIE_RXP3_LAN <7>
PCIE_RXN3_LAN <7>

U3302

8

A0

VCC

7

A1

WP

6

A2

SCL

5

GND

SDA

AT24C02C-XHM-T

05V020000003
@

12

C3334
1500PF/2KV

LAN_GND

1
2
3
4

+VDD_LANPLL

+AVDDL

+AVDDH

12

C3303

0.1UF/10V

@

+VDD33_LOM

1 2

2

R3319
0Ohm

12

12

12

12

C3322

0.1UF/10V

12

C3318

0.1UF/10V

12

C3313

0.1UF/10V

+VDD33_LOM

12

R3320
0Ohm

+VDD33_LOM_CON3301_9

L_TRLM2

L_TRLM3

+VDD33_LOM_CON3301_11

L_TXP
L_TXN
L_RXP

L_TRLP2

L_RXN

L_TRLP3

D D

+VDD1.2_LAN

12

C3301

0.1UF/10V

12

C3308
10UF/6.3V

L3304

4.7UH

09V030000084

21

+LX

LED_BLINKINGN

LED_LINKN

0503 LAN_LPWR is not defined GPIO in PCH .

+VDD33_LOM

From APU

BUF_PLT_RST#

PCIE_WAKE#_LAN

R3301

1 2

XTALO

C C

200Ohm

1 2

R3312 4.7KOhm@

1 2

R3311 4.7KOhm

X3301 25MHZ

1 3

XTALO_R

C3309

15PF/50V

1AV200000005

R1.1
change value for -R test report

XTALI

2

4

C3325
15PF/50V

1AV200000005

BUF_PLT_RST#<9,40,47,55,70>
CLK_REQ3_LAN#<9>

R1.1 IOAC 10/31

T3301@

+VDD33_LOM

SP3301

12

C3302

4.7UF/6.3V

1AV300000022

1

R3308 0Ohm

R3310 0Ohm

NB_R0603_32MIL_SMALL

1 2

12

@

12

PCIE_WAKE#_LAN

LAN_LPWR_R

CLK_REQ3_LAN#_R

+VDD1.2_LAN

+VDD1.2_LAN

SR_VDD

12

C3316

0.1UF/10V

+LX
XTALI

1
2
3
4
5
6
7
8

9
10
11
12

XTALO
+XTALVDD

U3301

LOW_PWR
PERST#
CLKREQ#
WAKE#
MODE
VDDC1
VREGPNP_CTL
SR_VFB
SR_VDD
SR_VDDP
SR_LX
XTALI

For LAN power c ontrol on S5 st ate

1 2

R3315

+3VSUS

+12VSUS

B B

From EC

LAN_PWR_ON#<30>

D3301

EMI Req

1 2

AZ2025-01H.R7G

1 2

R3317 0Ohm

A A

C3327 10PF/50V

C3328 10PF/50V

C3329 10PF/50V

5

R3314
100KOhm

@

1 2

3

D

Q3302

1

2N7002

G

@

S

2

@

12

12

12

LAN_GND

10V440000001

D

3

1

12

0Ohm

S

2

SI2304BDS-T1-GE3

G

Q3301

@

C3326
1UF/25V

1AV300000031
@

+VDD33_LOM_R

PCIE_WAKE#<9,30>

To LAN Chip Form LAN Jack

L_TRDP0

L_TRDN0

L_TRDP1

L_TRDN1

L_TRDP2

L_TRDN2

L_TRDP3

L_TRDN3

12

C3330 0.1UF/16V

12

C3331 0.1UF/16V

12

C3332 0.1UF/16V

12

C3333 0.1UF/16V

4

1 2

L3308

10V440000001

Co-Layout

LU3301

2

TD1+

1

TCT1

3

TD1-

5

TD2+

4

TCT2

6

TD2-

8

TD3+

7

TCT3

9

TD3-

11

TD4+

10

TCT4

12

TD4-

09V120000003 GST5009

L3307

1KOhm/100Mhz

C3323

09V010000038

4.7UF/6.3V

1AV300000022

R1.2-26 EMI

1.5KOhm/100Mhz

09V010000039

C3317

4.7UF/6.3V

1AV300000022

L3302

1KOhm/100Mhz

C3312

09V010000038

0.1UF/10V

+XTALVDD

12

+BIASVDD

12

1
2
3
4
5
6
7
8

5

D D

C C

4

3

2

1

B B

A A

Title :

Title :

Title :

DP to LVDS_ANX3110

DP to LVDS_ANX3110

DP to LVDS_ANX3110

Frank_Chu

Frank_Chu

Engineer:

Engineer:

EG70_KB

EG70_KB

EG70_KB

Engineer:

1

<OrgName>

<OrgName>

<OrgName>

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Frank_Chu

34 99Monday, March 25, 2013

34 99Monday, March 25, 2013

34 99Monday, March 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

5

D D

C C

4

3

2

1

B B

A A

DP to LVDS_RTD2136R

DP to LVDS_RTD2136R

DP to LVDS_RTD2136R

Title :

Title :

Title :

Frank_Chu

Frank_Chu

Frank_Chu

Engineer:

Engineer:

EG70_KB

EG70_KB

EG70_KB

1

Engineer:

Rev

Rev

Rev

1.2

1.2

1.2

35 99Monday, M arch 25, 2013

35 99Monday, M arch 25, 2013

35 99Monday, M arch 25, 2013

<OrgName>

<OrgName>

<OrgName>

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

5

D D

C C

4

3

2

1

B B

A A

Title :

Title :

Title :

DP to LVDS_PS8625

DP to LVDS_PS8625

DP to LVDS_PS8625

Frank_Chu

Frank_Chu

Engineer:

Engineer:

EG70_KB

EG70_KB

EG70_KB

Engineer:

1

<OrgName>

<OrgName>

<OrgName>

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Frank_Chu

36 99Monday, March 25, 2013

36 99Monday, March 25, 2013

36 99Monday, March 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

5

4

3

2

1

LVDS

D D

C C

LVDS/eDP control signal

Back Light Enable

From EC

LCDBL_ EN_EC<30>

LID_SW #< 9,30,65>

From LID SW

From APU

LCDBL_ EN_APU<8>

LCDBL_ EN_APU

D3701

1

3

2

1V/0.1A

D3704

12

RB751V -40

R3712

/EDP

100KOhm

1 2

+LCD_VD D_EDP

1 2

12

R3704
10KOhm

/EDP

C3706
100PF/5 0V@

To eDP CONN

LCDBL_ EN_EDP

PWM

12

C3707
100PF/5 0V

ANALOG

INT_MIC_ AC_IN

USBP3-_E

To eDP CONN

USBP3+_E

To eDP CONNFrom APU

D3703 AZ 2025-01 H.R7G

1 2

@

@

C3726

12

10PF/50 V

SP3702
R0402

1 2

A_GND

D3702 AZ 2025-01 H.R7G

1 2

@

Title :

Title :

Title :

Engineer:

Engineer:

EG70_KB

EG70_KB

EG70_KB

Engineer:

<OrgName>

<OrgName>

<OrgName>

Size Projec t Name

Size Projec t Name

Size Projec t Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

LVDS/eDP CON

LVDS/eDP CON

LVDS/eDP CON

Frank_Chu

Frank_Chu

Frank_Chu

37 99Monday, March 25, 20 13

37 99Monday, March 25, 20 13

37 99Monday, March 25, 20 13

Rev

Rev

Rev

1.2

1.2

1.2

L3702 0Ohm

+3V_CMOS

RN3711B 0Ohm@

RN3711A 0Ohm@

1 2

L3703

1kOhm/100 Mhz

3 4

2 3

1 2

21

Irat=300mA@

L3704
90Ohm/10 0Mhz

1 4

R3768
100KOhm

@

1 2

LCDBL_ PWM_AP U<8>

eDP

HPD

B B

LCDVDD _EN_APU<8>

A A

From eDP CONN To APU

HPD High Active HPD High Active

DP_HPD_ C

From APU

LCDVDD _EN_APU

R3733
0Ohm

1 2

/EDP

1 2

R3744 0 Ohm

/EDP

eDP(3.3V)

+LCD_VD D_EDP

12

+LCD_VD D_OUT

R3713
100KOhm

12

/EDP

1 2

5

R3724
0Ohm

C3701

4.7UF/6.3V

12

R3720
100KOhm

1

2

U3701

OUT

GND

EN3DSG

G5244T 11U

/EDP

EDP_HPD <8>

5

IN

4

+LCD_VD D_R

R3701

150Ohm

DP_AUXP

DP_AUXN

DP_TXP 0

DP_TXN0

DP_TXP 1

DP_TXN1

+3VS

12

+LCD_VD D_OUTLCDVDD _EN_R

C3702
1UF/6.3V

1AV200 000038

4

+AC_BAT _SYS

+LCD_VD D_EDP

C3719
39PF/50 V

1AV200 000014
@

1 2

C3716 0.1UF/16V

C3717 0.1UF/16V

1 2

1 2

C3722 0.1UF/16V

1 2

C3718 0.1UF/16V

1 2

C3724 0.1UF/16V

1 2

C3723 0.1UF/16V

L3701
80Ohm/10 0Mhz

2 1

12

C3708

Irat=2A

0.1UF/25V

@

+3VS

C3710

0.1UF/16V

1AV200 000023

From APUTo eDP CONN

EDP_AUX P <8>

EDP_AUX N <8>

EDP_TX P0 <8 >

EDP_TX N0 <8 >

EDP_TX P1 <8 >

EDP_TX N1 <8 >

+AC_INV

12

C3709

C3721

0.1UF/25V

39PF/50 V

1AV200 000014

@

C3720
39PF/50 V

1AV200 000014
@

+3V_CMOS

L3705 120 Ohm

12

C3725

0.1UF/16V

21

09V010 000032

INT_MIC_ AC_IN<41>

+LCD_VD D_EDP

EDP_ON#<30>

3

eDP CONN

+3V_CMOS _C
USBP3-_E
USBP3+_E

ANALOG

INT_MIC_ AC_IN

DP_TXN1
DP_TXP 1

DP_TXN0
DP_TXP 0

DP_AUXP
DP_AUXN

1

BIST

T3701@

DP_HPD_ C
LCDBL_ EN_EDP
LCDBL_ PWM_ED P

EDP_ON#
+AC_INV
+AC_INV
+AC_INV
+AC_INV

BOM Optional Table :

Panel eDP

Optional /EDP

31

CON3703

1

1

2

2

3

SIDE1

3

4

4

5

5

6

33

6

SIDE3

7

7

8

8

9

9

10

10

11

11

12

12

13

34

13

SIDE4

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

SIDE5

27

27

28

28

29

29

30

30

SIDE2

WTOB_ CON_30P

32

12V37G BSM007

USB Camera

35

+3V

+3VS

2

LCDBL_ PWM_AP U LCDBL_ PWM_ED P

From EC

1 2

R3706 0 Ohm

@

1 2

R3707 0 Ohm

USB_PN3<10>

From APU

USB_PP3<10>

LCDBL_ PWM_EC

LCDBL_ PWM_EC<30>

5

4

3

2

1

CRT_R<8>

D D

C C

B B

A A

CRT_G<8>

CRT_B<8>

1 2

CRT_DDC_DATA<8>

CRT_DDC_CLK<8>

CRT_HSYNC<8 >

CRT_VSYNC<8>

R3833 0 Ohm

1 2

R3834 0 Ohm

1 2

R3824 0Ohm

1 2

R3823 0Ohm

1 2

JP3801 SHORT_PIN

1 2

JP3802 SHORT_PIN

1 2

JP3803 SHORT_PIN

DDC2BD_5

HSYNC_CRT

VSYNC_CRT

DDC2BC_5

+3VS

12

R3837

4.7KOhm

12

R3838

4.7KOhm

DAC_HSYNC

DAC_VSYNC

DDC2BD

DDC2BC

V_RED_J

V_GREEN_ J

V_BLUE_ J

+3VS

Q3801A

2

UM6K1N

12

R3801
150Ohm

1%

5

61

Q3801B
UM6K1N

U3801

3

GND

2

A

1

OE#

74AHCT1G1 25GW

06V0300 00010

U3802

1

OE#

2

A

3

GND

74AHCT1G1 25GW

06V0300 00010

12

12

R3802
150Ohm

1%

+5VS

12

12

34

4

Y

5

Vcc

5

Vcc

4

Y

R3803
150Ohm

1%

D3804
RB751V-4 0

+5VS_CRT

R3806

2.2KOhm

HSYNC_CRT

VSYNC_CRT

12

R3807

2.2KOhm

+5VS_CRT

12

C3801

10PF/50V

12

DDC2BD_5

DDC2BC_5

C3802

10PF/50V

12

C3803

10PF/50V

21

L3801 75Ohm/100Mhz

09V0100 00050

21

L3802 75Ohm/100Mhz

09V0100 00050

21

L3803 75Ohm/100Mhz

09V0100 00050

1 2

R3814 0Ohm

R3804 0Ohm

R3805 0Ohm

R3815 0Ohm

1 2

DDC2BC_S

VSYNC

HSYNC

DDC2BD_S

12

12

CON3801

16

15
10
14

9

13

8

12

7

11

6

17

D_SUB_15 P

12V10GB RD012

RED

GREEN

BLUE

DDC2BD_S

HSYNC

VSYNC

DDC2BC_S

12

12

C3804

10PF/50V

5

4

3

2

1

12

C3805

10PF/50V

CRT_IN#_EC_ CON

R3822

BLUE

GREEN

RED

0Ohm

12

C3806

10PF/50V

12

C3807

12PF/50V

1 2

12

C3808

6.8PF/50 V

6

1

HSYNC VSYNC

+5VS

5

2

C3809

6.8PF/50 V

3 4

DDC2BC_S DDC2BD_S

C3810

12PF/50V

1 2

D3801
CM1293_0 4SO

@

Title :

Title :

Title :

RGB_CONN

RGB_CONN

RGB_CONN

Engineer:

Engineer:

EG70_KB

EG70_KB

EG70_KB

1

Engineer:

PEGATRON UNIHAN CORP .

‧

PEGATRON UNIHAN CORP .

‧

PEGATRON UNIHAN CORP .

‧

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sh eet of

Date: Sh eet of

5

4

3

2

Date: Sh eet of

Mike_Chiu

Mike_Chiu

Mike_Chiu

38 9 9Monday, March 25 , 2013

38 9 9Monday, March 25 , 2013

38 9 9Monday, March 25 , 2013

Rev

Rev

Rev

1.2

1.2

1.2

5

4

3

2

1

1 2

HDMI_CLKP_APU<8>

HDMI_CLKN_APU<8>

HDMI_TXP0_APU<8>

HDMI_TXN0_APU<8>

HDMI_TXP1_APU<8>

HDMI_TXN1_APU<8>

HDMI_TXP2_APU<8>

D D

1 2

C C

HDMI_CLKP

B B

HDMI_DDC_CLK_APU<8>
HDMI_DDC_DATA_APU<8>

3 4

3 4

1 2

+5VS

HDMI_TXN2_APU<8>

@

0Ohm

1 4

2 3

@

0Ohm

@

0Ohm

14

23

@

0Ohm

HDMI_TXN0_CON

RN3903A

L3904

EMI suggestion 0922

67ohm

N/A
09V090000007

RN3903B

RN3904B

L3903

EMI suggestion 0922

67ohm

N/A
09V090000007

HDMI_CLKN_CONHDMI_CLKN HDMI_TXN1

HDMI_CLKN_CON

RN3904A

+12VS

1

G

2

D

S

NDS351AN_NL

Q3901

1 2

R3946 0Ohm@

C3908 0.1UF/16V

1 2

C3910 0.1UF/16V

1 2

C3909 0.1UF/16V

1 2

C3911 0.1UF/16V

1 2

C3904 0.1UF/16V

1 2

C3905 0.1UF/16V

1 2

C3906 0.1UF/16V

1 2

C3907 0.1UF/16V

Close to connector and do T routing

RN3905B

2.2KOhm

F3901

12

0.35A/6V

C3901

0.1UF/25V

+3VS

RN3905A

2.2KOhm

3 4

1 2

3

HDMI_TXN2

HDMI_TXP2

HDMI_TXP1HDMI_CLKP_CON

+5VS_HDMI

1 2

+3VS

2

Q3904A
UM6K1N

1 2

61

5

+3VS

R3910
499Ohm

10V220000076

12

R3947
0Ohm

RN3906A

2.2KOhm

34

Q3904B
UM6K1N

R3911
499Ohm

10V220000076

1 2

@

1 2

0Ohm

1 4

@

3 4

0Ohm

@

3 4

0Ohm

14

@

1 2

0Ohm

3

D3902
1V/0.1A

@

1

2

RN3906B

2.2KOhm

3 4

1 2

C3903

10PF/50V

@

+3VS

RN3901A

L3901
67ohm

N/A

2 3

09V090000007

RN3901B

RN3902B

23

L3902
67ohm

N/A
09V090000007

RN3902A

12

12

12

R3912
499Ohm

10V220000076

1 2

R3948
0Ohm

C3902
10PF/50V

@

R3913
499Ohm

10V220000076

1 2

3

D

Q3902

1

2N7002

G

S

2

N/A

GND

HDMI_TXN2_CONHDMI_TXN0

EMI suggestion 0922

HDMI_TXP2_CONHDMI_TXP0_CONHDMI_TXP0

HDMI_TXP1_CON

EMI suggestion 0922

HDMI_TXN1_CON

HDMI_SCL
HDMI_SDA

R3914
499Ohm

10V220000076

1 2

R3915

R3916

499Ohm

499Ohm

10V220000076

1 2

10V220000076

1 2

EMI solution

HDMI_CLKP

HDMI_TXP0

R3940 220Ohm@

R3941 220Ohm@

R3942 220Ohm@

R3943 220Ohm@

HDMI_SCL & HDMI_SDA : no via , trace length should be as short as possible

HDMI_TXP2_CON
HDMI_TXN2_CON

HDMI_TXN0_CON

HDMI_SCL

R3917
499Ohm

10V220000076

1 2

1 2

1 2

1 2

1 2

HDMI_CLKP

HDMI_CLKN

HDMI_TXP0

HDMI_TXN0

HDMI_TXP1

HDMI_TXN1

HDMI_TXP2

HDMI_TXN2

10V220000339

10V220000339

10V220000339

10V220000339

1
3
5
7

9
11
13
15
17
19

HDMI_CLKN

HDMI_TXN0

HDMI_TXN1HDMI_TXP1

HDMI_TXN2HDMI_TXP2

12V12GBRD001

20

22

HDMI_CON_19P

P_GND1

P_GND3

1
3
5
7
9
11
13
15
17
19

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

P_GND2

P_GND4

CON3901

21

23

HDMI_TXP1_CON
HDMI_TXN1_CONHDMI_TXP0_CON

HDMI_CLKP_CON
HDMI_CLKN_CON

HDMI_SDA

+5VS_HDMIHDMI_HPD_CON

09/27 HDMI HPD Level Shifter Design

A A

HDMI_HPD_APU<8>

5

3

D3910

1.25V/0.15A

1

2

+3VS

1 2

R3944 4.7KOhm

12

R3945
10KOhm

4

HDMI_HPD_CONHDMI_HPD_APU

Title :

Title :

Title :

HDMI_CONN

HDMI_CONN

HDMI_CONN

Mike_Chiu

Mike_Chiu

Mike_Chiu

Engineer:

Engineer:

EG70_KB

EG70_KB

EG70_KB

Engineer:

1

Rev

Rev

Rev

1.2

1.2

1.2

39 99Monday, March 25, 2013

39 99Monday, March 25, 2013

39 99Monday, March 25, 2013

PEGATRON UNIHAN CORP.

‧

PEGATRON UNIHAN CORP.

‧

PEGATRON UNIHAN CORP.

‧

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

5

4

3

2

1

From System's PCIE interface

GND

1

CON4001

Layout notice:

Please place C4013, R4005, C4011 close to U4000 Pin 37 "SP14".

D D

+3VS

U4000

HSIP
HSIN
REFCLKP
REFCLKN
AV12
HSOP
HSON
GND1
DV12
Card1_3V3
3V3_IN1
Card2_3V3

+3VS

T4009@

T4005@

T4008

@

1

1

43

44

45

46

47

48

RREF

EEDO

3V3_IN2

PERST#

CLK_REQ#

xD_CD#13DV33_1814GND215SP116SP217SP318SP419SD_D120SD_D021SD_CLK22SD_CMD23SD_D3

XD_CD#

DV33_18

SP1

SP2

SP3

From APU

BUF_PLT_RST#<9,33,47,55,70>
CLK_REQ2_CR#<9>

GND

From APU

PCIE_TXP2_CR<7>
PCIE_TXN2_CR<7>

C C

CLK_PCIE2_CR<10>
CLK_PCIE2_CR#<10>

PCIE_RXP2_CR<7>
PCIE_RXN2_CR<7>

PCIE_TXP2_CR
PCIE_TXN2_CR

CLK_PCIE2_CR
CLK_PCIE2_CR#

PCIE_RXP2_CR
PCIE_RXN2_CR

+3V_CARD

1 2

C4012 0.1UF/16V

1 2

C4009 0.1UF/16V

trace width 40mils

R4001
0Ohm

1 2

AV12

@

C4016 4.7UF/6.3V

GND

GND

DV12

1 2

C4006

10UF/10V

1 2

C4007

12

GNDGND

BUF_PLT_RST#
CLK_REQ2_CR#

C4019 0.1UF/16V

1 2

R4019

RES 6.2K OHM 1/16W (0402) 1%

10V220000088

AV12
HSOP_R
HSON_R

DV12

0.1UF/16V

+3VS

12

C4008

0.1UF/16V

12

1%

1
2
3
4
5
6
7
8

9
10
11
12

Please place C4014, R4002, C4010 close to U4000 Pin 22 "SD_CLK".

R4005

12

0Ohm

C4013
10PF/50V

@

R4002

12

0Ohm

C4014
10PF/50V

@

C4021 4.7UF/6.3V

1 2

1 2

C4022 0.1UF/16V

T4010@

1

1

MS_INS#

40

41

42

EESK

EECS

GPIO/EEDI

SD_D1

SD_D0

SP4

SP14

SP15

SD_CD#

38

39

SP1437SP15

SD_CD#

MS_INS#

DV12_S

24

RTS5209-GR

Part number:020J-007D000

SD_CLK

SD_CMD

SD_D3

GND3

SD_D2

SP13
SP12
SP11
SP10

MS_CLK

12

SD_CLK

12

36

SP13

35

SP12

34

SP11

33

SP10

32

SP9
SP8
SP7
SP6
SP5

SP9

31

SP8

30

SP7

29

SP6

28

SP5

27

DV12_S

26
25

SD_D2

12

12

C4011
10PF/50V

@

C4010
10PF/50V

@

MS_CLK_R

SD_CLK_R

GND

+3V_CARD

+3V_CARD

SD_D2

SD_D3

SD_CMD
MS_D3
MS_INS#

MS_D2

MS_D0

MS_D1
MS_BS

SD_CD#
SD_D0
SD_D1
SD_WP

Layout notice:

Please place C4023, C4002, C4003, C4004 close to CON4001 Pin 10 "SD_VDD".

+3V_CARD

12

GND

P20

SD_DAT2

P19

MS_VSS(GND)2

P18

SD_DAT3/MMC_RSV

P17

MS_VCC

P16

MS_SCLK

P15

SD_CMD/MMC_CMD

P14

MS_DATA3

P13

MS_INS

P12

SD_VSS/MMC_VSS1

P11

MS_DATA2

P10

SD_VDD/MMC_VDD

P9

MS_SDIO/DATA0

P8

SD_CLK/MMC_CLK

P7

MS_DATA1

P6

MS_BS

P5

MS_VSS(GND)1

P4

SD_CD

P3

SD_DAT0/MMC_DAT

P2

SD_DAT1

P1

SD_WP

CARD_READER_40P

12V34GBSM002

GND

SD/MMC/MMC plus /MS/xD

12

C4023

C4002

10UF/10V

0.1UF/16V

Close to connec tor

SD_VSS/MMC_VSS2/GND_FOR_CD/WP

12

C4003

0.1UF/16V

4

NP_NC1

P_GND2

XD_R/XD_B

3

C4008 C4002 SD CARD CAP
C4003 MS CARD CAP
C4004 XD CARD CAP

12

C4004

0.1UF/16V

XD_GND2

XD_CD

XD_RE
XD_CE

XD_CLE

XD_ALE

XD_WE
XD_WP

XD_GND1

XD_D0
XD_D1
XD_D2
XD_D3
XD_D4
XD_D5
XD_D6
XD_D7

XD_VCC

NP_NC22P_GND1

P40
P39
P38
P37
P36
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26
P25
P24
P23
P22
P21

XD_CD#
XD_RDY
XD_RE#
XD_CE#
XD_CLE
XD_ALE
XD_WE#
XD_WP#

XD_D0
XD_D1
XD_D2
XD_D3
XD_D4
XD_D5
XD_D6
XD_D7

+3V_CARD

GNDGND

C4020

C4024

4.7UF/6.3V@

1 2

B B

Remove Serial Flash

A A

Reserve for BIOS boot function

0.1UF/16V

1 2

GND

Pin Name

SP1

SP2

SP3

SP4

SP5

SP6

SP7

SP8

SP9

SP10

SP11

SP12

SP13

SP14

SP15

Description

SD_D7/XD_RDY

SD_D6/XD_RE#

SD_D5/XD_CE#

SD_D4/XD_WE#

MS_BS/XD_CLE

MS_D5/XD_ALE

MS_D1/XD_WP#

MS_D4/XD_D0

MS_D0/XD_D1

MS_D2/XD_D2

MS_D6/XD_D3

MS_D3/XD_D4

MS_D7/XD_D5

MS_CLK/XD_D6

SD_WP/XD_D7

SP1 SD_D7 XD_RDY

SP2 SD_D6 XD_RE#

SP3 SD_D5 XD_CE#

SP4 SD_D4 XD_WE#

SP5 XD_CLEMS_BS

SP6 MS_D5 XD_ALE

SP7 XD_WP#MS_D1

SP8 MS_D4 XD_D0

SP9 MS_D0 XD_D1

SP10 MS_D2 XD_D 2

SP11 MS_D6 XD_D 3

SP12 MS_D3 XD_D 4

SP13 MS_D7 XD_D 5

SP14 XD_D6MS_CLK

SP15 XD_D7SD_WP

When EECS switch to be D3-Delink sideband signal, Serial Flash function is disabled.

Card Reader_RTS5209-GR

Card Reader_RTS5209-GR

Card Reader_RTS5209-GR

Title :

Title :

Share Pin

5

4

3

2

<OrgName>

<OrgName>

<OrgName>

Size Project Name

Size Project Name

Size Project Name

C

C

C

EG70_KB

EG70_KB

Date: Sheet

Date: Sheet of

Date: Sheet of

EG70_KB

Title :

Engineer:

Engineer:

Engineer:

1

Frank_Chu

Frank_Chu

Frank_Chu

of

40 99Monday, March 25, 2013

40 99Monday, March 25, 2013

40 99Monday, March 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

5

Intel 1.01 Design Guide update #440484
R1.3 use dual mosfet

D D

C C

12

C4126
10UF/10V

B B

HDA_SDO<9>

80Ohm/10 0Mhz vx_l08 05_h43_ small

+5VS

80Ohm/10 0Mhz vx_l08 05_h43_ small

+3VS

+1.5VS

+1.5VS

12

C4148

0.1UF/16V

PC_BEE P_R

1 2

R4103 47KOhm

JP4102

1 2

SHORTPI N

@

JP4101

1 2

SHORTPI N

@

JP4104

1 2

SHORTPI N

@

+12VS +12VS

@

5

Q4101B
UM6K1N

1 2

SP4103 R 0402

Moat

Irat=2A

21

B4102

Irat=2A

21

B4104

21

B4101120Ohm

09V010 000032

@

21

B4107120Ohm

09V010 000032

Moat

21

B4108120Ohm

09V010 000032

R4106

4.7KOhm

A_GND

A_GND

3 4

+5VS_AUD IO+5VS

+5VS_AMP

+3VS_DV DD

PC_BEE P_C

12

AVDD

C4114 1UF/6.3V

12

C4150

100PF/5 0V

HP Jack Detect
EXT MIC Detect

HDA_SYNC<9>

>30 mil or shape

12

APU_SPK R<9>

EC_SPK R<30>

HDA_BCL K<9>

HDA_SDI N0<9>

HDA_RST #<9,42 >

COMBO JACK MIC

2

6 1

1 2

SP4104 R 0402

12

C4141
10UF/10V

ACZ_SD OUT_AUD_ R

R4105 22Ohm

ACZ_SYNC _AUD_R

1AV200 000009

HP_JD#<61>

MIC_EXT _JD#<61>

@

1 2

R4109 0Ohm

D4101

1

3

2

1V/0.2A

1 2

R4108 0Ohm

@

@

UM6K1N
Q4101A

+3VS_DV DD

1 2

1 2

PC_BEE P

C4159

22PF/50 V

A_GND

ACZ_SYNC _AUD_R

ACZ_SD OUT_AUD_ R

MUTE_AMP#<42>

C4110

0.1UF/16V

@

12

PC_BEE P_R

1 2

R4104 39.2K Ohm1%
R4101 20K Ohm1 %

R4102 20K Ohm1 %

Placement near audio codec

+5VS_AMP

C4111

0.1UF/16V

ACZ_SD IN0_R

12

C4123
10UF/10V

1 2
1 2

1 2

12

12

C4108
10UF/10V

1
2
3
4
5
6
7
8

9
10
11
12

C4120
22PF/50 V

1AV200 000009
@

4

C4102

0.1UF/16V

1 2

GPIO

U4101A

DIGITAL GND

DVDD
GPIO0/DMIC-DATA
GPIO1/DMIC-CLK
DVSS
SDATA-OUT
BCLK
LDO3-CAP
SDATA-IN
DVDD-IO
SYNC
RESETB
PCBEEP

ALC322 5-CG

02V0J0 000026

COMBO_MI C_IN_AC _E_L
COMBO_MI C_IN_AC _E_R

VREFOUT _A_E_L

VREFOUT _A_E_R

MIC2_VR EFO

AUD_LDO _CAP

LDO2_C APHDA_BCL K

H_SPKL-_M

H_SPKR-_M

H_SPKR+_M

43

44

45

46

47

48

49

PDB

GND

PVDD2

SPK-OUT-R-

SPK-OUT-R+

RSPDIF-OUT/GPIO2

SenseA13SenseB14JDREF15MONO-OUT16MIC2-L(PORT-F-L)17MIC2-R(PORT-F-R)18MIC1-L(PORT-B-L)19MIC1-R(PORT-B-R)20LINE1-R(PORT-C-R)21LINE1-L(PORT-C-L)22LINE2-R(PORT-E-R)23LINE2-L(PORT-E-L)

12

C4160
10UF/10V

A_GND

H_SPKL+_M

41

42

SPK-OUT-L-

SPK-OUT-L+

AUD_EXT_MIC_L

AUD_EXT_MIC_R

LDO2_CAP

38

39

AVSS2

AVDD240PVDD1

LDO2-CAP

HPOUT-R(PORT-I-R)

12

C4105
10UF/10V

A_GND

Placement near audio codec

12

C4115

C4113

0.1UF/16V

10UF/10V

1 2

AVDD

12

C4101

C4103

0.1UF/16V

10UF/10V

1 2

A_GND

1 2

C4118

2.2UF/10V

37

CBP

DIGITAL GND

HPOUT-L(PORT-I-L)

MIC1-VREFO-L
MIC1-VREFO-R

MIC2-VREFO

LDO1-CAP

CPVDD

CPVEE

AVDD1
AVSS1

+3VS_DV DD

36
35

CBN

34
33

AC_HP_R

32

AC_HP_L

31
30
29

MIC2_VR EFO

28

VREF_C ODEC

VREF

27

AUD_LDO _CAP

26
25

ANALOG GND

24

A_GND

INT_MIC_ AC_IN_L INT_MIC_ AC_IN_L _C

INT_MIC_ AC_IN_R

12

12

C4142

C4145

10UF/10V

10UF/10V

@

@

A_GND A_GND A_GND

+5VS

+5VS <30 ,38,39,4 8,50,60,6 3,66,80 ,87,91>

+3VS

+3VS <9,1 0,11,16 ,17,28,30 ,33,37,3 8,39,40,4 2,47,48 ,50,55,60 ,63,65,6 6,91,92>

+5VS_AMP

1 2

C4155 0.1UF/16V

1 2

C41472.2UF/10V

+5VS_AUD IO

12

C4121

C4107

10UF/10V

0.1UF/16V

1 2

C4134
1UF/6.3V

12

C4135
1UF/6.3V

12

INT_MIC_ AC_IN_R _C

12

C4136
1000PF /50V

@

C4117
10UF/10V

@

A_GND

50
51
52
53
54
55
56
57

U4101B

GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8

ALC322 5-CG

02V0J0 000026

12

3

AC_HP_R <42>

AC_HP_L <42>

12

C4106

0.1UF/16V

1 2

A_GND

R4114 1KOhm

R4125 1KOhm

12

C4154
1000PF /50V

@

A_GND

HeadPhone Out

EXT MIC Vref.
EXT MIC Vref.
COMBO MIC Vref.
INT MIC Vref.

12

C4104

C4158

2.2UF/10V

10UF/10V

12

12

Frank
0503 Vender request
close codec IC

C4116 10UF/1 0V

@

AUD_LDO _CAP

1 2

@

VREFOUT _A_E_R <42>

12

R4126
10KOhm

A_GND

C4144 10UF/1 0V

INT_MIC_ AC_IN <37>

H_SPKL+_ M

H_SPKL-_ M
H_SPKR+_ M
H_SPKR-_ M

1 2

@

VREFOUT _A_E_L <42>

A_GND

2

R4127 0Ohm
R4128 0Ohm
R4129 0Ohm
R4130 0Ohm

1

R1.0 remove VG70 connector 071 9

CON4101

6
12
12
12
12

H_SPKL+
H_SPKL­H_SPKR+
H_SPKR-

12

12

C4109

C4131

10PF/50 V

10PF/50 V

12

12

C4143

C4112

10PF/50 V

10PF/50 V

1
2
3
4

GND2
1
2
3
4

GND1

WTOB_ CON_4P

12V17A BSM000

5

MIC2_VR EFO

COMBO_MI C<61 >

GPIO

A A

5

R4124 22KOhm

12

12

C4156
10UF/6.3V

A_GND

1 2

R4110
22KOhm

1 2

A_GND

R4112

1KOhm

1 2

C4140 2.2UF/6.3 V

1 2

C4139 2.2UF/6.3 V

COMBO_MI C_IN_AC _E_R

COMBO_MI C_IN_AC _E_L

AUD_EXT_MIC_L

AUD_EXT_MIC_R

1 2

C4146 2.2UF/6.3 V

1 2

C4119 2.2UF/6.3 V

4

3

12

C4137 1000PF /50V

12

C4138 1000PF /50V

2

A_GND

MIC_IN_A C_E_R <42>

EXT MIC IN

MIC_IN_A C_E_L <42>

A_GND

Title :

Title :

Title :

AUDIO_ALC3225

AUDIO_ALC3225

AUDIO_ALC3225

Engineer:

Jeff_Lee

Engineer:

Jeff_Lee

Engineer:

ASUSTeK COMPUTER INC. NB1

ASUSTeK COMPUTER INC. NB1

ASUSTeK COMPUTER INC. NB1

Size Project Name

Size Project Name

Size Project Name

D

D

D

EG70_KB

EG70_KB

EG70_KB

Date: S heet of

Date: S heet of

Date: S heet of

1

Jeff_Lee

41 96Monday, March 25, 201 3

41 96Monday, March 25, 201 3

41 96Monday, March 25, 201 3

Rev

Rev

Rev

1.2

1.2

1.2

R4111 2.2KO hm

1 2

5

D D

C C

MIC_IN_AC_E_L<41>

MIC_IN_AC_E_R<41>

AMP De-Pop Control circuit

SPKR_MUTE#<9>

HDA_RST#<9,41>

1 2

R4207 1KOhm

1 2

R4204 1KOhm

SP4201

1 2

SP4202

1 2

VREFOUT_A_E_R<41>

VREFOUT_A_E_L<41>

R0402

R0402

Q4202A

UM6K1N

Q4202B

UM6K1N

4

+3VS

+3VA

12

R4201
100KOhm

61

2

34

5

1 2

1

R4211

4.7KOhm

12

R4202
10KOhm

MUTE_AMP#

3

D

Q4201

2N7002

G

S

2

GND

R4210

4.7KOhm

1 2

3

MUTE_AMP# <41>

MIC_IN_AC_E_L_J <61>

MIC_IN_AC_E_R_J <61>

2

1

B B

1 2

AC_HP_R<41>

AC_HP_L<41>

A A

5

R4205 56Ohm

10V220000086

1 2

R4206 56Ohm

10V220000086

HP_JACK_R <61>

HP_JACK_L <61>

AUDIO_HP/ MIC JACK

AUDIO_HP/ MIC JACK

Title :

Title :

Title :

Engineer:

Engineer:

PEGATRON UNIHAN CORP.

‧

PEGATRON UNIHAN CORP.

‧

PEGATRON UNIHAN CORP.

‧

Size Project Name

Size Project Name

Size Project Name

B

B

B

Date: Sheet of

Date: Sheet of

Date: Sheet of

4

3

2

EG70_KB

EG70_KB

EG70_KB

Engineer:

AUDIO_HP/ MIC JACK

Jeff_Lee

Jeff_Lee

Jeff_Lee

42 99Monday, March 25, 2013

42 99Monday, March 25, 2013

42 99Monday, March 25, 2013

1

Rev

Rev

Rev

1.2

1.2

1.2

5

Thermal Policy

4

3

2

1

D D

SP4701

CPU_THERM#<50>

BUF_PLT_RST#<9,33 ,40,55,70>

C C

B B

1 2

1 2

R4703 0Ohm@

R0402

+3VS

1

12

2

G

3

R4710
10KOhm

S

Q4701
2N7002

07V040000001

D

+3VA_EC

1 2

R4704 100KOHM

D4702 1.2V/0.1A

D4703 1.2V/0.1A

12

12

12

C4701
1UF/6.3V

EC_RST# <30>FORCE_OFF#<92>

A A

Title :

Title :

Title :

RESET CIRCUIT

RESET CIRCUIT

RESET CIRCUIT

Mike_Chiu

Mike_Chiu

1

Mike_Chiu

of

47 99Monday, March 25, 2013

47 99Monday, March 25, 2013

47 99Monday, March 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

Engineer:

Engineer:

PEGATRON UNIHAN CORP.

‧

PEGATRON UNIHAN CORP.

‧

PEGATRON UNIHAN CORP.

‧

Size Project Name

Size Project Name

Size Project Name

B

B

B

Date: Sheet

Date: Sheet of

5

4

3

2

Date: Sheet of

EG70_KB

EG70_KB

EG70_KB

Engineer:

5

4

3

2

1

Touch Pad Button/ Hall Sensor

D D

GND

APU_SDA1_Q<28,55>
APU_SCL1_Q<28,55>

C C

B B

TP_CLK TP_DAT

+3VS

TP_CLK<30>
TP_DAT<30>

C4820 10UF/10V@

D4802

1

I/O1

2

GND

3 4

I/O2 I/O3

CM1293_04SO

@

1 2

GND

TP_CLK
TP_DAT

6

I/O4

5

VDD

12V18GWSM059

FPC_CON_8P

1

1

2

2

SIDE1

3

3

4

4

5

5

6

6

7

7

SIDE2

8

8

CON4803

12

R4804
0Ohm

/TP_3VS

12

C4830

0.1UF/10V

GND

R1.3 2013/1/24
Copy from EA70_HW_MB_R13_0116V3

9

10

+VS_CON4803_8

+5VS+3VS

12

R4802
0Ohm

/TP_5VS

TP_CLK

TP_DAT

APU_SDA1_Q

APU_SCL1_Q

GND

C4804 1000PF/50V@

C4805 1000PF/50V@

C4822 1000PF/50V@

C4823 1000PF/50V@

1 2

1 2

1 2

1 2

GND

Keyboard

CON4801

27

GND1

28

GND2

FPC_CON_26P

12V18ABSM001

1218-00MW000

N/A

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

cost down /0502-12

CN4801A 33PF/50V@
CN4801B 33PF/50V@
CN4801C 33PF/50V@
CN4801D 33PF/50V@
CN4802A 33PF/50V@
CN4802B 33PF/50V@
CN4802C 33PF/50V@
CN4802D 33PF/50V@
CN4803A 33PF/50V@
CN4803B 33PF/50V@
CN4803C 33PF/50V@
CN4803D 33PF/50V@
CN4804A 33PF/50V@
CN4804B 33PF/50V@
CN4804C 33PF/50V@
CN4804D 33PF/50V@
CN4805A 33PF/50V@
CN4805B 33PF/50V@
CN4805C 33PF/50V@
CN4805D 33PF/50V@
CN4806A 33PF/50V@
CN4806B 33PF/50V@
CN4806C 33PF/50V@
CN4806D 33PF/50V@

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8

1 2

C4816 33PF/50V@

1 2

C4817 33PF/50V@

KSO0 <30>
KSO1 <30>
KSO2 <30>
KSO3 <30>
KSO4 <30>
KSO5 <30>
KSO6 <30>
KSO7 <30>
KSO8 <30>
KSO9 <30>
KSO10 <30>
KSO11 <30>
KSO12 <30>
KSO13 <30>
KSO14 <30>
KSO15 <30>
KSO16 <30>
KSO17 <30>

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

KSI0 <30>
KSI1 <30>
KSI2 <30>
KSI3 <30>
KSI4 <30>
KSI5 <30>
KSI6 <30>
KSI7 <30>

A A

Title :

Title :

Title :

Engineer:

Engineer:

PEGATRON UNIHAN CORP.

‧

PEGATRON UNIHAN CORP.

‧

PEGATRON UNIHAN CORP.

‧

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

5

R1.3 2013/01/15
R4805 is changed option to /TP_3VS from /VA70HW
and R4806 is changed to /TP_5VS from /EA70HW
and CON4802 pin8 is connected to D4802 pin 5
for different T/P module voltage

4

3

2

Date: Sheet of

Engineer:

EG70_KB

EG70_KB

EG70_KB

1

Mike_Chiu

Mike_Chiu

Mike_Chiu

KB/ TP/ FLASH

KB/ TP/ FLASH

KB/ TP/ FLASH

48 99Monday, March 25, 2013

48 99Monday, March 25, 2013

48 99Monday, March 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

5

4

3

2

1

U5003 Close to GPU

3.0V~5.5V

8
7
6
5

12

C5020
2200PF/50V

@

Max: 1mA

U5003

mSOP-8

1

VCC

SMBCLK
SMBDATA
ALERT#
GND

G781-1

06V220000005

12

C5005
10UF/6.3V

@

DXP

DXN

THERM#

@

2

VGA_THERMDP

3

VGA_THERMDN

4

VGA_THERM#

1

0328-11R20
0330-11R20-9

3

D

Q5003
2N7002

@

G

S

2

+3VS_THEM +3VS

R5010 150Ohm

U5005

1

VCC

2

DXP

3

DXN

4

THERM#

G781 @

PR_OVERTEMP#

U5002 under palmrest

SMBUS addr=1001100x (98)

U5002: Remote(Local) thermal sensor,use remote mode.

PEGATRON UNIHAN CORP.

PEGATRON UNIHAN CORP.

PEGATRON UNIHAN CORP.

Size Project Name

Size Project Name

Size Project Name

B

B

B

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

D D

APU_SIC

U5001 Close to CPU

+3VS

12

C5004

0.1UF/10V

C C

temp setting : 68 degree

U5001

SET

GND

OT#

G709T1UF

1

THERM_SET

2
3

CPU_THERM#

R5001 30KOhm

5

VCC

4

HYST

06V220000007

1 2

10V220000055

CPU_THERM# < 47>

VGA_ALERT#<71>

APU_SID

ATI_THERMTRIP<71>

Plam Rest Thermal Sensor

FAN

B B

12

change part number /1219-11

CON5001
WTOB_CON_3P

45

HOLD1

1
2
3

HOLD2

12V17GISM046

A A

exchange PIN1 and PIN3 /00316-12

12

C5011
22PF/50V

@

1AV200000009

5

12

C5010

2.2UF/10V

1 2

SP5001 NB_R0402_5MIL_SMALL

D5001 SS0520

C5008
22PF/50V

1AV200000009
@

+5VS

12

C5009

2.2UF/10V

12

@

CTL_FAN<30>

12

C5003
100PF/50V

@

4

FAN_PWR

FAN0_TACH <30>

U5002

1

FON#

GND4

2

VIN

GND3

3

VO

GND2

VSET4GND1

G991P11U

8
7
6
5

PHILIP PMBS3904

Pleace in the center
of Plamrest.

3
C

B

1

Q5001
PMBS3904

E

ER 1129
Place near PCH

3

@

2

Palmrest_THR M_DA

Plamrest_THR M_DC

1

VGA_THERMDP

VGA_THERMDN

1 2

SMBCLK

SMBDATA

ALERT#

1

‧

‧

‧

EG70_KB

EG70_KB

EG70_KB

T5002@

GND

+3VS

12

C5007

0.1UF/10V

@

@

8
7
6
5

T5003@

VGA_THERMDP <71>
VGA_THERMDN <7 1>

12

C5006
2200PF/50V

@

12

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

1

C5021

0.1UF/10V

@

APU_SIC <8,30,71>
APU_SID <8,30,71>

FAN/THERMAL SENSOR

FAN/THERMAL SENSOR

FAN/THERMAL SENSOR

Mike_Chiu

Mike_Chiu

Mike_Chiu

50 99Monday, March 25, 2013

50 99Monday, March 25, 2013

50 99Monday, March 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

5

4

3

2

1

+3VS_WLAN

1

G

PCIE_WAKE#_WLAN

3

2

D

S

2N7002 @
Q5511

1 2

R5524 0Ohm

12

CLK_PCIE1_WLAN#<10>
CLK_PCIE1_WLAN<10>

PCIE_RXN1_WLAN<7>
PCIE_RXP1_WLAN<7>

PCIE_TXN1_WLAN<7>
PCIE_TXP1_WLAN<7>

12

+3VS_WLAN

BT_DISABLE_M5BT_ON/OFF#_R

BT_DISABLE_M51

1
3
5
7

9
11
13
15

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

53
54

+3VO

R5534 0Ohm

+3VS

R5508 0Ohm

WiFi/WiMAX

CON5501

WAKE#
Reserved1
Reserved2
CLKREQ#
GND1
REFCLK­REFCLK+
GND2

Reserved/UIM_C8
Reserved/UIM_C4
GND3
PERn0
PERp0
GND4
GND5
PETn0
PETp0
GND6
Reserved3
Reserved4
Reserved5
Reserved6
Reserved7
Reserved8
Reserved9
Reserved10

GND13
GND14

MINI_PCI_LATCH_52P

12V44GBSD000

1 2

/IOAC

1 2

/non_IOAC

UIM_PWR

UIM_DATA

UIM_CLK

UIM_RESET

UIM_VPP

W_DISABLE#

+3.3Vaux

SMB_CLK

SMB_DATA

LED_WWAN#

LED_WLAN#
LED_WPAN#

PERST#

USB_D+

NP_NC2
NP_NC1

CLK_REQ1_WLAN#<9>

12

@

1 2

12

12

C5504

0.1UF/16V

C5512

0.1UF/16V

@

WLAN_WAKE#<30>

BT_ON/OFF#_R

12

12

C5505

0.01UF/50V

@

C5513

0.01UF/50V

@

+3VS_WLAN

R5518
10KOhm

1 2

SP5501 R 0402

12

0.01UF/50V

@

R5509 0Ohm@

D D

BT_ON_OFF#<9>

BT_ON_EC<30>

C C

B B

R5530 0Ohm

R5531 0Ohm@

+3VS_WLAN

+1.5VS_WLAN

D5501 RB751V-40

R5514 0Ohm

12

C5502
10UF/10V C5506

1AV500000008

C5510
10UF/10V

1AV500000008
@

12

C5503

0.1UF/16V

C5511

0.1UF/16V

@

3.3V_1
GND7

1.5V_1

GND8

GND9

1.5V_2

GND10
USB_D-

GND11

1.5V_3

GND12

3.3V_2

+3VO

+3VS_WLAN

2
4
6
8
10
12
14
16

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

56
55

+3VS_WLAN_R

+AC_BAT_SYS

@

1 2

+1.5VS_WLAN

R5525
180KOHM

MINICARD_RST#

SMBC
SMBD

USBP2­USBP2+

RF_DET#_R

USBP2-

USBP2+

WLAN_ON_C

R5505 0Ohm
R5506 0Ohm@
R5507 0Ohm@

R5516 0Ohm@
R5517 0Ohm@

+3VS_WLAN

1

G

2

S

1 2

R5501 0Ohm

1 2

R5528 0Ohm

D

3

@

1 2
1 2

Q5502
2N7002

3

@

D

S

2

SI2304BDS-T1-GE3

G

1

Q5501

RN5501A

1 2

0Ohm

14

23

RN5501B

3 4

0Ohm

12
12
12

L5501
90Ohm/100MHz

09V090000002
@

BUF_PLT_RST# <9,33,40,47,70>
WLAN_RST#_APU <9>
WLAN_RST#_EC <30>

APU_SCL1_Q <28,48>
APU_SDA1_Q <28,48>

LED_WLAN# <66>

RF_DET# <30>

+3VS_WLAN

USB_PN2 <10>
USB_PP2 <10>

R5522 0Ohm@

R5523 0Ohm

+1.5VS +1.5VS_WLAN

1 2

R5513 0Ohm

RF_ON <30>

WLAN_ON <9>

R5526

@

100KOhm

1 2

61

UM6K1N
Q5513A

12

IOAC_EN<30,81>

RF_ON

A A

5

4

R55270Ohm @

12

R55290Ohm @

2

@

R5532

@

1MOhm

1 2

34

UM6K1N
Q5513B

5

@

3

12

C5501
1UF/25V

@

MINI-PCIE CARD (WLAN/BT)

MINI-PCIE CARD (WLAN/BT)

MINI-PCIE CARD (WLAN/BT)

Title :

Title :

Title :

Mike_Chiu

Mike_Chiu

Engineer:

Engineer:

EG70_KB

EG70_KB

EG70_KB

Engineer:

1

PEGATRON UN IHAN CORP.

‧

PEGATRON UN IHAN CORP.

‧

PEGATRON UN IHAN CORP.

‧

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Mike_Chiu

55 99Monday, March 25, 2013

55 99Monday, March 25, 2013

55 99Monday, March 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

5

4

3

2

1

HDD 2

12.5mm

CON6002

S1

SATA_TX P0< 10>

D D

SATA_TX N0<10 >

SATA_RX N0<10>
SATA_RX P0<10>

C6006 0.01UF/50V
C6008 0.01UF/50V

C6005 0.01UF/50V
C6007 0.01UF/50V

12
12

12
12

SATA_TX P0_C
SATA_TX N0_C

SATA_RX N0_C
SATA_RX P0_C

S1

S2

S2

S3

S3

S4

S4

S5

S5

S6

S6

S7

S7

NP_NC3

NP_NC1

3

1

+3VS +3VS

C6026
10UF/6.3V

@

C6024
10UF/6.3V

@

12

C6025

0.1UF/25V

@

12

C6023
10UF/6.3V

@

12

C6022

0.1UF/25V

1 2

SP6002 SH ORT_PIN

T6002

+5VS_HD D2+5VS

1

12

+5VS_HD D2

12

C C

P1
P2
P3
P4
P5
P6
P7
P8

P9
P10
P11
P12
P13
P14
P15

SATA_CO N_22P

12V24GB RD019

P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
P14
P15

NP_NC2

NP_NC4

2

4

ZERO POWER ODD SUPPORT

ODD

B B

4

NP_NC4

2

NP_NC2

1

NP_NC1

3

NP_NC3

SATA_CO N_13P

12V24GB RD020

CON6003

S1

S1

S2

S2

S3

S3

S4

S4

S5

S5

S6

S6

S7

S7

P1

P1

P2

P2

P3

P3

P4

P4

P5

P5

P6

P6

SATA_TX P1_C
SATA_TX N1_C

SATA_RX N1_C
SATA_RX P1_C

1 2

SATA_OD D_DA#_CON

/Zero_ODD

12

C6015

0.01UF/50 V

@

1 2

/Zero_ODD

R60010Ohm

+5VS_OD D

R60020Ohm

12

1 2
1 2

1 2
1 2

C6016
10UF/10V

C60110.01UF /50V
C60120.01UF /50V

C60130.01UF /50V
C60140.01UF /50V

SATA_OD D_PRSNT# <9>

12

+

CE6001
100UF/6.3 V

1BV1700 00001
@

SATA_OD D_DA# <9>

SATA_TX P1 < 10>
SATA_TX N1 <10>

SATA_RX N1 <10>
SATA_RX P1 <10>

support Hokey turn off ODD power

+3VS

12

R6007
10KOhm

/Zero_ODD

1 2

SATA_OD D_PWRGT<9>

R6009 0Ohm

/Zero_ODD

1 2

R6003 0Ohm

+5VS +5VS_OD D

+12VSUS

+5VSUS

R6006
100KOhm

/Zero_ODD

1 2

1 2

R6005 0Ohm

61

UM6K1N
Q6001A

2

/Zero_ODD

/Zero_ODD

R6004
100KOhm

/Zero_ODD

1 2

34

UM6K1N
Q6001B

5

/Zero_ODD

D

3

/non_Zero_ ODD

S

2

SI2304BDS -T1-GE3

G

1

Q6002

/Zero_ODD

C6010
1UF/25V

/Zero_ODD

12

R6011
10KOhm

/Zero_ODD

3

D

Q6003
2N7002

1

/Zero_ODD

G

S

2

A A

Title :

Title :

Title :

Engineer:

Engineer:

PEGATRO N UNIHAN CORP .

‧

PEGATRO N UNIHAN CORP .

‧

PEGATRO N UNIHAN CORP .

‧

Size P roject Name

Size P roject Name

Size P roject Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

EG70_KB

EG70_KB

EG70_KB

Engineer:

1

HDD/ODD

HDD/ODD

HDD/ODD

Mike_Chiu

Mike_Chiu

Mike_Chiu

60 99Monday, March 25 , 2013

60 99Monday, March 25 , 2013

60 99Monday, March 25 , 2013

Rev

Rev

Rev

1.2

1.2

1.2

A

B

C

D

E

USB CONN

+5VO

12

R6125
100KOhm

1

/USBSLP

G

3

2

D

1 1

2 2

3 3

USBP0_EN<30>

USB3_TXN0<10>

USB3_TXP0<10>

USB3_RXN0< 10>

USB3_RXP0<10>

USB_PN0<10>

USB_PP0<10>

S

Q6105
2N7002

/USBSLP

1 2

R6113 0Ohm

12

C6102 0 .1UF/25V

12

C6104 0 .1UF/25V

USBCEN

GND

/non_USBSLP

USB3_TXN0_C SSTN

USB3_TXP0_C

12

12

C6122

C6121

10PF/50V

10PF/50V

@

@

GND GND

U6107

A

1

VCC

B

2

3 4

GND

Vcc=2~5.5

/USBSLP

+5VO

12

C6107

0.1UF/16V

/USBSLP

5

GND

Y

RN6103B

34

0Ohm

1 4

2 3

12

0Ohm

RN6103A

RN6111B

34

0Ohm

1 4

2 3

12

0Ohm

RN6111A

L6101
90Ohm/100MHz

@

L6102
90Ohm/100MHz

@

+5VO

12

C6110
1UF/6.3V

1 2

C6119 10PF/50V

@

SSTP

1 2

C6120 10PF/50V

@

SSRN

SSRP

U6101

1

GND

2

IN1

3

IN2
EN#/EN4OC#

G547E1P81U

06V29000000 8

Active High

2.5A

GND

GND

OUT/NC

8

OUT1

7

OUT2

6
5

USB_CHG_OC#

+5VSUS

1 2

L6110

0Ohm

10V44000000 1

USBP1_EN<30>

12

C6109
1UF/6.3V

/USBSLP

Sleep & Charge

12

C6116

0.1UF/25V

+5VO

/USBSLP

USB_PP8<10>

USB_PN8<10>

CHGCB0<30 >

RN6120A

1 2

0Ohm

1 4

RN6120B

3 4

0Ohm

2 3

L6109
90Ohm/100MHz

@

USB_PN0_R

USB_PP0_R

+5V_USB1

USB30_OC#

U6104

1

GND

2

IN1

3

IN2
EN#/EN4OC#

G547E1P81U

06V29000000 8
/USBSLP

Active High

2.5A

U6105

5

VDD

6

TDP

7

TDM

8

CB

9

GND

RN6112A

1 2

RN6112B

3 4

OUT/NC

0Ohm

0Ohm

+3VSUS

R6123
10KOhm

/USBSLP

1 2

8

OUT1

7

OUT2

6
5

SELCDP

DM

CEN

SLG55584AVTR

06V15000000 9
/USBSLP

/non_USBSLP

/non_USBSLP

D6101

1

DPP8_CON_P D PN8_CON_N

1 2

USB30_OC#

1 2

L6111

R6114 0Ohm

/non_USBSLP

D6102

1

2

1V/0.1A

/USBSLP

0Ohm

10V44000000 1

3

+5V_USB2

USB_OC# <9>

2

3 4

USB_PP0_R USB_PN0_R

CM1293_04SO @

07V00000000 6

PLACE ESD Diodes 0700-0014000 near Connector

USB 2.0

+5V_USB2

+3VSUS

12

R6116
100KOhm

/USBSLP

4
3

DP

2
1

USBCEN

R6115 10K Ohm

USB_P8+ DPP8_CON_P
USB_N8-

12

/USBSLP

RN6113B

+5VO

1 4

RN6113A

USB_PP0_R
USB_PN0_R

0Ohm

0Ohm

34

L6114
90Ohm/100Mhz

@

2 3

12

CON6106

6

P_GND2

4

8

GND

P_GND4

3

D+

2

D-

1

7

VBUS

P_GND3

5

P_GND1

USB_CON_4P

12V136USD002

GND

DPN8_CON_N

***CE6104 chang e footprint
from vx_cesmd_2 60x260_h240
to vx_cesmd_260 x260_h240_cola y

+5V_USB1

12

+

CE6104
220UF/6.3V

1BV09000000 3

6

+5V_USB1

5

1 2

C6111 0.1UF/16V

@

no sleep & charge

1 2

R6120

Layout Notice: Place to user side

USB 3.0

GND

DPP8_CON_P

GND

DPN8_CON_N

C6101

0.1UF/25V

1AV200000041

1 2

SSRN
SSRP

SSTP

/non_USBSLP
10V54000000 1

SSRN

SSRP

SSTN

SSTP

12V13GURD006

0Ohm

5
4
6
3
7
2
8
1
9

USB_CON_9P

U6102

1

LINE_1

2

LINE_2

3

GND(Pin8)

4

LINE_3
LINE_45NC1

AZ1045_04F @

CON6101

SSRX­PGND
SSRX+
D+
GND
D­SSTX­VBUS
SSTX+

+5V_USB2+5V_USB1

12

P_GND110P_GND3

P_GND2

P_GND4

11

13

GND

10

SSRN

NC4

9

SSRP

NC3

7

SSTNSSTN

NC2

6

SSTP

IO/B CONN

4 4

5 5

USB Power Switch for USB DB Main

+5VSUS +5V_USB_DB

USBP2_EN<30>

12

C6106

1UF/6.3V

USB_PN5<10>

USB_PP5<10>

1
2
3

RN6107A

RN6107B

U6103

GND
IN1
IN2

OUT/NC

EN#/EN4OC#

G547E1P81U

06V29000000 8

Active High

2.5A

1 2

3 4

N/A

8

OUT1

7

OUT2

6
5

0Ohm

1 4

2 3

0Ohm

L6107
90Ohm/100Mhz

@

12

CE6101

+

220UF/6.3V

1BV09000000 3

USB_PN5_C

USB_PP5_C

USB_OC#

BIOS debug port

1 2

USB_PN1<10>

USB_PP1<10>

A

RN6106A

RN6106B

1 4

3 4

USB_PN1_C

0Ohm

L6106
90Ohm/100Mhz

@

2 3

USB_PP1_C

0Ohm

A_GND

B

AUDIO BOARD/w USB2.0 x2

+5V_USB_DB

USB_PN5_C
USB_PP5_C

USB_PN1_C
USB_PP1_C

MIC_IN_AC_E_R_J<42>
MIC_IN_AC_E_L_J<4 2>

MIC_EXT_JD#<41 >
HP_JACK_L<42>
HP_JACK_R<42>
HP_JD#<41 >

COMBO_MIC<41>

A_GND A_GND

20
19
18
17
16
15
14
13
12
11
10

9
8
7
6
5
4
3
2
1

CON6104

20
19

SIDE2
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2

SIDE1
1

FPC_CON_20P

12V18AWSM019

22

21

USB CONN/ IO/B CONN

USB CONN/ IO/B CONN

USB CONN/ IO/B CONN

Title :

Title :

Title :

Mike_Chiu

Mike_Chiu

Mike_Chiu

Engineer:

Engineer:

EG70_KB

EG70_KB

EG70_KB

E

Engineer:

Rev

Rev

Rev

1.2

1.2

1.2

61 99Monday, March 25, 2013

61 99Monday, March 25, 2013

61 99Monday, March 25, 2013

PEGATRON UNIHAN CORP.

‧

PEGATRON UNIHAN CORP.

‧

PEGATRON UNIHAN CORP.

‧

Size Proje ct Name

Size Proje ct Name

Size Proje ct Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

C

D

Date: Sheet of

5

4

3

2

1

DC IN

Irat=5A

5

21

D_A/D_DOCK_IN

C6308
1UF/25V

1AV300000031

12

R6303
330Ohm

@

34

Q6301B
UM6K1N

@

+3VA

2

+A/D_DOCK_IN

12

R6302
100KOhm

@

61

Q6306A
UM6K1N

@

C6306

0.1UF/25V

1AV300000024

+A/D_DOCK_IN

Frank
0505 Follow EVEREST

+3VS

12

R6304
330Ohm

@

+3VS_DISCHRG +0.675VS_DISCHRG +5VS_DISCHRG+VDDCR_NB_DISCHRG+0.95VS_DISCHRG +1.5VS_DISCHRG

61

Q6302A
UM6K1N

@

2

+3V

12

+3V_DISCHRG

34

5

+1.35V_DDR

12

+1.35_DDR_DISCHRG

3

D

1

G

S

2

+VDDCR_CPU

2

R6330
330Ohm

@

Q6320
2N7002

07V040000001
@

T6314

1

12

R6314
330Ohm

@

+VDDCR_APU_DISCHRG

61

Q6303A
UM6K1N

@

T6319

1

+1.5VS+0.95VS +VDDCR_NB +5VS

12

R6305
330Ohm

@

34

Q6302B
UM6K1N

@

5

R6311
330Ohm

@

Q6306B
UM6K1N

@

T6305

T6313

T6304

T6306

T6307

1

1

1

1

1

L6304 1 50Ohm/100Mhz

D_A/D_DOCK_IN

C6309

C6305

1000PF/50V

0.1UF/25V

1AV200000018

1AV300000024

1

1

1

D D

1

T6308

WTOB_4P

CON6302

12V17AISD002

T6311

T6310

T6309

4
3
2
1

C6307

0.1UF/25V

1AV300000024

Discharge Circuit

C C

SUSB_EC#<30,91,92>

B B

+3VA

12

R6301
100KOhm

@

61

Q6301A
UM6K1N

@

2

SUSC_EC#<30,91>

Battery Connector

T6312

T6320

T6321

1

1

1

BATT_CON_8P

9

P_GND1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

10

P_GND2

CON6301

12V20GBSD008

GND

1220-00FD000

T6316

T6318

T6315

T6317

1

1

1

1

12

R6307
330Ohm

@

34

Q6303B
UM6K1N

@

5

T6322

1

PI
TS1#_C
SMB0_CLK_C
SMB0_DAT_C

+BAT_CON

2

T6323

1

+0.675VS

12

61

R6308
330Ohm

@

Q6304A
UM6K1N

@

SR-5
0120-11

+BAT_CON

C6310

T6301

T6302

1

1

C6302

0.1UF/25V

100PF/50V

C6301

12

12

@

1AV300000024

PI

R6315
1KOhm

1 2

GND

12

R6313
330Ohm

@

34

Q6304B
UM6K1N

@

5

VSUS_ON<30,81,82,84,85,91,93>

0.1UF/25V

T6303

1AV300000007
@

1

L6301 1kOhm/100Mhz Irat=300mA

2 1

L6303 1kOhm/100Mhz Irat=300mA

2 1

L6302 1kOhm/100Mhz Irat=300mA

2 1

C6304

C6303

100PF/50V

100PF/50V

12

@

@

+12VS

12

61

2

2

D6301

1

2

3 4

DF5A6.8FU @

+1.8VS

5

5

12

R6331
330Ohm

@

+1.8VS_DISCHRG

34

Q6305B
UM6K1N

@

TS1#_C SMB0_CLK_C

R6327
330Ohm

@

+12VS_DISCHRG

Q6305A
UM6K1N

@

+3VA

12

R6324
100KOhm

@

61

Q6311A
UM6K1N

@

SMB0_DAT_C

5

+5VSUS

12

R6325
330Ohm

@

+5VSUS_DISCHRG

34

Q6311B
UM6K1N

@

TS1# <90>
SMB0_CLK <30,88>
SMB0_DAT <30,88>

VGA Discharge Circuit

+3VS_VGA +1.5VS_VGA+VDDC_VGA

+3VA

12

R6317
100KOhm

/DSC

VGA_DISCHRG_EN

34

Q6308B
UM6K1N

R6316 100KOhm

VGA_PWRON<9,91>

A A

1 2

5

VGA_DISCHRG_CTL

/DSC

5

/DSC

4

12

R6318
330Ohm

/DSC

61

Q6308A
UM6K1N

2

/DSC

12

+VDDC_VGA_DISCHRG

34

5

R6319
330Ohm

/DSC

Q6309B
UM6K1N

/DSC

+1.8VS_VGA

12

+1.8VS_VGA_DISCHRG

61

2

3

R6322
330Ohm

/DSC

Q6309A
UM6K1N

/DSC

12

R6320
330Ohm

/DSC

+1.5VS_VGA_DISCHRG+3VS_VGA_DISCHRG

34

Q6310B
UM6K1N

5

/DSC

+0.95VS_VGA

12

R6321
10Ohm

/DSC

+0.95VS_VGA_DISCHRG

61

Q6310A
UM6K1N

2

/DSC

Title :

Title :

Title :

DC-IN/DISCHARGE

DC-IN/DISCHARGE

DC-IN/DISCHARGE

Engineer:

Mike_Chiu

Engineer:

Mike_Chiu

Engineer:

PEGATRON UNIHAN CORP.

‧

PEGATRON UNIHAN CORP.

‧

PEGATRON UNIHAN CORP.

‧

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

EG70_KB

EG70_KB

EG70_KB

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Mike_Chiu

Rev

Rev

Rev

1.2

1.2

1.2

63 99Monday, March 25, 2013

63 99Monday, March 25, 2013

63 99Monday, March 25, 2013

1

5

PWR/B CONN

4

3

2

1

+5VSUS +3VA

D D

12

C6504

0.1UF/16V

@

PWRL ED_ON#

12

2

PWR_ SW#_S

1

3

AZ2025-0 2S

D6501

@

PWR_ SW#_M<30>

C C

R6503 33Ohm

10PF/50V
C6508

1 2

LID_SW #<9,30,37>

1 2

10PF/50V
C6512

0.1UF/25V
C6505

1 2

1 2

10PF/50V
C6506

12V18AW SM001

FPC_CON _10P

12

SIDE2

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

11

SIDE1

CON6504

PWR_ BLUE_LED#<30,66>

PWR_ AMBER_LED#<30,66>

R6509 0Ohm

R6510 0Ohm

close to CON6504

+3VA

Note:
LID_SW# is easy to cause high voltage damage when
plugging inverter board connector to M/B with AC present.
Need to add bidirectional diode to protect this pin.

12

12

@

+3VA

2

3

D6520

1.25V/0.15 A

@

LID_SW #

1

12

R6520
100KOhm

12

C6521
100PF/50 V

PWRL ED_ON#

DEBUG CARD CONN.

B B

1 2

C6503 0.1UF/16V

@

A A

LPC_SER IRQ<10,30>

EXT_SMI#< 9,30>

R6501 0Ohm@

R6502 0Ohm@

5

12

INT_SERIRQ_C

12

EXT_SMI#_ C

+3V+3V S

R6506
0Ohm

@

12

R6505
0Ohm

@

CON6502

+3V_CON 6502_12

LPC_AD0<10,30>

LPC_AD1<10,30>

LPC_AD2<10,30>

LPC_AD3<10,30>

LPC_FRA ME#<10,12,30 >

LPC_CLK 0_DEBUG<10>

4

LPC_AD0

LPC_AD1
EXT_SMI#_ C
LPC_AD2
INT_SERIRQ_C
LPC_AD3

LPC_FRA ME#

LPC_CLK 0_DEBUG

11
10

9
8
7
6
5
4
3
2
1

1212SIDE1
11
10
9
8
7
6
5
4
3
2
1

SIDE2

FPC_CON _12P

12V18GW SM045

@

13

14

PWR/B CONN/DEBUG CONN

PWR/B CONN/DEBUG CONN

PWR/B CONN/DEBUG CONN

Title :

Title :

Title :

Engineer:

Engineer:

PEGATRO N UNIHAN CORP .

‧

PEGATRO N UNIHAN CORP .

‧

PEGATRO N UNIHAN CORP .

‧

Size P roject Name

Size P roject Name

Size P roject Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

EG70_KB

EG70_KB

EG70_KB

Engineer:

1

Mike_Chiu

Mike_Chiu

Mike_Chiu

65 99Monday, March 25 , 2013

65 99Monday, March 25 , 2013

65 99Monday, March 25 , 2013

Rev

Rev

Rev

1.2

1.2

1.2

12

5

Power LED

+5VSUS

12

R6608
10KOhm

D D

PWR_BLUE_LED#<30,65>

PWR_AMBER_LED#<30,65>

+5VA

+5VS

@

61

Q6602A

2

UM6K1N

@

1 2

R6609 0Ohm

1 2

R6617 0Ohm@

1 2

R6618 0Ohm

5

34

Q6602B
UM6K1N

@

LED6601

BLUE&ORANGE

07V130000038

R6607

360Ohm

+5V_LED6605_1

WLAN LED

C C

WLAN_LED<9,12>

3

D

Q6604

1

2N7002

G

12

R6613
100KOhm

@

LED_WLAN#<55> SATA_LED#<10>

@

S

2

+3VS_WLAN

+3VS_WLAN +3VS

12

R6614

12

R6615
10KOhm

100KOhm

LED_WLAN

61

Q6605A

2

UM6K1N

+5VSUS

1

C23C1

1 2

SR-65

A

2

1 2

5

4

R6606
560Ohm

10V240000029

1

3

2

1 2

LED_WLAN#_C

34

Q6605B
UM6K1N

12

LED6605
AMBER

07V130000055

R6616
499Ohm

10V220000076

C6602
47PF/50V

1AV200000015
@

3

2

+5VA

1

Charger LED

12

C6601
47PF/50V

34

Q6601B
UM6K1N

@

1AV200000015
@

R6621
0Ohm

1 2

1

R6604

360Ohm

Q6601A
UM6K1N

@

SR-65

A

C23C1

2

R6602
560Ohm

1 2

1 2

R6620
0Ohm

1 2

5

LED6602

BLUE&ORANGE

07V130000038

+5VA

1 2

R6611 200KOhm@

CHG_LED_BLUE#<30>

BAT_ORG_LED#<30>

12

C6603
1UF/6.3V

@

+5VS

HDD LED

1 2

R6610 0Ohm

12

R6612
100KOhm

@

61

Q6603A

2

UM6K1N

@

5

1

2

1 2

Storage_LED#

34

3

R6605
300OHM

Q6603B
UM6K1N

@

2

LED6604
BLUE

07V130000017

61

WLAN NUT

B B

H6628

A40M20-64AS

H6629

A40M20-64AS

PCH NUT

A A

Screw Ax4
CPU

H6601

1

CRT315x335D142

H6602

1

CRT315x335D142

H6603

1

CRT315x335D142

Screw Zx1
CPU

H6604

1

CRT346X350D173

Screw Bx2
VGA

H6605

1

CRT331X346D142

H6606

1

CRT331X346D142

copy from AAB70 /1222-11

5

Screw A x 10

H6608

1

C354D126

H6609

1

C354D126

H6614

1

C354D126

H6615

1

C354D126

H6616

1

C354D126

4

H6621

1

C354D126

H6622

1

C354D126

H6623

1

C354D126

H6625

1

C354D126

Screw hole V x 1

H6607

1

P_GND

7

NP_NC1

8

NP_NC2

9

NP_NC3

10

NP_NC4

11

NP_NC5

12

NP_NC6

13

NP_NC7

14

NP_NC8

15

NP_NC9

25

NP_NC10

26

NP_NC11

27

NP_NC12

28

NP_NC13

29

NP_NC14

30

NP_NC15

31

NP_NC16

32

NP_NC17

33

NP_NC18

RTCBD126

NP_NC19
NP_NC20
NP_NC21
NP_NC22
NP_NC23
NP_NC24
NP_NC25
NP_NC26
NP_NC27
NP_NC28
NP_NC29
NP_NC30
NP_NC31
NP_NC32
NP_NC33
NP_NC34
NP_NC35
NP_NC36

H6635

1

HOLE_NPTH

H6636

1

HOLE_NPTH

H6637

1

HOLE_NPTH

H6638

1

HOLE_NPTH

GND4
GND3

GND4
GND3

GND4
GND3

5
4

5
4

5
4

Screw B x 2

H6624

1

NP_NC

2
3

1
2
3

RCT390X449BD126N

PEGATRON UN IHAN CORP.

PEGATRON UN IHAN CORP.

PEGATRON UN IHAN CORP.

Date: Sheet of

Date: Sheet of

Date: Sheet of

5

GND1

GND4

4

GND2

GND3

C354D126N

Screw P Screw O

H6619

NP_NC

5

GND1

GND4

4

GND2

GND3

‧

‧

‧

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

EG70_KB

EG70_KB

EG70_KB

Fix hole D x 1

H6633

1

43
44
45
46
47
48
49
50
51
61
62
63
64
65
66
67
68
69

3

CB276D138N

change screw hole /0118-12

Fix hole N x 1

H6634

1

DO150X138N

1
2
3

1
2
3

1
2
3

NP_NC
GND1
GND2

Screw I

NP_NC
GND1
GND2

Screw N

NP_NC
GND1
GND2

2

H6620

C354D126N

H6618

ST472CB354D126N

H6613

R472X449D126N

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

1

Screw Q

H6617

1

NP_NC

2

GND1

GND4

3

GND2

GND3

CRT315X472D126N

H6610

1

NP_NC

2

GND1

GND4

3

GND2

GND3

CRT433X449D126N

LED/NUT/SCREW

LED/NUT/SCREW

LED/NUT/SCREW

Mike_Chiu

Mike_Chiu

Mike_Chiu

66 99Monday, March 25, 2013

66 99Monday, March 25, 2013

66 99Monday, March 25, 2013

5
4

5
4

Rev

Rev

Rev

1.2

1.2

1.2

5

4

3

2

1

GPU BOM Optional Definition

@ => Unmount

/DSC => Discrete SKU only

D D

U7001A

PART 1 0F 9

@

D7001

1.2V/0.1A

@

12

+3VS_VGA

12

PEG_TXP0
PEG_TXN0

PEG_TXP1
PEG_TXN1

PEG_TXP2
PEG_TXN2

PEG_TXP3
PEG_TXN3

CLK_PCIE0_VGA
CLK_PCIE0_VGA#

TEST_PG_VGA

R7006
10KOhm

/DSC

PEG_TXP0<7>
PEG_TXN0<7>

PEG_TXP1<7>
PEG_TXN1<7>

PEG_TXP2<7>
PEG_TXN2<7>

PEG_TXP3<7>
PEG_TXN3<7>

C C

B B

CLK_PCIE0_VGA<10>
CLK_PCIE0_VGA#<10>

R7001

/DSC

1KOhm

1 2

GND

D7002

1V/0.1A /DSC

DGPU_HOLD_RST#<9>

BUF_PLT_RST#<9,33,40,47,55>

A A

1

3

2

R7007 0Ohm

1 2

PERSTB_VGA

AA38

AB35
AA36

AH16

AA30

Y37

Y35

W36

W38

V37

V35
U36

U38
T37

T35
R36

R38
P37

P35
N36

N38
M37

M35

L36

L38

K37

K35

J36

J38

H37

H35
G36

G38
F37

F35
E37

PCIE_RX0P
PCIE_RX0N

PCIE_RX1P
PCIE_RX1N

PCIE_RX2P
PCIE_RX2N

PCIE_RX3P
PCIE_RX3N

PCIE_RX4P
PCIE_RX4N

PCIE_RX5P
PCIE_RX5N

PCIE_RX6P
PCIE_RX6N

PCIE_RX7P
PCIE_RX7N

NC_PCIE_RX8P
NC_PCIE_RX8N

NC_PCIE_RX9P
NC_PCIE_RX9N

NC_PCIE_RX10P
NC_PCIE_RX10N

NC_PCIE_RX11P
NC_PCIE_RX11N

NC_PCIE_RX12P
NC_PCIE_RX12N

NC_PCIE_RX13P
NC_PCIE_RX13N

NC_PCIE_RX14P
NC_PCIE_RX14N

NC_PCIE_RX15P
NC_PCIE_RX15N

CLOCK

PCIE_REFCLKP
PCIE_REFCLKN

TEST_PG

PERSTB

MARS-M2

02V050000020 /DSC

PCI EXPRESS INTERFACE

PCIE_TX0P
PCIE_TX0N

PCIE_TX1P
PCIE_TX1N

PCIE_TX2P
PCIE_TX2N

PCIE_TX3P
PCIE_TX3N

PCIE_TX4P
PCIE_TX4N

PCIE_TX5P
PCIE_TX5N

PCIE_TX6P
PCIE_TX6N

PCIE_TX7P
PCIE_TX7N

NC_PCIE_TX8P

NC_PCIE_TX8N

NC_PCIE_TX9P

NC_PCIE_TX9N

NC_PCIE_TX10P
NC_PCIE_TX10N

NC_PCIE_TX11P
NC_PCIE_TX11N

NC_PCIE_TX12P
NC_PCIE_TX12N

NC_PCIE_TX13P
NC_PCIE_TX13N

NC_PCIE_TX14P
NC_PCIE_TX14N

NC_PCIE_TX15P
NC_PCIE_TX15N

CALIBRATION

PCIE_CALR_TX

PCIE_CALR_RX

Mar and Sun support Gen3,

KABINI only support Gen2, Change C from 0.22UF to 0.1UF

Y33

PEG_RXP0_C
PEG_RXN0_C

PEG_RXP1_C
PEG_RXN1_C

PEG_RXP2_C
PEG_RXN2_C

PEG_RXP3_C
PEG_RXN3_C

C7001 0.1UF /10V /DSC
C7002 0.1UF /10V /DSC

C7003 0.1UF /10V /DSC
C7004 0.1UF /10V /DSC

C7005 0.1UF /10V /DSC
C7006 0.1UF /10V /DSC

C7007 0.1UF /10V /DSC
C7008 0.1UF /10V /DSC

Y32

W33
W32

U33
U32

U30
U29

T33
T32

T30
T29

P33
P32

P30
P29

N33
N32

N30
N29

L33
L32

L30
L29

K33
K32

J33
J32

K30
K29

H33
H32

Y30

PCIE_CALR_TX_VGA

Y29

PCIE_CALR_RX_VGA

/MARS => For GPU of MARS SKU only

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

Schematics Note:

Heathrow/Chelsea/Venus/Mars/Sun Only

Do not install For Thames/Seymour

/DSC

1 2

R7003 1.69KOhm

Schematics Note:

Do not install for Heathrow/Chelsea/Venus/Mar/Sun

Install for Thames/Seymour ONLY

@

1 2

R7004 1.27KOhm

R7005 1KOhm

/DSC

PEG_RXP0
PEG_RXN0

PEG_RXP1
PEG_RXN1

PEG_RXP2
PEG_RXN2

PEG_RXP3
PEG_RXN3

12

GND

+0.95VS_VGA

+0.95VS_VGA

PEG_RXP0 <7>
PEG_RXN0 <7>

PEG_RXP1 <7>
PEG_RXN1 <7>

PEG_RXP2 <7>
PEG_RXN2 <7>

PEG_RXP3 <7>
PEG_RXN3 <7>

Title :

Title :

Title :

GPU-PCIE INTERFACE

GPU-PCIE INTERFACE

GPU-PCIE INTERFACE

Corey

Corey

Engineer:

Engineer:

EG70_KB

EG70_KB

EG70_KB

Engineer:

1

PEGATRON UN IHAN

‧

PEGATRON UN IHAN

‧

PEGATRON UN IHAN

‧

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Corey

70 99Monday, March 25, 2013

70 99Monday, March 25, 2013

70 99Monday, March 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

5

/MARS

RSET_VGA

For MARS

D D

Schematics Note:

Add test points on SMBBus and SDA/SCL for debug

Access to SMBBus ans SDA/SCL is mandatory on all designs

C C

Schematics Note:

On Mars, only HPD1 and GPIO_14_HPD2 are avaiable for display hot-plug detection

B B

A A

AVDD_VGA

AVSSQ_VAG

VDD1DI_VGA

VSS1DI_VGA

Schematics Note:

Disable MLPS
Do not install for Mars

+3VS_VGA

R7128 10KOhm@

TS_FDO

R7129 10KOhm

Schematics Note:

GND

Enable MLPS
Install for Mars

ATI_THERMTRIP<50>

UM6K1N
Q7102A

APU_SID

APU_SIC

+3VS_VGA

R7176
100KOhm

@

AC_BATT#_VGA

/DSC

/DSC

6 1

1 2

1 2

R7131 499Ohm

R7132 0Ohm

C7106

/MARS

1 2

0.1UF/10V

AVSSQ_VAG

R7133 0Ohm

C7107

/MARS

1 2

0.1UF/10V

VSS1DI_VGA

12

12

+3VS_VGA

R7195 10KOhm

R7106 10KOhm/DSC

GND

+3VS_VGA +3VS_VGA

R7174

45.3KOhm

1%

2

/DSC

5

3 4

Q7102B

UM6K1N

/DSC

+3VS_VGA

1 2

Q7103B

34

UM6K1N

@

5

61

+1.8VS_VGA

/DSC

21

B7101 120Ohm/100Mhz

Net Short use 0Ohm

/DSC

1 2

R7118 0Ohm

GND

5

+1.8VS_VGA

GND

/MARS

1 2

+1.8VS_VGA

1 2

/MARS

Schematics Note:

THE PINS WITH TEST POINTS
ARE REQUIRED TO BE ACCESSIBLE
FOR DEBUG
ACCESS TO AMD DEBUG PORT IS
MANDATORY ON INITIAL PROTOTYPE
DESIGNS

Schematics Note:

GPIO_0 should pull high 3.3V,but in power team pull high 5V.

If need to use this pin should be noted.

@

12

R7175

45.3KOhm

1%
/DSC

1 2

1 2

R7177
10KOhm

@

Q7103A
UM6K1N

@
2

12

C7101

/DSC

10UF/6.3V

+3VS_VGA +3VS_VGA

12

12

/DSC

1 2

R7194 0Ohm

CLK_REQG_VGA#<9>

SMB1_DAT_GPU

SMB1_CLK_GPU

AC_IN_OC <30,88>

12

C7102

/DSC

1UF/6.3V

R7105

@

4.7KOhm

T7138

T7130

For MARS

12

R7104

@

4.7KOhm

GPIO_1,GPIO_2,GPIO_7,GPIO_11,GPIO_12,GPIO_13,
GPIO_14 and GPIO_18 are NC in Sun

VGA_SLP<87>

1

VGA_ALERT#<50>

1

CLK_REQG_VGA#

+1.8VS_VGA

12

R7197

/MARS

499Ohm

R7198

/MARS

1 2

249Ohm

1 2

GND

VGA_THERMDP<50>

+TSVDD

VGA_THERMDN<50>

12

C7103

/DSC

0.1UF/10V

TSVDD

C7105

/MARS

0.1UF/10V

T7101

T7102
T7103
T7104
T7105
T7106
T7107
T7108
T7109
T7110
T7111
T7112
T7113
T7114
T7115
T7116
T7117
T7118

VGA_SLP

VGA_ALERT#

4

1

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

R7179 0Ohm@

R7130 0Ohm@

1 2

R7196 0Ohm/DSC

4

DVP CNTL0

DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8
DVPDATA_9
DVPDATA_10
DVPDATA_11
DVPDATA_12
DVPDATA_13
DVPDATA_14
DVPDATA_15
DVPDATA_16

1 2

1 2

SMB1_CLK_GPU
SMB1_DAT_GPU

SCL_VGA
SDA_VGA

GPIO0_VGA

AC_BATT#_VGA
GPIO6_VGA

GPIO8_VGA
GPIO9_VGA
GPIO10_VGA

GPU_VID7_1
GPU_VID7_5

ATI_THERM#

GPIO19_CTF_VGA
GPU_VID7_2
GPIO21_VGA
GPIO22_VGA

CLK_REQG_VGA#_R

GPU_VID7_3
GPU_VID7_4

CEC_1

TESTEN

JTAG_TRSTB_VGA
JTAG_TDI_VGA
JTAG_TCK_VGA
JTAG_TMS_VGA
JTAG_TDO_VGA

VGA_THERMDP
VGA_THERMDN

TS_FDO

U7001B

AD29

GENLK_CLK

AC29

GENLK_VSYNC

AJ21

SWAPLOCKA

AK21

SWAPLOCKB

AR8

NC_DVPCNTL_MVP_0

AU8

NC_DVPCNTL_MVP_1

AP8

DBG_CNTL0

AW8

NC_DVPCNTL_1

AR3

NC_DVPCNTL_2

AR1

NC_DVPCLK

AU1

DBG_DATA0

AU3

DBG_DATA1

AW3

DBG_DATA2

AP6

DBG_DATA3

AW5

DBG_DATA4

AU5

DBG_DATA5

AR6

DBG_DATA6

AW6

DBG_DATA7

AU6

DBG_DATA8

AT7

DBG_DATA9

AV7

DBG_DATA10

AN7

DBG_DATA11

AV9

DBG_DATA12

AT9

DBG_DATA13

AR10

DBG_DATA14

AW10

DBG_DATA15

AU10

DBG_DATA16

AP10

DBG_DATA17

AV11

DBG_DATA18

AT11

DBG_DATA19

AR12

DBG_DATA20

AW12

DBG_DATA21

AU12

DBG_DATA22

AP12

DBG_DATA23

AJ23

SMBCLK

AH23

SMBDATA

AK26

SCL

AJ26

SDA

GENERAL PURPOSE I/O

AH20

GPIO_0

AH18

GPIO_1

AN16

GPIO_2

AH17

GPIO_5_AC_BATT

AJ17

GPIO_6

AK17

GPIO_7_BLON

AJ13

GPIO_8_ROMSO

AH15

GPIO_9_ROMSI

AJ16

GPIO_10_ROMSCK

AK16

GPIO_11

AL16

GPIO_12

AM16

GPIO_13

AM14

GPIO_14_HPD2

AM13

GPIO_15_PWRCNTL_0

AK14

GPIO_16

AG30

GPIO_17_THERMAL_INT

AN14

GPIO_18

AM17

GPIO_19_CTF

AL13

GPIO_20_PWRCNTL_1

AJ14

GPIO_21

AK13

GPIO_22_ROMCSB

AN13

CLKREQB

AG32

GPIO_29

AG33

GPIO_30

AJ19

GENERICA

AK19

GENERICB

AJ20

GENERICC

AK20

GENERICD

AJ24

GENERICE

AH26

GENERICF

AH24

GENERICG

AC30

CEC_1

AK24

HPD1

AH13

DBG_VREFG

AL21

PX_EN

AD28

TESTEN

AM23

JTAG_TRSTB

AN23

JTAG_TDI

AK23

JTAG_TCK

AL24

JTAG_TMS

AM24

JTAG_TDO

AF29

DPLUS

AG29

DMINUS

AK32

GPIO_28_FDO

AL31

TS_A

AJ32

TSVDD

AJ33

TSVSS

MARS-M2

02V050000020 /DSC

MUTI GFX

DEBUG

THERMAL

3

PART 2 0F 9

AVSSN2

AVSSN1

AVSSN3

HSYNC
VSYNC

RSET

AVDD

AVSSQ

VDD1DI

VSS1DI

NC31
NC30

NC10

NC_SVI2_1
NC_SVI2_2
NC_SVI2_3

PS_0

PS_1

PS_2

PS_3

DDC1CLK

DDC1DATA

AUX1P
AUX1N

DDC2CLK

DDC2DATA

AUX2P
AUX2N

DDCVGACLK

DDCVGADATA

AU24
AV23

AT25
AR24

AU26
AV25

AT27
AR26

AR30
AT29

AV31
AU30

AR32
AT31

AT33
AU32

AU14
AV13

AT15
AR14

AU16
AV15

AT17
AR16

AU20
AT19

AT21
AR20

AU22
AV21

AT23
AR22

For MARS

AD39

R

AD37

AVSS_VGA

AE36

G

AD35

AF37

B

AE38

AC36
AC38

GND

AB34

RSET_VGA

AD34

AVDD_VGA

AE34

AVSSQ_VAG

AC33

VDD1DI_VGA

AC34

VSS1DI_VGA

V13
U13
AF33

NC8

AF32

NC7

AA29

NC1

AG21
AC32

NC6

AC31
AD30
AD32

AM34

PS_0

AD31

PS_1

AG31

PS_2

AD33

PS_3

AM26
AN26

AM27
AL27

AM19
AL19

AN20
AM20

AL30
AM30

AL29
AM29

AN21
AM21

AK30
AK29

AJ30
AJ31

Schematics Note:

PIN STRAPS FOR THAMES/SEYMOUR

1
1

T7120

1

T7121

1

T7122

1

T7123

1

T7124

1

T7125

T7126

1
1

T7127

1

T7128

T7129

PS_0 <74>

PS_1 <74>

PS_2 <74>

PS_3 <74>

+3VS_VGA

@

1 2

R7116 5.11KOhm1%

1 2

R7117 1KOhm

/DSC

GND

GPIO0_VGA

GPIO9_VGA

GPIO22_VGA

GPIO8_VGA

R7180 10KOhm@

R7183 10KOhm@

R7187 10KOhm@

R7192 10KOhm@

Schematics Note:

Designs that do not inculde an EEPROM
must still provide access to the ROM
interface signals for debug purposes

Schematics Note:

SERIAL EEPROM 512K/1M
1M EEPROM IS NEEDED TO SUPPORTUEFI BIOS

1 2

1 2

1 2

1 2

NC_TXCAP_DPA3P

NC_TXCAM_DPA3N

NC_TX0P_DPA2P

NC_TX0M_DPA2N

DPA

NC_TX1P_DPA1P

NC_TX1M_DPA1N

NC_TX2P_DPA0P

NC_TX2M_DPA0N

NC_TXCBP_DPB3P

NC_TXCBM_DPB3N

NC_TX3P_DPB2P

NC_TX3M_DPB2N

DPB

NC_TX4P_DPB1P

NC_TX4M_DPB1N

NC_TX5P_DPB0P

NC_TX5M_DPB0N

NC_TXCCP_DPC3P

NC_TXCCM_DPC3N

NC_TX0P_DPC2P

NC_TX0M_DPC2N

DPC

NC_TX1P_DPC1P

NC_TX1M_DPC1N

NC_TX2P_DPC0P

NC_TX2M_DPC0N

NC_TXCDP_DPD3P

NC_TXCDM_DPD3N

NC_TX3P_DPD2P

NC_TX3M_DPD2N

DPD

SMBus

I2C

BACO

NC_TX4P_DPD1P

NC_TX4M_DPD1N

NC_TX5P_DPD0P

NC_TX5M_DPD0N

DAC1

MLPS

DDC/AUX

NC_DDCCLK_AUX3P

NC_DDCDATA_AUX3N

NC_DDCCLK_AUX4P

NC_DDCDATA_AUX4N

NC_DDCCLK_AUX5P

NC_DDCDATA_AUX5N

NC_DDCCLK_AUX6P

NC_DDCDATA_AUX6N

3

GND

+3VS_VGA

2

Schematics Note:

drain-source leakage current should be less than 1uA
Make sure MOSFET is off

+3VS_VGA

during system in standby

Check symbol type(enhancement or not) with reference schematics

R7119

@

27KOhm

+3VS_VGA

GPIO8_VGA

R7122 33Ohm

GPIO22_VGA

R7125 33Ohm@

GPIO10_VGA

R7124 33Ohm@

GPIO9_VGA

R7123 33Ohm@

+3VS_VGA

R7126 0Ohm

R7127 0Ohm

GND

Schematics Note:

Access to the JTAG signals is mandatory on all designs

JTAG DEBUG PORT, DNI FOR PRODUCTION

12

R7109 10KOhm@

12

R7110 10KOhm@

12

R7111 10KOhm@

12

R7112 10KOhm@

TESTEN

+3VS_VGA

2

@

1 2

R7120 510Ohm

@

12
12

12
12

@

1 2

@

1 2

+3VS_VGA

GND

1
3 4
5 6
7 8

HEADER_2X4P

GPU_VID7_0<87>
GPU_VID7_1<87>
GPU_VID7_2<87>
GPU_VID7_3<87>
GPU_VID7_4<87>
GPU_VID7_5<87>
GPU_VID7_6<87>

JTAG_TCK_VGA TESTEN
JTAG_TMS_VGA

JTAG_TDI_VGA

JTAG_TDO_VGA

@

S

2

G

1

+3VS_VGA

12

R7121

@

10KOhm

CSB

SCK_WEB
SI_A16

J7101

2

JTAG_TRSTB_VGA

@

Mars GPU_7VID boot voltage 0.85V

12

R716110KOhm @

12

R715610KOhm @

12

R715910KOhm /DSC

12

R716710KOhm @

12

R715810KOhm /DSC

12

R716310KOhm /DSC

12

R717010KOhm @

12

R716910KOhm /DSC

12

R716410KOhm /DSC

12

R715510KOhm @

12

R716610KOhm /DSC

12

R716210KOhm @

12

R716010KOhm @

12

R717310KOhm /DSC

PEGATRON UN IHAN

‧

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Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet

Date: Sheet of

Date: Sheet of

1

DNI

For future CEC support

D

Q7101
2N7002

3

1

HDMI_CECCEC_1

T7119

Can't find Virtual Part Number

ROM_SO

GPU_VID7_0
GPU_VID7_1
GPU_VID7_2
GPU_VID7_3
GPU_VID7_4
GPU_VID7_5
GPU_VID7_6

GPU_VID7_0
GPU_VID7_1
GPU_VID7_2
GPU_VID7_3
GPU_VID7_4
GPU_VID7_5
GPU_VID7_6

Mars VDDC VID

EG70_KB

EG70_KB

EG70_KB

8
7
6
5

PM25LD010C-SCE

C7104

12

@

0.1UF/10V

GND

R7113 10KOhm

GND

GPU_VID7_0
GPU_VID7_1
GPU_VID7_2
GPU_VID7_3
GPU_VID7_4
GPU_VID7_5
GPU_VID7_6

Engineer:

Engineer:

Engineer:

1

U7101

VCC
HOLD#
SCK
SIO

/DSC

Title :

Title :

Title :

WP#
GND

@

CE#

SO

12

GPU-MAIN

GPU-MAIN

GPU-MAIN

1
2
3
4

Corey

Corey

Corey

71 99Monday, March 25, 2013

71 99Monday, March 25, 2013

71 99Monday, March 25, 2013

+3VS_VGA

GND

of

+3VS_VGA

Rev

Rev

Rev

1.2

1.2

1.2

5

4

3

2

1

H7

MPLL_PVDD1

H8

MPLL_PVDD2

AM10

SPLL_PVDD

AN9

SPLL_VDDC

AN10

SPLL_PVSS

AF30

NC_XTAL_PVDD

AF31

NC_XTAL_PVSS

MARS-M2

02V050000020 /DSC

U7001I

PART 9 0F 9

AV33

XTALIN

XTALOUT

PLLS/XTAL

XO_IN

XO_IN2

CLKTESTA
CLKTESTB

XTALIN

AU34

XTALOUT

AW34

XO_IN_VGA

1

T7203

For 100MHz CLOCK on Seymour/Thames GDDR5

AW35

AK10
AL10

XO_IN2_VGA

Schematics Note:

Debug only, for clock observation, if not needed, DNI

CLKTESTA_VGA
CLKTESTB_VGA

1

C7210

12

@

0.1UF/10V

R7203

@

51.1Ohm

1%

GND

R7206 0Ohm

T7204

1 2

/DSC

1
1

T7201

C7211

12

@

route 50ohms
single-ended/100ohms diff

0.1UF/10V

and keep short

R7204

@

51.1Ohm

1%

XTAL OPTION

XTALOUTBUFFXTALOUT XTALIN

C7212

/DSC

12PF/50V

1 2

/DSC

R7205 1MOhm

X7201 27MHZ/D SC

T7202

12

13

2

4

GND

1 2

C7213

/DSC

12PF/50V

D D

Layout Note:

Engine PLL Dedicated Ground:
Connect to decoupling circuits of SPLL_PVDD and SPLL_VDDC.

Schematics Note:

Memory Phase Lock Loop Power :

+1.8VS_VGA

+1.8VS_VGA

C C

+0.95VS_VGA

B B

Dedicated analog power pin for
memory PLLs

/DSC

21

B7201 220Ohm/100Mhz

Schematics Note:

Engine Phase Lock Loop Power : Dedicated
analog power pin for engine PLL

B7202 120Ohm/100Mhz

Schematics Note:

Engine Phase Lock Loop Power
:Dedicated digital power pin for
engine PLL

B7203 120Ohm/100Mhz

/DSC

/DSC

12

C7201

/DSC

10UF/6.3V

21

12

C7204

/DSC

10UF/6.3V

21

12

C7207

/DSC

10UF/6.3V

+1.8VS_VGA

GND

GND

12

12

12

C7202

/DSC

1UF/6.3V

C7205

/DSC

1UF/6.3V

C7208

/DSC

1UF/6.3V

12

C7203

/DSC

0.1UF/10V

GND

12

C7206

/DSC

0.1UF/10V

GND

12

C7209

/DSC

0.1UF/10V

R7201 0Ohm

R7202 0Ohm

+MPLL_PVDD

@

1 2

@

1 2

+SPLL_PVDD

+SPLL_VDDC

XTAL_PVDD_VGA
XTAL_PVSS_VGA

GNDGND

A A

Title :

Title :

Title :

GPU-XTAL

GPU-XTAL

GPU-XTAL

Corey

Corey

Engineer:

Engineer:

EG70_KB

EG70_KB

EG70_KB

Engineer:

1

PEGATRON UN IHAN

‧

PEGATRON UN IHAN

‧

PEGATRON UN IHAN

‧

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Corey

72 99Monday, March 25, 2013

72 99Monday, March 25, 2013

72 99Monday, March 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

5

D D

C C

4

U7001G

PART 7 0F 9

LVDS CONTROL

TXCBP_DPB3P

TXCBM_DPB3N

NC_TXOUT_U3P
NC_TXOUT_U3N

LVTMDP

TXCAP_DPA3P

TXCAM_DPA3N

NC_TXOUT_L3P
NC_TXOUT_L3N

VARY_BL

DIGON

TX3P_DPB2P

TX3M_DPB2N

TX4P_DPB1P

TX4M_DPB1N

TX5P_DPB0P

TX5M_DPB0N

TX0P_DPA2P

TX0M_DPA2N

TX1P_DPA1P

TX1M_DPA1N

TX2P_DPA0P

TX2M_DPA0N

3

AK27
AJ27

AK35
AL36

AJ38
AK37

AH35
AJ36

AG38
AH37

AF35
AG36

AP34
AR34

AW37
AU35

AR37
AU39

AP35
AR35

AN36
AP37

2

1

MARS-M2

02V050000020 /DSC

B B

A A

Title :

Title :

Title :

GPU-LVTMDS

GPU-LVTMDS

GPU-LVTMDS

Corey

Corey

Engineer:

Engineer:

EG70_KB

EG70_KB

EG70_KB

Engineer:

1

PEGATRON UN IHAN

‧

PEGATRON UN IHAN

‧

PEGATRON UN IHAN

‧

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Corey

73 99Monday, March 25, 2013

73 99Monday, March 25, 2013

73 99Monday, March 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

5

D D

Schematics Note:

Multi Level Pin Strap (MLPS)
For R_pu_x and R_pd_x and C_x, selection
refer to AN_MGEN_X1
For MXM module designs, C_0 and C_3 should be placed on the motherboard
as close to the MXM connector as possible, refer to MXM connetor page
Parts for MLPS should be placed close to ASIC
The total resistance of trace should be less than 2 Ohm

C C

4

3

2

1

+1.8VS_VGA +1.8VS_VGA

12

R7401

/DSC

8.45KOhm

PS_0 PS_2

PS_0<71> PS_2<71>

B B

PS_1<71> PS_3<71>

A A

12

R7402

/DSC

2KOhm

GND GND

+1.8VS_VGA +1.8VS_VGA

R7405

@

4.7KOhm

PS_1 PS_3

R7406

12

/DSC

4.75KOhm

GND GND

1 2

1 2

1 2

1 2

C7401

@

0.01UF/25V

C7402

@

0.01UF/25V

C7405

@

0.01UF/25V

C7406

@

0.01UF/25V

+1.8VS_VGA +1.8VS_VGA

R7403

@

4.7KOhm

12

R7404

/DSC

4.75KOhm

GND GND

+1.8VS_VGA +1.8VS_VGA

R7407

@

4.7KOhm

12

R7408

/DSC

4.75KOhm

GND GND

C7403

@

1 2

0.01UF/25V

C7404

/DSC

1 2

0.01UF/25V

C7407

@

1 2

0.01UF/25V

C7408

@

1 2

0.01UF/25V

Should be 0.68u F

Title :

Title :

Title :

GPU-STRAPS/THERMAL

GPU-STRAPS/THERMAL

GPU-STRAPS/THERMAL

Corey

Corey

Engineer:

Engineer:

EG70_KB

EG70_KB

EG70_KB

Engineer:

1

PEGATRON UN IHAN

‧

PEGATRON UN IHAN

‧

PEGATRON UN IHAN

‧

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Corey

74 99Monday, March 25, 2013

74 99Monday, March 25, 2013

74 99Monday, March 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

5

+1.5VS_VGA

12

/DSC

0.01UF/25V

C7506

D D

Schematics Note:

1.8V @13mA

+1.8VS_VGA

Schematics Note:

3.3V @25mA

+3VS_VGA

C C

For MARS

+1.8VS_VGA

12

/DSC

0.1UF/10V

C7511

12

/DSC

2.2UF/6.3V

C7516

12

/DSC

10UF/6.3V

/DSC

21

B7501 120Ohm/100Mhz

B7502 120Ohm/100Mhz

B7503 120Ohm/100Mhz

/DSC

/MARS

C7519

12

/DSC

10UF/6.3V

21

C7522

12

/DSC

1UF/6.3V

21

C7573

12

/MARS

10UF/6.3V

12

12

12

/DSC

0.01UF/25V

C7507

/DSC

0.1UF/10V

C7512

/DSC

2.2UF/6.3V

C7517

/DSC

10UF/6.3V

12

12

12

12

12

12

12

C7520

/DSC

1UF/6.3V

C7523

/DSC

1UF/6.3V

C7574

/MARS

1UF/6.3V

C7502

C7501

12

C7504

C7503

12

/DSC

/DSC

0.01UF/25V

0.01UF/25V

C7509

C7508

12

/DSC

/DSC

0.1UF/10V

0.1UF/10V

C7513

C7514

12

/DSC

/DSC

2.2UF/6.3V

2.2UF/6.3V

Schematics Note:

C7518

Level translation between
core and I/O,excluding memory

/DSC

receivers

10UF/6.3V

C7521

12

/DSC

0.1UF/10V

GND

C7524

12

/DSC

0.1UF/10V

GND

C7575

12

/MARS

0.1UF/10V

GND

Need to check with PWR team

VCORE_SEN/RTN route as differetial pair

B B

+VDDC_VGA

VDDC_SEN<87>
VDDC_RTN<87>

+VDDC_VGA

GND

@

1 2

R7501 0Ohm

VDDC_SEN
VDDC_RTN

@

1 2

R7503 0Ohm

@

1 2

R7502 0Ohm

12

12

12

C7505

/DSC

0.01UF/25V

C7510

/DSC

0.1UF/10V

C7515

/DSC

2.2UF/6.3V

4

U7001E

PART 5 0F 9

MEM I/O

AC7

VDDR1_1

AD11

VDDR1_2

AF7

VDDR1_3

AG10

VDDR1_4

AJ7

VDDR1_5

AK8

VDDR1_6

AL9

VDDR1_7

G11

VDDR1_8

G14

VDDR1_9

G17

VDDR1_10

+VDDC_CT

+VDDR3

G20

VDDR1_11

G23

VDDR1_12

G26

VDDR1_13

G29

VDDR1_14

H10

VDDR1_15

J7

VDDR1_16

J9

VDDR1_17

K11

VDDR1_18

K13

VDDR1_19

K8

VDDR1_20

L12

VDDR1_21

L16

VDDR1_22

L21

VDDR1_23

L23

VDDR1_24

L26

VDDR1_25

L7

VDDR1_26

M11

VDDR1_27

N11

VDDR1_28

P7

VDDR1_29

R11

VDDR1_30

U11

VDDR1_31

U7

VDDR1_32

Y11

VDDR1_33

Y7

VDDR1_34

TRANSLATION

AF26

VDD_CT1

AF27

VDD_CT2

AG26

VDD_CT3

AG27

VDD_CT4

AF23

VDDR3_1

AF24

VDDR3_2

AG23

VDDR3_3

AG24

VDDR3_4

AD12

VDDR4_1

AF11

VDDR4_2

AF12

VDDR4_3

AF13

VDDR4_4

AF15

VDDR4_5

AG11

VDDR4_6

AG13

VDDR4_7

AG15

VDDR4_8

AF28

FB_VDDC

AG28

FB_VDDCI

AH29

FB_GND

MARS-M2

02V050000020 /DSC

LEVEL

I/O

DVP

VOLTAGE
SENESE

GND

GND

GND

GND

+VDDR4

NC_BIF_VDDC1
NC_BIF_VDDC2

PCIE

PCIE_VDDC10
PCIE_VDDC11
PCIE_VDDC12

BACO

CORE

ISOLATED

PCIE_PVDD

PCIE_VDDC1
PCIE_VDDC2
PCIE_VDDC3
PCIE_VDDC4
PCIE_VDDC5
PCIE_VDDC6
PCIE_VDDC7
PCIE_VDDC8
PCIE_VDDC9

BIF_VDDC1
BIF_VDDC2

VDDC1
VDDC2
VDDC3
VDDC4
VDDC5
VDDC6
VDDC7
VDDC8

VDDC9
VDDC10
VDDC11
VDDC12
VDDC13
VDDC14
VDDC15
VDDC16
VDDC17
VDDC18
VDDC19
VDDC20
VDDC21
VDDC22
VDDC23
VDDC24
VDDC25
VDDC26

VDDC27
VDDC28
VDDC29
VDDC30
VDDC31
VDDC32
VDDC33
VDDC34
VDDC35
VDDC36
VDDC37
VDDC38
VDDC39
VDDC40
VDDC41
VDDC42
VDDC43
VDDC44
VDDC45
VDDC46
VDDC47
VDDC48
VDDC49
VDDC50
VDDC51
VDDC52
VDDC53
VDDC54
VDDC55

VDDCI1
VDDCI2
VDDCI3
VDDCI4
VDDCI5
VDDCI6
VDDCI7
VDDCI8

VDDCI9
VDDCI10
VDDCI11
VDDCI12

CORE I/O

VDDCI13
VDDCI14
VDDCI15
VDDCI16
VDDCI17
VDDCI18
VDDCI19
VDDCI20
VDDCI21
VDDCI22

NC32
NC33

3

Schematics Note:

On Heathrow/Chelsea/Venus/Mars only

AA31

NC2

AA32

NC3

AA33

NC4

AA34

NC5

W30
Y31
V28
W29
AB37

G30
G31
H29
H30
J29
J30
L28
M28
N28
R28
T28
U28

N27
T27

AA15
AA17
AA20
AA22
AA24
AA27
AB16
AB18
AB21
AB23
AB26
AB28
AC17
AC20
AC22
AC24
AC27
AD18
AD21
AD23
AD26
AF17
AF20
AF22
AG16
AG18

AH22
AH27
AH28
M26
N24
R18
R21
R23
R26
T17
T20
T22
T24
U16
U18
U21
U23
U26
V17
V20
V22
V24
V27
Y16
Y18
Y21
Y23
Y26
Y28

AA13
AB13
AC12
AC15
AD13
AD16
M15
M16
M18
M23
N13
N15
N17
N20
N22
R12
R13
R16
T12
T15
V15
Y13

except for AB37, all other balls can be NC

Schematics Note:

PCIE_VDDC : 0.95V @ 0.9A (GEN2.0)
PCIE_VDDC : 0.95V @ 1.3A (GEN3.0)

C7532

/DSC

1UF/6.3V

C7543

/DSC

2.2UF/6.3V

C7551

/DSC

2.2UF/6.3V

C7559

/DSC

10UF/6.3V

C7566

/DSC

0.1UF/10V

12

12

12

12

12

C7533

/DSC

1UF/6.3V

C7544

/DSC

2.2UF/6.3V

C7552

/DSC

2.2UF/6.3V

C7560

/DSC

10UF/6.3V

C7567

/DSC

0.1UF/10V

12

12

12

12

12

C7534

/DSC

1UF/6.3V

C7545

/DSC

2.2UF/6.3V

C7553

/DSC

2.2UF/6.3V

C7561

/DSC

10UF/6.3V

C7568

/DSC

1UF/6.3V

C7531

12

12

/DSC

10UF/6.3V

C7542

12

12

/DSC

2.2UF/6.3V

C7550

12

12

/DSC

2.2UF/6.3V

C7558

12

12

/DSC

10UF/6.3V

C7565

12

12

/DSC

0.1UF/10V

Schematics Note:

VDDCI and VDDC can share one common regulator capable of
supplying the total TDC of both rails for cost effective
designs(VDDC and VDDCI vias should be separate underneath
the ASIC and only joined on the unified power plane.).
VCORE_SEN/RTN route as differetial pair For designs that
target maximal performance, a dedicated regulator for VDDCI
with two selectable output levels is required.

12

12

12

12

12

C7535

/DSC

1UF/6.3V

C7546

/DSC

2.2UF/6.3V

C7554

/DSC

2.2UF/6.3V

C7562

/DSC

10UF/6.3V

C7569

/DSC

1UF/6.3V

2

12

12

12

12

12

12

C7530

/DSC

1UF/6.3V

C7536

/DSC

1UF/6.3V

C7547

/DSC

2.2UF/6.3V

C7555

/DSC

2.2UF/6.3V

C7563

/DSC

10UF/6.3V

C7570

/DSC

1UF/6.3V

+1.8VS_VGA

C7529

/DSC

1UF/6.3V

C7537

/DSC

1UF/6.3V

C7528

12

/DSC

10UF/6.3V

+0.95VS_VGA

GND

C7538

C7572

12

12

/DSC

/DSC

10UF/6.3V

1UF/6.3V

GND

12

12

Need to inform with PWR team

+VDDC_VGA

C7548

/DSC

2.2UF/6.3V

C7556

/DSC

2.2UF/6.3V

C7564

/DSC

10UF/6.3V

12

12

C7549

/DSC

2.2UF/6.3V

C7557

/DSC

2.2UF/6.3V

GND

12

12

12

Need to inform with PWR team

+VDDC_VGA

Schematics Note:

C7571

12

VDDCI 0.9-1.15V @ 6A

/DSC

10UF/6.3V

GND

1

Schematics Note:

For MARS/VENUS/HEATHROW/CHELSEA
BIF_VDDC should be connectted with 0.95V

+0.95VS_VGA

C7540

12

/DSC

1UF/6.3V

C7541

12

/DSC

1UF/6.3V

GND

12

C7539

/DSC

10UF/6.3V

A A

Title :

Title :

Title :

GPU-Power

GPU-Power

GPU-Power

Corey

Corey

Engineer:

Engineer:

EG70_KB

EG70_KB

EG70_KB

Engineer:

1

PEGATRON UN IHAN

‧

PEGATRON UN IHAN

‧

PEGATRON UN IHAN

‧

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Corey

75 99Monday, March 25, 2013

75 99Monday, March 25, 2013

75 99Monday, March 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

5

D D

U7001H

+1.8VS_VGA

In Sun all balls are NC,except for AM32.

AM32 still needs to be powered at 1.8V,
and consumes about 20 mA.

C C

Schematics Note:

DNI R701 and R702 for Mars.

Note:

Sun NC

B B

A A

12

C7601

/DSC

10UF/6.3V

GND

GND

GND

For MARS

For MARS

12

C7602

/DSC

1UF/6.3V

@

@

/MARS

12

12

12

R7601 150Ohm

R7602 150Ohm

R7603 150Ohm

GND

12

C7603

/DSC

0.1UF/10V

AN24
AP24
AP25
AP26
AU28
AV29

AP20
AP21
AP22
AP23
AU18
AV19

AH34

AJ34
AF34
AG34
AM37

AL38
AM32

AW28

AW18

AM39

MARS-M2

02V050000020 /DSC

NC11
NC19
NC20
NC21
NC24
NC26

NC15
NC16
NC17
NC18
NC23
NC25

DP_VDDR3
DP_VDDR4
DP_VDDR1
DP_VDDR2
DP_VDDR7
DP_VDDR5
DP_VDDR6

CALIBRATION

NC_DPAB_CALR

NC_DPCD_CALR

DP_CALR

PART 8 0F 9

4

DP_VDDCDP_VDDR

DP GND

DP_VDDC7
DP_VDDC8
DP_VDDC6
DP_VDDC9
DP_VDDC3
DP_VDDC4
DP_VDDC1
DP_VDDC2
DP_VDDC5

NC12
NC22
NC13
NC14

DP_VSSR8
DP_VSSR17
DP_VSSR18
DP_VSSR32
DP_VSSR33

DP_VSSR9
DP_VSSR19
DP_VSSR20
DP_VSSR34
DP_VSSR35

DP_VSSR6
DP_VSSR13
DP_VSSR14
DP_VSSR28
DP_VSSR29

DP_VSSR7
DP_VSSR15
DP_VSSR16
DP_VSSR30
DP_VSSR31
DP_VSSR11
DP_VSSR21
DP_VSSR24
DP_VSSR25

DP_VSSR1

DP_VSSR2

DP_VSSR3

DP_VSSR4
DP_VSSR27
DP_VSSR23
DP_VSSR26
DP_VSSR22
DP_VSSR12

DP_VSSR5
DP_VSSR10

For MARS

AP31
AP32
AN33
AP33
AL33
AM33
AK33
AK34
AN31

AP13
AT13
AP14
AP15

For MARS

AN27
AP27

In Sun all balls are NC,except for AN31.

AP28
AW24
AW26

AN31 still needs to be powered at 0.95

AN29

V, and consumes less than 20 mA.

AP29
AP30
AW30
AW32
AN17
AP16
AP17
AW14

All the balls for this rail are NC, except for

AW16

AN32. AN32 still needs to be grounded.

AN19
AP18
AP19
AW20
AW22
AN34
AP39
AR39
AU37
AF39
AH39
AK39
AL34
AV27
AR28
AV17
AR18
AN38
AM35
AN32

GND

12

C7604

/DSC

0.1UF/10V

12

C7605

/DSC

1UF/6.3V

GND

12

3

C7606

/DSC

10UF/6.3V

+0.95VS_VGA

2

U7001F

GND18

E39

GND95

F34

GND109

F39

GND110

G33

GND114

G34

GND115

H31

GND117

H34

GND118

H39

GND119

J31

GND123

J34

GND124

K31

GND128

K34

GND129

K39

GND130

L31

GND137

L34

GND138

M34

GND143

M39

GND144

N31

GND151

N34

GND152

P31

GND154

P34

GND155

P39

GND156

R34

GND164

T31

GND173

T34

GND174

T39

GND175

U31

GND183

U34

GND184

V34

GND192

V39

GND193
GND195
GND196

Y34

GND204

Y39

GND205

F15

GND99

F17

GND100

F19

GND101

F21

GND102

F23

GND103

F25

GND104

F27

GND105

F29

GND106

F31

GND107

F33

GND108

F7

GND111

F9

GND112

G2

GND113

G6

GND116

H9

GND120

J2

GND121

J27

GND122

J6

GND125

J8

GND126

K14

GND127

K7

GND131

L11

GND132

L17

GND133

L2

GND134

L22

GND135

L24

GND136

L6

GND139

M17

GND140

M22

GND141

M24

GND142

N16

GND145

N18

GND146

N2

GND147

N21

GND148

N23

GND149

N26

GND150

N6

GND153

R15

GND157

R17

GND158

R2

GND159

R20

GND160

R22

GND161

R24

GND162

R27

GND163

R6

GND165

T11

GND166

T13

GND167

T16

GND168

T18

GND169

T21

GND170

T23

GND171

T26

GND172

U15

GND176

U17

GND177

U2

GND178

U20

GND179

U22

GND180

U24

GND181

U27

GND182

U6

GND185

V11

GND186

V16

GND187

V18

GND188

V21

GND189

V23

GND190

V26

GND191

W2

GND194

W6

GND197

Y15

GND198

Y17

GND199

Y20

GND200

Y22

GND201

Y24

GND202

Y27

GND203

MARS-M2

02V050000020 /DSC

PART 6 0F 9

A3

GND1

A37

GND2

AA16

GND3

AA18

GND4

AA2

GND5

AA21

GND6

AA23

GND7

AA26

GND8

AA28

GND9

AA6

GND10

AB12

GND11

AB15

GND12

AB17

GND13

AB20

GND14

AB22

GND15

AB24

GND16

AB27

GND17

AC11

GND19

AC13

GND20

AC16

GND21

AC18

GND22

AC2

GND23

AC21

GND24

AC23

GND25

AC26

GND26

AC28

GND27

AC6

GND28

AD15

GND29

AD17

GND30

AD20

GND31

AD22

GND32

AD24

GND33

AD27

GND34

AD9

GND35

AE2

GND36

AE6

GND37

AF10

GND38

AF16

GND39

AF18

GND40
GND41
GND42
GND43
GND44

GND45
GND46
GND47
GND48
GND49
GND50
GND51
GND52
GND53
GND54
GND55
GND56
GND57
GND58
GND59
GND60

GND61
GND62
GND63
GND64
GND65
GND66
GND67
GND68
GND69
GND70
GND71
GND72
GND73
GND74
GND75
GND76
GND77
GND78
GND79
GND80
GND81
GND82
GND83
GND84
GND85
GND86
GND87
GND88
GND89
GND90
GND91
GND92
GND93
GND94
GND96
GND97
GND98

NC_EVDDQ2

VSS_MECH1
VSS_MECH2
VSS_MECH3

AF21
AG17
AG2
AG20

AG6
AG9
AH21
AJ10
AJ11
AJ2
AJ28
AJ6
AK11
AK31
AK7
AL11
AL14
AL17
AL2
AL20

AL23
AL26
AL32
AL6
AL8
AM11
AM31
AM9
AN11
AN2
AN30
AN6
AN8
AP11
AP7
AP9
AR5
B11
B13
B15
B17
B19
B21
B23
B25
B27
B29
B31
B33
B7
B9
C1
C39
E35
E5
F11
F13

AG22

A39
AW1
AW39

GND

AB39

W31
W34

GND

GND

1

GND

Title :

Title :

Title :

GPU-DP POWER/GND

GPU-DP POWER/GND

GPU-DP POWER/GND

Corey

Corey

Engineer:

Engineer:

EG70_KB

EG70_KB

EG70_KB

Engineer:

1

PEGATRON UN IHAN

‧

PEGATRON UN IHAN

‧

PEGATRON UN IHAN

‧

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Corey

76 99Monday, March 25, 2013

76 99Monday, March 25, 2013

76 99Monday, March 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

5

4

3

2

1

D D

DQA0_[0..31]<79>

+1.5VS_VGA

12

12

C7701

/MARS

1UF/6.3V

C7702

/MARS

1UF/6.3V

DQA1_[0..31]<79>

+3VS_VGA

GND

R7705 243Ohm@
R7706 243Ohm@
R7707 243Ohm@

R7708 121OHM

R7709 243Ohm@
R7710 243Ohm@

R7701

C C

/MARS

40.2Ohm

1%

1 2

R7702

/MARS

100Ohm

1%

1 2

GND GND

+1.5VS_VGA

R7703

/MARS

40.2Ohm

1%

1 2

R7704

B B

/MARS

100Ohm

1%

1 2

GND GND

Check AMD can use 121- (1%) to replace 120- (1%).

DQA0_0
DQA0_1
DQA0_2
DQA0_3
DQA0_4
DQA0_5
DQA0_6
DQA0_7
DQA0_8
DQA0_9
DQA0_10
DQA0_11
DQA0_12
DQA0_13
DQA0_14
DQA0_15
DQA0_16
DQA0_17
DQA0_18
DQA0_19
DQA0_20
DQA0_21
DQA0_22
DQA0_23
DQA0_24
DQA0_25
DQA0_26
DQA0_27
DQA0_28
DQA0_29
DQA0_30
DQA0_31
DQA1_0
DQA1_1
DQA1_2
DQA1_3
DQA1_4
DQA1_5
DQA1_6
DQA1_7
DQA1_8
DQA1_9
DQA1_10
DQA1_11
DQA1_12
DQA1_13
DQA1_14
DQA1_15
DQA1_16
DQA1_17
DQA1_18
DQA1_19
DQA1_20
DQA1_21
DQA1_22
DQA1_23
DQA1_24
DQA1_25
DQA1_26
DQA1_27
DQA1_28
DQA1_29
DQA1_30
DQA1_31

MVREFDA
MVREFSA

12
12
12

/DSC

1 2

12
12

Ω Ω

U7001C

C37

DQA0_0

C35

DQA0_1

A35

DQA0_2

E34

DQA0_3

G32

DQA0_4

D33

DQA0_5

F32

DQA0_6

E32

DQA0_7

D31

DQA0_8

F30

DQA0_9

C30

DQA0_10

A30

DQA0_11

F28

DQA0_12

C28

DQA0_13

A28

DQA0_14

E28

DQA0_15

D27

DQA0_16

F26

DQA0_17

C26

DQA0_18

A26

DQA0_19

F24

DQA0_20

C24

DQA0_21

A24

DQA0_22

E24

DQA0_23

C22

DQA0_24

A22

DQA0_25

F22

DQA0_26

D21

DQA0_27

A20

DQA0_28

F20

DQA0_29

D19

DQA0_30

E18

DQA0_31

C18

DQA1_0

A18

DQA1_1

F18

DQA1_2

D17

DQA1_3

A16

DQA1_4

F16

DQA1_5

D15

DQA1_6

E14

DQA1_7

F14

DQA1_8

D13

DQA1_9

F12

DQA1_10

A12

DQA1_11

D11

DQA1_12

F10

DQA1_13

A10

DQA1_14

C10

DQA1_15

G13

DQA1_16

H13

DQA1_17

J13

DQA1_18

H11

DQA1_19

G10

DQA1_20

G8

DQA1_21

K9

DQA1_22

K10

DQA1_23

G9

DQA1_24

A8

DQA1_25

C8

DQA1_26

E8

DQA1_27

A6

DQA1_28

C6

DQA1_29

E6

DQA1_30

A5

DQA1_31

L18

MVREFDA

L20

MVREFSA

L27

NC27

N12

NC29

AG12

NC9

M27

MEM_CALRP0

M12

NC28

AH12

NC_MEM_CALRP2

MARS-M2

02V050000020 /DSC

PART 3 0F 9

GDDR5/DDR3

G24

MAA0_0
MAA0_1
MAA0_2
MAA0_3
MAA0_4
MAA0_5
MAA0_6
MAA0_7
MAA1_0
MAA1_1
MAA1_2

MEMORY INTERFACE A

MAA1_3
MAA1_4
MAA1_5
MAA1_6
MAA1_7

WCKA0_0

WCKA0B_0

WCKA0_1

WCKA0B_1

WCKA1_0

WCKA1B_0

WCKA1_1

WCKA1B_1

EDCA0_0
EDCA0_1
EDCA0_2
EDCA0_3
EDCA1_0
EDCA1_1
EDCA1_2
EDCA1_3

DDBIA0_0
DDBIA0_1
DDBIA0_2
DDBIA0_3
DDBIA1_0
DDBIA1_1
DDBIA1_2
DDBIA1_3

ADBIA0
ADBIA1

CLKA0

CLKA0B

CLKA1

CLKA1B

RASA0B
RASA1B

CASA0B
CASA1B

CSA0B_0
CSA0B_1

CSA1B_0
CSA1B_1

CKEA0
CKEA1

WEA0B
WEA1B

MAA0_8
MAA1_8
MAA0_9
MAA1_9

MAA_0

J23

MAA_1

H24

MAA_2

J24

MAA_3

H26

MAA_4

J26

MAA_5

H21

MAA_6

G21

MAA_7

H19

MAA_8

H20

MAA_9

L13

MAA_10

G16

MAA_11

J16

MAA_12

H16

MAA_BA_2

J17

MAA_BA_0

H17

MAA_BA_1

A32

DQMA_0

C32

DQMA_1

D23

DQMA_2

E22

DQMA_3

C14

DQMA_4

A14

DQMA_5

E10

DQMA_6

D9

DQMA_7

C34

QSA_0

D29

QSA_1

D25

QSA_2

E20

QSA_3

E16

QSA_4

E12

QSA_5

J10

QSA_6

D7

QSA_7

A34

QSA_0#

E30

QSA_1#

E26

QSA_2#

C20

QSA_3#

C16

QSA_4#

C12

QSA_5#

J11

QSA_6#

F8

QSA_7#

J21

ODTA0

G19

ODTA1

H27

CLKA0

G27

CLKA0#

J14

CLKA1

H14

CLKA1#

K23

RASA0#

K19

RASA1#

K20

CASA0#

K17

CASA1#

K24

CSA0_0#

K27

CSA0_1#

M13

CSA1_0#

K16

CSA1_1#

K21

CKEA0

J20

CKEA1

K26

WEA0#

L15

WEA1#

H23

MAA_13

J19

MAA_14

M21

MAA_15

M20

MAA_[0..12] <79>

MAA_BA_2 <79>
MAA_BA_0 <79>
MAA_BA_1 <79>

DQMA_0 <79>
DQMA_1 <79>
DQMA_2 <79>
DQMA_3 <79>
DQMA_4 <79>
DQMA_5 <79>
DQMA_6 <79>
DQMA_7 <79>

QSA_0 <79>
QSA_1 <79>
QSA_2 <79>
QSA_3 <79>
QSA_4 <79>
QSA_5 <79>
QSA_6 <79>
QSA_7 <79>

QSA_0# <79>
QSA_1# <79>
QSA_2# <79>
QSA_3# <79>
QSA_4# <79>
QSA_5# <79>
QSA_6# <79>
QSA_7# <79>

ODTA0 <79>
ODTA1 <79>

CLKA0 <79>
CLKA0# <79>

CLKA1 <79>
CLKA1# <79>

RASA0# <79>
RASA1# <79>

CASA0# <79>
CASA1# <79>

CSA0_0# <79>

CSA1_0# <79>

CKEA0 <79>
CKEA1 <79>

WEA0# <79>
WEA1# <79>

MAA_13 <79>
MAA_14 <79>
MAA_15 <79>

+1.5VS_VGA

+1.5VS_VGA

1

T7701

1

T7702

1

T7703

DQB0_[0..31]<78>

R7711

DQB1_[0..31]<78>

/DSC

40.2Ohm

1 2

1%

R7712

/DSC

100Ohm

1 2

1%

GND GND

R7713

/DSC

40.2Ohm

1%

1 2

R7714

/DSC

100Ohm

1 2

1%

GND GND

12

12

C7703

/DSC

1UF/6.3V

C7704

/DSC

1UF/6.3V

MVREFDB
MVREFSB

DQB0_0
DQB0_1
DQB0_2
DQB0_3
DQB0_4
DQB0_5
DQB0_6
DQB0_7
DQB0_8
DQB0_9
DQB0_10
DQB0_11
DQB0_12
DQB0_13
DQB0_14
DQB0_15
DQB0_16
DQB0_17
DQB0_18
DQB0_19
DQB0_20
DQB0_21
DQB0_22
DQB0_23
DQB0_24
DQB0_25
DQB0_26
DQB0_27
DQB0_28
DQB0_29
DQB0_30
DQB0_31
DQB1_0
DQB1_1
DQB1_2
DQB1_3
DQB1_4
DQB1_5
DQB1_6
DQB1_7
DQB1_8
DQB1_9
DQB1_10
DQB1_11
DQB1_12
DQB1_13
DQB1_14
DQB1_15
DQB1_16
DQB1_17
DQB1_18
DQB1_19
DQB1_20
DQB1_21
DQB1_22
DQB1_23
DQB1_24
DQB1_25
DQB1_26
DQB1_27
DQB1_28
DQB1_29
DQB1_30
DQB1_31

C5

DQB0_0

C3

DQB0_1

E3

DQB0_2

E1

DQB0_3

F1

DQB0_4

F3

DQB0_5

F5

DQB0_6

G4

DQB0_7

H5

DQB0_8

H6

DQB0_9

J4

DQB0_10

K6

DQB0_11

K5

DQB0_12

L4

DQB0_13

M6

DQB0_14

M1

DQB0_15

M3

DQB0_16

M5

DQB0_17

N4

DQB0_18

P6

DQB0_19

P5

DQB0_20

R4

DQB0_21

T6

DQB0_22

T1

DQB0_23

U4

DQB0_24

V6

DQB0_25

V1

DQB0_26

V3

DQB0_27

Y6

DQB0_28

Y1

DQB0_29

Y3

DQB0_30

Y5

DQB0_31

AA4

DQB1_0

AB6

DQB1_1

AB1

DQB1_2

AB3

DQB1_3

AD6

DQB1_4

AD1

DQB1_5

AD3

DQB1_6

AD5

DQB1_7

AF1

DQB1_8

AF3

DQB1_9

AF6

DQB1_10

AG4

DQB1_11

AH5

DQB1_12

AH6

DQB1_13

AJ4

DQB1_14

AK3

DQB1_15

AF8

DQB1_16

AF9

DQB1_17

AG8

DQB1_18

AG7

DQB1_19

AK9

DQB1_20

AL7

DQB1_21

AM8

DQB1_22

AM7

DQB1_23

AK1

DQB1_24

AL4

DQB1_25

AM6

DQB1_26

AM1

DQB1_27

AN4

DQB1_28

AP3

DQB1_29

AP1

DQB1_30

AP5

DQB1_31

Y12

MVREFDB

AA12

MVREFSB

MARS-M2

02V050000020 /DSC

U7001D

PART 4 0F 9

GDDR5/DDR3

1 2

/DSC

MAB_[0..12] <78>

MAB_BA_2 <78>
MAB_BA_0 <78>
MAB_BA_1 <78>

DQMB_0 <78>
DQMB_1 <78>
DQMB_2 <78>
DQMB_3 <78>
DQMB_4 <78>
DQMB_5 <78>
DQMB_6 <78>
DQMB_7 <78>

QSB_0 <78>
QSB_1 <78>
QSB_2 <78>
QSB_3 <78>
QSB_4 <78>
QSB_5 <78>
QSB_6 <78>
QSB_7 <78>

QSB_0# <78>
QSB_1# <78>
QSB_2# <78>
QSB_3# <78>
QSB_4# <78>
QSB_5# <78>
QSB_6# <78>
QSB_7# <78>

ODTB0 <78>
ODTB1 <78>

CLKB0 <78>
CLKB0# <78>

CLKB1 <78>
CLKB1# <78>

RASB0# <78>
RASB1# <78>

CASB0# <78>
CASB1# <78>

CSB0_0# <78>

CSB1_0# <78>

CKEB0 <78>
CKEB1 <78>

WEB0# <78>
WEB1# <78>

MAB_13 <78>
MAB_14 <78>
MAB_15 <78>

12

C7705

1%

/DSC

120PF/50V

5%

1

T7704

1

T7705

1

T7706

/DSC

R7716 51.1Ohm

25mm(max)25mm(max) 5mm(max)

DRAM_RST <78,79>

C7706

/DSC

100PF/50V

1 2

GND

Layout Note:

Close to U7803 and U7804

P8

MAB0_0
MAB0_1
MAB0_2
MAB0_3
MAB0_4
MAB0_5
MAB0_6
MAB0_7
MAB1_0
MAB1_1
MAB1_2
MAB1_3
MAB1_4
MAB1_5
MAB1_6
MAB1_7

WCKB0_0

WCKB0B_0

WCKB0_1

WCKB0B_1

MEMORY INTERFACE B

WCKB1_0

WCKB1B_0

WCKB1_1

WCKB1B_1

EDCB0_0
EDCB0_1
EDCB0_2
EDCB0_3
EDCB1_0
EDCB1_1
EDCB1_2
EDCB1_3

DDBIB0_0
DDBIB0_1
DDBIB0_2
DDBIB0_3
DDBIB1_0
DDBIB1_1
DDBIB1_2
DDBIB1_3

ADBIB0
ADBIB1

CLKB0

CLKB0B

CLKB1

CLKB1B

RASB0B
RASB1B

CASB0B
CASB1B

CSB0B_0
CSB0B_1

CSB1B_0
CSB1B_1

CKEB0
CKEB1

WEB0B
WEB1B

MAB0_8
MAB1_8
MAB0_9
MAB1_9

DRAM_RST

MAB_0

T9

MAB_1

P9

MAB_2

N7

MAB_3

N8

MAB_4

N9

MAB_5

U9

MAB_6

U8

MAB_7

Y9

MAB_8

W9

MAB_9

AC8

MAB_10

AC9

MAB_11

AA7

MAB_12

AA8

MAB_BA_2

Y8

MAB_BA_0

AA9

MAB_BA_1

H3

DQMB_0

H1

DQMB_1

T3

DQMB_2

T5

DQMB_3

AE4

DQMB_4

AF5

DQMB_5

AK6

DQMB_6

AK5

DQMB_7

F6

QSB_0

K3

QSB_1

P3

QSB_2

V5

QSB_3

AB5

QSB_4

AH1

QSB_5

AJ9

QSB_6

AM5

QSB_7

G7

QSB_0#

K1

QSB_1#

P1

QSB_2#

W4

QSB_3#

AC4

QSB_4#

AH3

QSB_5#

AJ8

QSB_6#

AM3

QSB_7#

T7

ODTB0

W7

ODTB1

L9

CLKB0

L8

CLKB0#

AD8

CLKB1

AD7

CLKB1#

T10

RASB0#

Y10

RASB1#

W10

CASB0#

AA10

CASB1#

P10

CSB0_0#

L10

CSB0_1#

AD10

CSB1_0#

AC10

CSB1_1#

U10

CKEB0

AA11

CKEB1

N10

WEB0#

AB11

WEB1#

T8

MAB_13

W8

MAB_14

U12

MAB_15

V12

MAB_RSVDMAA_RSVD

In sun is RSVD

AH11

DRAM_RST_L

R7715 10Ohm

12

R7717

/DSC

4.99KOhm

1%

GND

A A

Title :

Title :

Title :

GPU-MEM INTERFACE

GPU-MEM INTERFACE

GPU-MEM INTERFACE

Corey

Corey

Engineer:

Engineer:

EG70_KB

EG70_KB

EG70_KB

Engineer:

1

PEGATRON UN IHAN

‧

PEGATRON UN IHAN

‧

PEGATRON UN IHAN

‧

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Corey

77 99Monday, March 25, 2013

77 99Monday, March 25, 2013

77 99Monday, March 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

5

U7801

M8

+VREFC_U7

MAB_[0..12]<77>

D D

C C

MAB_13<77>
MAB_14<77>
MAB_15<77>

MAB_BA_0<77>
MAB_BA_1<77>
MAB_BA_2<77>

Schematics Note:

Stitching Caps OPTION for MEM signals that have c change of reference plane voltage

Add stitching caps when required, one cap per three signals

+VREFD_U7

CLKB0

CLKB0<77>

CKEB0<77>

ODTB0<77>

WEB0#<77>

/DSC

R7801 243Ohm

12

12

C7802

C7801

/DSC

1UF/6.3V

10UF/6.3V

/DSC

CLKB0#
CKEB0

ODTB0
CSB0_0#
RASB0#
CASB0#
WEB0#

QSB_3
QSB_1

DQMB_3
DQMB_1

QSB_3#
QSB_1#

DRAM_RST

12

CLKB0#<77>

CSB0_0#<77>

RASB0#<77>
CASB0#<77>

QSB_3<77>
QSB_1<77>

DQMB_3<77>
DQMB_1<77>

QSB_3#<77>

DRAM_RST<77,79>

Layout Note:Close to U7801

+1.5VS_VGA

MAB_0
MAB_1
MAB_2
MAB_3
MAB_4
MAB_5
MAB_6
MAB_7
MAB_8
MAB_9
MAB_10
MAB_11
MAB_12
MAB_13
MAB_14
MAB_15

MAB_BA_0
MAB_BA_1
MAB_BA_2

12

C7803

1UF/6.3V

H1

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3

L7
R7
N7
T3
T7
M7

M2
N8
M3

J7
K7
K9

K1

L2

J3
K3

L3

F3
C7

E7
D3

G3
B7

T2

L8

J1

L1

J9

L9

BGA_96P_524x354_COLY

/DSC

12

C7804

/DSC

1UF/6.3V

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
NC1
NC2

BA0
BA1
BA2

CK
CK#
CKE

ODT
CS#
RAS#
CAS#
WE#

DQSL
DQSU

DML
DMU

DQSL#
DQSU#

RESET#

ZQ

NC3
NC4
NC5
NC6

/DSC

12

C7805

1UF/6.3V

VDDQ1
VDDQ3
VDDQ7
VDDQ5
VDDQ8
VDDQ2
VDDQ4
VDDQ6
VDDQ9

VSSQ1
VSSQ3
VSSQ8
VSSQ5
VSSQ4
VSSQ6
VSSQ2
VSSQ7
VSSQ9

@

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD6
VDD8
VDD1
VDD4
VDD3
VDD5
VDD2
VDD7
VDD9

VSS3
VSS7
VSS9

VSS11

VSS5
VSS2
VSS4
VSS6
VSS1

VSS8
VSS10
VSS12

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

N1
R1
B2
K2
G7
K8
D9
N9
R9

A1
C1
F1
D2
H2
A8
C9
E9
H9

E1
M1
P1
T1
J2
B3
G8
J8
A9
M9
P9
T9

B1
D1
G1
E2
D8
E8
B9
F9
G9

12

C7806

@

1UF/6.3V

DQB0_28
DQB0_27
DQB0_24
DQB0_26
DQB0_30
DQB0_29
DQB0_25
DQB0_31

DQB0_15
DQB0_12
DQB0_14
DQB0_9
DQB0_11
DQB0_8
DQB0_13
DQB0_10

GND

12

C7807

1UF/6.3V

@

DQB0_[0..31]

+1.5VS_VGA

12

C7808

@

1UF/6.3V

DQB0_[0..31] <77>

12

C7809

@

1UF/6.3V

Layout Note:Close to U7802

+1.5VS_VGA

12

12

C7820

/DSC

1UF/6.3V

12

C7821

/DSC

1UF/6.3V

12

C7822

@

1UF/6.3V

CLKB0

CLKB0#

R7805

/DSC

40.2Ohm 1%

12

B B

12

C7818

/DSC

10UF/6.3V

C7819

/DSC

1UF/6.3V

Layout Note:Close to U7801 Layout Note:Close to U7802 Layout Note:Close to U7803 Layout Note:Close to U7804

+1.5VS_VGA

12

R7810

/DSC

4.99KOhm

1%

R7809

/DSC

4.99KOhm

12

12

C7871

/DSC

0.1UF/10V

10%

GND

5

A A

R7812

/DSC

4.99KOhm

1%

+1.5VS_VGA

12

/DSC

12

GND

R7811

4.99KOhm

12

1 2

12

C7823

@

1UF/6.3V

12

C7872

/DSC

0.1UF/10V

10%

12

C7824

@

1UF/6.3V

R7806

/DSC

40.2Ohm

1 2

1%

C7869

/DSC

0.01UF/16V

C7825

@

1UF/6.3V

U7802 Verf U7803 Verf U7804 VerfU7801 Verf

R7814

/DSC

4.99KOhm

1%

12

C7826

@

1UF/6.3V

+1.5VS_VGA

12

/DSC

12

GND

QSB_2<77>
QSB_0<77>

DQMB_2<77>
DQMB_0<77>

QSB_2#<77>
QSB_0#<77>

GND

12

12

R7813

4.99KOhm

C7810

/DSC

0.1UF/10V

C7827

/DSC

0.1UF/10V

12

4

+VREFC_U8
+VREFD_U8

MAB_[0..12]

CLKB0
CLKB0#
CKEB0

ODTB0
CSB0_0#
RASB0#
CASB0#
WEB0#

QSB_2
QSB_0

DQMB_2
DQMB_0

QSB_2#
QSB_0#

DRAM_RST

12

/DSC

R7802 243Ohm

12

C7811

/DSC

0.1UF/10V

12

C7828

/DSC

0.1UF/10V

C7873

R7816

/DSC

/DSC

0.1UF/10V

4.99KOhm

10%

1%

4

MAB_0
MAB_1
MAB_2
MAB_3
MAB_4
MAB_5
MAB_6
MAB_7
MAB_8
MAB_9
MAB_10
MAB_11
MAB_12
MAB_13
MAB_14
MAB_15

MAB_BA_0
MAB_BA_1
MAB_BA_2

12

C7812

/DSC

0.1UF/10V

12

C7829

/DSC

0.1UF/10V

CLKB1

CLKB1#

+1.5VS_VGA

U7802

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC#

T3

A13

T7

NC1

M7

NC2

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK#

K9

CKE

K1

ODT

L2

CS#

J3

RAS#

K3

CAS#

L3

WE#

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL#

B7

DQSU#

T2

RESET#

L8

ZQ

J1

NC3

L1

NC4

J9

NC5

L9

NC6

BGA_96P_524x354_COLY

/DSC

12

C7813

@

0.1UF/10V

12

C7830

@

0.1UF/10V

R7807

/DSC

40.2Ohm 1%

1 2

12

R7815

4.99KOhm

1%

/DSC

12

GND

DQB0_[0..31]

E3

DQB0_16

DQL0

F7

DQB0_18

DQL1

F2

DQB0_20

DQL2

F8

DQB0_21

DQL3

H3

DQB0_22

DQL4

H8

DQB0_17

DQL5

G2

DQB0_23

DQL6

H7

DQB0_19

DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD6
VDD8
VDD1
VDD4
VDD3
VDD5
VDD2
VDD7
VDD9

VDDQ1
VDDQ3
VDDQ7
VDDQ5
VDDQ8
VDDQ2
VDDQ4
VDDQ6
VDDQ9

VSS3
VSS7
VSS9

VSS11

VSS5
VSS2
VSS4
VSS6
VSS1

VSS8
VSS10
VSS12

VSSQ1
VSSQ3
VSSQ8
VSSQ5
VSSQ4
VSSQ6
VSSQ2
VSSQ7
VSSQ9

12

C7814

@

0.1UF/10V

GND

12

C7831

@

0.1UF/10V

GND

R7808

/DSC

40.2Ohm

1 2

1%

12

C7870

/DSC

0.01UF/16V

GNDGND

+VREFD_U8+VREFC_U8 +VREFD_U10+VREFC_U10+VREFD_U7+VREFC_U 7 +VREFD_U9+VREFC_U9

12

C7874

/DSC

0.1UF/10V

10%

DQB0_[0..31] DQB1_[0..31]

D7

DQB0_3

C3

DQB0_4

C8

DQB0_1

C2

DQB0_5

A7

DQB0_2

A2

DQB0_7

B8

DQB0_0

A3

DQB0_6

N1
R1
B2
K2
G7
K8
D9
N9
R9

A1
C1
F1
D2
H2
A8
C9
E9
H9

E1
M1
P1
T1
J2
B3
G8
J8
A9
M9
P9
T9

B1
D1
G1
E2
D8
E8
B9
F9
G9

GND

R7818

/DSC

4.99KOhm

1%

+1.5VS_VGA

12

12

GND

+1.5VS_VGA

R7817

/DSC

4.99KOhm

12

C7875

/DSC

0.1UF/10V

10%

3

U7803

M8

+VREFC_U9
+VREFD_U9

MAB_[0..12] MAB_[0..12]

CLKB1

CLKB1<77>

CLKB1#

CLKB1#<77>

CKEB1

CKEB1<77>

ODTB1

ODTB1<77>

CSB1_0#<77>

RASB1#< 77>
CASB1#< 77>

QSB_4<77>
QSB_7<77>

DQMB_4<77>
DQMB_7<77>

QSB_4#<77>
QSB_7#<77>QSB_1#<77>

GND

CSB1_0#
RASB1#
CASB1#
WEB1#

WEB1#<77>

QSB_4
QSB_7

DQMB_4
DQMB_7

QSB_4#
QSB_7#

12

/DSC

R7803 243Ohm

Layout Note:Close to U7803

+1.5VS_VGA

12

C7835

/DSC

10UF/6.3V

MAB_0
MAB_1
MAB_2
MAB_3
MAB_4
MAB_5
MAB_6
MAB_7
MAB_8
MAB_9
MAB_10
MAB_11
MAB_12
MAB_13
MAB_14
MAB_15

MAB_BA_0
MAB_BA_1
MAB_BA_2

DRAM_RST

12

C7836

/DSC

1UF/6.3V

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC#

T3

A13

T7

NC1

M7

NC2

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK#

K9

CKE

K1

ODT

L2

CS#

J3

RAS#

K3

CAS#

L3

WE#

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL#

B7

DQSU#

T2

RESET#

L8

ZQ

J1

NC3

L1

NC4

J9

NC5

L9

NC6

BGA_96P_524x354_COLY

/DSC

12

C7837

/DSC

1UF/6.3V

12

C7838

1UF/6.3V

/DSC

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD6
VDD8
VDD1
VDD4
VDD3
VDD5
VDD2
VDD7
VDD9

VDDQ1
VDDQ3
VDDQ7
VDDQ5
VDDQ8
VDDQ2
VDDQ4
VDDQ6
VDDQ9

VSS3
VSS7
VSS9

VSS11

VSS5
VSS2
VSS4
VSS6
VSS1

VSS8
VSS10
VSS12

VSSQ1
VSSQ3
VSSQ8
VSSQ5
VSSQ4
VSSQ6
VSSQ2
VSSQ7
VSSQ9

12

C7839

@

1UF/6.3V

E3

DQB1_2

F7

DQB1_4

F2

DQB1_3

F8

DQB1_5

H3

DQB1_0

H8

DQB1_7

G2

DQB1_1

H7

DQB1_6

D7

DQB1_30

C3

DQB1_26

C8

DQB1_31

C2

DQB1_24

A7

DQB1_29

A2

DQB1_25

B8

DQB1_28

A3

DQB1_27

N1
R1
B2
K2
G7
K8
D9
N9
R9

A1
C1
F1
D2
H2
A8
C9
E9
H9

E1
M1
P1
T1
J2
B3
G8
J8
A9
M9
P9
T9

B1
D1
G1
E2
D8
E8
B9
F9
G9

12

C7840

1UF/6.3V

2

DQB1_[0..31] <77>

+1.5VS_VGA

GNDGND

GND

12

12

C7841

@

@

1UF/6.3V

C7842

@

1UF/6.3V

12

C7843

@

1UF/6.3V

QSB_6<77>
QSB_5<77>

DQMB_6<77>
DQMB_5<77>

QSB_6#<77>
QSB_5#<77>

R7804 243Ohm

12

C7844

/DSC

0.1UF/10V

/DSC

+VREFC_U10
+VREFD_U10

MAB_0
MAB_1
MAB_2
MAB_3
MAB_4
MAB_5
MAB_6
MAB_7
MAB_8
MAB_9
MAB_10
MAB_11
MAB_12
MAB_13
MAB_14
MAB_15

MAB_BA_0
MAB_BA_1
MAB_BA_2

CLKB1
CLKB1#
CKEB1

ODTB1
CSB1_0#
RASB1#
CASB1#
WEB1#

QSB_6
QSB_5

DQMB_6
DQMB_5

QSB_6#
QSB_5#

DRAM_RST

12

12

C7845

/DSC

0.1UF/10V

Layout Note:Close to U7804

+1.5VS_VGA

12

12

C7853

/DSC

1UF/6.3V

C7876

/DSC

0.1UF/10V

10%

12

C7854

/DSC

1UF/6.3V

12

C7855

1UF/6.3V

/DSC

R7822

/DSC

4.99KOhm

1%

12

C7852

/DSC

10UF/6.3V

+1.5VS_VGA

12

R7819

/DSC

4.99KOhm

12

R7820

/DSC

4.99KOhm

1%

GND Size Project Name

3

12

C7856

@

1UF/6.3V

+1.5VS_VGA

12

12

GND

12

C7857

1UF/6.3V

R7821

/DSC

4.99KOhm

1%

@

12

C7877

/DSC

0.1UF/10V

10%

C7858

@

1UF/6.3V

12

R7824

/DSC

4.99KOhm

1%

2

12

C7859

@

1UF/6.3V

+1.5VS_VGA

12

C7860

@

1UF/6.3V

12

R7823

/DSC

4.99KOhm

1%

12

GND

12

12

C7861

/DSC

0.1UF/10V

C7878

/DSC

0.1UF/10V

10%

12

C7862

/DSC

0.1UF/10V

1

U7804

M8

VREFCA

H1

N3

P7
P3

N2

P8

P2
R8
R2

T8
R3

L7
R7
N7

T3

T7
M7

M2
N8
M3

J7

K7

K9

K1

L2

J3

K3

L3

F3
C7

E7
D3

G3

B7

T2

L8

J1

L1

J9

L9

12

C7846

/DSC

0.1UF/10V

12

C7863

/DSC

0.1UF/10V

DQL0

VREFDQ

DQL1
DQL2

A0

DQL3

A1

DQL4

A2

DQL5

A3

DQL6

A4

DQL7
A5
A6
A7

DQU0
A8

DQU1
A9

DQU2
A10/AP

DQU3
A11

DQU4
A12/BC#

DQU5
A13

DQU6
NC1

DQU7
NC2

VDD6
BA0

VDD8
BA1

VDD1
BA2

VDD4

VDD3
CK

VDD5
CK#

VDD2
CKE

VDD7

VDD9
ODT
CS#

VDDQ1

RAS#

VDDQ3

CAS#

VDDQ7

WE#

VDDQ5
VDDQ8

DQSL

VDDQ2

DQSU

VDDQ4
VDDQ6

DML

VDDQ9

DMU

VSS3
DQSL#

VSS7
DQSU#

VSS9

VSS11

RESET#

VSS5

VSS2
ZQ

VSS4

VSS6

VSS1

VSS8

VSS10

NC3

VSS12

NC4
NC5

VSSQ1

NC6

VSSQ3
VSSQ8
VSSQ5
VSSQ4
VSSQ6
VSSQ2
VSSQ7
VSSQ9

BGA_96P_524x354_COLY

/DSC

12

12

C7847

C7848

@

@

0.1UF/10V

0.1UF/10V

GND

12

12

C7865

C7864

@

@

0.1UF/10V

0.1UF/10V

GND

PEGATRON UN IHAN

‧

PEGATRON UN IHAN

‧

PEGATRON UN IHAN

‧

Size Project Name

Size Project Name

C

C

C

EG70_KB

EG70_KB

Date: Sheet of

Date: Sheet of

Date: Sheet of

EG70_KB

DQB1_[0..31]

E3

DQB1_22

F7

DQB1_21

F2

DQB1_23

F8

DQB1_19

H3

DQB1_18

H8

DQB1_16

G2

DQB1_20

H7

DQB1_17

DQB1_[0..31]

D7

DQB1_8

C3

DQB1_12

C8

DQB1_11

C2

DQB1_10

A7

DQB1_15

A2

DQB1_13

B8

DQB1_9

A3

DQB1_14

N1
R1
B2
K2
G7
K8
D9
N9
R9

A1
C1
F1
D2
H2
A8
C9
E9
H9

E1
M1
P1
T1
J2
B3
G8
J8
A9
M9
P9
T9

B1
D1
G1
E2
D8
E8
B9
F9
G9

GND

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

1

+1.5VS_VGA

GPU-DDR3 CH B

GPU-DDR3 CH B

GPU-DDR3 CH B

Corey

Corey

Corey

78 99Monday, March 25, 2013

78 99Monday, March 25, 2013

78 99Monday, March 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

5

4

3

2

1

U7901

M8

+VREFC_U3

MAA_[0..12]<77>

D D

MAA_13< 77>
MAA_14< 77>
MAA_15< 77>

MAA_BA_0<77>
MAA_BA_1<77>
MAA_BA_2<77>

C C

Schematics Note:

Stitching Caps OPTION for MEM signals that have c change of reference plane voltage

Add stitching caps when required, one cap per three signals

+VREFD_U3

CLKA0

CLKA0<77>

CKEA0<77>

ODTA0< 77>

WEA0#<77>

/MARS

R7901 243Ohm

12

12

C7901

C7902

10UF/6.3V

1UF/6.3V

/MARS

/MARS

CLKA0#
CKEA0

ODTA0
CSA0_0#
RASA0#
CASA0#
WEA0#

QSA_2
QSA_0

DQMA_2
DQMA_0

QSA_2#
QSA_0#

DRAM_RST

CLKA0#<77>

CSA0_0#<77>

RASA0#<77>
CASA0#<77>

QSA_2<77>
QSA_0<77>

DQMA_2<77>
DQMA_0<77>

QSA_2#<77>
QSA_0#<77>

DRAM_RST<77,78>

Layout Note:Close to U7901

+1.5VS_VGA

MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8
MAA_9
MAA_10
MAA_11
MAA_12
MAA_13
MAA_14
MAA_15

MAA_BA_0
MAA_BA_1
MAA_BA_2

12

12

C7903

1UF/6.3V

/MARS

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC#

T3

A13

T7

NC1

M7

NC2

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK#

K9

CKE

K1

ODT

L2

CS#

J3

RAS#

K3

CAS#

L3

WE#

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL#

B7

DQSU#

T2

RESET#

L8

ZQ

J1

NC3

L1

NC4

J9

NC5

L9

NC6

BGA_96P_524x354_COLY

/MARS

12

C7904

1UF/6.3V

/MARS

E3

DQA0_19

DQL0

F7

DQA0_18

DQL1

F2

DQA0_16

DQL2

F8

DQA0_22

DQL3

H3

DQA0_21

DQL4

H8

DQA0_17

DQL5

G2

DQA0_20

DQL6

H7

DQA0_23

DQL7

D7

DQA0_2

DQU0

C3

DQA0_5

DQU1

C8

DQA0_3

DQU2

C2

DQA0_7

DQU3

A7

DQA0_0

DQU4

A2

DQA0_6

DQU5

B8

DQA0_1

DQU6

A3

DQA0_4

DQU7

N1

VDD6

R1

VDD8

B2

VDD1

K2

VDD4

G7

VDD3

K8

VDD5

D9

VDD2

N9

VDD7

R9

VDD9

A1

VDDQ1

C1

VDDQ3

F1

VDDQ7

D2

VDDQ5

H2

VDDQ8

A8

VDDQ2

C9

VDDQ4

E9

VDDQ6

H9

VDDQ9

E1

VSS3

M1

VSS7

P1

VSS9

T1

VSS11

J2

VSS5

B3

VSS2

G8

VSS4

J8

VSS6

A9

VSS1

M9

VSS8

P9

VSS10

T9

VSS12

B1

VSSQ1

D1

VSSQ3

G1

VSSQ8

E2

VSSQ5

D8

VSSQ4

E8

VSSQ6

B9

VSSQ2

F9

VSSQ7

G9

VSSQ9

GND

12

12

C7905

@

1UF/6.3V

12

C7906

C7907

@

@

1UF/6.3V

1UF/6.3V

DQA0_[0..31]

12

C7908

@

1UF/6.3V

DQA0_[0..31] <77>

+1.5VS_VGA

@

+VREFC_U4
+VREFD_U4

MAA_[0..12] MAA_[0..12] MAA_[0..12]

QSA_3<77>
QSA_1<77>

DQMA_3<77>
DQMA_1<77>

QSA_3#<77>
QSA_1#<77>

/MARS

R7902 243Ohm

GND

12

C7909

1UF/6.3V

12

C7910

0.1UF/10V

/MARS

12

C7911

0.1UF/10V

/MARS

Layout Note:Close to U7902

B B

A A

+1.5VS_VGA

12

C7936

1UF/6.3V

/MARS

12

C7971

/MARS

0.1UF/10V

10%

12

C7937

1UF/6.3V

/MARS

12

C7938

1UF/6.3V

/MARS

@

CLKA0

CLKA0#

12

C7939

1UF/6.3V

R7905

/MARS

40.2Ohm

12

C7940

@

1UF/6.3V

1 2

1%

12

GND

@

1 2

C7969

/MARS

0.01UF/16V

12

C7941

1UF/6.3V

R7906

/MARS

40.2Ohm

1%

12

12

12

C7942

C7943

@

@

1UF/6.3V

1UF/6.3V

C7944

0.1UF/10V

/MARS

12

C7945

0.1UF/10V

/MARS

U7902 Verf U7903 Verf U7904 VerfU7901 Verf

R7914

/MARS

4.99KOhm

1%

+1.5VS_VGA

12

12

GND

R7913

/MARS

4.99KOhm

12

C7973

/MARS

0.1UF/10V

10%

R7916

/MARS

4.99KOhm

1%

4

+1.5VS_VGA

12

R7911

/MARS

4.99KOhm

12

R7912

/MARS

4.99KOhm

1%

5

12

C7972

/MARS

0.1UF/10V

10%

GND

12

C7935

10UF/6.3V

/MARS

Layout Note:Close to U7901 Layout Note:Close to U7902 Layout Note:Close to U7903 Layout Note:Close to U7904

+1.5VS_VGA

12

R7909

/MARS

4.99KOhm

12

R7910

/MARS

4.99KOhm

1%

GND

MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8
MAA_9
MAA_10
MAA_11
MAA_12
MAA_13
MAA_14
MAA_15

MAA_BA_0
MAA_BA_1
MAA_BA_2

CLKA0
CLKA0#
CKEA0

ODTA0
CSA0_0#
RASA0#
CASA0#
WEA0#

QSA_3
QSA_1

DQMA_3
DQMA_1

QSA_3#
QSA_1#

DRAM_RST

12

12

C7912

0.1UF/10V

/MARS

12

C7946

0.1UF/10V

/MARS

CLKA1

CLKA1#

+1.5VS_VGA

U7902

M8

VREFCA

DQL0

VREFDQ

DQL1
DQL2

A0

DQL3

A1

DQL4

A2

DQL5

A3

DQL6

A4

DQL7
A5
A6
A7

DQU0
A8

DQU1
A9

DQU2
A10/AP

DQU3
A11

DQU4
A12/BC#

DQU5
A13

DQU6
NC1

DQU7
NC2

VDD6
BA0

VDD8
BA1

VDD1
BA2

VDD4

VDD3
CK

VDD5
CK#

VDD2
CKE

VDD7

VDD9
ODT
CS#

VDDQ1

RAS#

VDDQ3

CAS#

VDDQ7

WE#

VDDQ5
VDDQ8

DQSL

VDDQ2

DQSU

VDDQ4
VDDQ6

DML

VDDQ9

DMU

VSS3
DQSL#

VSS7
DQSU#

VSS9

VSS11

RESET#

VSS5

VSS2
ZQ

VSS4

VSS6

VSS1

VSS8

VSS10

NC3

VSS12

NC4
NC5

VSSQ1

NC6

VSSQ3
VSSQ8
VSSQ5
VSSQ4
VSSQ6
VSSQ2
VSSQ7
VSSQ9

BGA_96P_524x354_COLY

/MARS

12

C7914

@

0.1UF/10V

GND

12

C7948

@

0.1UF/10V

GND

R7908

/MARS

40.2Ohm

1 2

1 2

1%

12

C7970

/MARS

0.01UF/16V

GND

+VREFD_U4+VREFC_U4 +VREFD_U6+VREFC_U6+VREFD_U3+VREFC_U 3 +VREFD_U5+VREFC_U5

12

C7974

/MARS

0.1UF/10V

10%

12

12

GND

@

@

R7907

/MARS

40.2Ohm

R7915

/MARS

4.99KOhm

1%

H1

N3

P7
P3

N2

P8

P2
R8
R2

T8
R3

L7
R7
N7

T3

T7
M7

M2
N8
M3

J7

K7

K9

K1

L2

J3

K3

L3

F3
C7

E7
D3

G3

B7

T2

L8

J1

L1

J9

L9

12

C7913

0.1UF/10V

12

C7947

0.1UF/10V

1%

DQA0_[0..31]

E3

DQA0_27

F7

DQA0_31

F2

DQA0_26

F8

DQA0_30

H3

DQA0_25

H8

DQA0_28

G2

DQA0_24

H7

DQA0_29

DQA0_[0..31] DQA1_[0..31]

D7

DQA0_15

C3

DQA0_11

C8

DQA0_14

C2

DQA0_10

A7

DQA0_12

A2

DQA0_8

B8

DQA0_13

A3

DQA0_9

N1
R1
B2
K2
G7
K8
D9
N9
R9

A1
C1
F1
D2
H2
A8
C9
E9
H9

E1
M1
P1
T1
J2
B3
G8
J8
A9
M9
P9
T9

B1
D1
G1
E2
D8
E8
B9
F9
G9

+1.5VS_VGA

GND

GND

+VREFC_U5
+VREFD_U5

CLKA1

CLKA1<77>

CLKA1#<77>

CSA1_0#<77>

RASA1#<77>
CASA1#<77>

QSA_4<77>
QSA_5<77>

DQMA_4<77>
DQMA_5<77>

QSA_4#<77>
QSA_5#<77>

CLKA1#
CKEA1

CKEA1<77>

ODTA1

ODTA1<77>

CSA1_0#
RASA1#
CASA1#
WEA1#

WEA1#<77>

QSA_4
QSA_5

DQMA_4
DQMA_5

QSA_4#
QSA_5#

DRAM_RST

/MARS

R7903 243Ohm

Layout Note:Close to U7903

+1.5VS_VGA

12

C7918

10UF/6.3V

/MARS

Layout Note:Close to U7904

+1.5VS_VGA

12

C7952

10UF/6.3V

/MARS

R7918

/MARS

4.99KOhm

1%

+1.5VS_VGA

12

12

GND

R7917

/MARS

4.99KOhm

12

C7975

/MARS

0.1UF/10V

10%

+1.5VS_VGA

12

R7919

/MARS

4.99KOhm

12

12

C7976

/MARS

0.1UF/10V

10%

GND Size Project Name

3

R7920

/MARS

4.99KOhm

1%

MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8
MAA_9
MAA_10
MAA_11
MAA_12
MAA_13
MAA_14
MAA_15

MAA_BA_0
MAA_BA_1
MAA_BA_2

12

12

C7919

1UF/6.3V

/MARS

12

C7953

1UF/6.3V

/MARS

U7903

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC#

T3

A13

T7

NC1

M7

NC2

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK#

K9

CKE

K1

ODT

L2

CS#

J3

RAS#

K3

CAS#

L3

WE#

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL#

B7

DQSU#

T2

RESET#

L8

ZQ

J1

NC3

L1

NC4

J9

NC5

L9

NC6

BGA_96P_524x354_COLY

/MARS

12

12

C7921

C7920

1UF/6.3V

1UF/6.3V

/MARS

/MARS

12

12

C7955

C7954

1UF/6.3V

1UF/6.3V

/MARS

/MARS

R7922

/MARS

4.99KOhm

1%

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD6
VDD8
VDD1
VDD4
VDD3
VDD5
VDD2
VDD7
VDD9

VDDQ1
VDDQ3
VDDQ7
VDDQ5
VDDQ8
VDDQ2
VDDQ4
VDDQ6
VDDQ9

VSS3
VSS7
VSS9

VSS11

VSS5
VSS2
VSS4
VSS6
VSS1

VSS8
VSS10
VSS12

VSSQ1
VSSQ3
VSSQ8
VSSQ5
VSSQ4
VSSQ6
VSSQ2
VSSQ7
VSSQ9

12

@

12

@

+1.5VS_VGA

12

12

GND

C7922

1UF/6.3V

C7956

1UF/6.3V

R7921

/MARS

4.99KOhm

1%

U7904

M8

VREFCA
VREFDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
NC1
NC2

BA0
BA1
BA2

CK
CK#
CKE

ODT
CS#

VDDQ1

RAS#

VDDQ3

CAS#

VDDQ7

WE#

VDDQ5
VDDQ8

DQSL

VDDQ2

DQSU

VDDQ4
VDDQ6

DML

VDDQ9

DMU

DQSL#
DQSU#

VSS11

RESET#

ZQ

VSS10

NC3

VSS12

NC4
NC5

VSSQ1

NC6

VSSQ3
VSSQ8
VSSQ5
VSSQ4
VSSQ6
VSSQ2
VSSQ7
VSSQ9

BGA_96P_524x354_COLY

/MARS

12

12

C7930

@

@

0.1UF/10V

GND

12

12

C7964

@

@

0.1UF/10V

GND

‧

‧

‧

Size Project Name

Size Project Name

C

C

C

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD6
VDD8
VDD1
VDD4
VDD3
VDD5
VDD2
VDD7
VDD9

VSS3
VSS7
VSS9

VSS5
VSS2
VSS4
VSS6
VSS1
VSS8

C7931

0.1UF/10V

C7965

0.1UF/10V

EG70_KB

EG70_KB

EG70_KB

H1

N3

MAA_0

P7

MAA_1

P3

MAA_2

N2

MAA_3

P8

MAA_4

P2

MAA_5

R8

MAA_6

R2

MAA_7

T8

MAA_8

R3

MAA_9

L7

MAA_10

R7

MAA_11

N7

MAA_12

T3

MAA_13

T7

MAA_14

M7

MAA_15

M2

MAA_BA_0

N8

MAA_BA_1

M3

MAA_BA_2

J7

CLKA1

K7

CLKA1#

K9

CKEA1

K1

ODTA1

L2

CSA1_0#

J3

RASA1#

K3

CASA1#

L3

WEA1#

F3

QSA_6

C7

QSA_7

E7

DQMA_6

D3

DQMA_7

G3

QSA_6#

B7

QSA_7#

T2

DRAM_RST

12

L8

J1
L1
J9
L9

12

C7929

0.1UF/10V

/MARS

12

C7963

0.1UF/10V

/MARS

PEGATRON UN IHAN

PEGATRON UN IHAN

PEGATRON UN IHAN

Date: Sheet of

Date: Sheet of

Date: Sheet of

@

@

12

C7924

1UF/6.3V

12

C7958

1UF/6.3V

2

DQA1_[0..31] <77>

+1.5VS_VGA

12

C7925

@

1UF/6.3V

12

C7959

@

1UF/6.3V

+1.5VS_VGA

R7924

/MARS

4.99KOhm

1%

GND

12

12

12

@

12

@

R7923

/MARS

4.99KOhm

1%

GNDGND

C7926

1UF/6.3V

C7960

1UF/6.3V

12

QSA_6<77>
QSA_7<77>

DQMA_6<77>
DQMA_7<77>

QSA_6#<77>
QSA_7#<77>

C7978

/MARS

0.1UF/10V

10%

+VREFC_U6
+VREFD_U6

/MARS

R7904 243Ohm

12

12

C7928

C7927

0.1UF/10V

0.1UF/10V

/MARS

/MARS

12

12

C7961

C7962

0.1UF/10V

0.1UF/10V

/MARS

/MARS

E3

DQA1_5

F7

DQA1_4

F2

DQA1_6

F8

DQA1_3

H3

DQA1_1

H8

DQA1_0

G2

DQA1_7

H7

DQA1_2

D7

DQA1_8

C3

DQA1_12

C8

DQA1_9

C2

DQA1_15

A7

DQA1_11

A2

DQA1_14

B8

DQA1_10

A3

DQA1_13

N1
R1
B2
K2
G7
K8
D9
N9
R9

A1
C1
F1
D2
H2
A8
C9
E9
H9

E1
M1
P1
T1
J2
B3
G8
J8
A9
M9
P9
T9

B1
D1
G1
E2
D8
E8
B9
F9
G9

GND

12

C7923

@

1UF/6.3V

12

C7957

@

1UF/6.3V

12

C7977

/MARS

0.1UF/10V

10%

E3
F7
F2
F8
H3
H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

N1
R1
B2
K2
G7
K8
D9
N9
R9

A1
C1
F1
D2
H2
A8
C9
E9
H9

E1
M1
P1
T1
J2
B3
G8
J8
A9
M9
P9
T9

B1
D1
G1
E2
D8
E8
B9
F9
G9

DQA1_19
DQA1_20
DQA1_16
DQA1_21
DQA1_22
DQA1_23
DQA1_18
DQA1_17

DQA1_29
DQA1_25
DQA1_31
DQA1_24
DQA1_28
DQA1_26
DQA1_30
DQA1_27

GND

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

1

DQA1_[0..31]

DQA1_[0..31]

+1.5VS_VGA

GPU-DDR3 CH A

GPU-DDR3 CH A

GPU-DDR3 CH A

Corey

Corey

Corey

79 99Monday, March 25, 2013

79 99Monday, March 25, 2013

79 99Monday, March 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

5

D D

VSUMP_NB

12

2.61KOhm
R8000

Rntc

12

10KOhm
R8007

Rntcs

VSUMN_NB

close to L8002

close to Q8005

R8019
470KOHM 3%
vx_r0603_small

1 2

R8022

R8021

27.4KOhm

10KOhm

1 2

1 2

@

@

C C

B B

APU_SVC<8>
VR_HOT#<8>
APU_SVD<8>

APU_SVT<8>

VCORE_PWROK<8>

R8065 0Ohm

R8027 0Ohm

12

R8025 0Ohm

12

R8023 0Ohm

12

0Ohm

12

R8024

R8035,R8042

----Disable Vco re phase2

VSUMN

R8046
10KOhm

Rntcs

1 2

close to L8000

R8051

2.61KOhm

Rntc

1 2

VSUMP

Cn1

12

C8000

1 2

0.1UF/25V
11KOhm
R8006

Rp

3%

1 2

@

1 2

1000PF/50V

T8005

12

T8006

1

T8007

+1.8VS

1

1 2

1000PF/50V

上上上上上上上上

ISEN2

ISEN1

12

12

C8029

0.22UF/16V

@

12

3%

R8050
11KOhm

Rp

1 2

C8034

1 2

0.1UF/25V

Cn1

1 2

0Ohm
R8008

Rn

R8020

133KOhm

C8017

1

R8028

133KOhm

C8023

C8030

0.22UF/16V
@

R8047
0Ohm

Rn

1 2

C8006

12

T8004

12

1 2

C8035

0.1UF/25V

0.1UF/25V

R8033

10KOhm

1 2

1 2

1

R8066
0Ohm

@

12

@

10%

0.1UF/25V
C8007

Cn2

2.61KOhm @
R8009

12

Rip

R8012

1 2

Ri

499Ohm

C8016

10V220000076

0.1UF/25V

20%

12

R8031
470KOHM 3%
vx_r0603_small

1 2

close to Q8001

1 2

+5VS

C8031

1 2

0.1UF/25V

Ri

1 2

R8045 620Ohm

10V220000125

Rip

12

R8048

@

2.61KOhm

C8036

0.1UF/25V
@

10%

Cn2

VRM_IMON_NB

R8034

27.4KOhm

@

10% @

0.1UF/25V
C8011

1 2

Cip

10/23

VRM_NTC_NB

VRM_SVC

VRM_HOT_L

VRM_SVD
VRM_VDDIO

VRM_SVT

VRM_ENABLE

VRM_PWROK#

VRM_IMON

@

12/27

Cip

1 2

C8033

0.1UF/25V

10% @

4

R8001
10Ohm

1 2

C8004

0.01UF/50V
10%

12

R8010

499Ohm

NB_PWRGD <92>

1 2

R8026

12

1Ohm

C8021

1UF/6.3V

VRM_PWRGD <30,92>

12

R8036

499Ohm

12

R8052
0Ohm

12

R8053
0Ohm

R8002
0Ohm

267KOhm

267KOhm

1 2

1 2

2KOhm

2KOhm

R8004

R8014

+5VS

R8040

R8044

R8049
10Ohm

R8054
10Ohm

12

12

1 2

C8014

47PF/50V

C8022

1UF/6.3V

1 2

C8027

47PF/50V

12

12

12

12

1 2

C8009

680PF/50V

1 2

C8015

150PF/50V

1 2

C8028

150PF/50V

1 2

C8032

680PF/50V

12

@

01/16

1 2

C8013

100PF/50V

R8013

Rdroop

1 2

12/28

2.49KOhm

10V220000048

VRM_LG_NB
VRM_LX_NB
VRM_UG_NB

VSUMP_NB

VRM_ISUMN_NB

VRM_VSEN_NB

VRM_FB_NB

VRM_COMP_NB

36

37

38

39

40

41

U8000A

GND

FB_NB

VSEN_NB

1

ISUMP_NB

ISUMN_NB

NTC_NB

2

IMON_NB

3

SVC

4

VR_HOT_L

5

ISL62771HRTZ-T

SVD

6

06V070000047

VDDIO

7

SVT

8

ENABLE

9

PWROK

10

IMON

NTC11ISEN212ISEN113ISUMP14ISUMN15VSEN16RTN17FB18COMP19PGOOD

VRM_NTC

VSUMP

VRM_ISUMN

12

R8035
0Ohm

R8042

10KOhm

1 2

VRM_BST_NB

31

32

33

34

35

30

BOOT_NB

COMP_NB

LGATE_NB

PHASE_NB

BOOT2

UGATE_NB

PGOOD_NB

29

UGATE2

28

PHASE2

27

LGATE2

26

VDDP

25

VRM_VDD

VDD

24

VRM_LG1

LGATE1

23

VRM_LX1

PHASE1

22

VRM_UG1

UGATE1

21

VRM_BST1

BOOT1

20

VRM_PWRGD

VRM_COMP

VRM_RTN

VRM_FB

VRM_VSEN

1 2

C8026

100PF/50V

R8039

1 2

Rdroop

2.87KOhm

12/28

10V220000197

12

C8046

0.01UF/50V

10%

12

C8040

0.01UF/50V

10%

+VDDCR_NB

VDDCR_NB_FB_H <8>

12

R8018
10KOhm
@

NB offset setting

Vcore offset setting

R8032

10KOhm @

12

+VDDCR_CPU

VDDCR_APU_FB_H <8>

VDDCR_APU_FB_L <8>

3

S

Q8000

876

SIRA14DP-T1-GE3

123

54

5
D

S

G

07V040000101

@

Q8006

876

SIRA10DP-T1-GE3

123

12

10UF/25V

1AV500000015

T8002
TPC28T

1

1 2

12

C8001

VRM_UG1

VRM_LX1

VRM_BST1

vx_r0805_h24_small

VRM_LG1

1 2

R8003
0Ohm

1 2

C8005

0.22UF/16V

vx_c0402_small

MLCC/+/-10%

T8003
TPC28T

54

5
D

G

T8001
TPC28T

1

54

07V040000100

Q8001

876

5
D

SIRA10DP-T1-GE3

S

G

123

1

07V040000101

VDDNB Total Input current=2.6A

12

VRM_UG_NB

VRM_LX_NB

VRM_BST_NB

vx_r0805_h24_small

VRM_LG_NB

1 2

R8055
0Ohm

1 2

C8041

0.22UF/16V

vx_c0402_small

MLCC/+/-10%

T8011
TPC28T

T8025
TPC28T

54

5
D

S

G

1

07V040000100

54

5
D

S

G

07V040000101

1

Q8004

876

SIRA14DP-T1-GE3

123

Q8005

876

SIRA10DP-T1-GE3

123

C8037
10UF/25V

1AV500000015

T8012
TPC28T

1

1 2

12

R8056

2.2ohm

C8044
150PF/50V

MLCC/+/-5%

2

VCORE Total Input current=4.125A

12

12

C8002

C8051

10UF/25V

10UF/25V

1AV500000015

1AV500000015

@

R8005

@

2.2ohm

C8012

@

150PF/50V
MLCC/+/-5%

R8015

1%

3.65KOhm

vx_r0402_small
1 2

VSUMP

R8017
10Ohm

1 2

VSUMN

12

12

@

@

C8038
10UF/25V

1AV500000015

TYP DCR=1.1m ohm
MAX DCR=1.3mohm

JP8010

1 2

SHORT_PIN

R8059

3.65KOhm

1%

1 2

VSUMP_NB

C8039

0.1UF/25V

10%

L8002

0.36UH

Irat=60A

12

C8003

0.1UF/25V

10%

L8000

0.36UH

Irat=60A

TYP DCR=1.1m ohm
MAX DCR=1.3mohm

JP8000

1 2

SHORT_PIN

12

+

CE8005
68UF/25V
@

21

12

+

CE8000
68UF/25V
@

21

+AC_BAT_SYS

JP8011

1 2

SHORT_PIN

R8060
10Ohm

1 2

VSUMN_NB

1 2

12

JP8004

SHORT_PIN

+

CE8006
560UF/2.5V

1BV090000002

ESR=16mOHM

+AC_BAT_SYS

12

+

CE8003
560UF/2.5V

1BV090000002

ESR=16mOHM

12

+

CE8007
560UF/2.5V

1BV090000002

ESR=16mOHM

12

+

CE8001
560UF/2.5V

1BV090000002

ESR=16mOHM

1

(21A)

+VDDCR_CPU_O

JP8001

2

112

JP8002

JP8003

112

112

2

2

2

+VDDCR_CPU

2

2

(17A)

+VDDCR_NB

3MM_OPEN_5MIL

3MM_OPEN_5MIL

3MM_OPEN_5MIL

12

12

C8010

20%

1000PF/50V

10%

C8047 10UF/6.3V

C8048 10UF/6.3V

C8008 0.1UF/25V

+VDDCR_CPU_O
TDC :21A
Frequency :300KHz
PWR Cap. :1120uF
Total Cap. :1120uF
ESR :8mOHM

+VDDCR_NB_O

JP8007

112

3MM_OPEN_5MIL

JP8008

112

3MM_OPEN_5MIL

JP8009

112

3MM_OPEN_5MIL

12

12

C8043

C8042

1000PF/50V

0.1UF/25V

10%

20%

C8049 10UF/6.3V

C8050 10UF/6.3V

+VDDCR_NB_O
TDC :17A
Frequency :300KHz
PWR Cap. :1120uF
Total Cap. :1120uF
ESR :8mOHM

T8015

T8016

T8013

T8018

D8000

1.2V/0.1A

R8057

@

+1.8VS

12

R8067
0Ohm
vx_r0402_small
0 @

12

R8068
0Ohm
vx_r0402_small
0 @

1KOhm

VRM_PWROK#

CPU_VRON<30>

+1.8VS

12

A A

12

R8061
0Ohm
vx_r0402_small
0 @

VRM_SVC VRM_SVD

R8063
0Ohm
vx_r0402_small
0 @

R8062
0Ohm
vx_r0402_small
0 @

12

12

R8064
0Ohm
vx_r0402_small
0 @

5

SVC SVD

0

0

1

CPU_VRON_PWR<93>

Output

1.1

0

1.0

1

0.9

0

0.81

1

12

12

VRM_ENABLE

+VDDCR_NB

12

R8058

12

0Ohm

C8045

0.22UF/16V
@
1AV200000091

4

TPC28T

T8019
TPC28T

1

1

42
43
44
45
46
47
48
49

TPC28T

1

T8020
TPC28T

1

U8000B

GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8

ISL62771HRTZ-T

06V070000047

T8014
TPC28T

T8021
TPC28T

+VDDCR_CPU

1

1

TPC28T

T8022
TPC28T

T8017

TPC28T

TPC28T

1

1

1

T8023

T8024

TPC28T

TPC28T

1

1

1

Title :

Title :

Title :

POWER_VCORE

POWER_VCORE

POWER_VCORE

Louis

Louis

Louis

Engineer:

Engineer:

EG70KB

EG70KB

EG70KB

1

Engineer:

Rev

Rev

Rev

1.3

1.3

1.3

80 99Monday, March 25, 2013

80 99Monday, March 25, 2013

80 99Monday, March 25, 2013

PEGATRON UNIHAN CORP.

‧

PEGATRON UNIHAN CORP.

‧

PEGATRON UNIHAN CORP.

‧

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

5

4

+5VO & +3VO POWER SUPPLY

3

2

1

112

SR8100
R0603

10%

JP8101
1MM_OPEN_M1M2

2

+5VO_1_1

C8117

0.1UF/25V

1AV300000007

C8115

0.1UF/25V

1AV300000007

+5VO_2_2

112

3

3

VCLK

5V_FB

T8125
TPC26T

1

12

16
17
18
19
20
21

10V220000007

1

12

D8100
1V/0.2A

D8101
1V/0.2A

+5VAO

C8100
1UF/6.3V

vx_c0402_small
10%

DRVH1
VBST1
SW1
VCLK
EN1
GND

R8100
102KOhm

R8106
10KOhm

vx_r0402_small
1%
10V220000003

T8123
TPC26T

+3VAO

C8101
1UF/6.3V

vx_c0402_small
10%

1

2

1

2

3

T8101
TPC26T

1

14

15

DRVL1

CS11VFB12VREG33VFB24CS2

1 2

1 2

20mil

20mil

13

VO1

VREG5

12

11

12

VIN

DRVL2

DRVH2

VBST2

SW2

PGOOD

EN2

5

R8101
91KOhm

10V220000175

1 2

3V_FB

R8105
10KOhm

vx_r0402_small
1%

1 2

10V220000003

1 2

C8106
1UF/25V

vx_c0603_small
10%

U8100A
TPS51225CRUKR

06V950000017

10
9
8
7
6

12/27

T8132
TPC26T

1

C8120

12

0.1UF/10V

1AV200000037

C8114

0.1UF/25V

1AV300000007

T8104
TPC26T

JP8103
1MM_OPEN_M1M2

1

C8112

0.1UF/25V

1 2

1AV300000007

3V_BST2

+5VO

112

1 2

2

3V_LG

SR8101
R0603

3V_BST2_2
3V_LX

R8111

6.65KOHM

vx_r0402_small
1%

1 2

C8124
39PF/50V
vx_c0402_small
@

10%

T8122
TPC26T

+5VO

1

+5VA

+3VA

T8102
TPC26T

1

11.41V-14.39V

+AC_BAT_SYS

C8110

1 2

0.1UF/25V

1AV300000007

SUS_PWRGD <30,92>

Enable2

12

1 2

C8125

0.1UF/10V
vx_c0402_small
10%

T8137

T8135

TPC26T

TPC26T

1

1

T8140

T8131

TPC26T

TPC26T

1

1

T8121

T8143

TPC26T

TPC26T

1

1

T8142

T8103

TPC26T

TPC26T

1

1

IRFHS8342TRPBF

IRFHS8342TRPBF

@
1AV200000037

T8134
TPC26T

1

T8141
TPC26T

1

T8144
TPC26T

1

+12VSUS

3

Q8102

07V040000087

3

Q8103

07V040000087

2 5 6

D

G

S

7

4 1

2 5 6

D

G

S

7

4 1

3V_FB_R

U8100B

TPS51225CRUKR

06V950000017

T8105
TPC26T

1

T8117
TPC26T

1

T8130
TPC26T

1

2

1

1

1

GND1
GND2

T8106
TPC26T

T8118
TPC26T

T8127
TPC26T

C8108

12

10UF/25V

vx_c0805_h57_small
MLCC/+/-10%
1AV500000015

T8100
TPC26T

1
12

R8107

2.2Ohm
vx_r0805_h24_small

3V_RC

12

C8116
1500PF/50V
vx_c0603_small

22
23

T8107
TPC26T

1

T8119
TPC26T

1

T8128
TPC26T

1

1AV300000007

12

C8103

0.1UF/25V
vx_c0603_small

10%

L8101

3.3UH

Irat=6.6A

21

12

CE8101

+

220UF/6.3V

1BV090000003

JP8106
SHORT_PIN

1 2

+3VO:3.3V( Max:3.39;Min:3.271)

Frequency:350KH z

+3VSUS

T8113
TPC26T

1

T8138
TPC26T

+3VO

1

T8108
TPC26T

1

T8120
TPC26T

1

T8129
TPC26T

1

T8114
TPC26T

1

T8139
TPC26T

1

C8156
10UF/6.3V

1AV300000018

T8115
TPC26T

1

T8126
TPC26T

1

+AC_BAT_SYS

(4.23A)

+3VO

12

T8116
TPC26T

1

T8136
TPC26T

1

6/14 just for bom should check again

JP8105
1MM_OPEN_M1M2

2

112

+3VSUS

C8113

0.1UF/10V
vx_c0402_small

10%

<Variant Name>

<Variant Name>

<Variant Name>

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

(0.4A)

@

+3VO
TDC :4.23A
Frequency :350KHz
PWR Cap. :220uF
Total Cap. :220uF
ESR :15mOHM

Engineer:

Engineer:

Engineer:

EG70KB

1

Title :

Title :

Title :

POWER_SYSTEM

POWER_SYSTEM

POWER_SYSTEM

Luois

81 99Monday, March 25, 2013

81 99Monday, March 25, 2013

81 99Monday, March 25, 2013

Rev

Rev

Rev

1.3

1.3

1.3

JP8102
1MM_OPEN_M1M2

2

5V_LG

C8105

1AV300000007

0.1UF/25V

5V_HG 3V_HG

1 2

1 2

5V_BST1_1 5V_BST1
5V_LX

Enable1

1 2

R8108

15.4KOHM

1%
10V220000267

1 2

C8118
39PF/50V

1 2

vx_c0402_small
@

C8123

0.1UF/10V
vx_c0402_small
10%

@
1AV200000037

+3VA

+RTC_POWER

T8124

1 2

TPC26T

1

20mil

1 2

C8107

12

10UF/25V

vx_c0805_h57_small
MLCC/+/-10%

1AV500000015

256

IRFHS8342TRPBF

7

12

1%

61

Q8112A

D

UM6K1NG1DTN

07V040000035

S

G

@

D

S

Q8104

4 1

R8128
560KOhm

5%

5

4

G

Enable1

1 2

G

10/23

C8122

12

10UF/25V
vx_c0805_h57_small
MLCC/+/-10%
1AV500000015

3

SR8104
R0402

Q8105
IRFML8244TRPBF

D

3

@

34

Q8112B

D

UM6K1NG1DTN
@

07V040000035

S

@

T8133
TPC26T

1

5V_FB_R

MLCC/+/-10%

07V040000087

07V040000087

G

1

12

12

1AV300000007

IRFHS8342TRPBF

IRFHS8342TRPBF

1 2

S

2

C8152
1500PF/50V
@

C8104

0.1UF/25V
vx_c0603_small

@

256

D

S

Q8100

7

4 1

256

D

S

Q8101

7

4 1

Enable2

SR8105
R0402

(1.9A)

+3VSUS

12

(0.05A)

+5VA

G

3

G

3

(0.05A)

VCLK +10VO

C8153

0.1UF/25V
10%@

1AV300000007

D D

+AC_BAT_SYS

( 6.9A ) (2.484A)

C8119

12

10UF/25V

vx_c0805_h57_small
MLCC/+/-10%
1AV500000015

(6.473A)

+5VO

12

C8121

@

0.1UF/10V
vx_c0402_small

10%

+5VO

C C

TDC :9.908A
Frequency :300KHz
PWR Cap. :220uF
Total Cap. :220uF
ESR :15mOHM

10/09

R8143
1KOhm
@

1 2

5

5

FORCE_OFF_PWR<92>

B B

10/09

IOAC_EN<30,55>

VSUS_ON_EN

Support ACOC =>AOAC_@
nonsupport AOAC=>nonAOAC_@

A A

C8155
10UF/6.3V

1AV300000018

34

G

D8111

1.2V/0.1A
@

1 2

D8112

1.2V/0.1A

1 2

@

1 2

R8145 0Ohm

上上上上上上上上

D

S

12

+

CE8100

220UF/6.3V

1BV090000003

Q8109B
UM6K1NG1DTN

07V040000035

nonAOAC_@

上上上上上上上上

AOAC_@

VSUS_ON<30,63,82,84,85,91,93>

12

USBSLP_EN<30>

不不不不上上上上上上上上

L8100

3.3UH

Irat=6.6A

12

JP8100

SHORT_PIN

vx_r0805_h24_small

JP8104

SHORT_PIN

1500PF/50V

vx_c0603_small

10%

Frequency:300KH z

FORCE_OFF_PWR

R8134

1%

1KOhm

1 2

@

VSUS_ON_EN

12

R8116
560KOhm

5%

+AC_BAT_SYS

12

不不不不上上上上上上上上

12

R8133

5%
560KOhm
@

R8127

5%

1KOhm

1 2

21

12

R8104

2.2Ohm

@5%

5V_RC

07V040000087

12

C8111

@

(Typ:5.00V;Max:5.111V;Min:4.89 1V)

10/09

61

Q8109A

D

UM6K1NG1DTN

2

07V040000035

S

G

1 2

D8113

@

1.2V/0.1A

1 2

D8110

@

1.2V/0.1A

1 2

R8144 0Ohm

+3VO

R8132

1%
110KOHM
vx_r0402_small
@

10/09

R8142

+5VA

100KOhm
@

1 2

2

VSUS_ON_EN

12

C8154

@

0.1UF/25V
1AV300000007

5

4

3

2

1

TRIP V (mV) = TRIP R (k) * TRIP I (mA)
TRIPI current, which is 10uA
VOCP = TRIP V /

D D

Used for testing purpose in production line.
Pull down to GND with a resistor of 470 kΩ or
less

C C

B B

（（（（

8 / Rdson

VSUS_ON<30,63 ,81,84,85,9 1,93>

））））+ （（（（

I ripple / 2

D8202

1.2V/0.1 A

R8211

1 2

10KOhm

+0.95VO POWER SUPPLY

））））

T8238

12

@

12

C8211

0.1UF/10V

1AV2000 00037

+0.95VSUS _PWRGD<92>

0.95V_FB1

1 2

1%

1 2

TPC28T

1

0.95V_E N

R8238

93.1KOHM

1 2

1 2

FB=0.704V

0.7075~0.7005V

R8205

12

10KOhm

10V2200 00003

12

C8228
39PF/50V
5% @

R8235

25.5KOh m

R8230
0Ohm

U8201A

1

PGOOD

2

TRIP

3

EN

4

VFB

5

TST

TPS51211 DSCR
R8240
470KOhm

5%

1 2

C8245

0.1UF/10V

1AV2000 00037

F=290KHz

0.95V_FB

GND
VBST
DRVH

V5IN
DRVL

12

C8226
10UF/25V

MLCC/+/-10%

21

1 2

R8234
10Ohm

1 2

Input Current:1.13A

12

C8224

10UF/25V

MLCC/+/-10%

1AV5000 00015

CE8205
560UF/2.5 V

1BV0900 00002

ESR=16mOHM

12

+5VSUS

SR8204
R0402

1 2

11
10

0.95V_B ST

9

0.95V_HG

8

0.95V_L X

SW

7
6

12

SR8208
R0603

1 2

0.95V_L G

C8243
1UF/6.3V

vx_c0402_sm all
10%

C8238

0.1UF/25V

1AV3000 00007

12

Q8202

Scott 1222

2 5 6

IRFHS8342 TRPBF

D

07V0400 00087

G

3

S

Q8201

7

4 1

2 5 6

D

G

3

S

07V040000087

IRFHS8342TRPBF

7

4 1

Q8206

D

G

3

S

4 1

2 5 6

7

12

07V040000087

IRFHS8342TRPBF

R8231

1 2

0Ohm
@

R8232

1 2

0Ohm

@

R8233

10Ohm

@

C8242
1000PF/5 0V

10%

12

12

C8246
10UF/25V

MLCC/+/-10%

T8235
TPC28T

L8201

1

1.5UH

Irat=9A
09V0300 00034

R8227

2.2Ohm
vx_r0805_h2 4_small
@

1 2

10V4400 00006

12

C8241
1500PF/5 0V
@

JP8203
SHORT_PIN

VDD_095_ FB_H <8>

VDD_095_ FB_L <8 >

@

C8247
10UF/6.3V

1AV3000 00018

U8201B

GND1
GND213GND3

TPS51211 DSCR

+AC_BAT_SYS

C8248
10UF/6.3V

1AV3000 00018

15

GND4

14

(9.104A)

+0.95VO

JP8201
1MM_OPEN _M1M2

112

(0.4A)

2

+0.95VSUS

VOUT:Typ.=1.119 V;Max.=1.133V;M in.=1.106V

C8239

12

0.1UF/10V

1UF/6.3V

C8244

10%

1AV2000 00037

@

1 2

@

+0.95VO
TDC :9.104A
Frequency :290KHz
PWR Cap. :560uF
Total Cap. :560uF
ESR :16mOHM

T8247

T8225

TPC28T

TPC28T

+0.95VO

+0.95VSUS

1

1

T8251

T8246

TPC28T

TPC28T

1

1

GND

T8237

T8252

TPC28T

TPC28T

1

1

T8243

T8236

TPC28T

TPC28T

1

1

GND

T8250
TPC28T

1

T8231
TPC28T

1

T8230
TPC28T

1

T8229
TPC28T

1

1

1

T8239
TPC28T

1

T8245
TPC28T

1

T8227
TPC28T

T8226
TPC28T

A A

POWER_ +0.95V

POWER_ +0.95V

POWER_ +0.95V

Title :

Title :

1

Title :

Engineer:

Engineer:

Engineer:

Louis

Louis

Louis

82 99Monday, March 25, 2013

82 99Monday, March 25, 2013

82 99Monday, March 25, 2013

Rev

Rev

Rev

1.3

1.3

1.3

<OrgName>

<OrgName>

<OrgName>

Size Project Nam e

Size Project Nam e

Size Project Nam e

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

5

4

3

2

1

DDR & VTT POWER SUPPLY

D D

DDR_VTTSNS

R8300
10KOhm

1%

R8301

32.4KOhm

T8304
TPC28T

1

12

C8300

@
10UF/6.3V
vx_c0603_small
20%

12

C8304

0.22UF/16V

vx_c0402_small
MLCC/+/-10%
1AV200000091

DDR_REF

Close Pin 6

12

C8305

10%

0.1UF/10V

1AV200000037

12

C8306

0.01UF/50V

1AV200000021

U8300A

1

VTTSNS

2

VLDOIN

3

VTT

4

VTTGND

5

VTTREF

TPS51216RUKR

12

GND_TPS51216

10%

+0.675VO

@

12

12

DDR_PWRGD<92>

+1.35V_DDR

12

C8303

0.1UF/10V
vx_c0402_small
10%
1AV200000037

S3

C8320

0.047UF/16V

1AV200000048

S5

C8319

0.047UF/16V

1AV200000048

@

M_VREF<18,30>

GND_TPS51216

JP8303

12

C8301
10UF/6.3V

vx_c0603_small

20%

1 2

1 2

1 2

SHORT_PIN

12

C8302
10UF/6.3V
vx_c0603_small
20%

12

@

D8300

1.2V/0.1A

vx_sod323_h37

R8318
14KOHM

12

@

D8301

1.2V/0.1A

vx_sod323_h37

R8322

56.2KOHM

1%
10V220000358

JP8301
1MM_OPEN_M1M2

+0.675VS

(0.8A)

C C

B B

2

112

SUSB#_PWR<86 ,91,93>

SUSC#_PWR<91,9 3>

1 2

SR8302

1 2

R8307
0Ohm
vx_r0402_small
@

EN/DEM Function

VDD

A A

5

GND

4

Diode-emulation

CCM

1 2

1 2

DDR_MODE

DDR_TRIP

S3

21

20

19

18S317S516

TRIP

GND2

MODE

PGOOD

VREF6GND17REFIN8VDDQSNS9PGND

DDR_FB

DDR_REFIN

GND_TPS51216

R8303
68KOhm 1%

R8304
154KOhm

1%

GND_TPS51216

S5

VBST

DRVH

SW

V5IN

DRVL

10

F=300KHz

GND_TPS51216

15

DDR_BST

14

DDR_HG

13

DDR_LX

12

DDR_V51N

11

DDR_LG

SR8303
R0603

1 2

+1.35VO

+1.35V_DDR

+0.675VS

1 2

12

SR8301
R0603

1 2

GND_TPS51216

T8317
TPC28T

1

T8314
TPC28T

1

3

SR8300

C8309
1UF/6.3V

vx_c0402_small
10%

T8316
TPC28T

1

1

T8313
TPC28T

1

1

T8301
TPC28T

1

1

+5VSUS

C8310

0.1UF/25V

12

3

T8312
TPC28T

T8309
TPC28T

T8303
TPC28T

D

G

S

Q8302

GND_TPS51216

Input Current:1.05A

12

2 5 6

D

G

3

S

Q8301

4 1

2 5 6

G

3

07V040000087

Q8303

IRFHS8342TRPBF

7

4 1

U8300B

22

GND3

23

GND4

TPS51216RUKR

T8308

T8310

TPC28T

TPC28T

1

1

T8315

T8311

TPC28T

TPC28T

1

1

07V040000087

7

IRFHS8342TRPBF

T8307
TPC28T

L8300

1.5UH

Irat=9A

@
10V440000006

@

21

12

1 2

DDR_FB

1

2 5 6

D

S

7

4 1

T8305
TPC28T

1

T8306
TPC28T

1

12

R8302

2.2Ohm
vx_r0805_h24_small
5%

12

C8307

07V040000087

IRFHS8342TRPBF

1500PF/50V
vx_c0603_small
10%

2

@

C8316

@
1500PF/50V
vx_c0402_small
MLCC/+/-10%
1AV200000095

JP8302

SHORT_PIN

R8333
10Ohm

R8326
0Ohm

@

12

CE8301
560UF/2.5V

1BV090000002

12

12

C8311

0.1UF/25V
vx_c0603_small
10%
1AV300000007

C8312

@

10UF/25V

vx_c0805_h57_small
MLCC/+/-10%
1AV500000015

CE8302
560UF/2.5V

C8321 10UF/6.3V

1BV090000002
@

VDDIO_SUS_FB_H <8>

<Variant Name>

<Variant Name>

<Variant Name>

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

+AC_BAT_SYS

12

C8313
10UF/25V
vx_c0805_h57_small
MLCC/+/-10%

@
1AV500000015

(5.6A)

+1.35VO

(5.6A)

JP8300

3mm_open_5mil_m1m2

12

C8308
1UF/6.3V
vx_c0402_small

C8322 10UF/6.3V

10%

@

+1.35VO
TDC :5.6A
Frequency :300KHz
PWR Cap. :560uF
Total Cap. :560uF
ESR :16mOHM

JP8304

3mm_open_5mil_m1m2

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

EG70KB

1

2

112

2

112

POWER_DDR & VTT

POWER_DDR & VTT

POWER_DDR & VTT

Louis

Louis

Louis

83 99Monday, March 25, 2013

83 99Monday, March 25, 2013

83 99Monday, March 25, 2013

+1.35V_DDR

Rev

Rev

Rev

1.3

1.3

1.3

A

B

C

D

E

1 1

D8400

1.2V/0.1A @

12

12

12

12

22UF/6.3V

22UF/6.3V

VSUS_ON

2 2

3 3

+1.8VS_PWRGD<92 >

4 4

1 2

R8425

0Ohm

12

C8405

0.1UF/10V

1.8V_EN

R8400

U8400A

11

GND1

10

PVIN2

9

PVIN1

8

SVIN

7

NC2

1.8V_FB 1.8V_EN

12

12

1 2

22PF/50V

R8403

C8415

0.1UF/10V

10% @

12

200KOhm 1%

1AV200000037

100KOhm

1%

C8402

6

FB

SY8063DBC

1.8V_FB_R

U8400B

SY8063DBC

NC1
LX1
LX2

GND2
GND3
GND4
GND5

1
2
3
4

PG

5

EN

12
13
14
15

1.8V_LX

C8408

C8407

C8409

0.1UF/10V

TPC28T
T8411

1

R8401

2.2Ohm
@

1 2

12

C8403
1500PF/50V
@

JP8400

SHORT_PIN

L8400
1UH

21

Irat=22A

12

22UF/6.3V

C8406

12

Input Current=1.1A

12

12

22UF/6.3V

0.1UF/10V

C8401

C8400

+1.8VO
TDC :2.444A
Frequency :1MHz
PWR Cap. :44uF
Total Cap. :44uF

TPC28T
T8414

+1.8VO

+1.8VSUS

TPC28T
T8421

1

1

TPC28T
T8417

1

TPC28T
T8420

1

(2.444A)

+1.8VO

JP8401

2

112

2mm_ope n_5mil_m1 m2

TPC28T

TPC28T

T8412

T8413

1

1

TPC28T

TPC28T

T8416

T8415

1

1

TPC28T

TPC28T

T8418

T8419

1

1

+5VO

(0.4A)

+1.8VSUS

110301

<Variant Name>

<Variant Name>

5 5

A

B

C

D

<Variant Name>

Title :

Title :

Title :

POWER_+1.8VS

POWER_+1.8VS

Engineer:

Engineer:

Size Project Name

Size Project Name

Size Project Name

B

B

B

Date: Sheet of

Date: Sheet of

Date: Sheet of

Engineer:

EG70KB

POWER_+1.8VS

Louis

Louis

Louis

84 99Monday, March 25, 2013

84 99Monday, March 25, 2013

84 99Monday, March 25, 2013

E

Rev

Rev

Rev

1.3

1.3

1.3

5

4

3

2

1

1.5VSUS POWER SUPPLY

D D

(80mA)

D8500

1.2V/0.1A @

12

VSUS_ON<30,63,81 ,82,84,9 1,93>

C C

1 2

R8500

0Ohm

12

C8500

0.1UF/10V

1.5V_SHDN#

+3VO

12

C8501

2.2UF/6.3V

1AV3000 00020

06V0600 00003

G923-470 T1UF

3

IN

2

GND

1

SHDN#

U8500

OUT

SET

4

5

1.5V_SET

R8501
20KOhm

10V2200 00036

1 2

R8502
100KOhm

10V2200 00004

1 2

12

C8502

2.2UF/6.3V

1AV3000 00020

Input Current 0.05A

+1.5VSUS_O

JP8500
1MM_OPEN_M1M2

2

112

(80mA)

+1.5VSUS

B B

A A

5

4

3

<Variant Na me>

<Variant Na me>

<Variant Na me>

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

2

POWER_1.5VSUS

POWER_1.5VSUS

POWER_1.5VSUS

Louis

Louis

Louis

EG70KB

EG70KB

EG70KB

1

Rev

Rev

Rev

1.3

1.3

85 99Monday, March 2 5, 2013

85 99Monday, March 2 5, 2013

85 99Monday, March 2 5, 2013

1.3

A

B

C

D

E

+1.5VS_POWER SUPPLY

C8607

2.2UF/6.3V

vx_c0603_small
1AV300000020

U8600A
TPS51363R VET_7VIA

VIN115VIN216VIN3

14
13
12
11
10

1.5V_BST_R

SR8600

R0402

/VGA

10%

1.5V_LX

(0603) X7R 10%

U8600B

30

GND3

31

GND4

32

GND5

33

GND6

TPS51363R VET_7VIA

/VGA

12

C8613

0.1UF/25V

12

/VGA

+5VO

TPS51362

TPS51367

TPS51367

C8601
1500PF/50V
MLCC/+/-10%

10%

GND9
GND8
GND7

12

@12C8606

10UF/25V

MLCC/+/-10%

36
35
34

TRIP

GND

5V

Float

/VGA

T8609
TPC28T

1

R8606

2.2Ohm
@

1 2
12

C8603
1500PF/50V
@

OCL

8A

12A

16A

1.5V_GSNS

Input Current 0.81A

12

12

C8604

C8600

10UF/25V

10UF/25V

/VGA

@

L8601

0.68UH

/VGA

+AC_BAT_SYS

21

JP8602
SHORT_PIN

1 2

12

@

1.5V_VSNS

(4.672A)

12

C8610

22UF/6.3V

@

JP8600
SHORT_PIN

1 2

+1.5VO

12

12

C8602

C8609

C8614

22UF/6.3V

22UF/6.3V

/VGA

@

JP8601
1MM_OPEN_M1 M2

2

12

12

C8611

C8608

22UF/6.3V

22UF/6.3V

/VGA

22UF/6.3V

/VGA

+1.5VS

112

(4.672A)

1 1

C8615

0.01UF/50V

10%
vx_c0402_small
1AV200000021

Vref = 2.0V

REFIN = GND , Vout = 1.05V

D8600

/VGA

2 2

SUSB#_PW R<83,91,93>

3 3

1.2V/0.1A

1 2

R8601
10KOhm 1%

/VGA

12

Enable

12

C8612

0.1UF/25V

1AV300000007

/VGA

REFIN = FLOAT ,Vout = 1.2V

R8603

1 2

34.8KOhm

10V22000006 1

/VGA

1.5V_REFIN

R8600

110KOHM

10V22000017 8

/VGA

1.5V_VREF

12

C8605

0.1UF/10V

vx_c0402_small

1AV200000024

/VGA

+5VO

10%

24
25
26
27
28
29

/VGA

R8602
0Ohm
@

1 2

REFIN2
REFIN
VREF
RA
EN
GND2

23

MODE

GND

Float

5V

12

12

/VGA

/VGA

1.5V_SLEW

17V518

19

20

21

22

TRIP

VSNS

GND1

SLEW

GSNS

PGND5
PGND4
PGND3
PGND2
PGND1

PGOOD1LP#2MODE3NC4BST5SW16SW27SW38SW4

R8604

1 2

1.5V_BST

4.7Ohm

10V34000001 3

/VGA

1.5V_MODE

Fsw

400KHz

800KHz

1MHz

1.5V_VDD

9

T8601

T8600

T8606

T8608

T8607

TPC28T

TPC28T

4 4

12

C8617
10UF/6.3V

vx_c0603_small
20%

/UMA

C

+1.5VO_LDO

12

C8620
10UF/6.3V
vx_c0603_small
20%

@

T8611
TPC26T

1

T8613
TPC26T

1

JP8603
1MM_OPEN_M1 M2

2

112

+1.5VS

T8610
TPC26T

1

0.88A

T8612
TPC26T

1

+1.5VS

D

+5VO

12

+1.8VO

12

D8601

@

1.2V/0.1A

SUSB#_PW R

5 5

A

1 2

R8608
30KOhm 1%

vx_r0402_small

/UMA

12

C8619

0.1UF/25V 1 0%

vx_c0603_small
1AV300000007

/UMA

R8611

2.2Ohm

0.05
vx_r0805_h24_ small

1.5V_LDO_VDD

/UMA

12

C8616
1UF/25V

vx_c0603_small
10%

/UMA

B

Input current=0.92A

4

VDD

3

VIN

2

EN

1

12

C8618
10UF/6.3V

vx_c0603_small
20%

/UMA

PGOOD

U8601
RT9042-25GSP

/UMA

Vref=0.8V

VOUT

GND1
GND2

NC

ADJ

12

12

R8609

C8621

9.31KOhm

5

vx_r0402_small

6

1%

7

10V22000017 1

8

/UMA

12

9

R8610

10.5KOHM

vx_r0402_small

GND

1%
10V22000023 8

/UMA

@
56PF/50V
vx_c0402_small
5%

+1.5VO

TPC28T

1

1

1

+1.5VS

GND

<Variant Name>

<Variant Name>

<Variant Name>

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

TPC28T

1

T8603
TPC28T

1

TPC28T

1

T8604
TPC28T

1

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

EG70KB

EG70KB

EG70KB

E

T8602
TPC28T

1

T8605
TPC28T

1

POWER_+1.5V

POWER_+1.5V

POWER_+1.5V

Louis

Louis

Louis

86 99Monday, March 25, 2013

86 99Monday, March 25, 2013

86 99Monday, March 25, 2013

Rev

Rev

Rev

1.3

1.3

1.3

5

4

VGA_CORE POWER SUPPLY

3

2

1

D D

VGA_SLP<71>

1 2

DGPU_PWROK<9,92>

VGA_VRON_PWR<91,93>

C C

1 2

CSN1

SR8705 R0402

1 2

CSP1

SR8702 R0402

33PF/50V

C8742

12

12

C8740
33PF/50V

5%

5%

@

@

R8742 PLACE NEAR Q8704

R8731
10Ohm

12

B B

VDDC_RTN<75>
VDDC_SEN<75>

+VDDC_VGA_O

A A

1%

/VGA

R8728 0Ohm

1 2
1 2

R8735 0Ohm

R8772
10Ohm

1%

/VGA

5

/VGA

/VGA

12

GPU_VID7_6<71>
GPU_VID7_5<71>
GPU_VID7_4<71>
GPU_VID7_3<71>
GPU_VID7_2<71>
GPU_VID7_1<71>
GPU_VID7_0<71>

D8700

1.2V/0.1A

R8794

/VGA

1 2

1KOhm

10V220000002

/VGA

IMON_VGA<30>

SR8701 R0402

12

12

C8700

0.1UF/10V

1AV200000037

/VGA

12

R8742
100KOhm

1%

/VGA

+3VS_VGA

VGA_VREF

1.7V

R8736

4.02KOhm

/VGA

R8733

56Ohm

1%

/VGA

VGA_VREF

C8715

0.22UF/6.3V

1 2

/VGA

12

12

VGA_THAL#

VGA_V5FILT

VGA_VREF

C8726

4700PF/25V

/VGA

12

3300PF/25V

10%

/VGA

12

C8723

C8717

1 2

680PF/50V

/VGA

1 2

1
2
3
4
5
6
7
8
9

10

1 2

/VGA

1 2

42
43
44
45

4

R8791

0Ohm

/VGA

R8714 127KOhm

/VGA

4.22KOhm

/VGA

PU
GND1
CSP2
CSN2
CSN1
CSP1
GFB
VFB
THRM
THAL#

/VGA

R8705

23.2KOhm

U8700B

GND3
GND4
GND5
GND6

TPS51728RHAR

/VGA

R8703 47KOhm 1%

1 2

@

12

C8734

2.2UF/6.3V

1 2

/VGA

R8710

1 2

VGA_V5FILT

VGA_DROOP

36

37

38

39

40

41

VREF

GND2

SLEW

V5FILT

DROOP

U8700A
TPS51728RHAR

IMON11SLP12PCNT13VID614VID515VID416VID317VID218VID119VID0

VGA_SLP

VGA_PCNT

GPU_VID7_5

GPU_VID7_6

VGA_V5FILT

12

R8722
0Ohm

R8739

/VGA

0Ohm

/VGA

1 2

SR8706
R0402

12

R8740

R8715

15.4KOHM

0Ohm

@

@

1 2

VGA_VRON

31

32

33

34EN35

PG#

PGD

TONSEL

GPU_VID7_1

GPU_VID7_4

GPU_VID7_3

GPU_VID7_2

30

DRVH2

29

OSRSEL

TRIPSEL

VBST2

28

LL2

27

DRVL2

26

VGA_V5IN

V5IN

25

PGND

24

VGA_LG1

DRVL1

23

VGA_LX1

LL1

22

VGA_VBST1

VBST1

21

VGA_HG1

DRVH1

20

GPU_VID7_0

SR8703
R0402

+5VS

/VGA

/VGA

1 2

12

12

R8720
0Ohm

C8722

2.2UF/6.3V

1 2

C8712
1UF/25V

10%

/VGA

3300PF/25V 10%

CSP1

CSN1

C8745

12

C8735

1000PF/50V

5
D

Q8703

S

G

12

876

123

54

Q8704

5
D

S

0.015UF/25V

54

Q8700

/VGA

876

5
D

S

G

123

SIRA14DP-T1-GE3

/VGA

123

C8736

SIRA14DP-T1-GE3

/VGA

54

Q8701

876

876

5
D

G

SIRA10DP-T1-GE3

/VGA

12

/VGA

1 2

12

S

123

SIRA10DP-T1-GE3

/VGA

R8706
30KOhm

1%

1 2

/VGA

R8737
100KOhm

/VGA

1%

1 2

/VGA

54

G

@

Input Current 2.7A

12

12

C8720

C8731

10UF/25V

MLCC/+/-10%

0.1UF/25V
10%

/VGA

@

12

DCR = 1.3m OHM

JP8705
SHORT_PIN

1 2

R8730

2.2Ohm

@ 5%

C8714
1500PF/50V

10%
@

R8716

24.9KOhm

/VGA

12

R8741

56.2KOHM

12

/VGA

L8701

0.36UH

Irat=60A

/VGA

JP8701
SHORT_PIN

C8703
10UF/25V

MLCC/+/-10%

R8737 PLACE NEAR L8701

3

2

VGA_V5FILT

R8793
0Ohm

/VGA

VGA_SLP

1 2

12

R8790
10KOhm
@

VGA_SLP VO_action

+VDDC_VGA_O

+AC_BAT_SYS

12

12

C8741

C8733

10UF/25V

10UF/25V

MLCC/+/-10%

MLCC/+/-10%

/VGA

/VGA

T8704

12

+

CE8703
560UF/2.5V

1BV090000002

/VGA

TPC28T

1

21

1 2

T8707

T8706

T8705

TPC28T

TPC28T

TPC28T

1

1

1

12

12

+

CE8701
560UF/2.5V

1BV090000002

/VGA

+VGA_VCORE_O
TDC :21. 6A
Frequency :300 KHz
PWR Cap. :112 0uF
Total Cap. :112 0uF
ESR :8mO HM

VGA_PCNT

L

1 Phase DCMH

1 Phase CCMH H

(21.6A)

JP8706

2

112

3mm_open_5mil_m1m2

JP8707

2

112

3mm_open_5mil_m1m2

JP8700

2

112

3mm_open_5mil_m1m2

JP8708

2

112

3mm_open_5mil_m1m2

JP8702

2

112

3mm_open_5mil_m1m2

+

CE8704
560UF/2.5V
@

<Variant Name>

<Variant Name>

<Variant Name>

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

12

C8702

0.1UF/25V
@

C8744 10UF/ 6.3V

C8743 10UF/6.3V

/VGA

/VGA

1

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

EG70KB

EG70KB

EG70KB

+VDDC_VGA

POWER_VGACORE

POWER_VGACORE

POWER_VGACORE

Louis

Louis

Louis

Rev

Rev

Rev

1.3

1.3

1.3

87 99Monday, March 25, 2013

87 99Monday, March 25, 2013

87 99Monday, March 25, 2013

5

4

3

2

1

BATTERY CHARGER

TPC28T

D D

C C

B B

A A

+A/D_DOCK_ IN<63>

TPC28T

1

+A/D_DOCK_ IN

TPC28T

1

T8821

T8820

T8823

T8822

TPC28T

1

1

R8801

2.2ohm

RES FILM 2 .2 ohm 1/2W 1206 5%
10V5400 00007

9/22

+BAT

R8807
2MOHM

(0402)5%

ACDRV

T8824
TPC28T

+A/D_DOCK_ IN

1

12

C8802
2200PF/5 0V

1 2

12

C8801

2.2UF/25V

MLCC/+/-10%
MLCC 2.2UF /25V (1206) X 7R 10%

5%

R8805
1MOhm

RES 1M OH M 1/16W (0 402) 5%
10V2400 00006

1AV2000 00026

MLCC 2200PF/50V(0402) X7R 10%

R8803
432KOhm

RES 432K OHM 1/16W (0402) 1%
10V2200 00320

1 2

AC_IN_OC<3 0,71>

C8825

R8804

0.1UF/10V

68KOhm

1 2

RES 68K OHM 1/16W (0402) 1%

1AV2000 00024

10V2200 00168

1 2

Change R8817 change to 10ohm

D8801

1

3

CHG_VCC_R

2

0.8V/0.2 mA

AC_IN_OC

9/5

12

R8820
100KOhm

Scott 1229

1%

3

D

12

Q8803

1

12

G

S

2

5%

1 2

5

2N7002

C8830

MLCC 0.02 2UF/16V(0402 )X7R 10%
1AV2000 00027

Q8800

8
7
6
5

G

IRF8707P BF

07V0400 00099

CHG_LDO

R8813
10KOhm

AC_IN_OC

1/16W (0402) 1%
1%

1 2

R8814

12.4KOHM

RES 12.4 K OHM 1/16W (0402) 1%
1%
10V2200 00278

1 2

1 2

CHG_VCC

R8817
22Ohm

RES 22 O HM 1/8W(08 05)5%

10V4400 00007

SR8804

1 2

R0402

0.022UF/1 6V

1

SD

2
3
4

C8803

0.1UF/10V

MLCC 0.1UF /10V (0402) X 5R 10%
1AV2000 00037

R8802

4.02KOh m

RES 4.02 K OHM 1/10W (0603)1%

1 2

10V3200 00061

1%

ACDRV

+3VA

BAT_LEARN<3 0>

RES 150K OHM 1/16W (0402)1%

1 2

R8815
316KOhm

1%

1/16W (0402) 1%

1 2

R8816
150KOhm

1%

1 2

10V2200 00024

1 2

1%

Q8802

1

8

S D

2

7

3

6
5

4

G

IRF8707P BF

07V0400 00099

R8806

4.02KOh m

RES 4.02 K OHM 1/10W (0603)1%
10V3200 00061

AD_IINP <30>

SMB0_DAT<30 ,63>

SMB0_CLK<3 0,63>

12

C8821

10%

0.01UF/50 V

1AV2000 00021

4

1 2

BATG

C8820
100PF/50 V

1 2

1 2

(0402) NPO 5%

SR8802

R0402
SR8803

R0402

C8814

0.1UF/25V

MLCC 0.1UF /25V(0603) X 7R 10%

1 2

1AV3000 00007

3

4

5

ACOK

ACDRV

CMSRC

6

ACDET

7

IOUT

8

SDA

9

SCL

10

ILIM

BATDRV11SRN12SRP13GND114LODRV

R8809

12

4.02KOh m

RES 4.02 K OHM 1/10W (0603)1%
10V3200 00061

R8808

RES 10m OHM 1W (12 06) 1%

1 2

10mOhm

12

JP8800
SHORT_PIN

C8806

1 2

0.1UF/10V

MLCC 0.1UF /10V (0402) X 5R 10%
1AV2000 00037

U8800A
BQ24725 RGRR

06V3700 00001

1

2

ACP

ACN

21

GND2

20

VCC

19

PHASE

18

HIDRV

17

BTST

16

REGN

C8824
1UF/25V

(0603) X5 R 10%

15

CHG_LG

+AC_BAT_SYS

12

12

C8828
10UF/25V

MLCC/+/-10%

JP8802

1AV5000 00015

SHORT_PIN

C8805

0.1UF/25V

1 2

MLCC 0.1UF /25V(0603) X 7R 10%
1AV3000 00007

12

C8819

0.47UF/25 V

MLCC 0.47 UF/25V (0603 ) X5R 10%
1AV3000 00032

3

CHG_VCC

C8810

3

0.047UF/1 6V

MLCC 0.04 7UF/16V (040 2)X7R 10%
1AV2000 00048

D8800

0.8V/0.2 mA

1

2

U8800B
BQ24725 RGRR

GND3
GND4
GND5
GND6

06V3700 00001

CHG_LX
CHG_HG

1 2

CHG_BST

SR8801
R0603

12

CHG_LDO

SCHOTTKY COMMON CATHODE SOT323

C8813
1000PF/5 0V
10%
vx_c0402_sm all
@

1 2

1 2

EMI Request,Close Q8828

2 5 6

D

G

3

S

Q8804

4 1

12

10%

22

1 2
23
24
25

Q8805

SR8800
R0603

2 5 6

D

G

3

S

4 1

Q8801

1

8

SD

2

7

3

6
5

4

G

IRF8707P BF

07V0400 00099

C8829
1000PF/5 0V
10%
vx_c0402_sm all
@

C8822

1000PF/5 0V

IRFHS8342TRPBF

7

7

MLCC 0.1UF /25V(0603) X 7R 10%

12

12

IRFHS8342TRPBF

C8808

0.1UF/25V

1AV3000 00007

L8800

4.7UH

Irat=5.5A

R8819

2.2Ohm

C8826
1500PF/5 0V

(0603)X7R 10%

BATG

Input current=1.6A

12

12

C8817
10UF/25V

MLCC/+/-10%

MLCC 10UF/ 25V (0805) X 5R 10%
1AV5000 00015

R8810
10mOhm

(1206) 1%

21

1 2

12

JP8804
SHORT_PIN

1 2

C8807

0.1UF/10V

MLCC 0.1UF /10V (0402) X 5R 10%

12

1AV2000 00037

R8811
0Ohm

1 2

10V3400 00001

2

R8818

C8816

0.01UF/50 V

1 2

MLCC 0.01 UF/50V(0402)X 7R 10%
1AV2000 00021

12

C8818
10UF/25V
MLCC/+/-10%

MLCC 10UF/ 25V (0805) X 5R 10%
@
1AV5000 00015

560KOhm
@

1 2

RES 560K OHM 1/16W (0402)5%

10V2400 00037

12

C8823

0.1UF/25V
10% @

12

JP8803
SHORT_PIN

12

R8812
0Ohm

RES 0 OHM 1/10W (06 03) JUMP
10V3400 00001

+BAT+A/D_DOCK_ IN_Q +A/D_DOCK_IN _Q_Q

1 2

+AC_BAT_SYS

+AC_BAT_SYS

1AV3000 00007

C8812

12

12

C8811

MLCC/+/-10%

10UF/25V

10UF/25V

MLCC/+/-10%

1AV5000 00015

1AV5000 00015

C8809

0.1UF/25V

MLCC 0.1UF /25V(0603) X 7R 10%

1 2

1AV3000 00007

JP8805

2

112

3mm_open _5mil_m1m 2

C8827
1000PF/5 0V

(0402) X7 R 10%

JP8801

2

112

3mm_open _5mil_m1m 2

EMI Request,Close Q8806

+BAT

+BAT

12

C8815
10UF/25V

MLCC/+/-10%

1AV5000 00015

<Variant Name>

<Variant Name>

<Variant Name>

Size Project Nam e

Size Project Nam e

Size Project Nam e

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

T8808
TPC28T

1

T8816
TPC28T

1

T8800
TPC28T

1

T8804
TPC28T

1

T8809
TPC28T

1

T8815
TPC28T

1

1

T8801
TPC28T

1

T8805
TPC28T

1

+BAT_CON

Engineer:

Engineer:

Engineer:

EG70KB

TPC28T
T8802

1

TPC28T
T8806

1

TPC28T
T8810

1

TPC28T
T8818

1

Title :

Title :

Title :

T8811
TPC28T

1

T8817
TPC28T

1

+BAT_CON

T8813

T8803

TPC28T

TPC28T

+BAT_CON

1

1

T8812

T8807

TPC28T

TPC28T

+BAT

1

1

T8814
TPC28T

1

T8819
TPC28T

+AC_BAT_SYS

1

POWER_CHARGER

POWER_CHARGER

POWER_CHARGER

Louis

Louis

Louis

88 99Monday, March 25 , 2013

88 99Monday, March 25 , 2013

88 99Monday, March 25 , 2013

Rev

Rev

Rev

1.3

1.3

1.3

5

D D

C C

4

3

2

1

B B

A A

POWER

POWER

1

POWER

Louis

Louis

Louis

89 94Monday, March 25, 2013

89 94Monday, March 25, 2013

89 94Monday, March 25, 2013

Rev

Rev

Rev

1.3

1.3

1.3

Title :

Title :

Title :

Engineer:

Engineer:

<OrgName>

<OrgName>

<OrgName>

Size Project Name

Size Project Name

Size Project Name

B

B

B

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

5

4

3

2

1

BATTERY IN DETECT

D D

JP9023
SHORT_PIN

12

TS1#<63> BAT1_IN_OC# <30>

C C

B B

A A

<Variant Name>

<Variant Name>

<Variant Name>

POWER_DETECT

POWER_DETECT

POWER_DETECT

Title :

Title :

Title :

Louis

Louis

Engineer:

Engineer:

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet

Date: Sheet of

5

4

3

2

Date: Sheet of

Engineer:

EG70KB

Louis

Rev

Rev

Rev

1.3

1.3

1.3

of

90 9 9Monday, March 25, 2013

90 9 9Monday, March 25, 2013

1

90 9 9Monday, March 25, 2013

5

4

3

2

1

SUSB#_PWR POWER

Q9116
IRFML8244TRPBF

07V040000094

S

D

3

+3VO

D D

+0.95VO

5 4

+5VO

+1.8VO

C C

+12VSUS

SUSB#_PWR

SUSB_EC#<30,63,92>

SUSB#_PWR<83,86,93>

SUSC_EC#<30,63>

+5VO

SUSC#_PWR<83,93>

VSUS_ON POWER

@

3

Q9120
IRFML8244TRPBF

12

C9128
47PF/50V
vx_c0402_small
5%

B B

G

1

Q9119

8
7

S

6

D

5

G

SIRA10DP-T1-GE3

07V040000101

Q9117
IRFML8244TRPBF

D

3

G

1

Q9118
IRFML8244TRPBF

D

3

G

1

Q9107

47K

47K

1 2 3

68@-5mA/Vceo=+/-50V

SR9118

1 2

R0603(1KOhm)

SR9120

1 2

R0603(1KOhm)

JP9100

2

112

2mm_open_5mil_m1m2

S

D

2

VGS= 4.5V , Rdson = 41mOhm

G

1

VGS= 10V , Rdson = 24mOhm

@

+5VSUS_SW_R

C9129

0.1UF/25V
vx_c0603_small
1AV300000007

2

1
2
3

07V040000094

S

2

07V040000094

S

2

ECC

B B

47K

E

12

@

12

C9105

0.22UF/16V

1AV200000091

12

C9107

0.1UF/25V

1AV300000007

C9109

12

0.033UF/16V

10%
1AV200000032

C9121

12

0.033UF/16V

10%
1AV200000032

46

10K

12

R9125

vx_r0402_small

1KOhm

10V220000002
@

1 2

R9106
34KOhm

1 2

R9107
34KOhm

10%

1 2

R9108

33.2KOhm

1 2

R9116

33.2KOhm

12

R9109
100KOhm

1%

T9107
TPC26T

1

C9127

0.1UF/10V
vx_c0402_small
1AV200000037
@

T9121
TPC26T

1

T9103
TPC26T

1
12

12

C9104

0.1UF/10V

X5R/+/-10%

1AV200000037

12

C9106

0.1UF/10V

X5R/+/-10%
1AV200000037

12

C9108

0.1UF/10V

X5R/+/-10%
1AV200000037

12

C9122

0.1UF/10V

X5R/+/-10%
1AV200000037

VGA_PWRON<9,63>

VGA_VRON_PWR<87,93>

+5VSUS

(2.53A)

TPC26T
T9137

1

TPC26T
T9139

1

+3VS

(3.785A)

+0.95VS

(5.28A)

+5VS

(3.22A)

+1.8VS

(1.2A)

+12VS

(0.040A)

Scott 1222

1 2

R0603(1KOhm)

+3VO

+5VO

+12VSUS

+0.95VO

+3VO

SR9119

+1.8VO

+1.5VO

+12VSUS

1 2

R9124
560KOhm
vx_r0402_small
5%

@

1 2

R9103
560KOhm
vx_r0402_small
5%

@

61

2

@

5

Q9112A
UM6K1N

34

Q9112B
UM6K1N

@

4

+12VSUS

A A

VSUS_ON<30,63,81,82,84,85,93>

+5VA

5

VGA_VRON_PWR

121015

SUSB#_PWR

PM_PWROK<9,30>

Q9101
IRFML8244TRPBF

D

3

Q9102
IRFML8244TRPBF

D

3

SUSC#_PWR

VGA_VRON_PWR_PWR POWER

R9118
0Ohm / VGA

1 2

R9117
0Ohm

1 2

@

VGA_VRON_PWR

3

SUSC#_PWR POWER

07V040000094

S

2

G

1

@

07V040000094

S

2

G

1

@

Q9113

8
7
6

D

5

5 4

SIRA10DP-T1-GE3

07V040000101

/VGA

Q9111
IRFML8244TRPBF

D

3

/VGA

Q9110

8
7
6
5

SI4134DY-T1-GE3

/VGA

Q9114

8
7

S

6

D

5

5 4

SIRA10DP-T1-GE3

07V040000101

/VGA

R9120
0Ohm /VGA

1 2

R9121

1 2

0Ohm @

1
2

S

3

G

S

2

G

1

1

SD

2
3
4

G

1
2
3

G

12

12

ECC

47K

B B

47K

47K

E

1 2 3

Q9103
68@-5mA/Vceo=+/-50V

@

/VGA

C9113

0.22UF/16V

1AV200000091

C9111

0.033UF/16V

10%
1AV200000032

Q9109

47K

47K

1 2 3

68@-5mA/Vceo=+/-50V

/VGA

C9102

0.1UF/25V

1AV300000007

@

C9103

0.033UF/16V

10%
1AV200000032

@

46

10K

12

12

/VGA

12

12

/VGA

ECC

B B

47K

E

1 2

C9119

0.047UF/16V

1AV200000048

C9116

0.22UF/16V

1AV200000091

/VGA

46

10K

5

UM6K1NG1DTN

07V040000035

1 2

R9101
10KOhm

@

10%

R9104
10KOhm

@

+3VO

/VGA

Q9115B

G

/VGA

1 2

R9113

10KOhm

1 2

1 2

R9119
10OHM

R9100
100KOhm

34

D

S

R9115

47KOhm

/VGA

/VGA

R9112

34KOhm

/VGA

R9110

47KOhm

/VGA

2

12

C9101

0.1UF/10V

X5R/+/-10%
1AV200000037

@

12

C9110

0.1UF/10V

X5R/+/-10%
1AV200000037

@

+3V

(1.11A)

+5V

(0.032A)

Change R9101 R9104 from 10ohm to 10Kohm

12

R9105
100KOhm

1%

@

12

1 2

/VGA

/VGA

61

Q9115A

G

UM6K1NG1DTN

07V040000035

/VGA

12

R9111
100KOhm

vx_r0402_small
1%

D

S

2

/VGA

12

C9120

0.1UF/10V

vx_c0402_small
X5R/+/-10%
1AV200000037

/VGA

12

C9115

0.1UF/10V

vx_c0402_small
X5R/+/-10%
1AV200000037

/VGA

12

C9114

0.1UF/10V

vx_c0402_small
X5R/+/-10%
1AV200000037

/VGA

12

C9112

0.1UF/10V

vx_c0402_small
X5R/+/-10%
1AV200000037

+12V

+0.95VS_VGA

(3.424A)

+3VS_VGA

(0.02A)

+1.8VS_VGA

(0.844A)

+1.5VS_VGA

(3.792A)

+12VS_VGA

POWER_LOAD SWITCH

POWER_LOAD SWITCH

POWER_LOAD SWITCH

Title :

Title :

<OrgName>

<OrgName>

<OrgName>

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

Title :

Engineer:

Engineer:

Engineer:

EG70KB

1

Louis

Louis

Louis

91 99Monday, March 25, 2013

91 99Monday, March 25, 2013

91 99Monday, March 25, 2013

Rev

Rev

Rev

1.3

1.3

1.3

5

D D

4

3

2

1

POWER GOOD DETECTER

0518
JEN

FORCE_OFF_PW R <81>

FORCE_OFF# <47 >

34

D

Q9201B
UM6K1NG1DTN

07V040000035

S

G

U9200

A

B

GND

Vcc=2~5.5
@

VCC

Y

ALL_SYSTEM_PW RGD <30>

+3VSUS

5

SUSB_EC#<30,63,91>

10/09

12

D9201

R9202

1.2V/0.1A

560KOhm

5%

5

12

C9201

D

4.7UF/6.3V

10%

S

UM6K1NG1DTN

07V040000035

Q9201A

2

1 2

61

G

+3VS+3VSUS

SUSB_EC#

R9201

100KOhm

10V220000004

Scott 1222

C C

SUS_PW RGD<30,81>

+0.95VSUS_PW RGD<82>

1 2

SR9200
R0402

R9206

100KOhm

10V220000004

D9202

1.2V/0.1A

12

Scott 1222

R9205
100KOhm

10V220000004

@

1

2

3 4

1 2

R9212 0Ohm

DDR_PW RGD<83>

+1.8VS_PW RGD< 84>

DGPU_PW ROK<9,87>

B B

1 2

SR9201
R0402

1 2

SR9202
R0402

R9211 0O hm

@

12

+3VS

A A

VRM_PW RGD<30,80>

NB_PWR GD<8 0>

5

Scott 1222

1 2

SR9205
R0402

1 2

SR9207
R0402

R9210
100KOhm

10V220000004

D9203

1 2

4

1.2V/0.1A

ALL_SYSTEM_PW RGD

POWER_PROTECT

POWER_PROTECT

POWER_PROTECT

Title :

Title :

<OrgName>

<OrgName>

<OrgName>

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

Title :

Engineer:

Engineer:

Engineer:

EG70KB

1

Louis

Louis

Louis

92 9 9Monday, March 25, 2013

92 9 9Monday, March 25, 2013

92 9 9Monday, March 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

5

4

3

2

1

+AC_BAT_SYS

+3VA

+RTC_POWER

D D

+5VA

+AC_BAT_SYS <37,55,80 ,81,82,83,86,87,88>

+3VA <9,11,30,42,63,65,81,88>

+RTC_POWER <81>

+5VA <30,66,81,91>

FOR POWER TEST

+5VO

+3VO

+3VSUS

+5VSUS

+12VSUS

+12V

+12VS

+3V

C C

B B

+3VS

+3VS_VGA

+5V

+5VS

+0.95VO

+0.95VSUS

+1.8VO

+1.8VSUS

+1.8VS_VGA

+0.675VS

+0.675VO

+1.35VO

+5VO <61,81,84,86,91>

+3VO <55,81,85,91>

+3VSUS <9,10,11,12,28,30,33,61,81,92>

+5VSUS <30,60,61,63,65,66,82,83,91>

+12VSUS <33,60,81,91>

+12V <91>

+12VS <28,39,41,63,91>

+3V <37,63,65,91>

+3VS <9,10,11,16,17,28,30,33,37,38,39,40,41,42,47,48,50,55,60,63,65,66,91,92 >

+3VS_VGA <63,70,71,75,77,87,91>

+5V <18,91>

+5VS <30,38,39,41,48,50,60,63,66,80,87,91>

+0.95VO <82,91>

+0.95VSUS <11,82>

+1.8VO <84,86,91>

+1.8VSUS <9,11,84>

+1.8VS_VGA <63,71,72,74,75,76,91>

+0.675VS <16,17,63,83>

+0.675VO <83>

+1.35VO <83>

+3VA

JP9300

112

SGL_JUMP
@

JP9301

112

SGL_JUMP
@

JP9302

112

SGL_JUMP
@

JP9303

112

SGL_JUMP
@

JP9304

112

SGL_JUMP
@

2

2

2

2

2

CPU_VRON_PWR <80>

SUSB#_PWR <83,86,91>

SUSC#_PWR <83,91>

VSUS_ON <30,63,81,82 ,84,85,91>

VGA_VRON_PWR <87,91>

+1.35V_DDR

+1.5VSUS

+1.5VS

+0.95VS_VGA

+VDDCR_CPU

+VDDCR_NB

A A

+VDDC_VGA

+BAT

+BAT_CON

5

+1.35V_DDR <7,11,16,17,18,63,83>

+1.5VSUS <11,85>

+1.5VS <11,41,55,63,86>

+0.95VS_VGA <63,70,72,75,76,91>

+VDDCR_CPU <11,63,80>

+VDDCR_NB <1 1,63,80>

+VDDC_VGA <63,75,87>

+BAT <88>

+BAT_CON <63,88>

4

<Variant Name>

<Variant Name>

<Variant Name>

POWER_SIGNAL

POWER_SIGNAL

POWER_SIGNAL

Title :

Title :

Title :

Louis

Louis

Engineer:

Engineer:

Size Project Name

Size Project Name

Size Project Name

B

B

B

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

Engineer:

EG70KB

Louis

Rev

Rev

Rev

1.2

1.2

93 99Monday, March 25, 2013

93 99Monday, March 25, 2013

93 99Monday, March 25, 2013

1

1.2

5

4

3

2

1

GPU POWER SEQUENCE NOTICE:

T5:All power rails stable to PERSTB inactive should be more than 100ms.

T6:All power rails should be less 20ms.

D D

T7:PCIE_CLK stable before PERSTB inactive should be more than 100 s.

μ

VGA_VRON_PWR

(APU to PWR)

+1.5VS_VGA

(PWR to GPU)

T1

+3VS_VGA

C C

(PWR to GPU)

+0.95VS_VGA

T1=0.649ms

T2

T2=0.009ms

(PWR to GPU)

T3

+VDDC_VGA

T3=1.691ms

(PWR to GPU)

T4

+1.8VS_VGA

T4=3.58ms

(PWR to GPU)

DGPU_PWROK

B B

(PWR to APU)

PERSTB

T5

T5>100ms

(APU to GPU)

PCIE_CLK

(APU to GPU)

T6 T6<20ms

A A

5

4

T7 T7>100 s

μμμμ

Title :

Title :

Title :

Engineer:

Engineer:

PEGATRON UNIHAN

PEGATRON UNIHAN

PEGATRON UNIHAN

Size Project Name

Size Project Name

Size Project Name

A

A

A

Date: Sheet of

Date: Sheet of

3

Date: Sheet of

‧

‧

‧

EG70_KB

EG70_KB

EG70_KB

2

Engineer:

GPU_POWER_SEQUENCE

GPU_POWER_SEQUENCE

GPU_POWER_SEQUENCE

Corey

Corey

Corey

Rev

Rev

Rev

1.2

1.2

1.2

94 99Monday, March 25, 2013

94 99Monday, March 25, 2013

94 99Monday, March 25, 2013

1

5

4

3

2

1

Screw G x 1 Fix Hole H x 1

PWR_H3

1

GND4
GND3
GND2

5
4
3

CT197D118N

PWR_GND

LID_SW#_PWR

PWRLED_ON#_PWR

PWR_SW#_PWR

Power Button

PWR_GND

POWER Button LED

PWRLED_ON#_PWR

PWR_SW01
TACT_SWITCH_4P

GND2

34

12

GND1

5 6

12V09SBSM032

/0409-12

+5VSUS_PWR

12

+

PWR_LED1
BLUE

07V130000054

PWR_R02

1.5KOhm

1 2

LID Switch

LID_SW#_PWR

PWR_D4

12

@

PWR_GND

12

12

PWR_C01
47PF/50V

PWR_R05
100KOhm

+3VA_PWR

PWR_C02 0.1UF/16V

12

PWR_D5

PWR_U01

1

2

1 2

Vdd

OUTPUT

AH180-WG-7

06V340000001

GND

Notice: we will use P/N: 0634- 000H000

3

PWR_GND

PWR_H2

1

C276D110

D D

PWR_GND

Screw F x 1

PWR_H1

1

NP_NC1

2

2

DO142X118_DO189X110N

T-SH00001489

C C

+3VA_PWR

PWR_CON01

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

HOTBAR_10P

T-00000442

B B

+5VSUS_PWR

PWR_GND

12

PWR_C04
1000PF/50V

1AV200000003
@

A A

5

4

3

AZ5123-01H

07V180000006
@

PWR_GND PWR_GNDPWR_GND PWR_GND

AZ5123-01H

07V180000006
@

12

PWR_C03
1000PF/50V

1AV200000003
@

97_SB_PWR/B

97_SB_PWR/B

97_SB_PWR/B

Title :

Title :

Title :

Jeff_Lee

Jeff_Lee

Engineer:

Engineer:

EG70_KB

EG70_KB

EG70_KB

Engineer:

PEGATRON UNIHAN CORP.

‧

PEGATRON UNIHAN CORP.

‧

PEGATRON UNIHAN CORP.

‧

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Jeff_Lee

97 99Monday, March 25, 2013

97 99Monday, March 25, 2013

97 99Monday, March 25, 2013

1

Rev

Rev

Rev

1.2

1.2

1.2

5

4

Screw M x 2 Fix Hole J x 1 Fix Hole K x 1

3

TP_LEFT TP_RIGHT

2

1

TP_H1

1

C236D110

TP_H2

D D

TP_GND

1

C236D110

TP_H3

1

CT197D118N

TP_H4

1

DO172X118N

TP_SW1

1

2

GND1GND2

5 6

TP_SWITCH_4P

12V09SBSM020

TP_SW5

GND1GND2

3

4

3

4

1

2
5 6

TP_SWITCH_4P

12V09SBSM020

R1.3 2013/1/24

TPCON1

HOTBAR_PAD_8P

T-00000486

C C

Touch Pad

TPCON3

WIN8

B B

Touch Pad
WIN7

A A

TPCON2

1
2
3
4
5
6

HOTBAR_6P

T-00000521

HOTBAR_PAD_8P

T-00000486

1
2
3
4
5
6

Copy from EA70_HW_MB_R13_0116V3

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

TP_3VS

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

1 2

TP_GND TP_GND TP_GNDTP_GND TP_GND

SMB_DAT_IO
SMB_CLK_IO

TP_CLK_IO_C
TP_DAT_IO_C

TPC02

10PF/50V

TP_LEFT
TP_RIGHT

TP_CLK_IO
TP_DAT_IO

TP_5VS_3VS

TPC03

10PF/50V

1 2

12

1 2

TPC08
10PF/50V

TP_GND

TP_5VS_3VS

TPC04

10PF/50V

TP_GNDTP_GND

12

1 2

SMB_CLK_IO

SMB_DAT_IO

TP_DAT_IO
TP_CLK_IO

TPC07
10PF/50V

TP_LEFT

TP_RIGHT

TPC05

10PF/50V

TP_5VS_3VS

TP_GND

TP_GND

TP_5VS_3VS

12

TPR03

4.7KOhm

/TP_3VS

TP_CLK_IO_C

TP_DAT_IO_C TP_DAT_IO

12

TPR04

4.7KOhm

/TP_3VS

TPR02 0Ohm

TPR01 0Ohm

R1.3 2013/1/24
Add level shift

1 2

/TP_5VS

6 1

TPQ01AUM6K1N

/TP_3VS

2

TP_3VS

5

3 4

/TP_3VS

TPQ01BUM6K1N

1 2

/TP_5VS

TP_CLK_IO

TP_GND

TP_D1

1

I/O1

2

GND

TP_GND

TP_RIGHT TP_LEFT

3 4

I/O2 I/O3

CM1293_04SO

@

07V000000006

6

I/O4

5

VDD

TP_CLK_IOTP_DAT_IO

TP_5VS_3VS

98_SB_TP/B

98_SB_TP/B

Title :

Title :

Title :

Engineer:

Engineer:

PEGATRON UNIHAN CORP.

‧

PEGATRON UNIHAN CORP.

‧

PEGATRON UNIHAN CORP.

‧

Size Project Name

Size Project Name

Size Project Name

B

B

B

Date: Sheet of

Date: Sheet of

Date: Sheet of

5

4

3

2

EG70_KB

EG70_KB

EG70_KB

Engineer:

98_SB_TP/B

1

Jeff_Lee

Jeff_Lee

Jeff_Lee

98 99Monday, March 25, 2013

98 99Monday, March 25, 2013

98 99Monday, March 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

5

D D

+5V_USB_DB_C

HOTBAR_20P

20

20

19

19

18

18

17

17

16

16

15

15

14

14

13

13

12

12

11

11

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

IOCON5

T-00000443

A_GND_IO

C C

Screw L x 2

D_GND_IO

IO_H1

1

C354D118

IO_H2

1

C354D118

Fix Hole F x 1

IO_H3

1

OB47DO118X130N

D_GND_IO

MIC_IN_AC_E_R_IO
MIC_IN_AC_E_L_IO
MIC_EXT_JD#_IO
AC_HP_L_IO
AC_HP_R_IO
HP_JD#_IO
COMBO_MIC_IO

IO_USB_PN5
IO_USB_PP5

IO_USB_PN1
IO_USB_PP1

4

IOC12 0Ohm

IOC13 0Ohm

D_GND_IO

D_GND_IO

A_GND_IO

MIC_EXT_JD#_IO

AU_HP_LL_JACK

AU_HP_RR_JACK

1

2

IOD1

AZ2025-02S@

3

07V220000015

2

IOD2

AZ2025-02S@

07V220000015

COMBO_MIC_IO

1

3

@

12

@

12

IOC14

12

0.01UF/16V

1AV200000019

IOC11

12

0.01UF/16V

1AV200000019

A_GND_IO

Moat

HP_JD#_Jack

IOD3

AZ2025-01H.R7G@

1 2

07V220000006

+5V_USB_DB_C

MIC_IN_AC_E_L_JACK

2

IOD12

AZ2025-02S

07V220000015

@

IOL01 0Ohm

MIC_IN_AC_E_R_JACK

1

3

3

1 2

IO_USB_PP5 IO_USB_PN5

D_GND_IO

IO_USB_PN1 IO_USB_PP1

AC_HP_L_IO

AC_HP_R_IO

HP_JD#_IO

12

+

IOCE01
100UF/6.3V

@

1BV080000001

IOD4

1

2

3 4

CM1293_04SO

07V000000006@

IOSP1

1 2

IOSP2

1 2

IOSP3

1 2

0.1UF/16V

1 2

D_GND_IO

6

+5VUSB0_IO

5

NB_R0402_20MIL_SMALL

NB_R0402_20MIL_SMALL

NB_R0402_20MIL_SMALL

12

IOC10

10PF/50V

@

IOC08

@

@

A_GND_IO

12

IOC9

100PF/50V

12

IOC2
33PF/50V

+5VUSB0_IO

12

D_GND_IO

IOC09
33PF/50V

12

IOC6

100PF/50V

COMBO_MIC_IO

2

USB 2.0

IOCON4

P_GND1

1

P_GND2

2

P_GND3

3

P_GND484

USB_CON_1x4P@

12V13GBSD021

IOCON3

1

P_GND1

1

2

P_GND2

2

3

P_GND3

3

4

P_GND484

USB_CON_1x4P

12V13GBSD021

A_GND_IO

5
6
7

5
6
7

IOCON6

7
1

2
6
3
4
5

PHONE_JACK_9P

12V14GBSD006

P_GND1
P_GND2

NP_NC1
NP_NC2

8
9

10
11

+5VUSB0_IO
IO_USB_PN5
IO_USB_PP5

1
2
3
4

D_GND_IO D_GND_IO

+5VUSB0_IO
IO_USB_PN1
IO_USB_PP1

D_GND_IO D_GND_IO

Headphone & MIC combo Jack

COMBO_MIC_IO

AU_HP_LL_JACK

AU_HP_RR_JACK

HP_JD#_Jack

12

IOC7

100PF/50V

A_GND_IOA_GND_IOA_GND_IO

1

A_GND_IO

B B

Fix Hole E x 1

IO_H4

1

CB236D118N

A A

5

A_GND_IO A_GND_IO A_GND_IO A_GND_IO

4

MIC_IN_AC_E_L_IO

MIC_IN_AC_E_R_IO

3

MIC_EXT_JD#_IO

IOSP4

IOSP5

1 2

1 2

NB_R0402_20MIL_SMALL

NB_R0402_20MIL_SMALL

12

IOC8

100PF/50V

MIC_IN_AC_E_L_JACK

MIC_IN_AC_E_R_JACK

12

IOC06

100PF/50V

MIC JACK

IOCON2

8

8

7

7

1

1

2

2

6

6

3

3

4

4

5

5

A_GND_IO

9

NP_NC1

10

NP_NC2

PHONE_JACK_8P

12V14GBSD010

PEGATRON UN IHAN CORP.

‧

PEGATRON UN IHAN CORP.

‧

PEGATRON UN IHAN CORP.

‧

Size Project Name

Size Project Name

Size Project Name

C

C

C

EG70_KB

EG70_KB

Date: Sheet of

Date: Sheet of

Date: Sheet of

EG70_KB

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

1

99_SB_IO/B

99_SB_IO/B

99_SB_IO/B

Jeff_Lee

Jeff_Lee

Jeff_Lee

99 99Monday, March 25, 2013

99 99Monday, March 25, 2013

99 99Monday, March 25, 2013

Rev

Rev

Rev

1.2

1.2

1.2

12

IOC05

@

100PF/50V

A_GND_IOA_GND_IOA_GND _IO

2