PANDA LM645DU1A Specification

Global LCD Panel Exchange Center

PANDA

    











www.panelook.com

˧ˢ

  

1HZ 5HYLVLRQ

3URGXFW 6SHFLILFDWLRQ

3URGXFW

0RGHO



)LOH 1R

 ,VVXH 'DWH 5HYLVLRQ 'DWH



7)7/&' 0RGXOH

/0'8$

LM645DU1A Ver.1.2

PN-PT-003A

 < 0 '



  !"#$%& '()

*+,-./012345678)

 7KLV 3URGXFW 6SHFLILFDWLRQ KDYH

WKH REMHFWLRQ SRLQW EHIRUH SXUFKDVH RUGHU

&(& 3$1'$ *5283

SDJHV LQFOXGLQJ WKH FRYHUVKHHW DQG $SSHQGLFHV 3OHDVH QHJRWLDWH

1$1-,1* &(& 3$1'$ /&' 7(&+12/2*< &2 /7'

3URGXFW 7HFKQRORJ\ 'HSDUWPHQW

9: ;: <=

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

www.panelook.com

Global LCD Panel Exchange Center

PANDA



www.panelook.com

LM645DU1A Ver.1.2

-CONTENTS -

REVISION HISTORY ___________________________________________________________ 3

1. GENERAL DESCRIPTION_____________________________________________________ 4

1.1 OVERVIEW ______________________________________________________________________________4

1.2 CHARACTERISTICS _______________________________________________________________________4

1.3 MECHANICAL SPECIFICATIONS ____________________________________________________________4

2. ABSOLUTE MAXIMUM RATINGS_______________________________________________ 4

2.1 ABSOLUTE RATINGS OF ENVIRONMENT _____________________________________________________4

3. Input Terminals _____________________________________________________________ 6

3.1 TFT panel driving _________________________________________________________________________6

3.2 Interface block diagram____________________________________________________________________9

3.3 Block diagram ___________________________________________________________________________9

4. ELECTRICAL CHARACTERISTICS ____________________________________________ 10

4.1 DC Characteristics _______________________________________________________________________10

5. TIMING CHARACTERISTICS OF INPUT SIGNALS ________________________________ 13

5.1 Timing Characteristics of LVDS Signal ______________________________________________________13

5.2 LVDS data skew _________________________________________________________________________14

5.3 LVDS data mapping ______________________________________________________________________15

5.4 Input Signal, Basic Display Colors and Gray Scale of Each Color________________________________16

6OPTICAL CHARACTERISTICS _______________________________________________ 17

CONVERTER FOR BACK LIGHTING __________________________________________ 20

7.1 Electrical specification ___________________________________________________________________20

7.2 Input pin assignment _____________________________________________________________________20

8. DEFINITION OF LABELS ____________________________________________________ 21

8.1 MODULE LABEL_________________________________________________________________________21

8.2 PACKING LABEL ________________________________________________________________________21

9. PACKING _________________________________________________________________ 22

10. PRECAUTIONS ___________________________________________________________ 23

10.1 ASSEMBLY AND HANDLING PRECAUTIONS ________________________________________________23

10.2 SAFETY PRECAUTIONS _________________________________________________________________23

11. RELIABILITY _____________________________________________________________ 24

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

www.panelook.com

Global LCD Panel Exchange Center

PANDA

www.panelook.com

LM645DU1A Ver.1.2

REVISION HISTORY

MODEL NO: LM645DU1A

DATE NO. REVISED No. PAGE SUMMARY NOTE

2012/07/25 PN-PT-001 Ver.1.0 26 First Edition Tentative

2012/8/21 PN-PT-002 Ver.1.1 26

2012/12/21 PN-PT-003 Ver.1.2 26

Replace the connector of Converter

Update module drawing

Update Optical Characteristics

Update module drawing

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

www.panelook.com

Global LCD Panel Exchange Center

PANDA

www.panelook.com

LM645DU1A Ver.1.2

1. GENERAL DESCRIPTION

1.1 OVERVIEW

This module is color active matrix LCD module incorporating amorphous silicon TFT(Thin Film

ransistor) LCD panel. It is composed of a color TFT-LCD panel, driver ICs, LED Backlight unit…

etc. Graphics and texts can be displayed on a 1920×RGB×1080 dots panel with about 1,073,741,824

colors(R/G/B 10bit in each color) by using LVDS(L

ow Voltage Differential Signaling) to interface,

+12V of DC supply voltage.

1.2 CHARACTERISTICS

Parameter Technical literatures Unit

163.9 (Diagonal) cm

Display size

64.5 (Diagonal) inch

Active area 1428.48(H) x 803.52(V) mm

1920(H) x 1080(V)

Pixel Format

1pixel = R + G + B dot

pixel

Pixel pitch

0.744(H) x 0.744 (V)

Pixel configuration R, G, B vertical stripe

Display mode Normally black

Unit Outline Dimensions

Surface treatment

1.3 MECHANICAL SPECIFICATIONS

1463.08(H) × 848.9(H) × 1.776(D)

Anti glare Hard coating: (2H)

Item Min. Typ. Max. Unit Remark

Module

Size

Horizontal (H) 1455.48 1457.28 1459.08 mm [Note 1]

Vertical (V) 833.72 835.22 856.72 mm [Note 1]

Depth (D) 15.3 16.3 17.3 mm [Note 1]

Weight 30 kg

[Note 1] Please refer to the attached drawings for more information of front and back outline dimensions and

the dimension of bosses are not included.

2. ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT

Parameter Symbol Condition

Ratings

Unit Remark

Min. Max.

12V supply voltage V

Input voltage Vin

LVDS signal voltage V

LVDS

Ta=25°C Ta=25°C Ta=25°C

Operation temperature TOPR

Storage temperature TSTG -

0 +14.0

-0.3 +3.6 V 0 +2.4

-0+50

-20 +60

°C °C

[Note 1]

[Note 2]

(*) “Absolute Maximum Ratings” is regulations that do not exceed it even momentarily.

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

www.panelook.com

Global LCD Panel Exchange Center

PANDA

www.panelook.com

(*) Stress beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the

device.

[Note 1] Applies to the input signal expect supply voltage and LVDS signal. [Note 2] Humidity: 90%RH Max.Ta40°C, Maximum wet-bulb temperature at 39°C

or less Ta40°C, No condensation.

LM645DU1A Ver.1.2

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

www.panelook.com

Global LCD Panel Exchange Center

PAND

www.panelook.com

3. Input Terminals

3.1 TFT panel driving

CN1 (Interface signals and +12V DC power supply)

Using connector : 91213-0510Y (ACES) Mating connector : 91214-05130 (ACES), FI-RE51HL/FI-RE51CL (JAE) Mating LVDS transmitter : THC63LVD1023 or equivalent device

Pin No. Symbol Function Remark

1GND 2 I2C_SDA I2C_Data (for Vcom adjust)[Note1] Pull up:(3.3V) 3 I2C_SCL I2C_Clock (for Vcom adjust)[Note1] Pull up:(3.3V) 4 Reserved It is required to set non-connection(OPEN) 5 Frame Frame frequency setting 0:100Hz 1:120Hz [Note2] Pull down:(GND) 6 Reserved It is required to set non-connection(OPEN) 7 LVDS SEL Select LVDS data order [Note3][Note4] Pull up: (3.3V) 8 Reserved It is required to set non-connection(OPEN)

9 Reserved It is required to set non-connection(OPEN) 10 Reserved It is required to set non-connection(OPEN) 11 GND 12 AIN0- Aport (-)LVDS CH0 differential data input 13 AIN0+ Aport (+)LVDS CH0 differential data input 14 AIN1- Aport (-)LVDS CH1 differential data input 15 AIN1+ Aport (+)LVDS CH1 differential data input 16 AIN2- Aport (-)LVDS CH2 differential data input 17 AIN2+ Aport (+)LVDS CH2 differential data input 18 GND 19 ACK- Aport LVDS Clock signal(-) 20 ACK+ Aport LVDS Clock signal(+) 21 GND 22 AIN3- Aport (-)LVDS CH3 differential data input 23 AIN3+ Aport (+)LVDS CH3 differential data input 24 AIN4- Aport (-)LVDS CH4 differential data input 25 AIN4+ Aport (+)LVDS CH4 differential data input 26 GND 27 GND 28 BIN0- Bport (-)LVDS CH0 differential data input 29 BIN0+ Bport (+)LVDS CH0 differential data input 30 BIN1- Bport (-)LVDS CH1 differential data input 31 BIN1+ Bport (+)LVDS CH1 differential data input 32 BIN2- Bport (-)LVDS CH2 differential data input 33 BIN2+ Bport (+)LVDS CH2 differential data input 34 GND 35 BCK- Bport LVDS Clock signal(-) 36 BCK+ Bport LVDS Clock signal(+) 37 GND 38 BIN3- Bport (-)LVDS CH3 differential data input 39 BIN3+ Bport (+)LVDS CH3 differential data input 40 BIN4- Bport (-)LVDS CH4 differential data input 41 BIN4+ Bport (+)LVDS CH4 differential data input 42 GND 43 GND 44 GND 45 GND 46 GND 47 VCC +12V Power Supply 48 VCC +12V Power Supply 49 VCC +12V Power Supply 50 VCC +12V Power Supply 51 VCC +12V Power Supply

LM645DU1A Ver.1.2

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

www.panelook.com

Global LCD Panel Exchange Center

PAND

www.panelook.com

CN2 (Interface signals)

Using connector : 91213-0410Y(ACES) Mating connector : 91214-04130(ACES) , FI-RE41HL/ FI-RE41CL (JAE)

Pin No. Symbol Function Remark

1 Reserved (VCC) (+12V Power Supply) (OPEN) 2 Reserved (VCC) (+12V Power Supply) (OPEN) 3 Reserved (VCC) (+12V Power Supply) (OPEN) 4 Reserved Non-Conection(OPEN) 5 Reserved Non-Conection(OPEN) 6 Reserved Non-Conection(OPEN) 7 Reserved Non-Conection(OPEN) 8 Reserved Non-Conection(OPEN)

9GND 10 CIN0- Cport (-)LVDS CH0 differential data input 11 CIN0+ Cport (+)LVDS CH0 differential data input 12 CIN1- Cport (-)LVDS CH1 differential data input 13 CIN1+ Cport (+)LVDS CH1 differential data input 14 CIN2- Cport (-)LVDS CH2 differential data input 15 CIN2+ Cport (+)LVDS CH2 differential data input 16 GND 17 CCK- Cport LVDS Clock signal(-) 18 CCK+ Cport LVDS Clock signal(+) 19 GND 20 CIN3- Cport (-)LVDS CH3 differential data input 21 CIN3+ Cport (+)LVDS CH3 differential data input 22 CIN4- Cport (-)LVDS CH4 differential data input 23 CIN4+ Cport (+)LVDS CH4 differential data input 24 GND 25 GND 26 DIN0- Dport (-)LVDS CH0 differential data input 27 DIN0+ Dport (+)LVDS CH0 differential data input 28 DIN1- Dport (-)LVDS CH1 differential data input 29 DIN1+ Dport (+)LVDS CH1 differential data input 30 DIN2- Dport (-)LVDS CH2 differential data input 31 DIN2+ Dport (+)LVDS CH2 differential data input 32 GND 33 DCK- Dport LVDS Clock signal(-) 34 DCK+ Dport LVDS Clock signal(+) 35 GND 36 DIN3- Dport (-)LVDS CH3 differential data input 37 DIN3+ Dport (+)LVDS CH3 differential data input 38 DIN4- Dport (-)LVDS CH4 differential data input 39 DIN4+ Dport (+)LVDS CH4 differential data input 40 GND 41 GND

The equivalent circuit figure of the terminal.

[Note 1] [Note 2]

3.3V

1KΩ

100Ω

Ter mi na l

LM645DU1A Ver.1.2

Ter mi na l

100Ω

10KΩ

Fig.3-1-1 equivalent circuit (Pin No2,3) Fig.3-1-2 equivalent circuit (Pin No5)

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

www.panelook.com

Global LCD Panel Exchange Center

PAND

www.panelook.com

[Note 3]

3.3V

100Ω

Ter mi na l

Fig.3-1-3 equivalent circuit (Pin No7)

[Note 4] LVDS Data order

Data H(3.3V) or OPEN

[VESA] TA0 R0(LSB) R4 TA1 R1 R5 TA2 R2 R6 TA3 R3 R7 TA4 R4 R8 TA5 R5 R9(MSB) TA6 G0 (L SB ) G4 TB0 G1 G5 TB1 G2 G6 TB2 G3 G7 TB3 G4 G8 TB4 G5 G9(MSB) TB5 B0(LSB) B4 TB6 B1 B5 TC0 B2 B6 TC1 B3 B7 TC2 B4 B8 TC3 B5 B9(MSB) TC4 NA NA TC5 NA NA TC6 DE(*) DE(*) TD0 R6 R2 TD1 R7 R3 TD2 G6 G2 TD3 G7 G3 TD4 B6 B2 TD5 B7 B3 TD6 N/A N/A TE0 R8 R0(LSB) TE1 R9(MSB) R1 TE2 G8 G0(LSB) TE3 G9(MSB) G1 TE4 B8 B0(LSB) TE5 B9(MSB) B1 TE6 N/A N/A

NA: Not Available (*)Since the display position is prescribed by the rise of DE(Display Enable) signal, please do not fix DE signal during operation at ”High”.

LM645DU1A Ver.1.2

4.7KΩ

SELLVDS

L(GND) [JEIDA]

One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory!

www.panelook.com

+ 18 hidden pages