AN5829
ICs for TV
AN5829S
Sound multiplex decoder IC for the U.S. televisions
■ Overview
The AN5829S is a multiplex sound demodulation IC dedicated to the U.S. television and incorporates a bidirectional I2C interface (adjustment, mode SW), an AGC circuit and external stereo input switches (2 systems).
■ Features
•Stereo demodulation, SAP demodulation, dbx noise reduction, AGC, external stereo input SW and I2C bus interface are integrated in a single chip
•Bi-directional I2C bus makes it possible to monitor MPX input level, separation adjustment (3 places), mode changeover and receiving status.
•Eliminated external parts (multi-sound block: 21 pieces → 14 pieces
•Lower power dissipation (VCC = 5 V, ITOT = 18 mA)
■ Applications
• Televisions and VCRs for the North American market
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Unit: mm |
0.45 |
1 |
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24 |
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2 |
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23 |
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±0.25 |
3 |
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22 |
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4 |
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21 |
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0.4 |
5 |
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20 |
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6 |
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19 |
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0.3 |
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7 |
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18 |
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1.27 |
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15.3± |
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17 |
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9 |
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16 |
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10 |
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15 |
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11 |
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14 |
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12 |
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13 |
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0.1±0.1 |
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7.2±0.3 |
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±0.2 |
0.3 |
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0.15 |
0.925 |
2.0 |
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9.4±0.3 |
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SOP024-P-0375A |
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1
2 |
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7 CC |
17 |
16 |
15 |
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4 |
Out21 |
SW |
22 |
1 |
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DiagramBlock ■ |
AN5829S |
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V |
GND |
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out L |
out R |
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ZAP |
20 |
PE |
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L+R |
L+R |
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18 |
SCL |
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demod |
filter |
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I2C |
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Decoder |
19 |
SDA |
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75 µs |
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AGC |
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Pilot det. |
Offset |
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De-emph. |
cancel |
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DAC |
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Matrix |
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24 |
AUX2 L |
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23 |
AUX2 R |
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St. PLL |
Pilot |
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cancel |
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2 |
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AUX1 L |
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Stereo |
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3 |
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filter |
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L−R |
L−R |
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Offset |
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AUX1 R |
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cancel |
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5 |
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14 |
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demod |
filter |
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MPX in |
Input VCA |
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Wide band |
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Wide band |
Wide band |
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SAP |
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SAP |
SAP out |
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expand |
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RMS det. |
filter |
8 |
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filter |
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demod |
filter |
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6 |
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SAP |
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Spectral |
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Spectral |
Spectral |
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det. |
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expand |
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RMS det. |
filter |
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11 |
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Noise |
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Noise |
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10 |
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filter |
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det. |
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(L−R)/SAP |
dbx |
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9 |
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switch |
De-emph. |
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13 |
12 |
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fH, 2fH |
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forICs |
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Trap filter |
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TV |
ICs for TV |
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AN5829S |
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■ Pin Descriptions |
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Pin No. |
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Description |
Pin No. |
Description |
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1 |
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AGC timing |
13 |
SAP carrier detection |
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2 |
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External input 1 L-ch |
14 |
Composite input |
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3 |
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External input 1 R-ch |
15 |
Pilot signal detection |
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4 |
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75 µs filter offset cancel |
16 |
Stereo PLL filter |
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5 |
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dbx offset cancel |
17 |
GND |
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6 |
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Wideband timing |
18 |
SCL |
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7 |
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VCC |
19 |
SDA |
8 |
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Wideband level sensor input |
20 |
PE for ZAP |
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9 |
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Spectral filter |
21 |
L-ch output |
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10 |
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Spectral timing |
22 |
R-ch output |
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11 |
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Spectral level sensor input |
23 |
External input 2 R-ch. |
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12 |
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SAP noise level detection |
24 |
External input 2 L-ch. |
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■ Absolute Maximum Ratings
Parameter |
Symbol |
Rating |
Unit |
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Supply voltage |
VCC |
6.0 |
V |
Supply current |
ICC |
25 |
mA |
Power dissipation *2 |
PD |
150 |
mW |
Operating ambient temperature *1 |
Topr |
−20 to +75 |
°C |
Storage temperature *1 |
Tstg |
−55 to +125 |
°C |
Note) The use of this IC, which builds in dbx-TV noise reduction, requires a license agreement with THAT Corporation. *1: Except fot the operating ambient temperature and storage temperature, all ratings are for Ta = 25°C.
*2: Ta = 75°C
■ Recommended Operating Range
Parameter |
Symbol |
Range |
Unit |
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Supply voltage |
VCC |
4.5 to 5.5 |
V |
3
AN5829S |
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ICs for TV |
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■ Electrical Characteristics at VCC = 5 V, NR: On,Ta = 25°C |
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Input level (at 100% modulation) L+R: 75 mV[rms] (pre-emphasis off) |
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L−R: 150 mV[rms] (dbx noise reduction off) |
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Pilot: 15 mV[rms] |
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SAP: 45 mV[rms] (dbx noise reduction off) |
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Parameter |
Symbol |
Conditions |
Min |
Typ |
Max |
Unit |
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Total circuit current |
ICC |
No signal |
11 |
18 |
25 |
mA |
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Mono output level |
V0(MON) |
f = 1 kHz, (mono) 100%mod |
430 |
480 |
530 |
mV[rms] |
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Mono frequency characteristics-1 |
V1(MON) |
f = 300 Hz, (mono) 30%mod |
− 0.5 |
0 |
0.5 |
dB |
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Mono frequency characteristics-2 |
V2(MON) |
f = 8 kHz, (mono) 30%mod |
−1.2 |
− 0.1 |
0.7 |
dB |
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Mono distortion ratio |
THD(MON) |
f = 1 kHz, (mono) 100%mod |
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0.7 |
% |
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Mono noise level |
VN(MON) |
Input short-circuit, BPF (A curve) |
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−60 |
dBV |
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(L), (R) output voltage difference |
VLR(MON) |
f = 1 kHz, (mono) 100%mod |
− 0.5 |
0 |
0.5 |
dB |
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Stereo output level |
V0(ST) |
f = 1 kHz, (L(R)-only) 100%mod |
380 |
480 |
580 |
mV[rms] |
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Stereo frequency characteristics-1 |
V1(ST) |
f = 300 Hz, (L(R)-only) 30%mod |
− 0.7 |
0 |
0.7 |
dB |
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Stereo frequency characteristics-2 |
V2(ST) |
f = 3 kHz, (L(R)-only) 30%mod |
−1 |
0 |
1 |
dB |
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Stereo frequency characteristics-3 |
V3(ST) |
f = 8 kHz, (L(R)-only) 30%mod |
−2.5 |
− 0.5 |
1.5 |
dB |
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Stereo distortion ratio |
THD(ST) |
f = 1 kHz, (L(R)-only) 100%mod |
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1 |
% |
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Stereo noise level |
VN(ST) |
f = 15.73 kHz, (fH), 15 mV[rms] |
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−60 |
dBV |
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fH, 2 fH Trap+BPF |
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Stereo discrimination level |
VTH(ST) |
f = 15.73 kHz (fH) |
4 |
8 |
13 |
mV[rms] |
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Stereo discrimination hysteresis |
VHY(ST) |
f = 15.73 kHz (fH) |
0.5 |
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5 |
dB |
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SAP output level |
V0(SAP) |
f = 1 kHz, (SAP) 100%mod |
370 |
500 |
680 |
mV[rms] |
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SAP frequency characteristics-1 |
V1(SAP) |
f = 300 Hz, (SAP) 30%mod |
−1 |
0 |
1 |
dB |
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SAP frequency characteristics-2 |
V2(SAP) |
f = 3 kHz, (SAP) 30%mod |
−2.5 |
− 0.5 |
1 |
dB |
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SAP distortion ratio |
THD(SAP) |
f = 1 kHz, (SAP) 100% |
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1.5 |
% |
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SAP noise level |
VN(SAP) |
f = 78.7 kHz, (5fH),V= 45 mV[rms], BPF |
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−70 |
dBV |
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SAP discrimination level |
VTH(SAP) |
f = 78.7 kHz, (5fH) |
11 |
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26 |
mV[rms] |
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SAP discrimination hysteresis |
VHY(SAP) |
f = 78.7 kHz, (5fH) |
0.5 |
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5 |
dB |
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SAP → Stereo crosstalk |
CT1 |
(SAP)1 kHz, 100%mod |
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−50 |
dB |
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(Stereo) pilot-signal |
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Stereo → SAP crosstalk |
CT2 |
(Stereo) 1 kHz, 100%mod |
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−50 |
dB |
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(SAP) carrier-signal |
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SAP → Mono crosstalk |
CT3 |
(SAP) 1 kHz, 100%mod |
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−50 |
dB |
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Mono → SAP crosstalk |
CT4 |
(Mono) 1 kHz, 100%mod |
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−56 |
dB |
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(SAP) carrier-signal |
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AUX 1, AUX 2 to INT |
CT5 |
f = 1 kHz, VIN = 500 mV[rms] |
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50 |
dB |
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crosstalk |
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INT, AUX 2 to AUX 1 |
CT6 |
INT: (mono) 1 kHz, 100%mod |
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50 |
dB |
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crosstalk |
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EXT: f = 1 kHz, 500 mV[rms] |
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INT, AUX 1 to AUX 2 |
CT7 |
INT: (mono) 1 kHz, 100%mod |
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50 |
dB |
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crosstalk |
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EXT: f = 1 kHz, 500 mV[rms] |
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4 |
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ICs for TV |
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AN5829S |
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■ Electrical Characteristics at VCC = 5 V, NR: On,Ta = 25°C (continued) |
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Parameter |
Symbol |
Conditions |
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Min |
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Typ |
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Max |
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Unit |
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AGC gain 1*1 |
V |
AGC1 |
f = 1 kHz, V |
IN(EXT) |
= 50 mV[rms] |
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67 |
100 |
140 |
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mV[rms] |
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AGC gain 2 *1 |
V |
AGC2 |
f = 1 kHz, V |
IN(EXT) |
= 500 mV[rms] |
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180 |
270 |
390 |
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mV[rms] |
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I2 C interface |
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Sink current at ACK |
IACK |
Maximum pin 2 sink current at ACK |
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1 |
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2 |
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20 |
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mA |
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SCL, SDA signal input high level |
VIHI |
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3.5 |
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5.0 |
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V |
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SCL, SDA signal input low level |
VILO |
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0 |
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0.9 |
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V |
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Input available maximum frequency |
fImax |
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100 |
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kbit/s |
Note) *1: 00H register: D7 = 0, D6 = 1
•Design reference data
Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.
Parameter |
Symbol |
Conditions |
Min |
Typ |
Max |
Unit |
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Stereo separation (100%)-1 |
Sep100-1 |
f = 300 Hz, (L(R)-only) 100%mod |
20 |
35 |
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dB |
Stereo separation (100%)-2 |
Sep100-2 |
f = 1 kHz, (L(R)-only) 100 %mod |
17 |
28 |
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dB |
Stereo separation (100%)-3 |
Sep100-3 |
f = 3 kHz, (L(R)-only) 100%mod |
20 |
35 |
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dB |
Stereo separation (100%)-4 |
Sep100-4 |
f = 8 kHz, (L(R)-only) 100%mod |
10 |
18 |
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dB |
Stereo separation (30%)-1 |
Sep30-1 |
f = 300 Hz, (L(R)-only) 30%mod |
22 |
35 |
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dB |
Stereo separation (30%)-2 |
Sep30-2 |
f = 1 kHz, (L(R)-only) 30%mod |
20 |
35 |
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dB |
Stereo separation (30%)-3 |
Sep30-3 |
f = 3 kHz, (L(R)-only) 30%mod |
22 |
35 |
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dB |
Stereo separation (30%)-4 |
Sep30-4 |
f = 8 kHz, (L(R)-only) 30%mod |
14 |
22 |
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dB |
Stereo separation (10%)-1 |
Sep10-1 |
f = 300 Hz, (L(R)-only) 10%mod |
20 |
35 |
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dB |
Stereo separation (10%)-2 |
Sep10-2 |
f = 1 kHz, (L(R)-only) 10%mod |
20 |
35 |
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dB |
Stereo separation (10%)-3 |
Sep10-3 |
f = 3 kHz, (L(R)-only) 10%mod |
20 |
30 |
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dB |
Stereo separation (10%)-4 |
Sep10-4 |
f = 8 kHz, (L(R)-only) 10%mod |
14 |
22 |
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dB |
I2 C interface |
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Bus free before start |
tBUF |
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4.0 |
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s |
Start condition set-up time |
tSU.STA |
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4.0 |
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s |
Start condition hold time |
tHD.STA |
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4.0 |
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s |
Low period SCL, SDA |
tLO |
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4.0 |
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s |
High period SCL |
tHI |
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4.0 |
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s |
Rise time SCL, SDA |
tr |
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1.0 |
s |
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Fall time SCL, SDA |
tf |
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0.35 |
s |
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Data set-up time (write) |
tSU.DAT |
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0.25 |
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s |
Data hold time (write) |
tHD.DAT |
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0.3 |
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s |
Acknowledge set-up time |
tSU.ACK |
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3.5 |
s |
Acknowledge hold time |
tHD.ACK |
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0 |
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s |
Stop condition set-up time |
tSU.STO |
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4.0 |
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s |
5
AN5829S |
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ICs for TV |
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■ Electrical Characteristics at VCC = 5 V, NR: On,Ta = 25°C (continued) |
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Start |
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Stop |
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Slave |
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Sub |
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ACK |
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SDA |
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tLO |
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tBUF |
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tSU.DAT |
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tSU.STO |
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HDSTA t |
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tf |
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tHI |
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tLO |
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Pin No. |
Equivalent circuit |
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Description |
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DC voltage (V) |
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1 |
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VCC |
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AGC: |
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0.5 to 2.0 |
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AGC level sensor pin |
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425 Ω 51 kΩ 1
500 Ω
GND
2 |
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VCC |
AUXIL: |
2.2 |
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External input1 |
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L-ch input pin |
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20.7 |
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kΩ |
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13.8 kΩ |
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2.2 V |
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GND |
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VCC |
AUXIR: |
2.2 |
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External input 1 |
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R-ch input pin |
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3 20.7 kΩ
13.8 kΩ
2.2 V
GND
6