This specification is to define the general provisions and quality requirements
that apply to the supply of display cells manufactured by Pacer. This
document, together with the Module Ass’y Drawing, is the highest-level
specification for this product.
2. FEATURES
- Two Area color small molecular organic light emission diode
- Color: Blue/Yellow
- Panel matrix: 128*64
- Driver IC: SSD1303
- Excellent quick response time.
- Extremely thin thickness for best mechanism design: 2.05mm
1 Dot Matrix 128 (W) x 64 (H) dot
2 Dot Size 0.18 (W) x 0.21 (H) mm
3 Dot Pitch 0.20 (W) x 0.23 (H) mm
4 Aperture Rate 82 %
5 Active Area 25.58 (W) x 15.18 (H) mm
6 Panel Size 33.0 (W) x 23.0 (H) mm
2
2
2
2
7 Panel Thickness
2.05 0.1
8 Module Size 33.0 (W) x 37.5 (H) x 2.05 (T) mm
mm
3
9 Diagonal A/A size1.2 inch
10 Module Weight
3.0 10%
gram
4. MAXIMUM RATINGS
ITEM MIN MAXUNITCondition
Supply Voltage (VDD)-0.3 3.5 V Ta = 25°C
Supply Voltage(Vcc) 8 16 V Ta = 25°C
Operating Temp. -20 70 °C
Storage Temp -40 85 °C
Humidity - 85 %
30cd/m2, 20% pixels
Operating Life Time 8,000- Hrs
scrolling
display on at 85Hz frame
Storage Life Time 20,000- Hrs Ta=25°C, 50% RH
Note:
(A) Under Vcc = 12 Volts, Ta = 25°C, 50% RH.
(B) Operating Life Time is defined when the luminance has decayed to less than
(C) The storage life time is define as 25% di mension shrinking of initial value
PARAMETER MIN TYP. MAX UNITSCOMMENTS
Normal mode current- 7 9 mA All pixels on (1)
Standby mode
current
Normal mode power
consumption
Standby mode powe
consumption
1 2 mA
- 84 108 mW All pixels on (1)
12 24 mW
Standby mode
10% pixels on (2)
Standby mode
10% pixels on (2)
Normal Luminance 40 45 cd/m2 Display Average
Standby Luminance 10 cd/m2 Display Average
CIEx(Blue) 0.12 0.15 0.18
CIEy(Blue) 0.22 0.27 0.32
CIEx(Yellow) 0.42 0.46 0.50
CIEy(Yellow) 0.46 0.50 0.54
VSS 2 I This is a ground pin.
Test 0 3 - Reserved pin; No connection and left float
Test 1 4 - Reserved pin; No connection and left float
Test 2 5 - Reserved pin; No connection and left float
Test 3 6 - Reserved pin; No connection and left float
Test 4 7 - Reserved pin; No connection and left float
NC 8 - No connection
NC 9 - No connection
NC 10 - No connection
VDD 11 I Voltage power supply for logic
BS1 12 I MCU interface selection input
BS2 13 I MCU interface selection input
NC 14 - No connection
CS# 15 I This is a chip select control pin.
RES# 16 I Hardware reset signal
D/C# 17 I This is a Data/Command control pin.
WR# 18 I This pin is used to receive the Write Data signal.
RD# 19 I This pin is used to receive the Read Data signal.
D0 20 I/O This pin is bi-direction data signal
D1 21 I/O This pin is bi-direction data signal
D2 22 I/O This pin is bi-direction data signal
D3 23 I/O This pin is bi-direction data signal
D4 24 I/O This pin is bi-direction data signal
D5 25 I/O This pin is bi-direction data signal
D6 26 I/O This pin is bi-direction data signal
D7 27 I/O This pin is bi-direction data signal
To protect OLED panel and extend the panel lifetime, the driver IC pow er up/down
routine should include a delay period between high voltage and low voltage power
sources turn on/off.
Power up Sequence:
1. Power up Vdd
2. Hardware RESET
3. Send display off command
4. Power up Vcc
5. Delay 100ms (when Vcc is stable)
6. Send Display on command
On Vdd On Vcc Display On Display Off Off Vcc Off Vdd
VCC
VDD
GND
Power down Sequence:
1. Send Display off command
2. Power down Vcc
3. Delay 100ms (When Vcc is reach 0
and panel is completely discharges)
Because the pixels are lighted in different time, the luminance of active pixels
may reduce or differ from inactive pixels. Therefore, the residue image will
occur. To avoid the residue image, every pixel needs to be lighted up
uniformly.