ON Semiconductor UC3842B, UC3843B, UC2842B, UC2843B User Manual

UC3842B, UC3843B, UC2842B, UC2843B

High Performance Current Mode Controllers

The UC3842B, UC3843B series are high performance fixed frequency current mode controllers. They are specifically designed for Off−Line and DC−DC converter applications offering the designer a cost−effective solution with minimal external components. These integrated circuits feature a trimmed oscillator for precise duty cycle control, a temperature compensated reference, high gain error amplifier, current sensing comparator, and a high current totem pole output ideally suited for driving a power MOSFET.

Also included are protective features consisting of input and reference undervoltage lockouts each with hysteresis, cycle−by−cycle current limiting, programmable output deadtime, and a latch for single pulse metering.

These devices are available in an 8−pin dual−in−line and surface mount (SOIC−8) plastic package as well as the 14−pin plastic surface mount (SOIC−14). The SOIC−14 package has separate power and ground pins for the totem pole output stage.

The UCX842B has UVLO thresholds of 16 V (on) and 10 V (off), ideally suited for off−line converters. The UCX843B is tailored for lower voltage applications having UVLO thresholds of 8.5 V (on) and

7.6 V (off).

Features

• Trimmed Oscillator for Precise Frequency Control

• Oscillator Frequency Guaranteed at 250 kHz

• Current Mode Operation to 500 kHz

• Automatic Feed Forward Compensation

• Latching PWM for Cycle−By−Cycle Current Limiting

• Internally Trimmed Reference with Undervoltage Lockout

• High Current Totem Pole Output

• Undervoltage Lockout with Hysteresis

• Low Startup and Operating Current

• This is a Pb−Free and Halide−Free Device

V

7(12)

CC

V

ref

8(14)

R

T/CT

4(7)

Voltage

Feedback

Input

2(3)

Output

Compensation

1(1)

Pin numbers in parenthesis are for the D suffix SOIC−14 package.

+

-

Error

Amplifier

R

Oscillator

V

Undervoltage

Lockout

GND 5(9)

5.0V

Reference

ref

Latching

PWM

Figure 1. Simplified Block Diagram

V

CC

Undervoltage

Lockout

V

7(11)

Output

6(10)

5(8)

3(5)

C

Power Ground

Current Sense Input

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PDIP−8

N SUFFIX

8

1

14

1

8

1

CASE 626

SOIC−14

D SUFFIX

CASE 751A

SOIC−8

D1 SUFFIX

CASE 751

PIN CONNECTIONS

(Top View)

8

V

ref

7

V

CC

6

Output

5

GND

14

V

ref

13

NC

12

V

CC

11

V

C

10

Output

9

GND

8

Power Ground

Compensation

Voltage Feedback

Current Sense

R

T/CT

Compensation

NC

Voltage Feedback

NC

Current Sense

NC

RT/C

1

2

3

4

1

2

3

4

5

6

7

T

ORDERING INFORMATION

See detailed ordering and shipping information in the package dimensions section on page 17 of this data sheet.

DEVICE MARKING INFORMATION

See general marking information in the device marking section on page 19 of this data sheet.

September, 2013 − Rev. 17

This datasheet has been downloaded fromhttp://www.digchip.com at this page

1 Publication Order Number:

UC3842B/D

UC3842B, UC3843B, UC2842B, UC2843B

MAXIMUM RATINGS

Rating Symbol Value Unit

Bias and Driver Voltages (Zero Series Impedance, see also Total Device spec) VCC, V

C

Total Power Supply and Zener Current (ICC + IZ) 30 mA

Output Current, Source or Sink I

O

Output Energy (Capacitive Load per Cycle) W 5.0

Current Sense, Voltage Feedback, V

Compensation V

Output V

Error Amp Output Sink Current I

and Rt/Ct Inputs V

ref

in

comp

o

O

Power Dissipation and Thermal Characteristics

D Suffix, Plastic Package, SOIC−14 Case 751A

Maximum Power Dissipation @ T

= 25°C

A

Thermal Resistance, Junction−to−Air

P

D

R

q

JA

D1 Suffix, Plastic Package, SOIC−8 Case 751

Maximum Power Dissipation @ T Thermal Resistance, Junction−to−Air

N Suffix, Plastic Package, Case 626

Maximum Power Dissipation @ T Thermal Resistance, Junction−to−Air

Operating Junction Temperature T

Operating Ambient Temperature

= 25°C

A

= 25°C

A

P

D

R

q

JA

P

D

R

q

JA

J

T

A

UC3842B, UC3843B UC2842B, UC2843B

UC2843D

UC3842BV, UC3843BV

Storage Temperature Range T

stg

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

1. This device series contains ESD protection and exceeds the following tests:

Human Body Model 4000 V per JEDEC Standard JESD22-A114B Machine Model Method 200 V per JEDEC Standard JESD22-A115-A

2. This device contains latch-up protection and exceeds 100 mA per JEDEC Standard JESD78

30 V

1.0 A

− 0.3 to + 5.5 V

− 0.3 to + 7.2 V

− 0.3 to VCC or

+ 0.3

V

C

10 mA

862 145

702 178

1.25 100

+150 °C

0 to 70

− 25 to + 85

−40 to +85

−40 to +105

− 65 to +150 °C

mJ

V

mW

°C/W

mW

°C/W

W

°C/W

°C

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UC3842B, UC3843B, UC2842B, UC2843B

ELECTRICAL CHARACTERISTICS (V

is the operating ambient temperature range that applies [Note 4], unless otherwise noted.)

T

A

= 15 V [Note 3], RT = 10 k, CT = 3.3 nF. For typical values TA = 25°C, for min/max values

CC

UC284XB, UC2843D UC384XB, XBV

Characteristics Symbol Min Typ Max Min Typ Max Unit

REFERENCE SECTION

Reference Output Voltage (I

= 1.0 mA, TJ = 25°C) V

O

Line Regulation (VCC = 12 V to 25 V) Reg

Load Regulation (IO = 1.0 mA to 20 mA) Reg

Temperature Stability T

Total Output Variation over Line, Load, and Temperature

V UC284XB UC2843D

Output Noise Voltage (f = 10 Hz to 10 kHz, TJ = 25°C) V

ref

load

S

ref

n

4.95 5.0 5.05 4.9 5.0 5.1 V

line

− 2.0 20 − 2.0 20 mV

− 3.0 25 − 3.0 25 mV

− 0.2 − − 0.2 − mV/°C

4.9

4.82

−

5.1

−

5.18

4.82 − 5.18

− 50 − − 50 −

Long Term Stability (TA = 125°C for 1000 Hours) S − 5.0 − − 5.0 − mV

Output Short Circuit Current I

SC

− 30 − 85 −180 − 30 − 85 −180 mA

OSCILLATOR SECTION

Df

f

OSC

I

dischg

/DV

/DT

49 48

225

52

−

250

55 56

275

49 48

225

52

−

250

55 56

275

− 0.2 1.0 − 0.2 1.0 %

− 1.0 − − 0.5 − %

− 1.6 − − 1.6 − V

7.8

7.5

8.3

−

8.8

−

8.8

−

7.8

7.6

−

7.2

8.3

8.8

−

8.8

−

8.8

Frequency

= 25°C

T

J

= T

T

to T

A

low

high

TJ = 25°C (RT = 6.2 k, CT = 1.0 nF)

Frequency Change with Voltage (VCC = 12 V to 25 V)

Frequency Change with Temperature, TA = T

low

to T

high

Oscillator Voltage Swing (Peak−to−Peak) V

Discharge Current (V

= 25°C, TA = T

T

J

OSC

low

= 2.0 V)

to T

high

UC284XB, UC384XB

UC2843D, UC384XBV

ERROR AMPLIFIER SECTION

Voltage Feedback Input (V

Input Bias Current (VFB = 5.0 V) I

Open Loop Voltage Gain (VO = 2.0 V to 4.0 V) A

= 2.5 V) UC284XB

O

UC2843D

V

VOL

FB

IB

2.45

2.42

2.5

2.55

2.58

2.42 2.5 2.58 V

− − 0.1 −1.0 − − 0.1 − 2.0

65 90 − 65 90 − dB

Unity Gain Bandwidth (TJ = 25°C) BW 0.7 1.0 − 0.7 1.0 − MHz

Power Supply Rejection Ratio (VCC = 12 V to 25 V) PSRR 60 70 − 60 70 − dB

Output Current

Sink (V

O

Source (V

= 1.1 V, VFB = 2.7 V)

= 5.0 V, VFB = 2.3 V)

O

I

Sink

I

Source

2.0

− 0.512−1.0

−

2.0

− 0.512−1.0

−

Output Voltage Swing

High State (R Low State (R

= 15 k to ground, VFB = 2.3 V)

L

= 15 k to V

L

, VFB = 2.7 V)

ref

UC284XB, UC384XB

UC2843D, UC384XBV

V

OH

V

OL

5.0

6.2

−

0.8

−

1.1

−

5.0

−

6.2

−

0.8

−

0.8

−

1.1

1.2

3. Adjust VCC above the Startup threshold before setting to 15 V.

4. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. T

= 0°C for UC3842B, UC3843B; −25°C for UC2842B, UC2843B; −40°C for UC3842BV, UC3843BV, UC2843D

low

T

= +70°C for UC3842B, UC3843B; +85°C for UC2842B, UC2843B, UC2843D; +105°C for UC3842BV, UC3843BV

high

V

mV

kHz

mA

V

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3

UC3842B, UC3843B, UC2842B, UC2843B

ELECTRICAL CHARACTERISTICS (V

T

is the operating ambient temperature range that applies [Note 8], unless otherwise noted.)

A

= 15 V [Note 7], RT = 10 k, CT = 3.3 nF. For typical values TA = 25°C, for min/max values

CC

UC284XB, UC2843D UC384XB, XBV

Characteristics Symbol Min Typ Max Min Typ Max Unit

CURRENT SENSE SECTION

Current Sense Input Voltage Gain (Notes 5 and 6)

UC2843D, UC284XB, UC384XB

UC384XBV

Maximum Current Sense Input Threshold (Note 5)

UC2843D, UC284XB, UC384XB

UC384XBV

A

V

th

2.85−3.0−3.15−2.85

2.85

0.9−1.0−1.1−0.9

0.85

3.0

1.0

3.15

3.25

1.1

Power Supply Rejection Ratio (VCC = 12 V to 25 V, Note 5) PSRR − 70 − − 70 − dB

Input Bias Current I

Propagation Delay (Current Sense Input to Output) t

PLH(In/Out)

IB

− − 2.0 −10 − − 2.0 −10

− 150 300 − 150 300 ns

OUTPUT SECTION

Output Voltage

Low State (I

= 20 mA)

Sink

= 200 mA) UC284XB, UC384XB

(I

Sink

UC384XBV, UC2843D

High State (I

= 20 mA) UC284XB, UC384XB

Source

UC384XBV, UC2843D

= 200 mA)

(I

Source

Output Voltage with UVLO Activated (VCC = 6.0 V, I

= 1.0 mA) V

Sink

OL(UVLO)

Output Voltage Rise Time (CL = 1.0 nF, TJ = 25°C) t

Output Voltage Fall Time (CL = 1.0 nF, TJ = 25°C) t

V

OL

V

OH

r

f

−

13

12

0.1

−

1.6

−

13.5

−

13.4

0.4

2.2

−

13

12.9 12

0.1

1.6

13.5

13.4

0.4

2.2

2.3

−

− 0.1 1.1 − 0.1 1.1 V

− 50 150 − 50 150 ns

UNDERVOLTAGE LOCKOUT SECTION

Startup Threshold (VCC)

UCX842B, BV

UCX843B, BV, D

Minimum Operating Voltage After Turn−On (VCC)

UCX842B, BV

UCX843B, BV, D

V

CC(min)

th

15

7.8168.4179.0

9.0

7.0107.6118.2

14.5

7.8168.4

8.5

7.0107.6

17.5

9.0

11.5

8.2

PWM SECTION

Duty Cycle

Maximum UC284XB, UC384XB, UC2843D

Maximum UC384XBV

Minimum

DC

(max)

(min)

94

96

−

94

−

96

−

93

−

0

96

−

0

TOTAL DEVICE

Power Supply Current

Startup (V

Startup V

= 6.5 V for UCX843B, UC2843D

CC

14 V for UCX842B, BV)

CC

(Note 7)

Power Supply Zener Voltage (ICC = 25 mA) V

I

+ I

CC

C

−

0.3120.5

−

Z

30 36 − 30 36 − V

17

−

0.3120.5

17

5. This parameter is measured at the latch trip point with VFB = 0 V.

6. Comparator gain is defined as: A

DV Output Compensation

V

DV Current Sense Input

7. Adjust VCC above the Startup threshold before setting to 15 V.

8. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. = 0°C for UC3842B, UC3843B; −25°C for UC2842B, UC2843B; −40°C for UC3842BV, UC3843BV, UC2843D

T

low

= +70°C for UC3842B, UC3843B; +85°C for UC2842B, UC2843B, UC2843D; +105°C for UC3842BV, UC3843BV

T

high

V/V

V

mA

V

%

mA

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UC3842B, UC3843B, UC2842B, UC2843B

Ω

, TIMING RESISTOR (k ) R

T

80

50

20

8.0

5.0

2.0

0.8

9.0

8.5

VCC = 15 V T

= 25°C

A

f

, OSCILLATOR FREQUENCY (kHz)

OSC

Figure 2. Timing Resistor

versus Oscillator Frequency

VCC = 15 V V

OSC

= 2.0 V

100

1. CT = 10 nF

2. C

= 5.0 nF

50

T

3. C

= 2.0 nF

T

4. CT = 1.0 nF

5. C

= 500 pF

20

T

6. C

7. CT = 100 pF

10

= 200 pF

T

1

5.0

2.0

% DT, PERCENT OUTPUT DEADTIME

1.0 M500 k200 k100 k50 k20 k10 k

1.0

f

, OSCILLATOR FREQUENCY (kHz)

OSC

2

5

VCC = 15 V T

= 25°C

A

4

3

7

6

1.0 M500 k200 k100 k50 k20 k10 k

Figure 3. Output Deadtime

versus Oscillator Frequency

100

90

80

8.0

, DISCHARGE CURRENT (mA)

7.5

dischg

I

7.0

2.55 V

2.50 V

2.45 V

-55

-25 0 25 50 75 100 125 T

, AMBIENT TEMPERATURE (°C)

A

Figure 4. Oscillator Discharge Current

versus Temperature

VCC = 15 V AV = -1.0 T

= 25°C

A

3.0 V

2.5 V

20 mV/DIV

2.0 V

70

60

50

, MAXIMUM OUTPUT DUTY CYCLE (%)

max

D

40

0.8

I

= 8.54 mA

dischg

VCC = 15 V C

= 3.3 nF

T

= 25°C

A

1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 , TIMING RESISTOR (kW)

R

T

Figure 5. Maximum Output Duty Cycle

versus Timing Resistor

VCC = 15 V AV = -1.0 T

= 25°C

A

20 mV/DIV

Figure 6. Error Amp Small Signal

Transient Response

1.0 ms/DIV0.5 ms/DIV

Figure 7. Error Amp Large Signal

Transient Response

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5

UC3842B, UC3843B, UC2842B, UC2843B

ÄÄÄ

100

80

60

40

20

, OPEN LOOP VOLTAGE GAIN (dB)

0

VOL

A

-20

Figure 8. Error Amp Open Loop Gain and

0

-4.0

-8.0

VCC = 15 V V

= 2.0 V to 4.0 V

O

R

= 100 K

Gain

L

T

= 25°C

A

Phase

100 1.0 k 10 k 100 k 1.0 M

f, FREQUENCY (Hz)

Phase versus Frequency

VCC = 15 V

0

30

60

90

120

150

180

10 M10

1.2

1.0

0.8

0.6

0.4

, EXCESS PHASE (DEGREES)

0.2

φ

, CURRENT SENSE INPUT THRESHOLD (V)

th

V

110

90

VCC = 15 V

TA = 25°C

TA = 125°C

TA = -55°C

0

2.0 4.0 6.0 8.0

, ERROR AMP OUTPUT VOLTAGE (V)

V

O

Figure 9. Current Sense Input Threshold

versus Error Amp Output Voltage

VCC = 15 V

≤ 0.1 W

R

L

-12 TA = 125°C

-16

-20

, REFERENCE VOLTAGE CHANGE (mV)

ref

V

Δ

-24 0

20 40 60 80 100 120

I

ref

Figure 10. Reference Voltage Change

, OUTPUT VOLTAGE CHANGE (2.0 mV/DIV)

O

V

Δ

Figure 12. Reference Load Regulation Figure 13. Reference Line Regulation

TA = -55°C

TA = 25°C

, REFERENCE SOURCE CURRENT (mA)

versus Source Current

VCC = 15 V I

= 1.0 mA to 20 mA

O

T

= 25°C

A

2.0 ms/DIV 2.0 ms/DIV

70

, REFERENCE SHORT CIRCUIT CURRENT (mA)

50

-55

SC

I

-25 0 25 50 75 100 125

Figure 11. Reference Short Circuit Current

, OUTPUT VOLTAGE CHANGE (2.0 mV/DIV)

O

V

Δ

, AMBIENT TEMPERATURE (°C)

T

A

versus Temperature

VCC = 12 V to 25 T

= 25°C

A

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6

UC3842B, UC3843B, UC2842B, UC2843B

0

-1.0

-2.0

3.0

2.0

1.0

, OUTPUT SATURATION VOLTAGE (V)

sat

V

0

, OUTPUT VOLTAGE

O

V, SUPPLY CURRENT

CC

I

V

CC

TA = 25°C

Source Saturation (Load to Ground)

VCC = 15 V

80 ms Pulsed Load

120 Hz Rate

TA = -55°C

TA = 25°C

Sink Saturation (Load to VCC)

GND

200 400 600

, OUTPUT LOAD CURRENT (mA)

I

O

Figure 14. Output Saturation Voltage

versus Load Current

VCC = 30 V C

= 15 pF

L

T

= 25°C

A

100 ns/DIV

8000

100 mA/DIV 20 V/DIV

90%

10%

25

20

15

10

, SUPPLY CURRENT (mA)

CC

I

VCC = 15 V C

= 1.0 nF

L

T

= 25°C

A

50 ns/DIV

Figure 15. Output Waveform

RT = 10 k C

= 3.3 nF

T

V

= 0 V

5

0

UCX843B

UCX842B

10 20 30 40

V

, SUPPLY VOLTAGE (V)

CC

FB

I

Sense

T

= 25°C

A

= 0 V

Figure 16. Output Cross Conduction

Figure 17. Supply Current versus Supply Voltage

PIN FUNCTION DESCRIPTION

8−Pin 14−Pin Function Description

1 1 Compensation This pin is the Error Amplifier output and is made available for loop compensation.

2 3 Voltage

Feedback

3 5 Current

Sense

4 7 RT/C

T

5 GND This pin is the combined control circuitry and power ground.

6 10 Output This output directly drives the gate of a power MOSFET. Peak currents up to 1.0 A are sourced

7 12 V

8 14 V

CC

ref

8 Power

Ground

11 V

C

9 GND This pin is the control circuitry ground return and is connected back to the power source ground.

2,4,6,1

NC No connection. These pins are not internally connected.

3

This is the inverting input of the Error Amplifier. It is normally connected to the switching power supply output through a resistor divider.

A voltage proportional to inductor current is connected to this input. The PWM uses this information to terminate the output switch conduction.

The Oscillator frequency and maximum Output duty cycle are programmed by connecting resistor

to V

R

and capacitor CT to ground. Operation to 500 kHz is possible.

T

ref

and sunk by this pin.

This pin is the positive supply of the control IC.

This is the reference output. It provides charging current for capacitor CT through resistor RT.

This pin is a separate power ground return that is connected back to the power source. It is used to reduce the effects of switching transient noise on the control circuitry.

The Output high state (VOH) is set by the voltage applied to this pin. With a separate power source connection, it can reduce the effects of switching transient noise on the control circuitry.

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7

UC3842B, UC3843B, UC2842B, UC2843B

OPERATING DESCRIPTION

The UC3842B, UC3843B series are high performance, fixed frequency, current mode controllers. They are specifically designed for Off−Line and DC−to−DC converter applications offering the designer a cost−effective solution with minimal external components. A representative block diagram is shown in Figure 19.

Oscillator

The oscillator frequency is programmed by the values chosen for the timing components R noted that the value of R

and CT. It must also be

T

uniquely determines the

T

maximum duty ratio of UC384xx. The oscillator configuration depicting the connection of the timing components to the R Figure 18. Capacitor C through resistor R

pin of the controller is shown in

T/CT

gets charged from the V

T

to its peak threshold V

T

source,

ref

RT/CT(peak)

typically 2.8 V. Upon reaching this peak threshold volage, an internal 8.3 mA current source, I voltage across C across C

T

typically 1.2 V, I charge up again from V resulting waveform on the R

begins to decrease. Once the voltage

T

reaches its valley threshold, V

turns off. This allows capacitor C

dischg

. This entire cycle repeats, and the

ref

T/CT

, is enabled and the

dischg

RT/CT(valley)

T

pin has a sawtooth shape.

Typical waveforms are shown in Figure 20.

The oscillator thresholds are temperature compensated to within ±6% at 50 kHz. Considering the general industry trend of operating switching controllers at higher frequencies, the UC384xx is guaranteed to operate within ±10% at 250 kHz

. These internal circuit refinements

minimize variations of oscillator frequency and maximum duty ratio.

The charging and discharging times of the timing capacitor C

are calculated using Equations 1 and 2. These

T

equations do not take into account the propagation delays of the internal comparator. Hence, at higher frequencies, the calculated value of the oscillator frequency differs from the actual value.

t

RTńCT(chg)

t

RTńCT(dischg)

+ RTCTln

ǒ

RTI

The maximum duty ratio, D

D

+

max

t

RTńCT(chg)

V

RTńCT(valley)

ǒ

V

RTńCT(peak)

RTI

dischg

max

t

RTńCT(chg)

* V

ref

Ǔ

* V

ref

) V

RTńCT(peak)

RTńCT(valley)

* V

ref

is given by Equation 3.

) t

RTńCT(dischg)

(eq. 1)

Ǔ

ref

(eq. 2)

(eq. 3)

Substituting Equations 1 and 2 into Equation 3, and after algebraic simplification, we obtain

V

RTńCT(valley)

ǒ

ln

V

D

+

max

V

ǒ

ln

V

RTńCT(valley)

RTńCT(peak)

*V

ref

RTńCT(peak)

@

RTI

dischg

*V

ref

*V

ref

)V

RTńCT(peak)

)V

RTńCT(valley)

Ǔ

*V

ref

Ǔ

*V

ref

(eq. 4)

Clearly, the maximum duty ratio is determined by the timing resistor R achieve a desired maximum duty ratio. Once R selected, C

. Therefore, RT is chosen such as to

T

has been

T

can now be chosen to obtain the desired

T

switching frequency as per Equation 5.

f +

RTCTln

V

RTńCT(valley)

ǒ

V

RTńCT(peak)

,

*V

1

RTI

ref

@

RTI

ref

dischg

RTńCT(peak)

)V

RTńCT(valley)

)V

dischg

*V

ref

Ǔ

ref

(eq. 5)

Figure 2 shows the frequency and maximum duty ratio variation taken to ensure that the absolute minimum value of R should not be less than 542 W. However, considering a 10%

,

to

tolerance for the timing resistor, the nearest available

versus R

for given values of CT. Care should be

T

standard resistor of 680 W is the absolute minimum that can be used to guarantee normal oscillator operation. If a timing resistor smaller than this value is used, then the charging current through the R

, CT path will exceed the pulldown

T

(discharge) current and the oscillator will get permanently locked/latched to an undefined state.

In many noise-sensitive applications it may be desirable to frequency-lock the converter to an external system clock. This can be accomplished by applying a clock signal to the circuit shown in Figure 22. For reliable synchronization, the free-running oscillator frequency should be set about 10% less than the clock frequency. A method for multi-unit synchronization is shown in Figure 23. By tailoring the clock waveform, accurate Output duty ratio clamping can be achieved.

V

ref

R

T

RT/C

T

I

Enable

dischg

Figure 18. Oscillator Configuration

2.8 V

1.2 V

C

T

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