Page 1
NVTFS6H850NL
Power MOSFET
80 V, 8.6 mW, 64 A, Single N−Channel
Features
• Small Footprint (3.3 x 3.3 mm) for Compact Design
• Low R
• Low Capacitance to Minimize Driver Losses
• NVTFS6H850NLWF − Wettable Flanks Product
• AEC−Q101 Qualified and PPAP Capable
• These Devices are Pb−Free and are RoHS Compliant
MAXIMUM RATINGS (T
Drain−to−Source Voltage V
Gate−to−Source Voltage V
Continuous Drain
Current R
(Notes 1, 2, 3, 4)
Power Dissipation
(Notes 1, 2, 3)
R
q
JC
Continuous Drain
Current R
(Notes 1, 3, 4)
Power Dissipation
(Notes 1, 3)
R
q
JA
Pulsed Drain Current
Operating Junction and Storage Temperature
Range
Source Current (Body Diode) I
Single Pulse Drain−to−Source Avalanche
Energy (I
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL RESISTANCE MAXIMUM RATINGS (Note 1)
Junction−to−Case − Steady State (Note 3)
Junction−to−Ambient − Steady State (Note 3)
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Psi (Y) is used as required per JESD51−12 for packages in which
substantially less than 100% of the heat flows to single case surface.
3. Surface−mounted on FR4 board using a 650 mm
4. Continuous DC current rating. Maximum current for pulses as long as 1
second is higher but is dependent on pulse duration and duty cycle.
to Minimize Conduction Losses
DS(on)
= 25°C unless otherwise noted)
J
Parameter
q
JC
q
JA
L(pk)
= 3.4 A)
Steady
State
Steady
State
TC = 25°C, t
Parameter Symbol Value Unit
TC = 25°C
TC = 100°C 45
TC = 25°C
TC = 100°C 37
TA = 25°C
TA = 100°C 10.4
TA = 25°C
TA = 100°C 1.9
= 10 ms
p
Symbol Value Unit
DSS
GS
I
D
P
D
I
D
P
D
I
DM
TJ, T
stg
S
E
AS
T
L
R
q
JC
R
q
JA
2
, 2 oz. Cu pad.
80 V
±20 V
64
73
14.8
3.9
308 A
−55 to
+175
61 A
208 mJ
260 °C
2.0
39
A
W
A
W
°C
°C/W
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V
(BR)DSS
80 V
G (4)
R
MAX ID MAX
DS(on)
8.6 mW @ 10 V
11 m W @ 4.5 V
N−Channel
D (5 − 8)
64 A
S (1, 2, 3)
MARKING DIAGRAM
1
WDFN8
(m8FL)
CASE 511AB
XXXX = Specific Device Code
A = Assembly Location
Y = Year
WW = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
1
S
XXXX
S
AYWWG
S
G
G
D
D
D
D
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2018
February, 2019 − Rev. 0
1 Publication Order Number:
NVTFS6H850NL/D
Page 2
NVTFS6H850NL
ELECTRICAL CHARACTERISTICS (T
Parameter
= 25°C unless otherwise noted)
J
Symbol Test Condition Min Typ Max Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Drain−to−Source Breakdown Voltage
Temperature Coefficient
Zero Gate Voltage Drain Current I
Gate−to−Source Leakage Current I
V
(BR)DSS
V
(BR)DSS/TJ
DSS
GSS
VGS = 0 V, ID = 250 mA
VGS = 0 V,
V
= 80 V
DS
VDS = 0 V, VGS = 20 V 100 nA
ON CHARACTERISTICS (Note 5)
Drain−to−Source On Resistance
R
DS(on)
VGS = 10 V, ID = 10 A 7.1 8.6 mW
VGS = 4.5 V, ID = 10 A 8.9 11
Gate Threshold Voltage V
Gate Threshold Voltage Temperature
Coefficient
V
GS(TH)/TJ
Forward Transconductance g
GS(TH)
FS
VGS = VDS, ID = 70 mA
VDS = 8 V, ID = 10 A 64.1 S
CHARGES AND CAPACITANCES
Input Capacitance C
Reverse Transfer Capacitance C
Output Capacitance C
Total Gate Charge Q
Total Gate Charge Q
Gate−to−Source Charge Q
Gate−to−Drain Charge Q
iss
rss
oss
G(TOT)
G(TOT)
GS
GD
VGS = 0 V, f = 1.0 MHz
V
= 40 V
DS
VGS = 10 V, VDS = 40 V, ID = 10 A 26 nC
VGS = 4.5 V, VDS = 40 V, ID = 10 A
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Turn−Off Delay Time t
Rise Time t
Fall Time t
t
d(on)
d(off)
VGS = 4.5 V, VDS = 64 V,
= 10 A, RG = 2.5 mW
I
r
f
D
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time t
Charge Time t
Discharge Time t
Reverse Recovery Charge Q
V
SD
RR
a
b
RR
VGS = 0 V,
I
= 10 A
S
VGS = 0 V, dl/dt = 100 A/ms,
I
= 10 A
S
5. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.
6. Switching characteristics are independent of operating junction temperatures.
80 V
44.2 mV/°C
TJ = 25°C 10 mA
TJ = 125°C 250
1.2 1.6 2.0 V
−5.2 mV/°C
1450 pF
10 pF
182 pF
13
4.0
4.2
9
21
26
5
TJ = 25°C 0.8 1.2
TJ = 125°C 0.7
37
22
15
40 nC
ns
V
ns
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2
Page 3
NVTFS6H850NL
TYPICAL CHARACTERISTICS
70
60
50
40
30
20
, DRAIN CURRENT (A)
D
I
10
0
147
023568
VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)
VGS = 3.4 V to 10 V
3.2 V
3.0 V
2.8 V
2.6 V
2.4 V
70
VDS = 10 V
60
50
40
30
20
, DRAIN CURRENT (A)
D
I
10
0
0.5 1.5 2.5 3.5
0 1.0 2.0 3.0 4.0
TJ = 25°C
TJ = 125°C
TJ = −55°C
Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics
24
22
20
18
16
14
12
10
8
6
, DRAIN−TO−SOURCE RESISTANCE (mW)
4
34 5 6 7 8 9101010 15 35 40 50
DS(on)
R
VGS, GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)
TJ = 25°C
= 10 A
I
D
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
TJ = 25°C
VGS = 4.5 V
VGS = 10 V
, DRAIN−TO−SOURCE RESISTANCE (mW)
DS(on)
R
9
8
7
6
5
25 30 45
20
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
2.5
VGS = 10 V
= 10 A
I
D
2.0
1.5
, NORMALIZED DRAIN−TO−
1.0
SOURCE RESISTANCE
DS(on)
R
0.5
−50 −25 0 25 50 75 100 125 150 175
TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
1000
100
10
1
, LEAKAGE (nA)
0.1
DSS
I
0.01
0.001
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3
TJ = 175°C
TJ = 150°C
TJ = 125°C
TJ = 85°C
TJ = 25°C
5152535
45 55
65 75
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
Page 4
NVTFS6H850NL
TYPICAL CHARACTERISTICS
10,000
1000
100
10
C, CAPACITANCE (pF)
1
VGS = 0 V
= 25°C
T
J
f = 1 MHz
0 1020 3040
VDS, DRAIN−TO−SOURCE VOLTAGE (V) QG, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation Figure 8. Gate−to−Source vs. Total Charge
100
t
r
10
C
ISS
C
OSS
C
RSS
60 70
50 80 15 25
8
6
4
Q
GS
Q
GD
2
, GATE−TO−SOURCE VOLTAGE (V)
GS
0
V
0510
VDS = 40 V
= 25°C
T
J
I
= 10 A
D
20
10
VGS = 0 V
t
10
d(off)
t
d(on)
t, TIME (ns)
VGS = 4.5 V
V
t
f
1
1 100
10
DS
I
= 10 A
D
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
1000
TC = 25°C
≤ 10 V
V
GS
Single Pulse
100
10
, DRAIN CURRENT (A)
1
D
I
R
DS(on)
Limit
Thermal Limit
Package Limit
10 ms
0.5 ms
10 ms
0.1
1 10 1000.1
VDS, DRAIN−TO−SOURCE VOLTAGE (V) TIME IN AVALANCHE (s)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
= 64 V
1 ms
1000
, SOURCE CURRENT (A)
S
I
1
TJ = 125°C TJ = 25°C TJ = −55°C
0.4
0.3 0.5 0.6 1.0
V
, SOURCE−TO−DRAIN VOLTAGE (V)
SD
0.7 0.8 0.9
Figure 10. Diode Forward Voltage vs. Current
100
TJ (initial) = 25°C
10
, (A)
PEAK
I
TJ (initial) = 100°C
1
0.1
0.00001 0.001 0.010.0001
Figure 12. Maximum Drain Curent vs. Time in
Avalanche
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4
Page 5
NVTFS6H850NL
TYPICAL CHARACTERISTICS
100
50% Duty Cycle
20%
10
10%
5%
2%
1
R(t) (°C/W)
DEVICE ORDERING INFORMATION
NVTFS6H850NLTAG 850L WDFN8
NVTFS6H850NLWFTAG 50LW WDFN8
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
1%
0.1
Single Pulse
0.01
0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000
PULSE TIME (sec)
Figure 13. Thermal Characteristics
Device Marking Package Shipping
1500 / Tape & Reel
(Pb−Free)
1500 / Tape & Reel
(Pb−Free, Wettable Flanks)
†
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5
Page 6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
1
SCALE 2:1
0.05
E2
G
0.10 C
0.10 C
8X
C
A0.10 B
C
4X
E3
1234
TOP VIEW
SIDE VIEW
b
L
14
8
BOTTOM VIEW
D1
78
D2
2X
C
0.20
D
A
B
2X
56
E
E1
0.20 C
c
A
DETAIL A
e/2
K
M
5
L1
WDFN8 3.3x3.3, 0.65P
CASE 511AB
ISSUE D
4X
q
A1
6X
e
DETAIL A
C
SEATING
PLANE
0.75
DATE 23 APR 2012
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH
PROTRUSIONS OR GATE BURRS.
DIM MIN NOM
MILLIMETERS
A 0.70 0.75
A1 0.00 −−−
b 0.23 0.30
c 0.15 0.20
D
D1 2.95 3.05
D2 1.98 2.11
E
E1 2.95 3.05
E2 1.47 1.60
E3 0.23 0.30 0.40
e 0.65 BSC
G 0.30 0.41
K 0.65 0.80
L 0.30 0.43
L1 0.06 0.13
M 1.40 1.50
q 0 −−−
3.30 BSC
3.30 BSC
_
MAX
0.80
0.05
0.40
0.25
3.15
2.24
3.15
1.73
0.51
0.95
0.56
0.20
1.60
12
_
INCHES
MIN NOM
0.028 0.030
0.000 −−−
0.009 0.012
0.006 0.008
0.130 BSC
0.116 0.120
0.078 0.083
0.130 BSC
0.116 0.120
0.058 0.063
0.009 0.012 0.016
0.026 BSC
0.012 0.016
0.026 0.032
0.012 0.017
0.002 0.005
0.055 0.059
0 −−−
_
MAX
0.031
0.002
0.016
0.010
0.124
0.088
0.124
0.068
0.020
0.037
0.022
0.008
0.063
12
SOLDERING FOOTPRINT*
PACKAGE
OUTLINE
0.57
8X
0.650.42
PITCH
2.30
4X
0.66
3.60
_
GENERIC
MARKING DIAGRAM*
1
XXXXX
AYWWG
G
XXXXX = Specific Device Code
A = Assembly Location
Y = Year
WW = Work Week
G = Pb−Free Package
*This information is generic. Please refer
to device data sheet for actual part
marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
DOCUMENT NUMBER:
DESCRIPTION:
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
98AON30561E
WDFN8 3.3X3.3, 0.65P
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
0.47
2.37
3.46
DIMENSION: MILLIMETERS
PAGE 1 OF 1
© Semiconductor Components Industries, LLC, 2019
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