• Small Footprint (3.3 x 3.3 mm) for Compact Design
• Low R
• Low Capacitance to Minimize Driver Losses
• NVTFWS005N04C − Wettable Flanks Product
• AEC−Q101 Qualified and PPAP Capable
• These Devices are Pb−Free and are RoHS Compliant
MAXIMUM RATINGS (T
Drain−to−Source VoltageV
Gate−to−Source VoltageV
Continuous Drain
Current R
(Notes 1, 2, 3, 4)
Power Dissipation
(Notes 1, 2, 3)
R
q
JC
Continuous Drain
Current R
(Notes 1, 3, 4)
Power Dissipation
(Notes 1, 3)
R
q
JA
Pulsed Drain Current
Operating Junction and Storage Temperature
Range
Source Current (Body Diode)I
Single Pulse Drain−to−Source Avalanche
Energy (I
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL RESISTANCE MAXIMUM RATINGS (Note 1)
Junction−to−Case − Steady State (Note 3)
Junction−to−Ambient − Steady State (Note 3)
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Psi (Y) is used as required per JESD51−12 for packages in which
substantially less than 100% of the heat flows to single case surface.
3. Surface−mounted on FR4 board using a 650 mm
4. Continuous DC current rating. Maximum current for pulses as long as 1
second is higher but is dependent on pulse duration and duty cycle.
to Minimize Conduction Losses
DS(on)
= 25°C unless otherwise noted)
J
Parameter
q
JC
q
JA
L(pk)
= 4.6 A)
Steady
State
Steady
State
TA = 25°C, t
ParameterSymbolValueUnit
TC = 25°C
TC = 100°C39
TC = 25°C
TC = 100°C16
TA = 25°C
TA = 100°C12
TA = 25°C
TA = 100°C1.6
= 10 ms
p
SymbolValueUnit
DSS
GS
I
D
P
D
I
D
P
D
I
DM
TJ, T
stg
S
E
AS
T
L
R
q
JC
R
q
JA
2
, 2 oz. Cu pad.
40V
±20V
69
50
17
3.1
297A
−55 to
+175
42A
103mJ
260°C
3.0
47.7
A
W
A
W
°C
°C/W
www.onsemi.com
V
(BR)DSS
40 V
G (4)
R
MAXID MAX
DS(on)
5.6 mW @ 10 V
N−Channel
D (5 − 8)
69 A
S (1, 2, 3)
MARKING DIAGRAM
1
WDFN8
(m8FL)
CASE 511AB
XXXX= Specific Device Code
A= Assembly Location
Y= Year
WW= Work Week
G= Pb−Free Package
(Note: Microdot may be in either location)
1
S
XXXX
S
AYWWG
S
G
G
D
D
D
D
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
6. Switching characteristics are independent of operating junction temperatures.
40−−V
TJ = 25°C−−10mA
TJ = 125°C−−250
2.5−3.5V
−1000−
−530−
−22−
−3.2−
−5.7−
−2.7−
−11−
−72−
−24−
−8−
TJ = 25°C−0.871.2
TJ = 125°C−0.75−
−36−
−17−
−18−
−16−nC
mW
pF
nC
ns
V
ns
www.onsemi.com
2
Page 3
NVTFS005N04C
TYPICAL CHARACTERISTICS
200
180
160
140
120
100
80
60
, DRAIN CURRENT (A)
D
I
40
20
VGS = 10 V
0
VDS, DRAIN−TO−SOURCE VOLTAGE (V)VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region CharacteristicsFigure 2. Transfer Characteristics
7.0
6.5
6.0
5.5
9 V
8 V
4.0 V
2
7.0 V
6.0 V
5.6 V
5.2 V
4.8 V
4.4 V
TJ = 25°C
= 35 A
I
D
120
100
80
60
40
, DRAIN CURRENT (A)
D
I
20
310
0
6.0
5.5
5.0
4.5
TJ = 25°C
TJ = 25°C
TJ = 125°C
4.5
TJ = −55°C
5.05.5
VGS = 10 V
6.04.03.53.0
5.0
4.5
, DRAIN−TO−SOURCE RESISTANCE (mW)
4.0
DS(on)
R
, NORMALIZED DRAIN−TO−
SOURCE RESISTANCE
DS(on)
R
3
VGS, GATE−TO−SOURCE VOLTAGE (V)ID, DRAIN CURRENT (A)
6
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
2.0
VGS = 10 V
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
= 35 A
I
D
50175
TJ, JUNCTION TEMPERATURE (°C)VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
4.0
3.5
, DRAIN−TO−SOURCE RESISTANCE (mW)
3.0
1098754
1030
DS(on)
R
4060
5070
8020
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
100K
10K
1K
100
, LEAKAGE (nA)
10
DSS
I
1
15012510075250−25−50
0.1
1020
TJ = 175°C
TJ = 150°C
TJ = 125°C
TJ = 85°C
TJ = 25°C
40353025155
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
www.onsemi.com
3
Page 4
NVTFS005N04C
TYPICAL CHARACTERISTICS
10K
1K
100
C, CAPACITANCE (pF)
VGS = 0 V
T
f = 1 MHz
10
1K
100
t
d(off)
t
t, TIME (ns)
d(on)
10
1
Figure 9. Resistive Switching Time Variation
10
9
8
C
C
ISS
OSS
7
Q
6
GS
Q
GD
5
4
3
2
= 25°C
J
C
RSS
3525155
403020100
, GATE−TO−SOURCE VOLTAGE (V)
1
GS
0
V
48
10
VDS, DRAIN−TO−SOURCE VOLTAGE (V)QG, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance VariationFigure 8. Gate−to−Source Voltage vs. Total
Charge
100
VGS = 0 V
t
r
10
t
f
VGS = 10 V
= 32 V
V
DS
I
= 35 A
D
, SOURCE CURRENT (A)
S
I
1
TJ = 125°C
TJ = 25°CTJ = −55°C
100101
V
RG, GATE RESISTANCE (W)
, SOURCE−TO−DRAIN VOLTAGE (V)
SD
Figure 10. Diode Forward Voltage vs. Current
vs. Gate Resistance
VDS = 32 V
= 25°C
T
J
I
= 35 A
D
1412620
0.90.81.00.70.60.50.40.3
16
1000
100
10
VGS ≤ 10 V
Single Pulse
TC = 25°C
, DRAIN CURRENT(A)
1
D
I
0.1
VDS, DRAIN−TO−SOURCE VOLTAGE (V)TIME IN AVALANCHE (s)
Figure 11. Maximum Rated Forward Biased
R
Limit
DS(on)
Thermal Limit
Package Limit
Safe Operating Area
10 ms
0.5 ms
1 ms
10 ms
100
100
10
(A)
PEAK
I
1
0.1
10001010.1
www.onsemi.com
4
T
= 25°C
J(initial)
T
= 100°C
J(initial)
0.000010.01
Figure 12. I
0.0001
PEAK
vs. Time in Avalanche
0.001
Page 5
100
R(t) (°C/W)
0.1
Duty Cycle = 0.5
0.2
10
0.1
0.05
0.02
1
0.01
Single Pulse
NVTFS005N04C
TYPICAL CHARACTERISTICS
0.01
10010.010.000010.001
PULSE TIME (sec)
1000100.10.00010.000001
Figure 13. Thermal Characteristics
DEVICE ORDERING INFORMATION
DeviceMarkingPackageShipping
NVTFS005N04CTAG05NCWDFN8
(Pb−Free)
NVTFWS005N04CTAG05NWWDFN8
(Pb−Free, Wettable Flanks)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
1500 / Tape & Reel
1500 / Tape & Reel
†
www.onsemi.com
5
Page 6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
1
SCALE 2:1
0.05
E2
G
0.10 C
0.10 C
8X
C
A0.10B
C
4X
E3
1234
TOP VIEW
SIDE VIEW
b
L
14
8
BOTTOM VIEW
D1
78
D2
2X
C
0.20
D
A
B
2X
56
E
E1
0.20 C
c
A
DETAIL A
e/2
K
M
5
L1
WDFN8 3.3x3.3, 0.65P
CASE 511AB
ISSUE D
4X
q
A1
6X
e
DETAIL A
C
SEATING
PLANE
0.75
DATE 23 APR 2012
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH
PROTRUSIONS OR GATE BURRS.
DIMMINNOM
MILLIMETERS
A0.700.75
A10.00−−−
b0.230.30
c0.150.20
D
D12.953.05
D21.982.11
E
E12.953.05
E21.471.60
E30.230.300.40
e0.65 BSC
G0.300.41
K0.650.80
L0.300.43
L10.060.13
M1.401.50
q0 −−−
3.30 BSC
3.30 BSC
_
MAX
0.80
0.05
0.40
0.25
3.15
2.24
3.15
1.73
0.51
0.95
0.56
0.20
1.60
12
_
INCHES
MINNOM
0.0280.030
0.000−−−
0.0090.012
0.0060.008
0.130 BSC
0.1160.120
0.0780.083
0.130 BSC
0.1160.120
0.0580.063
0.0090.0120.016
0.026 BSC
0.0120.016
0.0260.032
0.0120.017
0.0020.005
0.0550.059
0 −−−
_
MAX
0.031
0.002
0.016
0.010
0.124
0.088
0.124
0.068
0.020
0.037
0.022
0.008
0.063
SOLDERING FOOTPRINT*
PACKAGE
OUTLINE
0.57
8X
0.650.42
PITCH
2.30
4X
0.66
3.60
12
_
GENERIC
MARKING DIAGRAM*
1
XXXXX
AYWWG
G
XXXXX = Specific Device Code
A= Assembly Location
Y= Year
WW= Work Week
G= Pb−Free Package
*This information is generic. Please refer
to device data sheet for actual part
marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
DOCUMENT NUMBER:
DESCRIPTION:
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
98AON30561E
WDFN8 3.3X3.3, 0.65P
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
. ON Semiconductor reserves the right to make changes without further notice to any products herein.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Email Requests to: orderlit@onsemi.com
ON Semiconductor Website: www.onsemi.com
TECHNICAL SUPPORT
North American Technical Support: