NVMFS6H800N
MOSFET – Power, Single
N-Channel
80 V, 2.1 mW, 203 A
Features
• Small Footprint (5x6 mm) for Compact Design
• Low R
• Low Q
to Minimize Conduction Losses
DS(on)
and Capacitance to Minimize Driver Losses
G
• NVMFS6H800NWF − Wettable Flank Option for Enhanced Optical
Inspection
• AEC−Q101 Qualified and PPAP Capable
• These Devices are Pb−Free and are RoHS Compliant
MAXIMUM RATINGS (T
Parameter
Drain−to−Source Voltage V
Gate−to−Source Voltage V
Continuous Drain
Current R
(Notes 1, 3)
Power Dissipation
R
q
JC
Continuous Drain
Current R
(Notes 1, 2, 3)
Power Dissipation
R
q
JA
Pulsed Drain Current
Operating Junction and Storage Temperature TJ, T
Source Current (Body Diode) I
Single Pulse Drain−to−Source Avalanche
Energy (I
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
q
JC
(Note 1)
q
JA
(Notes 1 & 2)
= 16.1 A)
L(pk)
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter Symbol Value Unit
Junction−to−Case − Steady State
Junction−to−Ambient − Steady State (Note 2)
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Surface−mounted on FR4 board using a 650 mm
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
= 25°C unless otherwise noted)
J
Symbol Value Unit
TC = 25°C
Steady
State
Steady
State
TA = 25°C, t
TC = 100°C 143
TC = 25°C
TC = 100°C 100
TA = 25°C
TA = 100°C 20
TA = 25°C
TA = 100°C 1.9
= 10 ms
p
P
P
I
E
R
q
R
q
2
, 2 oz. Cu pad.
DSS
GS
I
D
D
I
D
D
DM
S
AS
T
L
JC
JA
stg
80 V
±20 V
203
200
28
3.8
900 A
−55 to
+ 175
166 A
1271 mJ
260 °C
0.75
°C/W
39
A
W
A
W
°C
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V
(BR)DSS
80 V
G (4)
R
MAX ID MAX
DS(ON)
2.1 mW @ 10 V
D (5,6)
S (1,2,3)
N−CHANNEL MOSFET
203 A
MARKING
DIAGRAM
1
DFN5
(SO−8FL)
CASE 488AA
STYLE 1
XXXXXX = 6H800N
XXXXXX = (NVMFS6H800N) or
XXXXXX = 800NWF
XXXXXX = (NVMFS6H800NWF)
A = Assembly Location
Y = Year
W = Work Week
ZZ = Lot Traceability
S
S
S
G
D
D
XXXXXX
AYWZZ
D
D
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2017
July, 2019 − Rev. 1
1 Publication Order Number:
NVMFS6H800N/D
NVMFS6H800N
ELECTRICAL CHARACTERISTICS (T
Parameter
= 25°C unless otherwise specified)
J
Symbol Test Condition Min Typ Max Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Drain−to−Source Breakdown Voltage
V
V
Temperature Coefficient
Zero Gate Voltage Drain Current I
Gate−to−Source Leakage Current I
(BR)DSS
(BR)DSS
T
J
DSS
GSS
VGS = 0 V, ID = 250 mA
/
VGS = 0 V,
V
= 80 V
DS
TJ = 25 °C 10
TJ = 125°C 250
VDS = 0 V, VGS = 20 V 100 nA
80 V
39
mV/°C
mA
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
Threshold Temperature Coefficient V
V
GS(TH)/TJ
Drain−to−Source On Resistance R
Forward Transconductance g
GS(TH)
DS(on)
FS
VGS = VDS, ID = 330 mA
VGS = 10 V ID = 50 A 1.8 2.1
VDS =15 V, ID = 50 A 138 S
2.0 4.0 V
8.0 mV/°C
mW
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
Output Capacitance C
Reverse Transfer Capacitance C
Total Gate Charge Q
Threshold Gate Charge Q
Gate−to−Source Charge Q
Gate−to−Drain Charge Q
Plateau Voltage V
C
ISS
OSS
RSS
G(TOT)
G(TH)
GS
GD
GP
VGS = 0 V, f = 1 MHz, VDS = 40 V
VGS = 10 V, VDS = 40 V; ID = 50 A 85
VGS = 10 V, VDS = 40 V; ID = 50 A
5530
760
27
15
26
16
4.8 V
pF
nC
SWITCHING CHARACTERISTICS (Note 5)
Turn−On Delay Time
t
d(ON)
Rise Time t
Turn−Off Delay Time t
d(OFF)
Fall Time t
r
f
VGS = 10 V, VDS = 64 V,
= 50 A, RG = 2.5 W
I
D
25
89
97
85
ns
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time t
Charge Time t
Discharge Time t
Reverse Recovery Charge Q
V
SD
RR
a
b
RR
VGS = 0 V,
I
= 50 A
S
VGS = 0 V, dIS/dt = 100 A/ms,
I
= 50 A
S
TJ = 25°C 0.8 1.2
TJ = 125°C 0.7
76
36
40
82 nC
V
ns
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
5. Switching characteristics are independent of operating junction temperatures.
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2
NVMFS6H800N
TYPICAL CHARACTERISTICS
350
300
250
200
150
100
, DRAIN CURRENT (A)
D
I
50
0
0123 5
5.5 V to 10 V
VGS = 4.0 V
4
V
, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)
DS
678
Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics
40
35
30
25
20
15
10
5
, DRAIN−TO−SOURCE RESISTANCE (mW)
0
34 5 6 7 8 910
DS(on)
R
VGS, GATE−TO−SOURCE VOLTAGE (V)
TJ = 25°C
= 50 A
I
D
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
5.0 V
4.5 V
350
VDS = 10 V
300
250
200
150
100
, DRAIN CURRENT (A)
D
I
50
0
23
3.0
TJ = 25°C
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
, DRAIN−TO−SOURCE RESISTANCE (mW)
1.0
0 50 200
DS(on)
R
TJ = 25°C
TJ = 125°C
100 250
ID, DRAIN CURRENT (A)
TJ = −55°C
45 6
150 300
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
VGS = 10 V
2.4
VGS = 10 V
, NORMALIZED DRAIN−TO−
SOURCE RESISTANCE
DS(on)
R
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
= 50 A
I
D
−50 −25 0 25 50 75 100 125 150 175
TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
1M
100K
10K
1K
, LEAKAGE (nA)
100
DSS
I
10
1
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3
TJ = 175°C
TJ = 150°C
TJ = 125°C
TJ = 85°C
TJ = 25°C
5
25 55
15 75
4535
65
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
NVMFS6H800N
TYPICAL CHARACTERISTICS
10K
C
ISS
10
9
8
1K
C
OSS
7
6
5
4
100
C, CAPACITANCE (pF)
VGS = 0 V
= 25°C
T
J
f = 1 MHz
10
010 3040
C
RSS
60 80 50
5020
70 40 70
3
2
, GATE−TO−SOURCE VOLTAGE (V)
1
GS
0
V
0
VDS, DRAIN−TO−SOURCE VOLTAGE (V) QG, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation Figure 8. Gate−to−Source vs. Total Charge
1K
t
r
t
d(off)
100
t
t, TIME (ns)
f
VGS = 10 V
= 64 V
t
d(on)
10
1 10 100 0.3 0.60.5
V
DS
I
= 50 A
D
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time Variation
1K
100
10
TJ = 125°C
1
, SOURCE CURRENT (A)
S
I
0.1
Figure 10. Diode Forward Voltage vs. Current
vs. Gate Resistance
1K
1000
100
, (A)
PEAK
I
10
1
0.00001 0.001 0.010.0001
1K
100
10
, DRAIN CURRENT (A)
1
D
I
0.1
1 10 1000.1
VDS, DRAIN−TO−SOURCE VOLTAGE (V) TIME IN AVALANCHE (s)
R
Limit
DS(on)
Thermal Limit
Package Limit
TC = 25°C
≤ 10 V
V
GS
Single Pulse
10 ms
0.5 ms
1 ms
10 ms
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Q
GS
Q
GD
VDS = 40 V
= 25°C
T
J
I
= 50 A
D
10 30 60 80
20
VGS = 0 V
TJ = 25°C
0.4
V
, SOURCE−TO−DRAIN VOLTAGE (V)
SD
TJ = −55°C
0.7 0.9
TJ (initial) = 25°C
TJ (initial) = 100°C
Figure 12. I
vs. Time in Avalanche
PEAK
1.00.8
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4
NVMFS6H800N
TYPICAL CHARACTERISTICS
100
50% Duty Cycle
20%
10
10%
5%
2%
1
1%
(t) (°C/W)
JA
0.1
q
R
Single Pulse
0.01
0.001
0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100
t, PULSE TIME (sec)
Figure 13. Thermal Response
DEVICE ORDERING INFORMATION
Device Marking Package Shipping
NVMFS6H800NT1G 6H800N DFN5
(Pb−Free)
NVMFS6H800NWFT1G 800NWF DFN5
(Pb−Free, Wettable Flanks)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
1500 / Tape & Reel
1500 / Tape & Reel
1000
†
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5
DFN5 5x6, 1.27P
8
s
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
1
SCALE 2:1
2 X
0.20 C
0.10 C
0.10 C
C
0.05
c
PIN 5
(EXPOSED PAD)
D
2
D1
1234
TOP VIEW
SIDE VIEW
8X
b
A0.10 B
L
14
E2
G
D2
BOTTOM VIEW
A
B
E1
E
2
A
DETAIL A
e/2
e
K
M
L1
0.475
2 X
SOLDERING FOOTPRINT*
2X
2X
(SO−8FL)
CASE 488AA
ISSUE N
0.20 C
c
DETAIL A
RECOMMENDED
4.5600.495
2X
1.530
4 X
q
3.200
A1
C
SEATING
PLANE
DATE 25 JUN 201
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
DIM MIN NOM
A1 0.00 −−−
D1 4.70 4.90
D2 3.80 4.00
E1 5.70 5.90
E2 3.45 3.65
L1 0.125 REF
MILLIMETERS
A 0.90 1.00
b 0.33 0.41
c 0.23 0.28
D 5.15
5.00 5.30
E 6.15
6.00 6.30
e 1.27 BSC
G 0.51 0.575
K 1.20 1.35
L 0.51 0.575
M 3.00 3.40
q 0 −−−
_
MAX
1.10
0.05
0.51
0.33
5.10
4.20
6.10
3.85
0.71
1.50
0.71
3.80
12
_
GENERIC
MARKING DIAGRAM*
1
XXXXXX
AYWZZ
XXXXXX = Specific Device Code
A = Assembly Location
Y = Year
W = Work Week
ZZ = Lot Traceability
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some product
may not follow the Generic Marking.
4.530
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
STYLE 2:
PIN 1. ANODE
2. ANODE
3. ANODE
4. NO CONNECT
5. CATHODE
2X
0.905
0.965
1.000
4X
4X
0.750
1
DIMENSIONS: MILLIMETERS
1.330
1.270
PITCH
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
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ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2018
98AON14036D
DFN5 5x6, 1.27P (SO−8FL)
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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