• NVMFS5C670NWF − Wettable Flank Option for Enhanced Optical
Inspection
• AEC−Q101 Qualified and PPAP Capable
• These Devices are Pb−Free and are RoHS Compliant
MAXIMUM RATINGS (T
Parameter
Drain−to−Source VoltageV
Gate−to−Source VoltageV
Continuous Drain
Current R
(Notes 1, 3)
Power Dissipation
R
q
JC
Continuous Drain
Current R
(Notes 1, 2, 3)
Power Dissipation
R
q
JA
Pulsed Drain Current
Operating Junction and Storage TemperatureTJ, T
Source Current (Body Diode)I
Single Pulse Drain−to−Source Avalanche
Energy (I
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
q
JC
(Note 1)
q
JA
(Notes 1 & 2)
= 3.6 A)
L(pk)
THERMAL RESISTANCE MAXIMUM RATINGS
ParameterSymbolValueUnit
Junction−to−Case − Steady State
Junction−to−Ambient − Steady State (Note 2)
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Surface−mounted on FR4 board using a 650 mm
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
= 25°C unless otherwise noted)
J
SymbolValueUnit
TC = 25°C
Steady
State
Steady
State
TA = 25°C, t
TC = 100°C50
TC = 25°C
TC = 100°C31
TA = 25°C
TA = 100°C12
TA = 25°C
TA = 100°C1.8
= 10 ms
p
P
P
I
E
R
q
R
q
2
, 2 oz. Cu pad.
DSS
GS
I
D
D
I
D
D
DM
S
AS
T
L
JC
JA
stg
60V
±20V
71
61
17
3.6
440A
−55 to
+175
68A
166mJ
260°C
2.4
41
A
W
A
W
°C
°C/W
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V
(BR)DSS
60 V
G (4)
R
MAXID MAX
DS(ON)
7.0 mW @ 10 V
D (5)
S (1,2,3)
N−CHANNEL MOSFET
71 A
MARKING
DIAGRAM
1
DFN5
(SO−8FL)
CASE 488AA
STYLE 1
XXXXXX = 5C670N
XXXXXX = (NVMFS5C670N) or
XXXXXX = 670NWF
XXXXXX = (NVMFS5C670NWF)
A= Assembly Location
Y= Year
W= Work Week
ZZ= Lot Traceability
S
S
S
G
D
D
XXXXXX
AYWZZ
D
D
ORDERING INFORMATION
See detailed ordering, marking and shipping information on
page 5 of this data sheet.
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
5. Switching characteristics are independent of operating junction temperatures.
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2
Page 3
NVMFS5C670N
TYPICAL CHARACTERISTICS
70
60
VGS = 10 V
to 6.0 V
50
40
VGS = 5.0 V
30
20
, DRAIN CURRENT (A)
D
I
10
0
012345
VGS = 4.5 V
VGS = 4.0 V
VDS, DRAIN−TO−SOURCE VOLTAGE (V)VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region CharacteristicsFigure 2. Transfer Characteristics
15
14
13
TJ = 25°C
= 11 A
I
D
12
11
10
9
8
7
6
, DRAIN−TO−SOURCE RESISTANCE (mW)
5
5678910
DS(on)
R
VGS, GATE VOLTAGE (V)ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
VGS = 10 V
2
ID = 11 A
70
60
50
40
30
20
, DRAIN CURRENT (A)
D
I
10
0
01234567
8
= 25°C
T
J
7
6
5
, DRAIN−TO−SOURCE RESISTANCE (mW)
4
10203040506070
DS(on)
R
Figure 4. On−Resistance vs. Drain Current and
1000000
100000
TJ = 125°C
TJ = −55°C
TJ = 25°C
VGS = 10 V
Gate Voltage
TJ = 175°C
1.5
1
, NORMALIZED DRAIN−TO−
SOURCE RESISTANCE
DS(on)
R
0.5
−50 −250255075100 125 150 175
TJ, JUNCTION TEMPERATURE (5C)VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
10000
1000
, LEAKAGE (nA)
100
DSS
I
10
1
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3
TJ = 125°C
TJ = 85°C
TJ = 25°C
5 1525354555
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
Page 4
NVMFS5C670N
TYPICAL CHARACTERISTICS
10000
Ciss
1000
Coss
100
VGS = 0 V
= 25°C
T
J
f = 1 MHz
10
C, CAPACITANCE (pF)
1
0 102030405060
Crss
VDS, DRAIN−TO−SOURCE VOLTAGE (V)QG, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance VariationFigure 8. Gate−to−Source and
1000
VGS = 10 V
= 48 V
V
DS
I
= 11 A
100
t, TIME (ns)
D
10
td(off)
td(on)
tf
tr
1
110100
10
VDS = 48 V
9
= 11 A
I
D
8
T
= 25°C
J
7
6
Q
GS
Q
GD
5
4
3
2
1
, GATE−TO−SOURCE VOLTAGE (V)
GS
0
V
0123456789101112131415
Drain−to−Source Voltage vs. Total Charge
100
VGS = 0 V
10
TJ = 125°C
1
, SOURCE CURRENT (A)
S
I
0.1
0.30.40.50.60.70.80.91
TJ = 25°C
TJ = −55°C
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time Variation
1000
TC = 25°C
≤ 10 V
V
GS
Single Pulse
100
R
DS(on)
Limit
10
Thermal Limit
, DRAIN CURRENT (A)
1
D
I
0.1
Figure 11. Maximum Rated Forward Biased
V
, SOURCE−TO−DRAIN VOLTAGE (V)
SD
Figure 10. Diode Forward Voltage vs. Current
vs. Gate Resistance
Package Limit
500 ms
10 ms
1 ms
1101000.1
VDS (V)TIME IN AVALANCHE (s)
100
10
TJ = 100°C
1
, DRAIN CURRENT (A)
PEAK
I
0.1
1E−51E−41E−31E−2
Figure 12. Maximum Drain Current vs. Time in
Safe Operating Area
Avalanche
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4
TJ = 25°C
Page 5
100
†
10
1
R(t) (°C/W)
0.1
NVMFS5C670N
50% Duty Cycle
20%
10%
5%
2%
1%
0.01
0.0000010.000010.00010.0010.010.11101001000
Single Pulse
PULSE TIME (sec)
Figure 13. Thermal Characteristics
DEVICE ORDERING INFORMATION
DeviceMarkingPackageShipping
NVMFS5C670NT1G5C670NDFN5
(Pb−Free)
NVMFS5C670NWFT1G670NWFDFN5
(Pb−Free, Wettable Flanks)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
1500 / Tape & Reel
1500 / Tape & Reel
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5
Page 6
DFN5 5x6, 1.27P
8
s
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
1
SCALE 2:1
2 X
0.20 C
0.10 C
0.10 C
C
0.05
c
PIN 5
(EXPOSED PAD)
D
2
D1
1234
TOP VIEW
SIDE VIEW
8X
b
A0.10B
L
14
E2
G
D2
BOTTOM VIEW
A
B
E1
E
2
A
DETAIL A
e/2
e
K
M
L1
0.475
2 X
SOLDERING FOOTPRINT*
2X
2X
(SO−8FL)
CASE 488AA
ISSUE N
0.20 C
c
DETAIL A
RECOMMENDED
4.5600.495
2X
1.530
4 X
q
SEATING
3.200
A1
PLANE
DATE 25 JUN 201
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
DIM MINNOM
A10.00−−−
D14.704.90
D23.804.00
E15.705.90
E23.453.65
C
L10.125 REF
MILLIMETERS
A0.901.00
b0.330.41
c0.230.28
D5.15
5.005.30
E6.15
6.006.30
e1.27 BSC
G0.510.575
K1.201.35
L0.510.575
M3.003.40
q0 −−−
_
GENERIC
MARKING DIAGRAM*
1
XXXXXX
AYWZZ
XXXXXX = Specific Device Code
A= Assembly Location
Y= Year
W= Work W eek
ZZ= Lot Traceability
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some product
may not follow the Generic Marking.
4.530
MAX
1.10
0.05
0.51
0.33
5.10
4.20
6.10
3.85
0.71
1.50
0.71
3.80
12
_
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
STYLE 2:
PIN 1. ANODE
2. ANODE
3. ANODE
4. NO CONNECT
5. CATHODE
2X
0.905
0.965
1.000
4X
4X
0.750
1
DIMENSIONS: MILLIMETERS
1.330
1.270
PITCH
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
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