Page 1
NVMFS5C604N
MOSFET - Power, Single
N-Channel
60 V, 1.2 mW, 288 A
Features
• Small Footprint (5x6 mm) for Compact Design
• Low R
• Low Q
• NVMFS5C604NWF − Wettable Flank Option for Enhanced Optical
Inspection
• AEC−Q101 Qualified and PPAP Capable
• These Devices are Pb−Free and are RoHS Compliant
to Minimize Conduction Losses
DS(on)
and Capacitance to Minimize Driver Losses
G
V
(BR)DSS
60 V
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R
MAX ID MAX
DS(ON)
1.2 mW @ 10 V
288 A
MAXIMUM RATINGS (T
Parameter
Drain−to−Source Voltage V
Gate−to−Source Voltage V
Continuous Drain
Current R
(Notes 1, 3)
Power Dissipation
R
q
JC
Continuous Drain
Current R
(Notes 1, 2, 3)
Power Dissipation
R
q
JA
Pulsed Drain Current
Operating Junction and Storage Temperature
Range
Source Current (Body Diode) I
Single Pulse Drain−to−Source Avalanche
Energy (I
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
q
JC
(Note 1)
q
JA
(Notes 1, 2)
= 22 A)
L(pk)
= 25°C unless otherwise noted)
J
Symbol Value Unit
TC = 25°C
Steady
State
Steady
State
TA = 25°C, t
TC = 100°C 204
TC = 25°C
TC = 100°C 100
TA = 25°C
TA = 100°C 28
TA = 25°C
TA = 100°C 1.9
= 10 ms
p
P
P
I
TJ, T
E
DSS
GS
I
D
D
I
D
D
DM
S
AS
T
L
stg
60 V
±20 V
288
200
40
3.9
900 A
−55 to
+175
203 A
776 mJ
260 °C
A
W
A
W
°C
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter Symbol Value Unit
Junction−to−Case − Steady State
Junction−to−Ambient − Steady State (Note 2)
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Surface−mounted on FR4 board using a 650 mm
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
R
q
JC
R
q
JA
2
, 2 oz. Cu pad.
0.75
39
°C/W
D (5,6)
G (4)
S (1,2,3)
N−CHANNEL MOSFET
MARKING
DIAGRAM
1
DFN5
(SO−8FL)
CASE 488AA
STYLE 1
XXXXXX = 5C604N
XXXXXX = (NVMFS5C604N) or
XXXXXX = 604NWF
XXXXXX = (NVMFS5C604NWF)
A = Assembly Location
Y = Year
W = Work Week
ZZ = Lot Traceability
S
S
S
G
D
D
XXXXXX
AYWZZ
D
D
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
June, 2019 − Rev. 1
1 Publication Order Number:
NVMFS5C604N/D
Page 2
NVMFS5C604N
ELECTRICAL CHARACTERISTICS (T
Parameter
= 25°C unless otherwise specified)
J
Symbol Test Condition Min Ty p Max Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Drain−to−Source Breakdown Voltage
V
V
Temperature Coefficient
Zero Gate Voltage Drain Current I
Gate−to−Source Leakage Current I
(BR)DSS
(BR)DSS
T
J
DSS
GSS
VGS = 0 V, ID = 250 mA
/
VGS = 0 V,
V
= 60 V
DS
TJ = 25°C 10
TJ = 125°C 250
VDS = 0 V, VGS = ±16 V ±100 nA
60 V
13.6
mV/°C
mA
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
Threshold Temperature Coefficient V
Drain−to−Source On Resistance R
V
GS(TH)
GS(TH)/TJ
DS(on)
VGS = VDS, ID = 250 mA
VGS = 10 V ID = 50 A 1.0 1.2
2.0 4.0 V
−8.5 mV/°C
mW
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
Output Capacitance C
Reverse Transfer Capacitance C
Total Gate Charge Q
Threshold Gate Charge Q
Gate−to−Source Charge Q
Gate−to−Drain Charge Q
Plateau Voltage V
C
ISS
OSS
RSS
G(TOT)
G(TH)
GS
GD
GP
VGS = 0 V, f = 1 MHz, VDS = 25 V
VGS = 10 V, VDS = 48 V; ID = 50 A
6400
4300
24
80
7.0
26
14
4.6 V
pF
nC
SWITCHING CHARACTERISTICS (Note 5)
Turn−On Delay Time t
d(ON)
Rise Time t
Turn−Off Delay Time t
d(OFF)
Fall Time t
r
f
VGS = 10 V, VDS = 48 V,
= 50 A, RG = 2.5 W
I
D
16
76
51
51
ns
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time t
Charge Time t
Discharge Time t
Reverse Recovery Charge Q
V
SD
RR
a
b
RR
VGS = 0 V,
I
= 50 A
S
VGS = 0 V, dIS/dt = 100 A/ms,
I
= 50 A
S
TJ = 25°C 0.8 1.0
TJ = 125°C 0.65
100
50
50
218 nC
V
ns
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
5. Switching characteristics are independent of operating junction temperatures.
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2
Page 3
NVMFS5C604N
TYPICAL CHARACTERISTICS
200
180
160
140
120
100
80
60
, DRAIN CURRENT (A)
D
I
40
20
0
VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics
4
3
2
5.0 V
10 V to 6.0 V
VGS = 4.5 V
4.0 V
TJ = 25°C
= 50 A
I
D
200
180
160
140
120
100
80
60
, DRAIN CURRENT (A)
D
I
40
20
2.01.51.00.50
0
1.5
1.0
VDS = 5 V
TJ = 25°C
TJ = 25°C
TJ = 125°C
VGS = 10 V
3.5
TJ = −55°C
4.03.02.52.01.51.00.50
5.04.5
1
, DRAIN−TO−SOURCE RESISTANCE (mW)
0
DS(on)
R
, NORMALIZED DRAIN−TO−
SOURCE RESISTANCE
DS(on)
R
VGS, GATE VOLTAGE (V) ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
2.0
VGS = 10 V
= 50 A
I
1.8
D
1.6
1.4
1.2
1.0
0.8
0.6
TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)
50
Figure 5. On−Resistance Variation with
Temperature
150
, DRAIN−TO−SOURCE RESISTANCE (mW)
10987654
0.5
DS(on)
R
130110 1509070503010
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
100
TJ = 150°C
10
TJ = 125°C
, LEAKAGE (nA)
1
DSS
I
0.1
17512510075250−25−50
TJ = 85°C
50
60403020100
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
Page 4
NVMFS5C604N
TYPICAL CHARACTERISTICS
100K
10K
1000
100
C, CAPACITANCE (pF)
VGS = 0 V
T
f = 1 MHz
10
1000
VGS = 10 V
V
I
100
t, TIME (ns)
10
C
ISS
C
OSS
8
6
Q
GS
Q
T
Q
GD
4
C
RSS
2
= 25°C
J
6050403020100
, GATE−TO−SOURCE VOLTAGE (V)
GS
0
V
3010 806040200
50 70
VDS, DRAIN−TO−SOURCE VOLTAGE (V) QG, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
= 20 V
DS
= 50 A
D
t
d(off)
t
f
t
r
t
d(on)
10
VDS = 20 V
= 50 A
I
D
T
= 25°C
J
30
25
20
15
10
5
0
, DRAIN−TO−SOURCE VOLTAGE (V)
DS
V
1000
(A)
D
I
10
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
100
10
VGS ≤ 10 V
Single Pulse
TC = 25°C
1
Limit
R
DS(on)
Thermal Limit
0.1
Package Limit
VDS (V)
Figure 11. Safe Operating Area Figure 12. I
10 ms
100 ms
1 ms
10 ms
100
, SOURCE CURRENT (A)
S
I
100101
1
V
TJ = 125°C TJ = 25°C TJ = −55°C
, SOURCE−TO−DRAIN VOLTAGE (V)
SD
0.90.8 1.00.70.60.50.40.3
Figure 10. Diode Forward Voltage vs. Current
100
T
= 25°C
J(initial)
T
= 100°C
(A)
10
PEAK
I
1
10001010.1
1E−04 1E−021E−03
J(initial)
TIME IN AVALANCHE (s)
vs. Time in Avalanche
PEAK
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4
Page 5
NVMFS5C604N
TYPICAL CHARACTERISTICS
100
50% Duty Cycle
20%
10
10%
5%
(t) (°C/W)
JA
q
R
1%
0.1
Single Pulse
0.01
0.010.001 10.0001 0.10.00001 100.000001
PULSE TIME (sec)
2%
1
Figure 13. Thermal Characteristics
DEVICE ORDERING INFORMATION
Device Marking Package Shipping
NVMFS5C604NT1G 5C604N DFN5
NVMFS5C604NWFT1G 604NWF DFN5
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
NVMFS5C604N 650 mm2, 2 oz., Cu Single Layer Pad
100 1000
†
1500 / Tape & Reel
(Pb−Free)
1500 / Tape & Reel
(Pb−Free, Wettable Flanks)
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5
Page 6
DFN5 5x6, 1.27P
8
s
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
1
SCALE 2:1
2 X
0.20 C
0.10 C
0.10 C
C
0.05
c
PIN 5
(EXPOSED PAD)
D
2
D1
1234
TOP VIEW
SIDE VIEW
8X
b
A0.10 B
L
14
E2
G
D2
BOTTOM VIEW
A
B
E1
E
2
A
DETAIL A
e/2
e
K
M
L1
0.475
2 X
SOLDERING FOOTPRINT*
2X
2X
(SO−8FL)
CASE 488AA
ISSUE N
0.20 C
c
DETAIL A
RECOMMENDED
4.5600.495
2X
1.530
4 X
q
3.200
A1
C
SEATING
PLANE
DATE 25 JUN 201
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
DIM MIN NOM
A1 0.00 −−−
D1 4.70 4.90
D2 3.80 4.00
E1 5.70 5.90
E2 3.45 3.65
L1 0.125 REF
MILLIMETERS
A 0.90 1.00
b 0.33 0.41
c 0.23 0.28
D 5.15
5.00 5.30
E 6.15
6.00 6.30
e 1.27 BSC
G 0.51 0.575
K 1.20 1.35
L 0.51 0.575
M 3.00 3.40
q 0 −−−
_
MAX
1.10
0.05
0.51
0.33
5.10
4.20
6.10
3.85
0.71
1.50
0.71
3.80
12
_
GENERIC
MARKING DIAGRAM*
1
XXXXXX
AYWZZ
XXXXXX = Specific Device Code
A = Assembly Location
Y = Year
W = Work Week
ZZ = Lot Traceability
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some product
may not follow the Generic Marking.
4.530
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
STYLE 2:
PIN 1. ANODE
2. ANODE
3. ANODE
4. NO CONNECT
5. CATHODE
2X
0.905
0.965
1.000
4X
4X
0.750
1
DIMENSIONS: MILLIMETERS
1.330
1.270
PITCH
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
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ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2018
98AON14036D
DFN5 5x6, 1.27P (SO−8FL)
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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