Page 1
MOSFET - Power, Dual
N-Channel, DUAL SO-8FL
60 V, 29.7 mW, 19 A
NVMFD030N06C
Features
• Small Footprint (5x6 mm) for Compact Design
• Low R
• Low Q
• NVMFWD030N06C − Wettable Flank Option for Enhanced Optical
Inspection
• AEC−Q101 Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
• Power Tools, Battery Operated Vacuums
• UAV/Drones, Material Handling
• BMS/Storage, Home Automation
to Minimize Conduction Losses
DS(on)
and Capacitance to Minimize Driver Losses
G
V
(BR)DSS
60 V
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R
MAX ID MAX
DS(ON)
29.7 mW @ 10 V
19 A
MAXIMUM RATINGS (T
Parameter Symbol Value Units
Drain−to−Source Voltage V
Gate−to−Source Voltage V
Continuous Drain
Current R
(Notes 1, 3)
Power Dissipation
R
q
JC
Continuous Drain
Current R
(Notes 1, 2, 3)
Power Dissipation
R
q
JA
Pulsed Drain Current
Operating Junction and Storage Temperature
Range
Source Current (Body Diode) I
Single Pulse Drain−to−Source Avalanche
Energy (I
Lead Temperature Soldering Reflow for
Soldering Purposes (1/8″ from case for 10 s)
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Surface−mounted on FR4 board using a 650 mm
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
q
JC
(Note 1)
q
JA
(Notes 1, 2)
= 4.4 Apk)
L
= 25°C unless otherwise stated)
J
Steady
State
Steady
State
Steady
State
Steady
State
TA = 25°C, tp = 10 ms
TC = 25°C
TC = 100°C 13
TC = 25°C
TC = 100°C 11
TA = 25°C
TA = 100°C 5
TA = 25°C
TA = 100°C 1.6
DSS
GS
I
D
P
D
I
D
P
D
I
DM
TJ, T
E
2
, 2 oz. Cu pad.
−55 to
stg
+175
S
AS
T
L
60 V
±20 V
19
23
3.2
63 A
19 A
10 mJ
260 °C
W
7
W
°C
A
A
MARKING
DIAGRAM
1
DFN8 5x6
(SO−8FL)
CASE 506BT
XXXXXX = Specific Device Code
A = Assembly Location
Y = Year
W = Work Week
ZZ = Lot Traceability
XXXXXX
AYWZZ
ORDERING INFORMATION
See detailed ordering, marking and shipping information on
page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2020
January, 2020 − Rev. 0
1 Publication Order Number:
NVMFD030N06C/D
Page 2
THERMAL RESISTANCE RATINGS
Parameter Symbol Max Unit
Junction−to−Case – Steady State (Note 2)
Junction−to−Ambient – Steady State (Note 2)
NVMFD030N06C
R
q
JC
R
q
JA
6.3
46.6
°C/W
ELECTRICAL CHARACTERISTICS (T
Parameter
= 25°C unless otherwise specified)
J
Symbol Test Condition Min Typ Max Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Drain−to−Source Breakdown Voltage
V
V
Temperature Coefficient
Zero Gate Voltage Drain Current I
Gate−to−Source Leakage Current I
(BR)DSS
(BR)DSS
T
J
DSS
GSS
VGS = 0 V, ID = 250 mA
/
ID = 250 mA, ref to 25°C
VGS = 0 V,
V
= 60 V
DS
TJ = 25°C 10 mA
TJ = 125°C 250
VDS = 0 V, VGS = 20 V 100 nA
60 V
−7.9 mV/°C
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
Negative Threshold Temperature
Coefficient
V
V
GS(TH)
GS(TH)
Drain−to−Source On Resistance R
Forward Transconductance g
Gate Resistance R
DS(on)
FS
G
/ T
VGS = VDS, ID = 13 mA
J
ID = 13 mA, ref to 25°C
VGS = 10 V, ID = 3 A 24.7 29.7
VDS = 5 V, ID = 3 A 8.5 S
TA = 25°C 1.5
2.0 4.0 V
−7.8 mV/°C
mW
W
CHARGES & CAPACITANCES
Input Capacitance
Output Capacitance C
Reverse Capacitance C
Total Gate Charge Q
Threshold Gate Charge Q
Gate−to−Source Charge Q
Gate−to−Drain Charge Q
C
ISS
OSS
RSS
G(TOT)
G(TH)
GS
GD
VGS = 0 V, f = 1 MHz, VDS = 30 V
VGS = 10 V, VDS = 48 V, ID = 3 A
255
173
4.4
4.7
1.1
1.7
0.54
pF
nC
SWITCHING CHARACTERISTICS (Note 3)
Turn−On Delay Time
t
Rise Time t
Turn−Off Delay Time t
d(OFF)
Fall Time t
d(ON)
r
f
VGS = 10 V, VDS = 48 V,
= 3 A, RG = 6 W
I
D
5.7
1.2
8.7
2.3
ns
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Voltage
Reverse Recovery Time t
Charge Time ta 11
Discharge Time tb 10
Reverse Recovery Charge Q
V
SD
RR
VGS = 0 V,
I
= 3 A
S
TJ = 25°C 0.82 1.2
TJ = 125°C 0.68
21
V
ns
VGS = 0 V, dIS/dt = 100 A/ms,
V
= 30 V, IS = 3 A
DS
RR
9.7 nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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2
Page 3
NVMFD030N06C
TYPICAL CHARACTERISTICS
60
50
40
30
20
, DRAIN CURRENT (A)
D
I
10
0
VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics
50
45
40
35
VGS = 10 V to 8.0 V
7.0 V
6.0 V
5.0 V
4.5 V
3.6 V
43
TJ = 25°C
= 3 A
I
D
25
20
15
10
, DRAIN CURRENT (A)
D
I
5
5210
0
36
32
28
1
TJ = 25°C
TJ = −55°C
TJ = 25°C
TJ = 125°C
3205
VGS = 10 V
4
30
25
, DRAIN−TO−SOURCE RESISTANCE (mW)
20
DS(on)
R
, NORMALIZED DRAIN−TO−
SOURCE RESISTANCE
DS(on)
R
5
6
VGS, GATE VOLTAGE (V) ID, DRAIN CURRENT (A)
87 15
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
2.5
VGS = 10 V
= 3 A
I
2.0
1.5
1.0
0.5
D
0
50
TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
24
, DRAIN−TO−SOURCE RESISTANCE (mW)
1091224963
20
DS(on)
R
18 21
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
10K
TJ = 175°C
1K
TJ = 150°C
TJ = 125°C
100
10
1
TJ = 85°C
TJ = 25°C
25
554535155
, LEAKAGE (nA)
DSS
I
150
175
12510075250−25−50
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
Page 4
NVMFD030N06C
TYPICAL CHARACTERISTICS
10K
VGS = 0 V
T
f = 1 MHz
1K
100
10
C, CAPACITANCE (pF)
1
100
VGS = 10 V
V
DS
I
D
t
d(off)
10
t
d(on)
t, TIME (ns)
1
10
VDS = 48 V
= 25°C
J
C
C
ISS
OSS
9
= 3 A
I
D
8
= 25°C
T
J
7
6
5
Q
GS
Q
GD
4
3
2
, GATE−TO−SOURCE VOLTAGE (V)
1
GS
0
V
20
30
C
RSS
60504010 200
VDS, DRAIN−TO−SOURCE VOLTAGE (V) QG, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
10
= 48 V
= 3 A
t
f
t
r
, SOURCE CURRENT (A)
I
VGS = 0 V
1
S
315
4
0.1
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time Variation
TC = 25°C
Single Pulse
VGS ≤ 10 V
100
10
1
, DRAIN CURRENT (A)
D
I
0.1
VDS, DRAIN−SOURCE VOLTAGE(V) TAV, TIME IN AVALANCHE (s)
Figure 11. Safe Operating Area Figure 12. I
vs. Gate Resistance
R
Limit
DS(on)
Thermal Limit
Package Limit
100 ms & 1 S
101
10 ms
100 ms
1 ms
10 ms
100101
0.1
100
10
, DRAIN CURRENT (A)
PEAK
I
1
100
TJ = 125°C TJ = 25°C TJ = −55°C
0.9
V
, SOURCE−TO−DRAIN VOLTAGE (V)
SD
0.80.70.60.50.4
Figure 10. Diode Forward Voltage vs. Current
T
= 25°C
J(initial)
T
= 100°C
J(initial)
0.000001 0.01
0.00001
0.0001
vs. Time in Avalanche
PEAK
0.001
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4
Page 5
NVMFD030N06C
†
TYPICAL CHARACTERISTICS
10
50% Duty Cycle
20%
1
10%
(°C/W)
JC
q
5%
Z
2%
Single Pulse
0.1
DEVICE ORDERING INFORMATION
Device Marking Package Shipping
NVMFD030N06CT1G 30DN6C SO−8FL Dual
NVMFWD030N06CT1G 30DN6W SO−8FL Dual
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
1%
0.010.001 10.0001 0.10.000010.000001
PULSE TIME (sec)
Figure 13. Thermal Response
1500 / Tape & Reel
(Pb−Free)
1500 / Tape & Reel
(Pb−Free, Wettable Flanks)
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Page 6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFN8 5x6, 1.27P Dual Flag (SO8FL−Dual)
1
SCALE 2:1
PIN ONE
IDENTIFIER
NOTE 7
0.10 C
0.10 C
NOTE 4
DETAIL B
M
1234
TOP VIEW
SIDE VIEW
D3
e
14
N
8
4X
G
K1
BOTTOM VIEW
D
D1
78
D2
5
56
2X
DETAIL A
4X
4X
b1
0.20 C
A
E1
A
L
8X
B
2X
0.20 C
E
c
SEATING
C
PLANE
NOTE 6
K
DETAIL B
ALTERNATE
CONSTRUCTION
E2
b
C
A0.10 B
0.05
C
NOTE 3
CASE 506BT
ISSUE E
DETAIL A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED
BETWEEN 0.15 AND 0.30 MM FROM THE TERMINAL TIP.
4. PROFILE TOLERANCE APPLIES TO THE EXPOSED PAD AS WELL
AS THE TERMINALS.
5. DIMENSIONS D1 AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
6. SEATING PLANE IS DEFINED BY THE TERMINALS. A1 IS DEFINED
AS THE DISTANCE FROM THE SEATING PLANE TO THE LOWEST
POINT ON THE PACKAGE BODY.
7. A VISUAL INDICATOR FOR PIN 1 MUST BE LOCATED IN THIS AREA.
4X
h
GENERIC
MARKING DIAGRAM*
A1
*This information is generic. Please refer
to device data sheet for actual part
marking.
1
XXXXXX
AYWZZ
XXXXXX= Specific Device Code
A = Assembly Location
Y = Year
W = Work Week
ZZ = Lot Traceability
SOLDERING FOOTPRINT*
4.56
8X
0.75
4.84
2.30
DATE 26 FEB 2013
MILLIMETERS
3.70
MAX
0.42
4.90
4.10
5.90
4.15
0.55
0.61
3.50
2X
0.56
6.59
DIM MIN
A 0.90
A1 −−−
b 0.33
b1 0.33 0.42
c 0.20
D 5.15 BSC
D1 4.70
D2 3.90
D3 1.50 1.70
E 6.15 BSC
E1 5.70
E2 3.90
e 1.27 BSC
G 0.45
h −−−
K 0.51
K1 0.56 −−−
L 0.48
M 3.25
N 1.80 2.00
2X
2.08
4X
1.40
−−−
−−−
−−−
−−−
−−−
MAX
1.10
0.05
0.51
0.51
0.33
5.10
4.30
1.90
6.10
4.40
0.65
12
−−−
−−−
0.71
3.75
2.20
_
0.70
4X
1.00
1.27
PITCH
5.55
DIMENSION: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
98AON50417E
DFN8 5X6, 1.27P DUAL FLAG (SO8FL−DUAL)
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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Page 7
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