Page 1
NVJS4151P
MOSFET – Power, Single
P-Channel, Trench, SC-88
-20 V, -4.1 A
Features
• Leading Trench Technology for Low R
Extending Battery Life
DS(ON)
• SC−88 Small Outline (2x2 mm) for Maximum Circuit Board
Utilization, Same as SC−70−6
• Gate Diodes for ESD Protection
• AEC−Q101 Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Applications
• High Side Load Switch
• Cell Phones, Computing, Digital Cameras, MP3s and PDAs
MAXIMUM RATINGS (T
Parameter
Drain−to−Source Voltage V
Gate−to−Source Voltage V
Continuous Drain
Current (Note 1)
Power Dissipation
(Note 1)
Pulsed Drain Current
Operating Junction and Storage Temperature TJ,
Source Current (Body Diode) I
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
ESD Human Body Model (HBM) ESD 4000 V
THERMAL RESISTANCE RATINGS (Note 1)
Parameter
Junction−to−Ambient – Steady State
Junction−to−Ambient − t ≤ 5 s
Junction−to−Lead – Steady State
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Surface mounted on FR4 board using 1 in sq pad size
(Cu area = 1.127 in sq [1 oz] including traces).
= 25°C unless otherwise stated)
J
Symbol Value Unit
DSS
GS
Steady
State
t ≤ 5 s TA = 25 °C −4.1
Steady
State
TA = 25 °C
TA = 85 °C −2.3
TA = 25 °C P
tp = 10 ms
I
D
D
I
DM
T
STG
S
T
L
Symbol Max Unit
R
q
JA
R
q
JA
R
q
JL
−20 V
±12 V
−3.2
1.2 W
−13 A
−55 to
150
−0.8 A
260 °C
125
75
45
A
°C
°C/W
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V
(BR)DSS
−20 V
R
Typ ID Max
DS(on)
55 mW @ −4.5 V
70 mW @ −2.5 V
180 mW @ −1.8 V
−4.1 A
SC−88 (SOT−363)
D
1
D
2
G
3
Top View
D
6
D
5
S
4
MARKING DIAGRAM &
PIN ASSIGNMENT
DDS
1
SC−88/SOT−363
CASE 419B
VTY = Device Code
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
6
VTY M G
G
1
DDG
ORDERING INFORMATION
Device Package Shipping
NVJS4151PT1G SC−88
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
3000 / Tape & Reel
†
© Semiconductor Components Industries, LLC, 2014
July, 2019 − Rev. 1
1 Publication Order Number:
NVJS4151P/D
Page 2
NVJS4151P
ELECTRICAL CHARACTERISTICS (T
Parameter
=25°C unless otherwise stated)
J
Symbol Test Condition Min Typ Max Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V
V
(BR)DSS/TJ
Zero Gate Voltage Drain Current I
Gate−to−Source Leakage Current I
(BR)DSS
DSS
GSS
V
V
GS
V
V
V
= 0 V, I
GS
= −16 V,
= 0 V
DS
= 0 V, V
DS
= 0 V, V
DS
= −250 mA
D
T
= 25°C −1.0 mA
J
T
= 85°C −5.0
J
= ±4.5 V ±1.5
GS
= ±12 V ±10 mA
GS
−20 V
−12 mV/°C
mA
ON CHARACTERISTICS (Note 2)
Gate Threshold Voltage
Negative Threshold Temperature
Coefficient
V
V
GS(TH)/TJ
Drain−to−Source On Resistance R
Forward Transconductance g
GS(TH)
DS(on)
FS
V
= VDS, ID = −250 mA
GS
V
= −4.5 V, I
GS
V
= −2.5 V, I
GS
VGS = −1.8 V, I
V
= −10 V, I
GS
= −2.9 A 55 67
D
= −2.4 A 70 85
D
= −1.0 A 180 205
D
= −3.3 A 12 S
D
−0.40 −1.2 V
4.0 mV/°C
mW
CHARGES AND CAPACITANCES
Input Capacitance
Output Capacitance C
Reverse Transfer Capacitance C
Total Gate Charge Q
Gate−to−Source Charge Q
Gate−to−Drain Charge Q
C
ISS
OSS
RSS
G(TOT)
GS
GD
V
= 0 V, f = 1.0 MHz,
GS
V
DS
V
= −4.5 V, V
GS
I
D
= −10 V
DS
= −3.3 A
= −10 V,
850
160
110
10
1.5
2.8
pF
nC
SWITCHING CHARACTERISTICS (Note 3)
Turn−On Delay Time
t
Rise Time t
Turn−Off Delay Time t
d(OFF)
Fall Time t
d(ON)
r
f
V
GS
I
D
= −4.5 V, V
= −1.0 A, R
= −10 V,
DD
= 6.0 W
G
0.85 ms
1.7
2.7
4.2
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
Reverse Recovery Time t
Charge Time T
Discharge Time T
Reverse Recovery Charge Q
RR
SD
RR
V
GS
V
a
b
GS
= 0 V, I
T
J
S
= 25°C
= −1.3 A,
= 0 V, dIS/dt = 100
A/ms,
= −1.3 A
I
S
−0.75 −1.2 V
63
9.0
54
0.23 nC
ns
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%.
3. Switching characteristics are independent of operating junction temperatures.
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2
Page 3
NVJS4151P
TYPICAL ELECTRICAL CHARACTERISTICS
4
VGS = −1.8 V
TJ = 25°C
VGS = −2.4 V
3
VGS = −2.0 V
VGS = −1.6 V
VGS = −2.8 V to 6.0 V
.
VGS = −1.4 V
VGS = −1.2 V
, DRAIN CURRENT (A)
D
−I
2
1
VGS = −1.0 V
0
02468
−V
, DRAIN−TO−SOURCE VOLTAGE (V)
DS
Figure 1. On−Region Characteristics
0.5
ID = −3.3 A
= 25°C
T
0.4
0.3
0.2
J
5
VDS w −10 V
4
3
2
, DRAIN CURRENT (A)
D
1
−I
0
01234
, DRAIN−TO−SOURCE VOLTAGE (V)
−V
DS
Figure 2. On−Region Characteristics
0.6
TJ = 25°C
0.5
0.4
0.3
(W)
0.2
VGS = −1.8 V
0.1
, DRAIN−TO−SOURCE RESISTANCE (W)
0
(on)
0246
RDS
, GATE−TO−SOURCE VOLTAGE (V)
−V
GS
, DRAIN−TO−SOURCE RESISTANCE
(on)
RDS
Figure 3. On−Resistance versus
Gate−to−Source Voltage
1.7
VGS = −4.5 V
= −2.9 A
I
D
1.5
1.3
1.1
DRAIN−TO−SOURCE
0.9
DS(on),
R
RESISTANCE (NORMALIZED)
0.7
−50 −25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (°C)
100000
Figure 5. On−Resistance Variation with
Temperature
0.1
0
VGS = −4.5 V
VGS = −2.5 V
12345
, DRAIN CURRENT (A)
−I
D
Figure 4. On−Resistance versus Drain Current
and Gate Voltage
VGS = 0 V
TJ = 150°C
10000
, LEAKAGE (nA)
1000
DSS
−I
100
048121620
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 6. Drain−to−Source Leakage Current
versus Voltage
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3
Page 4
NVJS4151P
TYPICAL ELECTRICAL CHARACTERISTICS
1250
VGS = 0 V
= 25°C
T
1000
C
ISS
J
750
500
C, CAPACITANCE (pF)
250
0
048121620
Figure 7. Capacitance Variation
10000
t
f
t
d(off)
t
1000
t, TIME (ns)
r
t
d(on)
5
Q
T
4
V
DS
V
GS
3
2
Q
gs
1
Q
gd
ID = −3.3 A
= 25°C
T
J
, GATE−TO−SOURCE VOLTAGE (V)
GS
0
−V
024681012
QG, TOTAL GATE CHARGE (nC)
Figure 8. Gate−to−Source and
Drain−to−Source Voltage versus Total Charge
3
VGS = 0 V
= 25°C
T
2.5
1.5
, SOURCE CURRENT (A)
S
0.5
−I
J
2
1
15
12
9
6
3
0
, DRAIN−TO−SOURCE VOLTAGE (V)
DS
−V
100
1 10 100
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time Variation
Gate Resistance
0
0.4 0.5 0.6 0.7 0.8 0.9
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4
−VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 10. Diode Forward Voltage versus
Current
Page 5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−88/SC70−6/SOT−363
1
SCALE 2:1
D
A
654
E
123
2X
bbb H
D
e
B
TOP VIEW
6X
ccc
C
SIDE VIEW END VIEW
RECOMMENDED
SOLDERING FOOTPRINT*
6X
0.30
0.65
PITCH
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
2X
aaa H D
D
E1
L2
aaa C
2X 3 TIPS
b
6X
M
A2
A
A1
C
6X
0.66
SEATING
PLANE
2.50
DIMENSIONS: MILLIMETERS
Cddd
A-B D
DETAIL A
CASE 419B−02
ISSUE Y
H
L
DETAIL A
GAGE
PLANE
DATE 11 DEC 2012
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.
4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF
THE PLASTIC BODY AND DATUM H.
5. DATUMS A AND B ARE DETERMINED AT DATUM H.
6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE
LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP.
7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN
EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDITION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OF THE FOOT.
MILLIMETERS
DIM MIN NOM MAX
A −−− −−− 1.10
A1 0.00 −−− 0.10
A2 0.70 0.90 1.00 0.027 0.035 0.039
b 0.15 0.20 0.25
C 0.08 0.15 0.22
D 1.80 2.00 2.20
E
2.00 2.10 2.20
E1 1.15 1.25 1.35
e 0.65 BSC
L 0.26 0.36 0.46
L2 0.15 BSC 0.006 BSC
aaa 0.15 0.006
bbb 0.30 0.012
ccc 0.10 0.004
ddd
c
0.10 0.004
INCHES
MIN NOM MAX
−−− −−− 0.043
0.000 −−− 0.004
0.006 0.008 0.010
0.003 0.006 0.009
0.070 0.078 0.086
0.078 0.082 0.086
0.045 0.049 0.053
0.026 BSC
0.010 0.014 0.018
GENERIC
MARKING DIAGRAM*
6
XXXMG
G
1
XXX = Specific Device Code
M = Date Code*
G = Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may
vary depending upon manufacturing location.
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
STYLES ON PAGE 2
DOCUMENT NUMBER:
DESCRIPTION:
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
98ASB42985B
SC−88/SC70−6/SOT−363
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 2
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Page 6
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE Y
DATE 11 DEC 2012
STYLE 1:
PIN 1. EMITTER 2
2. BASE 2
3. COLLECTOR 1
4. EMITTER 1
5. BASE 1
6. COLLECTOR 2
STYLE 7:
PIN 1. SOURCE 2
2. DRAIN 2
3. GATE 1
4. SOURCE 1
5. DRAIN 1
6. GATE 2
STYLE 13:
PIN 1. ANODE
2. N/C
3. COLLECTOR
4. EMITTER
5. BASE
6. CATHODE
STYLE 19:
PIN 1. I OUT
2. GND
3. GND
4. V CC
5. V EN
6. V REF
STYLE 25:
PIN 1. BASE 1
2. CATHODE
3. COLLECTOR 2
4. BASE 2
5. EMITTER
6. COLLECTOR 1
STYLE 2:
CANCELLED
STYLE 8:
CANCELLED
STYLE 14:
PIN 1. VREF
2. GND
3. GND
4. IOUT
5. VEN
6. VCC
STYLE 20:
PIN 1. COLLECTOR
2. COLLECTOR
3. BASE
4. EMITTER
5. COLLECTOR
6. COLLECTOR
STYLE 26:
PIN 1. SOURCE 1
2. GATE 1
3. DRAIN 2
4. SOURCE 2
5. GATE 2
6. DRAIN 1
STYLE 3:
CANCELLED
STYLE 9:
PIN 1. EMITTER 2
2. EMITTER 1
3. COLLECTOR 1
4. BASE 1
5. BASE 2
6. COLLECTOR 2
STYLE 15:
PIN 1. ANODE 1
2. ANODE 2
3. ANODE 3
4. CATHODE 3
5. CATHODE 2
6. CATHODE 1
STYLE 21:
PIN 1. ANODE 1
2. N/C
3. ANODE 2
4. CATHODE 2
5. N/C
6. CATHODE 1
STYLE 27:
PIN 1. BASE 2
2. BASE 1
3. COLLECTOR 1
4. EMITTER 1
5. EMITTER 2
6. COLLECTOR 2
STYLE 4:
PIN 1. CATHODE
2. CATHODE
3. COLLECTOR
4. EMITTER
5. BASE
6. ANODE
STYLE 10:
PIN 1. SOURCE 2
2. SOURCE 1
3. GATE 1
4. DRAIN 1
5. DRAIN 2
6. GATE 2
STYLE 16:
PIN 1. BASE 1
2. EMITTER 2
3. COLLECTOR 2
4. BASE 2
5. EMITTER 1
6. COLLECTOR 1
STYLE 22:
PIN 1. D1 (i)
2. GND
3. D2 (i)
4. D2 (c)
5. VBUS
6. D1 (c)
STYLE 28:
PIN 1. DRAIN
2. DRAIN
3. GATE
4. SOURCE
5. DRAIN
6. DRAIN
Note: Please refer to datasheet for
style callout. If style type is not called
out in the datasheet refer to the device
datasheet pinout or pin assignment.
STYLE 5:
PIN 1. ANODE
2. ANODE
3. COLLECTOR
4. EMITTER
5. BASE
6. CATHODE
STYLE 11:
PIN 1. CATHODE 2
2. CATHODE 2
3. ANODE 1
4. CATHODE 1
5. CATHODE 1
6. ANODE 2
STYLE 17:
PIN 1. BASE 1
2. EMITTER 1
3. COLLECTOR 2
4. BASE 2
5. EMITTER 2
6. COLLECTOR 1
STYLE 23:
PIN 1. Vn
2. CH1
3. Vp
4. N/C
5. CH2
6. N/C
STYLE 29:
PIN 1. ANODE
2. ANODE
3. COLLECTOR
4. EMITTER
5. BASE/ANODE
6. CATHODE
STYLE 6:
PIN 1. ANODE 2
2. N/C
3. CATHODE 1
4. ANODE 1
5. N/C
6. CATHODE 2
STYLE 12:
PIN 1. ANODE 2
2. ANODE 2
3. CATHODE 1
4. ANODE 1
5. ANODE 1
6. CATHODE 2
STYLE 18:
PIN 1. VIN1
2. VCC
3. VOUT2
4. VIN2
5. GND
6. VOUT1
STYLE 24:
PIN 1. CATHODE
2. ANODE
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
STYLE 30:
PIN 1. SOURCE 1
2. DRAIN 2
3. DRAIN 2
4. SOURCE 2
5. GATE 1
6. DRAIN 1
DOCUMENT NUMBER:
DESCRIPTION:
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
98ASB42985B
SC−88/SC70−6/SOT−363
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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