ON Semiconductor NTP75N06, NTB75N06 Technical data

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NTP75N06, NTB75N06

Power MOSFET

75 Amps, 60 Volts, N−Channel

2

TO−220 and D

PAK

Designed for low voltage, high speed switching applications in
power supplies, converters and power motor controls and bridge
circuits.

Features

• Pb−Free Packages are Available

T ypical Applications

• Power Supplies

• Converters

• Power Motor Controls

• Bridge Circuits

MAXIMUM RATINGS (T

Drain−to−Source Voltage V
Drain−to−Gate Voltage (RGS = 10 M) V
Gate−to−Source Voltage

− Continuous

− Non−Repetitive (t

Drain Current

− Continuous @ T

− Continuous @ T

− Single Pulse (t

Total Power Dissipation @ TA = 25°C

Derate above 25°C

Total Power Dissipation @ T
Operating and Storage Temperature Range TJ, T

Single Pulse Drain−to−Source Avalanche

Energy − Starting T

= 50 Vdc, VGS = 10 Vdc, L = 0.3 mH

(V

DD

I

= 75 A, VDS = 60 Vdc)

L(pk)

Thermal Resistance

− Junction−to−Case

− Junction−to−Ambient

Maximum Lead Temperature for Soldering

Purposes, 1/8″ from case for 10 seconds

Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits
are exceeded, device functional operation is not implied, damage may occur
and reliability may be affected.

= 25°C unless otherwise noted)

J

Rating Symbol Value Unit

stg

60 Vdc
60 Vdc

20
30

75
50

225
214

1.4

2.4

−55 to
+175

844 mJ

0.7

62.5
260 °C

Vdc

Adc

Apk

W

W/°C

W

°C

°C/W

10 ms)

p

= 25°C

A

= 100°C

A

10 s)

p

= 25°C

J

= 25°C

A

V
V

E

R
R

DSS
DGR

GS
GS

I
I

I

DM

P

AS





T

D
D

D

JC
JA

L

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75 AMPERES, 60 VOLTS

R

DS(on)

G

4

1

2

3

4

2

3

75N06 = Device Code
A = Assembly Location
Y = Year
WW = Work Week

= 9.5 m

N−Channel

D

TO−220

CASE 221A

STYLE 5

2

D

PAK

CASE 418B

STYLE 2

S

Gate

Gate

MARKING

DIAGRAMS

4

Drain

75N06

AYWW

1

1

2

Drain

4

Drain

75N06

AYWW

2

Drain

3
Source

3
Source

 Semiconductor Components Industries, LLC, 2004

August, 2004 − Rev. 2

ORDERING INFORMATION

See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.

1 Publication Order Number:

NTP75N06/D

NTP75N06, NTB75N06

)

f = 1.0 MHz)

(V

DD

30 Vdc, I

D

Adc

)

V

GS

Vdc) (Note 1)

)

dIS/dt = 100 A/s) (Note 1)

ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise noted)

J

Characteristic

OFF CHARACTERISTICS

Drain−to−Source Breakdown Voltage (Note 1)

= 0 Vdc, ID = 250 Adc)

(V

GS

Temperature Coefficient (Positive)
Zero Gate Voltage Drain Current

(V

= 60 Vdc, VGS = 0 Vdc)

DS

= 60 Vdc, VGS = 0 Vdc, TJ = 150°C)

(V

DS

Gate−Body Leakage Current (VGS = ±20 Vdc, VDS = 0 Vdc) I

ON CHARACTERISTICS (Note 1)

Gate Threshold Voltage (Note 1)

(V

= VGS, ID = 250 Adc)

DS

Threshold Temperature Coefficient (Negative)
Static Drain−to−Source On−Resistance (Note 1)

= 10 Vdc, ID = 37.5 Adc)

(V

GS

Static Drain−to−Source On−Voltage (Note 1)

(V

= 10 Vdc, ID = 75 Adc)

GS

= 10 Vdc, ID = 37.5 Adc, TJ = 150°C)

(V

GS

Forward Transconductance (Note 1) (VDS = 15 Vdc, ID = 37.5 Adc) g

DYNAMIC CHARACTERISTICS

Input Capacitance
Output Capacitance

(VDS = 25 Vdc, VGS = 0 Vdc,

f = 1.0 MHz

Transfer Capacitance

SWITCHING CHARACTERISTICS (Note 2)

Turn−On Delay Time
Rise Time
Turn−Off Delay Time

V

(V

= 30 Vdc, ID = 75 Adc,

DD

= 10 Vdc, RG = 9.1 ) (Note 1)

GS

75

,

Fall Time t
Gate Charge

(VDS = 48 Vdc, ID = 75 Adc,

= 10 Vdc) (Note 1

= 10

V

SOURCE−DRAIN DIODE CHARACTERISTICS

Forward On−Voltage

(IS = 75 Adc, VGS = 0 Vdc) (Note 1)

= 75 Adc, VGS = 0 Vdc, TJ = 150°C)

(I

S

Reverse Recovery Time

(IS = 75 Adc, VGS = 0 Vdc,
dI

/dt = 100 A/s) (Note 1

Reverse Recovery Stored Charge Q

1. Pulse Test: Pulse Width ≤300 s, Duty Cycle ≤ 2%.

2. Switching characteristics are independent of operating junction temperatures.

Symbol Min Typ Max Unit

V

(BR)DSS

I

DSS

GSS

V

GS(th)

R

DS(on)

60

−

−

−

71
73

−

−

−

−

10

100

− − ±100 nAdc

2.0

−

2.8

8.0

4.0

−

Vdc

mV/°C

Adc

Vdc

mV/°C

m

− 8.2 9.5

V

DS(on)

C
C
C

t

d(on)

t

d(off)

V

FS

iss
oss
rss

−

−

− 40.2 − mhos

− 3220 4510 pF

− 1020 1430

− 234 330

0.72

0.63

0.86

−

− 16 25 ns

t

r

− 112 155

− 90 125

f

Q

T

Q

1

Q

2

SD

t

rr

t

a

t

b
RR

− 100 140

− 92 130 nC

− 14 −

− 44 −

−

−

1.0

0.9

1.1

−

− 77 −

− 49 −

− 28 −

− 0.16 − C

Vdc

Vdc

ns

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2

NTP75N06, NTB75N06

160

VGS = 10 V

140
120
100

80
60
40

, DRAIN CURRENT (AMPS)

D

I

20

0

0

V

, DRAIN−TO−SOURCE VOLTAGE (V)

DS

Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics

0.015
VGS = 10 V

0.013

0.011

VGS = 7 V

VGS = 8 V

VGS = 9 V

21

TJ = 100°C

VGS = 6.5 V

VGS = 6 V

VGS = 5.5 V

VGS = 5 V

VGS = 4.5 V
3

160

VDS  10 V

140
120
100

80
60
40

, DRAIN CURRENT (AMPS)

D

I

20

4

0.015

0.013

0.011

TJ = 100°C

0

2.5 3 7

VGS = 15 V

TJ = 25°C

TJ = −55°C

3.5 4 4.5 5 5.5 6 6.5

V

, GATE−TO−SOURCE VOLTAGE (V)

GS

TJ = 100°C

0.009

0.007

0.005

, DRAIN−TO−SOURCE RESISTANCE ()

0.003
080604020 100 160

DS(on)

R

ID, DRAIN CURRENT (AMPS)

TJ = 25°C

TJ = −55°C

Figure 3. On−Resistance vs. Gate−to−Source

Voltage

2

ID = 37.5 A
V

= 10 V

GS

1.8

1.6

1.4

1.2

1

0.8

0.009

0.007

0.005

, DRAIN−TO−SOURCE RESISTANCE ()

120 140 0 80604020 100 160

0.003

DS(on)

R

ID, DRAIN CURRENT (AMPS)

TJ = 25°C

TJ = −55°C

120 140

Figure 4. On−Resistance vs. Drain Current and

Gate Voltage

10000

, LEAKAGE (nA)

DSS

I

1000

100

VGS = 0 V

TJ = 150°C

TJ = 125°C

TJ = 100°C

0.6

−50 50250−25 75 100

, DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)

DS(on)

R

TJ, JUNCTION TEMPERATURE (°C)

Figure 5. On−Resistance Variation with

Temperature

10

175150125

04050302010 60

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3

VDS, DRAIN−TO−SOURCE VOLTAGE (V)

Figure 6. Drain−to−Source Leakage Current

vs. Voltage

NTP75N06, NTB75N06

10000

VGS = 0 VVDS = 0 V TJ = 25°C

8000

C

iss

6000

C

rss

4000

C, CAPACITANCE (pF)

2000

0

10 10

V

V

GS

DS

GATE−TO−SOURCE OR DRAIN−TO−SOURCE (V)

Figure 7. Capacitance Variation Figure 8. Gate−to−Source and

1000

t

100

t, TIME (ns)

10

1

1

f

t

r

t

d(off)

t

d(on)

RG, GATE RESISTANCE ()

12

Q

10

T

V

GS

8

Q

1

C

iss

6

Q

2

4

C

oss

2

25

, GATE−TO−SOURCE VOLTAGE (V)

GS

V

0

0 10 100

Q

, TOTAL GATE CHARGE (nC)

g

C

rss

50

15 2052030405060

ID = 75 A
T

= 25°C

J

70 80 90

Drain−to−Source Voltage vs. Total Charge

80

VGS = 0 V
T

= 25°C

70

J

60
50
40
30
20

, SOURCE CURRENT (AMPS)

S

10

I

0

0.6 0.76 0.80.720.68 0.840.64 0.96

0.86 0.92

VSD, SOURCE−TO−DRAIN VOLTAGE (V)

1

10

VDS = 30 V
I

= 75 A

D

= 5 V

V

GS

100

Figure 9. Resistive Switching Time Variations

vs. Gate Resistance

1000

VGS = 20 V
SINGLE PULSE

= 25°C

T

C

100

100 s

1 ms

10

, DRAIN CURRENT (AMPS)

D

I

1

R

DS(on)

THERMAL LIMIT
PACKAGE LIMIT

LIMIT

10 ms

dc

0.1 101 100
VDS, DRAIN−TO−SOURCE VOLTAGE (V)

Figure 11. Maximum Rated Forward Biased

Safe Operating Area

1000

10 s

800

600

400

200

AVALANCHE ENERGY (mJ)

, SINGLE PULSE DRAIN−TO−SOURCE

AS

0

E

25 125 1501007550 175

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4

Figure 10. Diode Forward Voltage vs. Current

ID = 75 A

TJ, STARTING JUNCTION TEMPERATURE (°C)

Figure 12. Maximum Avalanche Energy vs.

Starting Junction Temperature

1.0

NTP75N06, NTB75N06

D = 0.5

0.2

0.1
P

0.1

0.05

(NORMALIZED)

0.02

0.01

SINGLE PULSE

(pk)

t

1

t

2

DUTY CYCLE, D = t1/t

R

(t) = r(t) R



JC



JC

D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t
T

− TC = P

J(pk)

2

(pk)

1

R

(t)



JC

0.01

1.0 100.10.010.0010.00010.00001

r(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE

t, TIME (s)

Figure 13. Thermal Response

ORDERING INFORMATION

Device Package Shipping

NTP75N06 TO−220 50 Units/Rail
NTP75N06G TO−220

50 Units/Rail

(Pb−Free)
NTB75N06 D2PAK 50 Units/Rail
NTB75N06G D2PAK

50 Units/Rail

(Pb−Free)
NTB75N06T4 D2PAK 800 Tape & Reel
NTB75N06T4G D2PAK

800 Tape & Reel

(Pb−Free)

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

†

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5

NTP75N06, NTB75N06

PACKAGE DIMENSIONS

TO−220

CASE 221A−09

ISSUE AA

SEATING

−T−

PLANE

B

4

Q

123

F

T

A

U

C

S

H

K

Z

L

V

R
J

G

D

N

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.

DIM MIN MAX MIN MAX

A 0.570 0.620 14.48 15.75
B 0.380 0.405 9.66 10.28
C 0.160 0.190 4.07 4.82
D 0.025 0.035 0.64 0.88
F 0.142 0.147 3.61 3.73
G 0.095 0.105 2.42 2.66
H 0.110 0.155 2.80 3.93

J 0.018 0.025 0.46 0.64
K 0.500 0.562 12.70 14.27
L 0.045 0.060 1.15 1.52
N 0.190 0.210 4.83 5.33
Q 0.100 0.120 2.54 3.04
R 0.080 0.110 2.04 2.79
S 0.045 0.055 1.15 1.39
T 0.235 0.255 5.97 6.47
U 0.000 0.050 0.00 1.27
V 0.045 −−− 1.15 −−−
Z −−− 0.080 −−− 2.04

STYLE 5:

PIN 1. GATE

2. DRAIN

3. SOURCE

4. DRAIN

MILLIMETERSINCHES

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6

NTP75N06, NTB75N06

PACKAGE DIMENSIONS

D2PAK

CASE 418B−04

ISSUE J

−T−

SEATING
PLANE

−B−

4

231

G

VARIABLE
CONFIGURATION
ZONE

M

S

D

3 PL

0.13 (0.005) T

M

C

E

V

W

A

K

W

J

H

M

B

R

L

N P

L

M

NOTES:

1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. 418B−01 THRU 418B−03 OBSOLETE,
NEW STANDARD 418B−04.

DIM MIN MAX MIN MAX

A 0.340 0.380 8.64 9.65
B 0.380 0.405 9.65 10.29
C 0.160 0.190 4.06 4.83
D 0.020 0.035 0.51 0.89
E 0.045 0.055 1.14 1.40
F 0.310 0.350 7.87 8.89
G 0.100 BSC 2.54 BSC
H 0.080 0.110 2.03 2.79
J 0.018 0.025 0.46 0.64
K 0.090 0.110 2.29 2.79

L 0.052 0.072 1.32 1.83
M 0.280 0.320 7.11 8.13
N 0.197 REF 5.00 REF
P 0.079 REF 2.00 REF
R 0.039 REF 0.99 REF

S 0.575 0.625 14.60 15.88

V 0.045 0.055 1.14 1.40

STYLE 2:

PIN 1. GATE

2. DRAIN

3. SOURCE

4. DRAIN

MILLIMETERSINCHES

U

L

M

F

VIEW W−W VIEW W−W VIEW W−W

123

F

F

SOLDERING FOOTPRINT*

8.38

0.33

10.66

0.42

1.016

0.04

5.08

0.20

3.05

0.12

17.02

0.67

SCALE 3:1

mm



inches



*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.

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7

NTP75N06, NTB75N06

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice

to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
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For additional information, please contact your

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NTP75N06/D

8