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NTP35N15
Preferred Device
Power MOSFET
37 Amps, 150 Volts
N−Channel TO−220
Features
• Source−to−Drain Diode Recovery Time Comparable to a Discrete
Fast Recovery Diode
• Avalanche Energy Specified
• I
and R
DSS
T ypical Applications
• PWM Motor Controls
• Power Supplies
• Converters
MAXIMUM RATINGS (T
Drain−to−Source Voltage V
Drain−to−Source Voltage (RGS = 1.0 MΩ) V
Gate−to−Source Voltage
− Continuous
− Non−Repetitive (t
Drain Current
− Continuous @ T
− Continuous @ T
− Pulsed (Note 1.)
Total Power Dissipation @ TA = 25°C
Derate above 25°C
Operating and Storage Temperature Range TJ, T
Single Drain−to−Source Avalanche Energy −
Starting T
(V
= 100 Vdc, VGS = 10 Vdc,
DD
I
(pk) = 21.6 A, L = 3.0 mH, RG = 25 Ω)
L
Thermal Resistance
− Junction−to−Case
− Junction−to−Ambient
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from case for 10 seconds
1. Pulse Test: Pulse Width = 10 µs, Duty Cycle = 2%.
Specified at Elevated Temperature
DS(on)
= 25°C unless otherwise noted)
C
Rating Symbol Value Unit
DSS
DGR
V
V
I
E
R
R
GS
GSM
I
D
I
D
DM
P
D
AS
θ
JC
θ
JA
T
L
stg
= 25°C
J
10 ms)
p
25°C
A
100°C
A
150 Vdc
150 Vdc
20
40
37
23
111
178
1.43WW/°C
−55 to
+150
700 mJ
0.7
62.5
260 °C
Vdc
Adc
°C
°C/W
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37 AMPERES
150 VOLTS
50 mΩ @ V
N−Channel
G
4
TO−220AB
CASE 221A
STYLE 5
1
2
3
NTP35N15 = Device Code
LL = Location Code
Y = Year
WW = Work Week
= 10 V
GS
D
S
MARKING DIAGRAM
& PIN ASSIGNMENT
4
Drain
NTP35N15
LLYWW
1
Gate
2
Drain
3
Source
Semiconductor Components Industries, LLC, 2003
December, 2003 − Rev. 2
ORDERING INFORMATION
Device Package Shipping
NTP35N15 TO−220AB 50 Units/Rail
Preferred devices are recommended choices for future use
and best overall value.
1 Publication Order Number:
NTP35N15/D
NTP35N15
)
f = 1.0 MHz)
R
G
9.1 Ω)
)
V
GS
Vdc)
)
dIS/dt = 100 A/µs)
ELECTRICAL CHARACTERISTICS (T
= 25°C unless otherwise noted)
C
Characteristic
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
(V
= 0 Vdc, ID = 250 µAdc)
GS
Temperature Coefficient (Positive)
Zero Gate Voltage Collector Current
= 0 Vdc, VDS = 150 Vdc, TJ = 25°C)
(V
GS
= 0 Vdc, VDS = 150 Vdc, TJ = 125°C)
(V
GS
Gate−Body Leakage Current (VGS = ±20 Vdc, VDS = 0) I
ON CHARACTERISTICS
Gate Threshold Voltage
= V
V
DS
ID = 250 µAdc)
GS,
Temperature Coefficient (Negative)
Static Drain−to−Source On−State Resistance
= 10 Vdc, ID = 18.5 Adc)
(V
GS
(V
= 10 Vdc, ID = 18.5 Adc, TJ = 125°C)
GS
Drain−to−Source On−Voltage
= 10 Vdc, ID = 18.5 Adc)
(V
GS
Forward Transconductance (VDS = 10 Vdc, ID = 18.5 Adc) g
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
(VDS = 25 Vdc, VGS = 0 Vdc,
f = 1.0 MHz
Reverse Transfer Capacitance
SWITCHING CHARACTERISTICS (Notes 2. & 3.)
Turn−On Delay Time
(V
= 120 Vdc, ID = 37 Adc,
Rise Time
Turn−Off Delay Time
DD
VGS = 10 Vdc,
R
= 9.1 Ω)
G
Fall Time
Gate Charge
(VDS = 120 Vdc, ID = 37 Adc,
V
= 10 Vdc
= 10
BODY−DRAIN DIODE RATINGS (Note 2.)
Forward On−Voltage
(IS = 37 Adc, VGS = 0 Vdc)
(I
= 37 Adc, VGS = 0 Vdc, TJ = 125°C)
S
Reverse Recovery Time
(IS = 37 Adc, VGS = 0 Vdc,
dI
/dt = 100 A/µs
Reverse Recovery Stored Charge Q
2. Pulse Test: Pulse Width ≤300 µs, Duty Cycle ≤ 2%.
3. Switching characteristics are independent of operating junction temperature.
Symbol Min Typ Max Unit
V
(BR)DSS
I
DSS
GSS
V
GS(th)
R
DS(on)
V
DS(on)
150
−
−
−
−
240
−
−
−
−
5.0
50
− − ±100 nAdc
2.0
−
−
−
2.9
−8.56
4.0
−
0.042−0.050
0.120
Vdc
mV/°C
µAdc
Vdc
mV/°C
Vdc
− 1.55 1.78
− 26 − mhos
− 2275 3200 pF
− 450 650
− 90 175
− 20 35 ns
− 125 225
− 90 175
− 120 210
− 70 100 nC
− 14 −
− 32 −
−
−
− 170 −
1.00
0.88
1.5
−
Vdc
ns
− 112 −
− 58 −
− 1.14 − µC
C
C
C
t
d(on)
t
d(off)
Q
Q
Q
V
t
t
t
FS
iss
oss
rss
t
r
t
f
tot
gs
gd
SD
rr
a
b
RR
Ω
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2
NTP35N15
70
VGS = 10 V
60
V
= 9 V
GS
50
40
30
20
, DRAIN CURRENT (AMPS)
D
10
I
0
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics
0.1
VDS = 10 V
0.08
0.06
V
V
= 7 V
GS
V
= 6 V
GS
TJ = 100°C
GS
V
GS
= 8 V
= 5.5 V
TJ = 25°C
V
GS
V
= 4.5 V
GS
V
= 4 V
GS
89
= 5 V
70
60
50
40
30
20
, DRAIN CURRENT (AMPS)
D
I
10
1076543210
0
0.055
0.05
0.45
VDS ≥ 10 V
TJ = 25°C
TJ = 100°C
TJ = −55°C
765432
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 2. Transfer Characteristics
TJ = 25°C
VGS = 10 V
0.04
0.02
, DRAIN−TO−SOURCE RESISTANCE ()
0
DS(on)
R
ID, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance versus Drain Current
2.5
ID = 18.5 A
2.25
V
= 10 V
GS
2.0
1.75
1.5
1.25
1.0
0.75
0.5
0.25
0
DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)
TJ, JUNCTION TEMPERATURE (°C)
DS(on),
R
Figure 5. On−Resistance Variation with
TJ = 25°C
TJ = −55°C
and Temperature
Temperature
0.40
VGS = 15 V
0.35
, DRAIN−TO−SOURCE RESISTANCE ()
50403020100
7060
0.03
DS(on)
R
403020100
ID, DRAIN CURRENT (AMPS)
60
7050
Figure 4. On−Resistance versus Drain Current
and Gate Voltage
1501251007550250−25−50
10,000
, LEAKAGE (nA)
DSS
I
1000
100
10
VGS = 0 V
TJ = 150°C
TJ = 100°C
504030
7060 15080
10090 110 120 130 140
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 6. Drain−to−Source Leakage Current
versus V oltage
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3
NTP35N15
POWER MOSFET SWITCHING
Switching behavior is most easily modeled and predicted
by recognizing that the power MOSFET is charge
controlled. The lengths of various switching intervals (∆t)
are determined by how fast the FET input capacitance can
be charged by current from the generator.
The published capacitance data is difficult to use for
calculating rise and fall because drain−gate capacitance
varies greatly with applied voltage. Accordingly, gate
charge data is used. In most cases, a satisfactory estimate of
average input current (I
rudimentary analysis of the drive circuit so that
t = Q/I
G(AV)
During the rise and fall time interval when switching a
resistive load, VGS remains virtually constant at a level
known as the plateau voltage, V
times may be approximated by the following:
tr = Q2 x RG/(VGG − V
tf = Q2 x RG/V
GSP
GSP
where
VGG = the gate drive voltage, which varies from zero to V
RG = the gate drive resistance
and Q2 and V
are read from the gate charge curve.
GSP
During the turn−on and turn−off delay times, gate current is
not constant. The simplest calculation uses appropriate
values from the capacitance curves in a standard equation for
voltage change in an RC network. The equations are:
t
d(on)
t
d(off)
= RG C
= RG C
In [VGG/(V
iss
In (VGG/V
iss
) can be made from a
G(AV)
. Therefore, rise and fall
SGP
)
− V
GSP
)]
GG
GSP
)
GG
The capacitance (C
) is read from the capacitance curve at
iss
a voltage corresponding to the off−state condition when
calculating t
on−state when calculating t
and is read at a voltage corresponding to the
d(on)
.
d(off)
At high switching speeds, parasitic circuit elements
complicate the analysis. The inductance of the MOSFET
source lead, inside the package and in the circuit wiring
which is common to both the drain and gate current paths,
produces a voltage at the source which reduces the gate drive
current. The voltage is determined by Ldi/dt, but since di/dt
is a function of drain current, the mathematical solution is
complex. The MOSFET output capacitance also
complicates the mathematics. And finally, MOSFETs have
finite internal gate resistance which effectively adds to the
resistance of the driving source, but the internal resistance
is difficult to measure and, consequently, is not specified.
The resistive switching time variation versus gate
resistance (Figure 9) shows how typical switching
performance is affected by the parasitic circuit elements. If
the parasitics were not present, the slope of the curves would
maintain a value of unity regardless of the switching speed.
The circuit used to obtain the data is constructed to minimize
common inductance in the drain and gate circuit loops and
is believed readily achievable with board mounted
components. Most power electronic loads are inductive; the
data in the figure is taken with a resistive load, which
approximates an optimally snubbed inductive load. Power
MOSFETs may be safely operated into an inductive load;
however, snubbing reduces switching losses.
6000
5000
C
iss
4000
3000
C
rss
2000
C, CAPACITANCE (pF)
1000
0
10 0 10 15 20 25
55
V
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
VGS = 0 VVDS = 0 V
C
rss
V
GS
Figure 7. Capacitance Variation
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DS
4
TJ = 25°C
C
iss
C
oss
, GATE−TO−SOURCE VOLTAGE (VOLTS)
V
GS
NTP35N15
V
DS,
DRAIN−TO−SOURCE VOLTAGE (VOLTS)
1000
VDD = 75 V
= 37 A
I
D
V
= 10 V
GS
100
t, TIME (ns)
t
f
10
1 10 100
RG, GATE RESISTANCE (OHMS)
t
d(on)
t
d(off)
t
r
12
Q
10
V
DS
8
Q
1
6
4
2
0
0
20 7040
10 5030 60
QG, TOTAL GATE CHARGE (nC)
T
Q
2
V
GS
ID = 37 A
T
= 25°C
J
120
100
80
60
40
20
0
Figure 8. Gate−T o−Source and Drain−To−Source
Voltage versus Total Charge
DRAIN−TO−SOURCE DIODE CHARACTERISTICS
40
VGS = 0 V
35
T
= 25°C
J
30
25
20
15
10
, SOURCE CURRENT (AMPS)
S
I
5
0
0.3 0.4 0.5 0.6 0.7 0.8 0.9
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage versus Current
SAFE OPERATING AREA
The Forward Biased Safe Operating Area curves define
the maximum simultaneous drain−to−source voltage and
drain current that a transistor can handle safely when it is
forward biased. Curves are based upon maximum peak
junction temperature and a case temperature (TC) of 25°C.
Peak repetitive pulsed power limits are determined by using
the thermal response data in conjunction with the procedures
discussed in AN569, “Transient Thermal
Resistance−General Data and Its Use.”
Switching between the off−state and the on−state may
traverse any load line provided neither rated peak current
(I
) nor rated voltage (V
DM
) is exceeded and the
DSS
transition time (tr,tf) do not exceed 10 µs. In addition the total
power averaged over a complete switching cycle must not
exceed (T
J(MAX)
− TC)/(R
).
JC
θ
A Power MOSFET designated E−FET can be safely used
in switching circuits with unclamped inductive loads. For
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
1.00.2
reliable operation, the stored energy from circuit inductance
dissipated in the transistor while in avalanche must be less
than the rated limit and adjusted for operating conditions
differing from those specified. Although industry practice is
to rate in terms of energy, avalanche energy capability is not
a constant. The energy rating decreases non−linearly with an
increase of peak current in avalanche and peak junction
temperature.
Although many E−FETs can withstand the stress of
drain−to−source avalanche at currents up to rated pulsed
current (I
), the energy rating is specified at rated
DM
continuous current (ID), in accordance with industry custom.
The energy rating must be derated for temperature as shown
in the accompanying graph (Figure 12). Maximum e ner gy a t
currents below rated continuous I
can safely be assumed to
D
equal the values indicated.
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NTP35N15
SAFE OPERATING AREA
1000
VGS = 20 V
SINGLE PULSE
= 25°C
T
C
100
10
, DRAIN CURRENT (AMPS)
1
D
I
R
LIMIT
DS(on)
THERMAL LIMIT
PACKAGE LIMIT
0.1
0.1 1.0 100
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
V
DS
10 150
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
1.0
D = 0.5
0.2
0.1
0.1
0.05
(NORMALIZED)
0.02
0.01
SINGLE PULSE
0.01
r(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE
700
600
10 µs
100 µs
1 ms
500
400
300
10 ms
200
dc
1000
AVALANCHE ENERGY (mJ)
, SINGLE PULSE DRAIN−TO−SOURCE
100
AS
E
0
25 50 75 100 125
Figure 12. Maximum Avalanche Energy versus
P
(pk)
t
1
t
2
DUTY CYCLE, D = t1/t
t, TIME (µs)
Figure 13. Thermal Response
T
, STARTING JUNCTION TEMPERATURE (°C)
J
Starting Junction Temperature
R
(t) = r(t) R
θ
JC
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t
T
− TC = P
J(pk)
2
θ
JC
(pk)
1
R
(t)
θ
JC
1.0 100.10.010.0010.00010.00001
ID = 21.6 A
di/dt
I
S
t
rr
t
t
a
b
TIME
t
p
0.25 I
S
I
S
Figure 14. Diode Reverse Recovery Waveform
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NTP35N15
PACKAGE DIMENSIONS
TO−220 THREE−LEAD
TO−220AB
CASE 221A−09
ISSUE AA
SEATING
−T−
PLANE
B
4
Q
123
F
T
A
U
C
S
H
K
Z
L
V
R
J
G
D
N
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.
DIM MIN MAX MIN MAX
A 0.570 0.620 14.48 15.75
B 0.380 0.405 9.66 10.28
C 0.160 0.190 4.07 4.82
D 0.025 0.035 0.64 0.88
F 0.142 0.147 3.61 3.73
G 0.095 0.105 2.42 2.66
H 0.110 0.155 2.80 3.93
J 0.018 0.025 0.46 0.64
K 0.500 0.562 12.70 14.27
L 0.045 0.060 1.15 1.52
N 0.190 0.210 4.83 5.33
Q 0.100 0.120 2.54 3.04
R 0.080 0.110 2.04 2.79
S 0.045 0.055 1.15 1.39
T 0.235 0.255 5.97 6.47
U 0.000 0.050 0.00 1.27
V 0.045 −−− 1.15 −−−
Z −−− 0.080 −−− 2.04
STYLE 5:
PIN 1. GATE
2. DRAIN
MILLIMETERSINCHES
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NTP35N15
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to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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8
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