ON Semiconductor NTGS3443B User Manual

Page 1
NTGS3443B
MOSFET – Power, Single,
P-Channel, TSOP-6
-20 V, -4.2 A
Low R
in TSOP6 Package
DS(on)
2.5 V Gate Rating
Fast Switching
This is a PbFree Device
Applications
Optimized for Battery and Load Management Applications in
Portable Equipment
Li Ion Battery Linear Mode Charging
High Side Load Switch
HDD Switching Circuits, Camera Phone, etc.
MAXIMUM RATINGS (T
Parameter Symbol Value Unit
DraintoSource Voltage V
Gateto−Source Voltage V
Continuous Drain Current (Note 1)
Power Dissipation (Note 1)
Continuous Drain Current (Note 2)
Power Dissipation (Note 2)
Pulsed Drain Current
Operating Junction and Storage Temperature TJ,
Lead Temperature for Soldering Purposes (1/8” from case for 10 s)
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
1. Surfacemounted on FR4 board using 1 in sq pad size. (Cu area = 1.127 in sq [2 oz] including traces)
2. Surfacemounted on FR4 board using the minimum recommended pad size. (Cu area = 0.0775 in sq)
= 25°C unless otherwise stated)
J
D
D
L
20 V
$12 V
3.7
1.25
2.7
0.7 W
15 A
55 to
150
260 °C
DSS
GS
T
I
P
I
P
I
DM
STG
T
D
D
Steady
State
t v 5 s TA = 25°C 4.2
Steady
State
t v 5 s 1.6
Steady
State
tp = 10 ms
TA = 25°C
TA = 85°C 2.7
TA = 25°C
TA = 25°C
TA = 85°C 2.0
TA = 25°C
A
W
A
°C
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V
(BR)DSS
20 V
R
MAX ID MAX
DS(ON)
60 mW @ 4.5 V
90 mW @ 2.7 V
100 mW @ 2.5 V
PChannel
1256
3
4
3.7 A
3.1 A
3.0 A
MARKING DIAGRAM
TSOP−6
CASE 318G
1
SB = Device Code M = Date Code G = Pb−Free Package (Note: Microdot may be in either location)
STYLE 1
SB MG
G
1
PIN ASSIGNMENT
DrainDrain
Source
56
4
321
Drain
GateDrain
ORDERING INFORMATION
Device Package Shipping
NTGS3443BT1G TSOP−6
(PbFree)
†For information on tape and reel specifications,
including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
3000 / Tape & Reel
© Semiconductor Components Industries, LLC, 2007
May, 2019 − Rev. 0
1 Publication Order Number:
NTGS3443B/D
Page 2
NTGS3443B
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter Symbol Value Unit
JunctiontoAmbient – Steady State (Note 3)
JunctiontoAmbient – t v 5 s (Note 3)
JunctiontoAmbient – Steady State (Note 4)
3. Surfacemounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces).
4. Surfacemounted on FR4 board using the minimum recommended pad size (Cu area = 0.0775 in sq).
R
q
JA
R
q
JA
R
q
JA
100
80
190
°C/W
ELECTRICAL CHARACTERISTICS (T
Parameter
= 25°C unless otherwise specified)
J
Symbol Test Condition Min Typ Max Unit
OFF CHARACTERISTICS
DraintoSource Breakdown Voltage
DraintoSource Breakdown Voltage Temperature Coefficient
Zero Gate Voltage Drain Current I
GatetoSource Leakage Current I
V
(BR)DSS
V
(BR)DSS/TJ
DSS
GSS
VGS = 0 V, ID = 250 mA
ID = 250 mA, Reference 25°C
VGS = 0 V,
V
= 20 V
DS
VDS = 0 V, VGS = ±12 V $0.1
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage V
Negative Threshold Temperature Coefficient V
DraintoSource On Resistance R
GS(TH)
GS(TH)/TJ
DS(on)
VGS = VDS, ID = 250 mA
VGS = 4.5 V, ID = 3.7 A
VGS = 2.7 V, ID = 3.1 A
VGS = 2.5 V, ID = 3.0 A
Forward Transconductance g
FS
VDS = 10 V, ID =3.7 A 7.0 S
CHARGES, CAPACITANCES AND GATE RESISTANCE
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Total Gate Charge Q
Threshold Gate Charge Q
GatetoSource Charge Q
GatetoDrain Charge Q
Gate Resistance R
ISS
OSS
RSS
G(TOT)
G(TH)
GS
GD
G
VGS = 0 V, f = 1 MHz, VDS = 10 V
VGS = 4.5 V, VDS = 10 V;
SWITCHING CHARACTERISTICS (Note 6)
TurnOn Delay Time
Rise Time t
TurnOff Delay Time t
Fall Time t
t
d(ON)
r
d(OFF)
f
VGS = 4.5 V, VDD = 10 V,
= 1.0 A, RG = 6.0 W
I
D
DRAINSOURCE DIODE CHARACTERISTICS
Forward Diode Voltage V
Reverse Recovery Time t
SD
RR
VGS = 0 V, I
= 1.7 A
S
VGS = 0 V, dIS/dt = 100 A/ms,
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%
6. Switching characteristics are independent of operating junction temperatures
I
= 3.7 A
D
I
= 1.7 A
S
20 V
15 mV/°C
TJ = 25°C 1.0
TJ = 70°C 5.0
0.6 1.4 V
3.3 mV/°C
45 60
mW
65 90
70 100
819
157
103
8.0 11
0.6
1.7
2.4
11
10 15
7.0 11
47 70
25 40
TJ = 25°C 0.8 1.2 V
15 30 ns
mA
mA
pF
nC
W
ns
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2
Page 3
NTGS3443B
20
4.5 V
3.5 V
16
12
8
DRAIN CURRENT (AMPS)
4
D,
I
0
0
1
V
, DRAINTOSOURCE VOLTAGE (VOLTS)
DS
Figure 1. On−Region Characteristics
0.20
0.16
0.12
0.08
0.04
DRAINTOSOURCE RESISTANCE (W)
0.00
1.5 3
DS(on),
R
1
VGS, GATE−TOSOURCE VOLTAGE (VOLTS)
2 3.5
Figure 3. On−Resistance vs. Gate−to−Source
TYPICAL PERFORMANCE CURVES (T
TJ = 25°C
4 V
2.5 4
Voltage
3 V
2.5 V
2 V
1.5 V
4
ID = 3.7 A
= 25°C
T
J
4.5
DRAIN CURRENT (AMPS)
D,
I
532
0.20
0.18
0.16
0.14
0.12
0.10
0.08
0.06
0.04
DRAINTOSOURCE RESISTANCE (W)
0.02
0.00
5
DS(on),
R
= 25°C unless otherwise noted)
J
20
VDS = 5 V
18
16
14
12
10
8
6
4
2
0
0.5
TJ = 25°C
TJ = 125°C
TJ = 55°C
1.51
2 2.5
VGS, GATE−TOSOURCE VOLTAGE (VOLTS)
Figure 2. Transfer Characteristics
TJ = 25°C
VGS = 2.5 V
VGS = 2.7 V
VGS = 4.5 V
0201612
84
ID, DRAIN CURRENT (AMPS)
Figure 4. OnResistance vs. Drain Current and
Gate Voltage
3
1.5
ID = 3.7 A
1.4 V
GS
= 4.5 V
1.3
1.2
1.1
1.0
DRAINTOSOURCE
0.9
DS(on),
R
RESISTANCE (NORMALIZED)
0.8
0.7
50 0−25 25
Figure 5. OnResistance Variation with
75 150
50 125100
TJ, JUNCTION TEMPERATURE (°C)
Temperature
1200
1000
800
600
400
C, CAPACITANCE (pF)
200
0
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3
C
iss
C
oss
C
rss
482010
6
V
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
DS
12 14 16 18
Figure 6. Capacitance Variation
VGS = 0 V
= 25°C
T
J
f = 1 MHz
20
Page 4
NTGS3443B
, GATE-TO-SOURCE VOLTAGE (VOLTS)
GS
-V
(V)
GS(th)
V
TYPICAL PERFORMANCE CURVES (T
7
6
-V
DS
5
4
3
Q
GS
Q
GD
2
1
0
0
, TOTAL GATE CHARGE (nC)
Q
G
Figure 7. Gate−to−Source and
DraintoSource Voltage vs. Total Charge
1.4
1.2
1.0
0.8
0.6
0.4
QT
42
6
-V
GS
VDS = 10 V
= 3.7 A
I
D
T
= 25°C
J
8
ID = 250 mA
10
12
10
= 25°C unless otherwise noted)
J
-V
DS
30
VGS = 0 V
, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
8
10
6
4
TJ = 150°C
2
0
, SOURCE CURRENT (AMPS)
S
I
1.0
0.0
0.2 0.6 1.0
, SOURCETODRAIN VOLTAGE (VOLTS)
V
SD
TJ = 25°C
0.80.4
1.2
1.4
Figure 8. Diode Forward Voltage vs. Current
60
50
40
30
20
POWER (WATTS)
0.2
0.0
50 0−25 25
T
, JUNCTION TEMPERATURE (°C)
J
Figure 9. Threshold Voltage
10
50 125100
75 150
0
0.001
Figure 10. Single Pulse Maximum Power
100
10
100 ms
1 ms
1
10 ms
VGS = 12 V SINGLE PULSE T
= 25°C
0.1
D
0.01
C
R
LIMIT
DS(on)
Thermal Limit Package Limit
dc
, DRAIN CURRENT (A)
I
0.1 1 10 100
VDS, DRAINTOSOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
0.1
1 100
100.01
SINGLE PULSE TIME (s)
Dissipation
1000
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4
Page 5
0
1
Duty Cycle = 0.5
0.2
NTGS3443B
0.1
0.1
P
(pk)
0.05
Test Type = 1 sq in 2 oz
0.02
0.01
RESPONSE NORMALIZED (°C/W)
0.01
R(t), EFFECTIVE TRANSIENT THERMAL
0.0001 0.001 0.01 0.1 1 10 100 100
Single Pulse
t
1
t
2
DUTY CYCLE, D = t1/t
R
= 1 sq in 2 oz
q
JA
2
PULSE TIME (s)
Figure 12. FET Thermal Response
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5
Page 6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
1
SCALE 2:1
D
456
E1
NOTE 5
0.05
A1
23
1
e
E
b
A
DETAIL Z
c
CASE 318G02
H
L
M
DETAIL Z
TSOP−6
ISSUE V
L2
GAUGE PLANE
SEATING
C
PLANE
DATE 12 JUN 2012
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSIONS D AND E1 ARE DETERMINED AT DATUM H.
5. PIN ONE INDICATOR MUST BE LOCATED IN THE INDICATED ZONE.
DIMAMIN NOM MAX
A1 0.01 0.06 0.10
b 0.25 0.38 0.50 c 0.10 0.18 0.26 D 2.90 3.00 3.10 E 2.50 2.75 3.00
E1
e 0.85 0.95 1.05 L 0.20 0.40 0.60
L2
M
MILLIMETERS
0.90 1.00 1.10
1.30 1.50 1.70
0.25 BSC
0° 10°
STYLE 1:
PIN 1. DRAIN
2. DRAIN
3. GATE
4. SOURCE
5. DRAIN
6. DRAIN
STYLE 7:
PIN 1. COLLECTOR
2. COLLECTOR
3. BASE
4. N/C
5. COLLECTOR
6. EMITTER
STYLE 13:
PIN 1. GATE 1
2. SOURCE 2
3. GATE 2
4. DRAIN 2
5. SOURCE 1
6. DRAIN 1
STYLE 2:
PIN 1. EMITTER 2
2. BASE 1
3. COLLECTOR 1
4. EMITTER 1
5. BASE 2
6. COLLECTOR 2
STYLE 8:
PIN 1. Vbus
2. D(in)
3. D(in)+
4. D(out)+
5. D(out)
6. GND
STYLE 14:
PIN 1. ANODE
2. SOURCE
3. GATE
4. CATHODE/DRAIN
5. CATHODE/DRAIN
6. CATHODE/DRAIN
STYLE 3:
PIN 1. ENABLE
2. N/C
3. R BOOST
4. Vz
5. V in
6. V out
STYLE 9:
PIN 1. LOW VOLTAGE GATE
2. DRAIN
3. SOURCE
4. DRAIN
5. DRAIN
6. HIGH VOLTAGE GATE
STYLE 15:
PIN 1. ANODE
2. SOURCE
3. GATE
4. DRAIN
5. N/C
6. CATHODE
RECOMMENDED
SOLDERING FOOTPRINT*
6X
0.60
3.20
DIMENSIONS: MILLIMETERS
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB14888C
TSOP−6
6X
0.95
0.95 PITCH
STYLE 4:
PIN 1. N/C
2. V in
3. NOT USED
4. GROUND
5. ENABLE
6. LOAD
STYLE 10:
PIN 1. D(OUT)+
2. GND
3. D(OUT)
4. D(IN)
5. VBUS
6. D(IN)+
STYLE 16:
PIN 1. ANODE/CATHODE
2. BASE
3. EMITTER
4. COLLECTOR
5. ANODE
6. CATHODE
STYLE 5:
PIN 1. EMITTER 2
2. BASE 2
3. COLLECTOR 1
4. EMITTER 1
5. BASE 1
6. COLLECTOR 2
STYLE 11:
PIN 1. SOURCE 1
2. DRAIN 2
3. DRAIN 2
4. SOURCE 2
5. GATE 1
6. DRAIN 1/GATE 2
STYLE 17:
PIN 1. EMITTER
2. BASE
3. ANODE/CATHODE
4. ANODE
5. CATHODE
6. COLLECTOR
STYLE 6:
PIN 1. COLLECTOR
2. COLLECTOR
3. BASE
4. EMITTER
5. COLLECTOR
6. COLLECTOR
STYLE 12:
PIN 1. I/O
2. GROUND
3. I/O
4. I/O
5. VCC
6. I/O
GENERIC
MARKING DIAGRAM*
XXXAYWG
G
1
XXX = Specific Device Code A =Assembly Location Y = Year
XXX = Specific Device Code M = Date Code
G = Pb−Free Package W = Work Week G = Pb−Free Package
*This information is generic. Please refer to device data sheet
for actual part marking. PbFree indicator, “G” or microdot “ G”, may or may not be present.
Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
XXX MG
G
1
STANDARDIC
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© Semiconductor Components Industries, LLC, 2019
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