Datasheet NSTB1002DXV5T1G, NSTB1002DXV5T5G Datasheet (ON Semiconductor)

NSTB1002DXV5T1G,
l
l
l
l
NSTB1002DXV5T5G
Preferred Devices
Dual Common Base−Collector Bias Resistor Transistors
NPN and PNP Silicon Surface Mount Transistors with Monolithic Bias Resistor Network
The BR T (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base−emitter resistor. These digital transistors are designed to replace a single device and its external resistor bias network. The BRT eliminates these individual components by integrating them into a single device. In the NSTB1002DXV5T1G series, two complementary devices are housed in the SOT−553 package which is ideal for low power surface mount applications where board space is at a premium.
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
Available in 8 mm, 7 inch Tape and Reel
These are Pb−Free Devices
MAXIMUM RATINGS (T
and Q2, − minus sign for Q1 (PNP) omitted)
Rating Symbo
Collector-Base Voltage V Collector-Emitter Voltage V Collector Current I
THERMAL CHARACTERISTICS
Characteristic
(One Junction Heated)
Total Device Dissipation TA = 25°C
Thermal Resistance −
Junction-to-Ambient
Characteristic
(Both Junctions Heated)
Total Device Dissipation TA = 25°C
Thermal Resistance −
Junction-to-Ambient
Junction and Storage Temperature TJ, T
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.
1. FR−4 @ Minimum Pad
= 25°C unless otherwise noted, common for Q
A
Value
Q1 Q2
CBO CEO
Symbol Max Unit
P
Derate above 25°C
R
Symbo
P
Derate above 25°C
R
−40 50 Vdc
−40 50 Vdc
−200 100 mAdc
C
357 (Note 1)
D
2.9 (Note 1)mWmW/°C
350 (Note 1) °C/W
q
JA
Max Unit
500 (Note 1)
D
4.0 (Note 1)
250 (Note 1) °C/W
q
JA
− 55 to +150 °C
stg
1
Unit
mW
mW/°C
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312
R1
Q1
45
CASE 463B
R2
Q2
R1
5
1
SOT−553
MARKING DIAGRAM
5
U9 MG
G
1
U9 = Specific Device Code M = Date Code G = Pb−Free Package (Note: Microdot may be in either location)
ORDERING INFORMATION
Device Package Shipping
NSTB1002DXV5T1G SOT−553
(Pb−Free)
NSTB1002DXV5T5G SOT−553
(Pb−Free)
Preferred devices are recommended choices for future use and best overall value.
4 mm pitch
4000/Tape & Ree
2 mm pitch
8000/Tape & Ree
© Semiconductor Components Industries, LLC, 2006
January, 2006 − Rev. 0
1 Publication Order Number:
NSTB1002DXV5/D
NSTB1002DXV5T1G, NSTB1002DXV5T5G
ELECTRICAL CHARACTERISTICS (T
= 25°C unless otherwise noted)
A
Characteristic Symbol Min Typ Max Unit
Q1 TRANSISTOR: PNP OFF CHARACTERISTICS
Collector−Emitter Breakdown Voltage (Note 2) V Collector−Base Breakdown Voltage V Emitter−Base Breakdown Voltage V Base Cutoff Current I Collector Cutoff Current I
ON CHARACTERISTICS (Note 2)
DC Current Gain
(IC = −0.1 mAdc, VCE = −1.0 Vdc) (IC = −1.0 mAdc, VCE = −1.0 Vdc) (IC = −10 mAdc, VCE = −1.0 Vdc) (IC = −50 mAdc, VCE = −1.0 Vdc) (IC = −100 mAdc, VCE = −1.0 Vdc)
Collector−Emitter Saturation Voltage
V (IC = −10 mAdc, IB = −1.0 mAdc) (IC = −50 mAdc, IB = −5.0 mAdc)
Base−Emitter Saturation Voltage
V (IC = −10 mAdc, IB = −1.0 mAdc) (IC = −50 mAdc, IB = −5.0 mAdc)
SMALL− SIGNAL CHARACTERISTICS
Current−Gain − Bandwidth Product f Output Capacitance C Input Capacitance C Input Impedance
(VCE = −10 Vdc, IC = −1.0 mAdc, f = 1.0 kHz)
Voltage Feedback Ratio
(VCE = −10 Vdc, IC = −1.0 mAdc, f = 1.0 kHz)
Small−Signal Current Gain
(VCE = −10 Vdc, IC = −1.0 mAdc, f = 1.0 kHz)
Output Admittance
(VCE = −10 Vdc, IC = −1.0 mAdc, f = 1.0 kHz)
Noise Figure
(VCE = −5.0 Vdc, IC = −100 mAdc, RS = 1.0 kW, f = 1.0 kHz)
SWITCHING CHARACTERISTICS
Delay Time (V Rise Time (I Storage Time (V Fall Time (I
= −3.0 Vdc, V
CC
= −10 mAdc, I
C
= −3.0 Vdc, I
CC
= I
B1
= 0.5 Vdc) t
BE
= −1.0 mAdc) t
B1
= −10 mAdc) t
C
= −1.0 mAdc) t
B2
Q2 TRANSISTOR: NPN OFF CHARACTERISTICS
Collector-Base Cutoff Current
(VCB = 50 V, IE = 0)
Collector-Emitter Cutoff Current
(VCB = 50 V, IB = 0)
Emitter-Base Cutoff Current
(VEB = 6.0, IC = 5.0 mA)
I
CBO
I
CEO
I
EBO
2. Pulse Test: Pulse Width 300 ms; Duty Cycle ≤ 2.0%.
(BR)CEO (BR)CBO (BR)EBO
BL
CEX
h
FE
CE(sat)
BE(sat)
T
obo
ibo
h
ie
h
re
h
fe
h
oe
−40 Vdc
−40 Vdc
−5.0 Vdc
−50 nAdc
−50 nAdc
60 80
100
60 30
−0.65
300
−0.25
−0.4
−0.85
−0.95
250 MHz
4.5 pF
10.0 pF
2.0 12
0.1 10 X 10
100 400
3.0 60
nF 4.0 dB
d
r
s
f
35
35
225
75
100 nAdc
500 nAdc
0.1 mAdc
Vdc
Vdc
kW
−4
mmhos
ns
ns
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NSTB1002DXV5T1G, NSTB1002DXV5T5G
ELECTRICAL CHARACTERISTICS (T
= 25°C unless otherwise noted)
A
Characteristic UnitMaxTypMinSymbol
ON CHARACTERISTICS
Collector-Base Breakdown Voltage
(IC = 10 mA, IE = 0)
Collector-Emitter Breakdown Voltage
(IC = 2.0 mA, IB = 0)
DC Current Gain
(VCE = 10 V, IC = 5.0 mA)
Collector−Emitter Saturation Voltage
(IC = 10 mA, IB = 0.3 mA)
Output Voltage (on)
(VCC = 5.0 V, V
= 2.5 V, RL = 1.0 kW)
B
Output Voltage (off)
(VCC = 5.0 V, V
= 0.5 V, RL = 1.0 kW)
B
V
(BR)CBO
V
(BR)CEO
h
V
CE(SAT)
V
V
FE
OL
OH
50 Vdc
50 Vdc
80 140
0.25 Vdc
0.2 Vdc
4.9 Vdc
Input Resistor R1 33 47 61 Resistor Ratio R1/R2 0.8 1.0 1.2
2. Pulse Test: Pulse Width 300 ms; Duty Cycle ≤ 2.0%.
250
kW
200
150
100
R
= 833°C/W
q
50
, POWER DISSIPATION (MILLIWATTS)
D
P
0
−50 0 50 100 150
JA
TA, AMBIENT TEMPERATURE (°C)
Figure 1. Derating Curve
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NSTB1002DXV5T1G, NSTB1002DXV5T5G
TYPICAL ELECTRICAL CHARACTERISTICS — PNP TRANSISTOR
2.0
1.0
0.7
0.5
0.3
0.2
FE
h , DC CURRENT GAIN (NORMALIZED)
0.1
0.1
0.2 0.3
TJ = +125°C
+25°C
−55 °C
0.5 2.0 3.0 10 50
1.00.7 IC, COLLECTOR CURRENT (mA)
30205.0 7.0
Figure 2. DC Current Gain
70
VCE = 1.0 V
100
200
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4
NSTB1002DXV5T1G, NSTB1002DXV5T5G
)
TYPICAL ELECTRICAL CHARACTERISTICS — NPN TRANSISTOR
10
IC/IB = 10
1
0.1
, MAXIMUM COLLECTOR VOLTAGE (VOLTS
0.01
CE(sat)
0
V
20 40
IC, COLLECTOR CURRENT (mA)
Figure 3. V
1
0.8
0.6
CE(sat)
TA=−25°C
versus I
C
25°C
75°C
50
f = 1 MHz IE = 0 mA TA = 25°C
1000
TA=75°C
100
, DC CURRENT GAIN
FE
h
10
1 100
IC, COLLECTOR CURRENT (mA)
10
Figure 4. DC Current Gain
100
75°C
10
1
25°C
TA=−25°C
VCE = 10 V
25°C
−25°C
0.4
, CAPACITANCE (pF)
ob
C
0.2
0
010203040
VR, REVERSE BIAS VOLTAGE (VOLTS)
Figure 5. Output Capacitance
100
VO = 0.2 V
10
1
, INPUT VOLTAGE (VOLTS)
in
V
0.1 010 203040 50
0.1
0.01
, COLLECTOR CURRENT (mA)
C
I
50
0.001 0246810
Figure 6. Output Current versus Input Voltage
TA=−25°C
IC, COLLECTOR CURRENT (mA)
VO = 5 V
Vin, INPUT VOLTAGE (VOLTS)
25°C
75°C
Figure 7. Input Voltage versus Output Current
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D
−X−
45
12 3
e
NSTB1002DXV5T1G, NSTB1002DXV5T5G
PACKAGE DIMENSIONS
SOT−553
XV5 SUFFIX
CASE 463B−01
ISSUE B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.
DIMAMIN NOM MAX MIN
0.50 0.55 0.60 0.020
b 0.17 0.22 0.27 0.007
0.08 0.13 0.18
c D 1.50 1.60 1.70 0.059 E 1.10 1.20 1.30 0.043 e 0.50 BSC L 0.10 0.20 0.30 0.004
H
1.50 1.60 1.70 0.059 0.063 0.067
E
E
−Y−
b 5 PL
0.08 (0.003) X
M
A
L
H
E
c
Y
SOLDERING FOOTPRINT*
0.3
0.0118
MILLIMETERS
INCHES
NOM MAX
0.022 0.024
0.009 0.011
0.003 0.005 0.007
0.063 0.067
0.047 0.051
0.020 BSC
0.008 0.012
0.45
0.0177
1.0
1.35
0.0394
0.0531
0.5
0.5
0.0197
0.0197
mm
ǒ
SCALE 20:1
inches
Ǔ
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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NSTB1002DXV5/D
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