ON Semiconductor NSPU5201, NSPU5221 User Manual

ESD and Surge Protection
Diode

Low Clamping Voltage

NSPU5201, NSPU5221
Series

Features

• Unidirectional High Voltage ESD and Surge Protection

• Provides ESD Protection to IEC61000−4−2 Level 4:

±30 kV Contact Discharge

• Small Package: 1.8 mm x 2.0 mm

• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS

Compliant

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UDFN6

CASE 517CS

APPLICATION DIAGRAM

Vcc (1,2)

**Die Attach Pad on
back of package
(connect to ground)

DAP**

GND (6,8)

GND (5,7)

BLOCK DIAGRAM

Cathode Anode

MARKING DIAGRAM

XX M

G

1

XX = Specific Device Code
M = Date Code
G = Pb−Free Package

ORDERING INFORMATION

Device Package Shipping

NSPU5201MUTBG

NSPU5221MUTBG

†For information on tape and reel specifications,

including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.

UDFN6

(Pb−Free)

UDFN6

(Pb−Free)

3000 / Tape &

Reel

3000 / Tape &

Reel

†

© Semiconductor Components Industries, LLC, 2017

March, 2021 − Rev. 2

1 Publication Order Number:

NSPU5201/D

NSPU5201, NSPU5221 Series

Table 1. PIN DESCRIPTIONS

6−Lead, UDFN8 Package

Pin Name Description

1 V

2 V

CC

CC

Cathode

Cathode

3 N/C No Connect

4 N/C No Connect

5 GND Anode

6 GND Anode

7 GND Anode

8 GND Anode

ELECTRICAL CHARACTERISTICS

Symbol Parameter

I

Maximum Reverse Peak Pulse Current

PP

V

Clamping Voltage @ I

V

V

QV

C

Working Peak Reverse Voltage

RWM

I

Maximum Reverse Leakage Current @ V

R

Breakdown Voltage @ I

BR

I

Test Current

T

Maximum Temperature Coefficient of V

BR

I

Forward Current

F

V

Forward Voltage @ I

F

PP

T

F

BR

RWM

Pin 1

Marking

PACKAGE / PINOUT DIAGRAMS

Top View

(Pins Down View)

6 5

XX M

1 2 3 4

6−Lead UDFN

I

I

F

V

VCV

BR

RWM

I

V

R

F

I

T

I

PP

Uni−Directional Surge Protection

Bottom View

(Pins Up View)

3

12 4

78

65

V

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2

NSPU5201, NSPU5221 Series

SPECIFICATIONS

Table 2. MAXIMUM RATINGS

Parameter Rating Units

Operating Temperature Range –55 to +125 °C

Storage Temperature Range –65 to +150 °C

Stresses at or above those listed in Maximum Ratings table may cause permanent damage to the device. This is a stress only rating and
operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Also,
due to variations in test equipment, stresses shown above are averages.

ELECTRICAL CHARACTERISTICS

Device Name

Device

Marking

I

PP (A)

(8 x 20

m

s)

V

RWM

(V)

Breakdown Voltage

V

I

R

@ V

RWM

A)

V @ IT (mA) VC (V) IPP (A)

BR

Max Max Min Nom Max Min Max

VC @ I

(8 x 20

NSPU5201 AZ 20 1 21.7 22.7 23.7 1 140 31.5 110

NSPU5221 A2

20 1

22 2 35 120

24 25 26 1 120

33 100

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.

PP

m

s)

ELECTRICAL CHARACTERISTICS (NSPU5221)

V

Clamp Voltage

CLAMP

24 A IEC61000−4−5 Surge (8/20 ms) from IO to GND, VIN = 0 V before
surge, 25°C

40 A IEC61000−4−5 Surge (8/20 ms) from IO to GND, VIN = 0 V before
surge, 25°C

35 A IEC61000−4−5 Surge (8/20 ms) from IO to GND, VIN = V
before surge, TA = 125°C

Description Min Typ Max Unit

26.8 28.5 V

28.3 30 V

RWM

29.4 31 V

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3

NSPU5201, NSPU5221 Series

TYPICAL CHARACTERISTICS

40

35

30

25

20

15

Vpk @ Ipk (V)

10

5

0

Voltage vs. Peak Pulse Current (t

6040200

Ipk (A)

14012010080 160

Figure 1. NSPU5021 Positive Clamping

= 8/20 s)

p

100

Peak
Value

40

35

30

25

20

15

Vpk @ Ipk (V)

10

5

0

Figure 2. NSPU5221 Positive Clamping

Voltage vs. Peak Pulse Current (t

tr = rise time to peak value [8 ms]
t

= decay time to half value [20 ms]

f

6040200

Ipk (A)

14012010080 160

= 8/20 s)

p

50

Ipp - PEAK PULSE CURRENT - %Ipp

0

Half Value

t

0

r

t

f

TIME (ms)

Figure 3. IEC61000−4−5 8/20 s Pulse

Waveform

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4

MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

SCALE 4:1

A

B

E

A3

A

A1

C

SEATING
PLANE

0.10 C

4

2X

E2

0.10 C

5

e1

REFERENCE

2X

2X

6X

NOTE 4

PIN ONE

0.10 C

0.10 C

0.05 C

0.05 C

DETAIL A

6X

L

TOP VIEW

DETAIL B

SIDE VIEW

2X

D2

1

6

e1/2

BOTTOM VIEW

D

UDFN6, 1.8x2, 0.4P

CASE 517CS

ISSUE O

DETAIL B

ALTERNATE

CONSTRUCTION

L1

DETAIL A

ALTERNATE

CONSTRUCTIONS

e/2

e

1

6

e2

SUPPLEMENTAL

BOTTOM VIEW

4

5

DATE 30 APR 2013

MOLD CMPDEXPOSED Cu

L

L

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. DIMENSION b APPLIES TO PLATED TERMINALS
AND IS MEASURED BETWEEN 0.15 AND 0.30mm
FROM THE TERMINAL TIP.

4. COPLANARITY APPLIES TO THE EXPOSED PAD
AS WELL AS THE TERMINALS.

MILLIMETERS

DIMAMIN MAX

0.45 0.55

A1 0.00 0.05
A3 0.125 REF

b 0.15 0.25

1.80 BSC

D

0.35 0.55

D2

E

2.00 BSC

0.74 0.94

E2

e

0.40 BSC

e1

0.80 BSC

e2

0.95 BSC

0.20 0.40

L

L1

---

0.15

GENERIC

MARKING DIAGRAM*

6X

b

0.05 C

A0.07 C

B

NOTE 3

XX = Specific Device Code
M = Date Code

*This information is generic. Please refer to

device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.

1

XX M

G

RECOMMENDED

MOUNTING FOOTPRINT*

0.95

0.40
PITCH

2X

0.55

6X

0.48

PACKAGE
OUTLINE

6X

0.25

DIMENSIONS: MILLIMETERS

0.40
PITCH

2X

0.94

2.20

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.

DOCUMENT NUMBER:

DESCRIPTION:

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.

© Semiconductor Components Industries, LLC, 2019

98AON89602E

UDFN6 1.8X2, 0.4P

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 1 OF 1

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