NL17SH08
Single 2-Input AND Gate
The NL17SH08 is an advanced high speed CMOS 2−input AND
gate fabricated with silicon gate CMOS technology.
The internal circuit is composed of multiple stages, including a
buffer output which provides high noise immunity and stable output.
The NL17SH08 input structure provides protection when voltages
up to 7.0 V are applied, regardless of the supply voltage. This allows
the NL17SH08 to be used to interface 5.0 V circuits to
3.0 V circuits.
Features
• High Speed: t
• Low Power Dissipation: I
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Pin and Function Compatible with Other Standard Logic Families
• These are Pb−Free Devices
= 3.5 ns (Typ) at VCC = 5.0 V
PD
= 1.0 mA (Max) at TA = 25°C
CC
1
IN A
GND
2
V
5
CC
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MARKING
DIAGRAM
SOT−953
CASE 527AE
E = Specific Device Code
M = Month Code
EM
1
PIN ASSIGNMENT
1
2
3IN B
4
5V
IN A
GND
OUT Y
CC
IN B
3
Figure 1. Pinout (Top View)
IN A
IN B
&
Figure 2. Logic Symbol
4
OUT Y
OUT Y
FUNCTION TABLE
Inputs Output
AB
L
L
H
H
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
ORDERING INFORMATION
L
H
L
H
Y
L
L
L
H
© Semiconductor Components Industries, LLC, 2011
August, 2011 − Rev. 1
1 Publication Order Number:
NL17SH08/D
NL17SH08
MAXIMUM RATINGS
Symbol Parameter Value Unit
V
V
V
OUT
I
I
OK
I
OUT
I
CC
T
STG
T
T
P
MSL Moisture Sensitivity Level 1
F
I
LATCHUP
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol Characteristics Min Max Unit
V
V
V
OUT
T
t
r
DC Supply Voltage −0.5 to +7.0 V
CC
DC Input Voltage −0.5 to +7.0 V
IN
DC Output Voltage −0.5 to V
DC Input Diode Current −20 mA
IK
CC
DC Output Diode Current ±20 mA
DC Output Sink Current ±25 mA
DC Supply Current per Supply Pin 50 mA
Storage Temperature Range −65 to +150 °C
Lead Temperature, 1 mm from Case for 10 Seconds 260 °C
L
Junction Temperature Under Bias +150 °C
J
Power Dissipation in Still Air 50 mW
D
Flammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in
R
Latchup Performance Above VCC and Below GND at 125°C (Note 1) ±100 mA
DC Supply Voltage 2.0 5.5 V
CC
DC Input Voltage 0.0 5.5 V
IN
DC Output Voltage 0.0 V
Operating Temperature Range −55 +125 °C
A
, t
Input Rise and Fall Time VCC = 3.3 V ± 0.3 V
f
V
= 5.0 V ± 0.5 V
CC
0
0
+0.5 V
CC
100
ns/V
20
V
Device Junction Temperature versus
Time to 0.1% Bond Failures
Junction
Temperature °C
80 1,032,200 117.8
90 419,300 47.9
100 178,700 20.4
110 79,600 9.4
120 37,000 4.2
130 17,800 2.0
140 8,900 1.0
Time, Hours Time, Years
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2
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
= 130 C°
J
T
J
J
T
T
= 110 C°
= 120 C°
1
NORMALIZED FAILURE RATE
1 10 100
TIME, YEARS
Figure 3. Failure Rate vs. Time
Junction Temperature
C°
C°
= 80
= 90
= 100 C°
J
T
J
J
T
T
1000
DC ELECTRICAL CHARACTERISTICS
Symbol Parameter Test Conditions
V
V
V
V
I
Minimum High−Level
IH
Input Voltage
Maximum Low−Level
IL
Input Voltage
Minimum High−Level
OH
Output Voltage
V
Maximum Low−Level
OL
Output Voltage
V
I
Maximum Input
IN
Leakage Current
Maximum Quiescent
CC
Supply Current
= VIH or V
IN
= VIH or V
IN
VIN = VIH or V
IL
VIN = VIH or V
IL
IOH = −50 mA
IL
IOH = −4 mA
IOH = −8 mA
VIN = VIH or V
IL
VIN = VIH or V
IL
IOL = 50 mA
IL
IOL = 4 mA
IOL = 8 mA
VIN = 5.5 V or GND 0 to 5.5 $0.1 $1.0 $1.0
VIN = VCC or GND 5.5 1.0 10 40
NL17SH08
V
CC
(V)
2.0
3.0
4.5
5.5
2.0
3.0
4.5
5.5
2.0
3.0
4.5
3.0
4.5
2.0
3.0
4.5
3.0
4.5
Min Typ Max Min Max Min Max
1.5
2.1
3.15
3.85
1.9
2.9
4.4
2.58
3.94
TA = 255C TA v 855C *555C to 1255C
2.0
3.0
4.5
0.0
0.0
0.0
0.5
0.9
1.35
1.65
0.1
0.1
0.1
0.36
0.36
1.5
2.1
3.15
3.85
0.5
0.9
1.35
1.65
1.9
2.9
4.4
2.48
3.80
0.1
0.1
0.1
0.44
0.44
1.5
2.1
3.15
3.85
0.5
0.9
1.35
1.65
1.9
2.9
4.4
2.34
3.66
0.1
0.1
0.1
0.52
0.52
Unit
V
V
V
V
mA
mA
AC ELECTRICAL CHARACTERISTICS Input t
Symbol
t
PLH
t
PHL
C
IN
,
Parameter
Maximum Propagation Delay,
Input A or B to Y
Maximum Input Capacitance
Test Conditions
VCC = 3.3 ± 0.3 V CL = 15 pF
VCC = 5.0 ± 0.5 V CL = 15 pF
r
= t
= 3.0 ns
f
C
L
C
L
= 50 pF
= 50 pF
Min
TA = 25°C
Typ
4.1
5.9
3.5
4.2
5.5
Max
8.8
12.3
5.9
7.9
10
TA ≤ 85°C
Min
−55 ≤ TA ≤ 125°C
Max
10.5
14.0
7.0
9.0
10
Min
Max
12.5
16.5
9.0
11.0
10
Unit
ns
pF
Typical @ 25°C, VCC = 5.0 V
C
PD
Power Dissipation Capacitance (Note 2)
11
pF
2. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I
power consumption; P
= CPD V
D
2
fin + ICC VCC.
CC
= CPD VCC fin + ICC. CPD is used to determine the no−load dynamic
)
CC(OPR
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3
NL17SH08
V
CC
Input A or B
Output Y
50% V
50%
t
PLH
50% V
CC
CC
t
PHL
Figure 4. Switching Waveforms
GND
V
OH
V
OL
INPUT
C
*Includes all probe and jig capacitance.
A 1−MHz square input wave is recommended
for propagation delay tests.
Figure 5. Test Circuit
OUTPUT
L*
DEVICE ORDERING INFORMATION
Device Package Shipping
NL17SH08P5T5G SOT−953
8000 / Tape & Reel
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
†
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4
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SCALE 4:1
X
Y
45
E
e
5X
L
PIN ONE
INDICATOR
D
123
TOP VIEW
SOT−953
CASE 527AE
ISSUE E
A
C
SIDE VIEW
DATE 02 AUG 2011
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF THE BASE MATERIAL.
H
E
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
MILLIMETERS
DIM MIN NOM MAX
A 0.34 0.37 0.40
b 0.10 0.15 0.20
C 0.07 0.12 0.17
D 0.95 1.00 1.05
E 0.75 0.80 0.85
e 0.35 BSC
H
E
0.95 1.00 1.05
L
L2 0.05 0.10 0.15
L3 −−− −−− 0.15
0.175 REF
5X
L3
5X
L2
BOTTOM VIEW
5X
b
X0.08 Y
SOLDERING FOOTPRINT*
5X
5X
0.20
PACKAGE
OUTLINE
1
0.35
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
0.35
1.20
GENERIC
MARKING DIAGRAM*
XM
1
X = Specific Device Code
M = Month Code
*This information is generic. Please refer
to device data sheet for actual part
marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
DOCUMENT NUMBER:
DESCRIPTION:
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© Semiconductor Components Industries, LLC, 2019
98AON26457D
SOT−953
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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