ON Semiconductor NIS4461 User Manual

9 to 24 Volt Electronic Fuse

NIS4461 Series

The NIS4461 eFuse is a cost effective, resettable fuse which can
greatly enhance the reliability of a hard drive or other circuit from both
catastrophic and shutdown failures.

It is designed to protect the downstream circuitry against an
overcurrent event by limiting the current while protecting against high
inrush current, as well as monitoring the load current in real time.

Features

• Integrated Power Device

• Power Device Thermally Protected

• No External Current Shunt Required

• 9 V to 24 V Input Range

• 39 mW Typical

• Internal Charge Pump

• Internal Undervoltage Lockout Circuit

• ESD Ratings:

Human Body Model (HBM); 2000 V
Charged Device Model (CDM); 2000 V
Latch−Up; Class 1

• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS

Compliant

Typical Applications

• Hard Drives

• Mother Board Power Management

• Fan Drives

• Industrial

• Handheld Devices

• Portable Instruments

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4.2 AMP, 9 to 24 VOLT
ELECTRONIC FUSE

MARKING
DIAGRAM

WDFN10

CASE 522AA

XXX = Specific Device Code
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package

(Note: Microdot may be in either location)

PIN CONNECTIONS

GND
dV/dt

NC/I

En/Flt

I

LIM

SENSE

V

CC

XXXXX
XXXXX
ALYWG

Src
Src
Src
Src
Src

G

© Semiconductor Components Industries, LLC, 2020

March, 2021 − Rev. 2

WDFN10

(Top View)

See detailed ordering, marking and shipping information in the
ordering information section on page 11 of this data sheet.

1 Publication Order Number:

ORDERING INFORMATION

NIS4461/D

NIS4461 Series

VCC

ENABLE/

FAULT

ENABLE/

FAULT

Enable

Thermal

Shutdown

UVLO

Enable

Charge

Pump

Current

Limit

dv/dt

Control

Figure 1. Block Diagram

(NIS4461MT2TXG, NIS4461MT4TXG)

VCC

Charge

Pump

GND

SOURCE

I

LIMIT

dv/dt

Thermal

Shutdown

UVLO

Current

Limit

Voltage

Clamp

dv/dt

Control

Figure 2. Block Diagram

(NIS4461MT1TXG, NIS4461MT3TXG

Current
Monitor

GND

SOURCE

I

LIMIT

I

SENSE

dv/dt

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NIS4461 Series

Table 1. FUNCTIONAL PIN DESCRIPTION

Pin Function Description

1 Ground Negative input voltage to the device. This is used as the internal reference for the IC.

2 dv/dt The internal dv/dt circuit controls the slew rate of the output voltage at turn on. It has an internal

3 Enable/Fault The enable/fault pin is a tri−state, bidirectional interface. It can be pulled to ground with external

4 I

5

Limit

NC For NIS4461MT2TXG and NIS4461MT4TXG

I

SENSE

6−10 Source This pin is the source of the internal power FET and the output terminal of the fuse. Connect an

11 (belly pad) V

CC

MAXIMUM RATINGS

Input Voltage, operating, steady−state (VCC to GND, Note 1)

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.

1. Negative voltage will not damage device provided that the power dissipation is limited to the rated allowable power for the package.

Transient (100 ms)

capacitor that allows it to ramp up over a period of 2 ms. An external capacitor can be added to this
pin to increase the ramp time. If an additional time delay is not required, this pin should be left open.

open−drain or open collector device to shutdown the eFuse. It can also be used as a status indicator;
if the voltage level is intermediate around 1.4 V − the eFuse is in the thermal shutdown, if the voltage
level is high around 3 V − the eFuse is operating normally. Do not actively drive this pin to any
voltage. Do not connect a capacitor to this pin.

A resistor between this pin and the source pin sets the overload and short circuit current limit levels.

For NIS4461MT1TXG and NIS4461MT3TXG load current monitor allows the system to monitor the
load current in real time. Connect R

SENSE

to GND.

electrolytic capacitor or Schottky diode for 27 V or higher.

Positive input voltage to the device.

Rating Symbol Value Unit

V

IN

−0.6 to 30

−0.6 to 30

V

Table 2. THERMAL RATINGS

Rating Symbol Value Unit

Thermal Resistance, Junction−to−Air

(4 layer High−K JEDEC JESD51−7 PCB, 100 mm

Thermal Characterization Parameter, Junction−to−Lead

(4 layer High−K JEDEC JESD51−7 PCB, 100 mm

Thermal Characterization Parameter, Junction−to−Board

(4 layer High−K JEDEC JESD51−7 PCB, 100 mm

Thermal Characterization Parameter, Junction−to−Case Top

(4 layer High−K JEDEC JESD51−7 PCB, 100 mm

Total Power Dissipation @ TA = 25°C

(4 layer High−K JEDEC JESD51−7 PCB, 100 mm
Derate above 25°C

Operating Ambient Temperature Range T

Operating Junction Temperature Range T

Non−operating Temperature Range T

Lead Temperature, Soldering (10 Sec) T

2

, 2 oz. Cu)

2

, 2 oz. Cu)

2

, 2 oz. Cu)

2

, 2 oz. Cu)

2

, 2 oz. Cu)

Y

Y

Y

P

q

max

STG

JA

J−L

J−B

J−T

A

J

L

90 °C/W

27.5 °C/W

27.5 °C/W

7.6 °C/W

1.39

11.1

W

mW/°C

−40 to 125 °C

−40 to 150 °C

−55 to 155 °C

260 °C

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NIS4461 Series

ELECTRICAL CHARACTERISTICS (V

Characteristics

= 24 V, CL = 100 mF, dv/dt pin open, R

CC

Symbol Min Typ Max Unit

= 20 W, Tj = 25°C unless otherwise noted.)

LIMIT

POWER FET

Delay Time (enabling of chip to ID = 100 mA with 1 A resistive load) T

Kelvin ON Resistance (Note 2)
T

= 140°C (Note 3)

J

R

Continuous Current (TA = 25°C, 0.5 in2 copper) (Note 3)
(T

= 80°C, minimum copper)

A

dly

DSon

I

D

I

D

− 220 −

30

−

−

−

39
60

4.2

2.5

50

ms

mW

−

−

A

−

THERMAL LATCH

Shutdown Temperature (Note 3) T

Thermal Hysteresis (Auto−retry part only) T

Thermal Shutdown Response Time T

Hyst

SD

SD

Res

150 175 200 °C

− 45 − °C

10 15 20

ms

UNDERVOLTAGE PROTECTION

Undervoltage Lockout V

UVLO Hysteresis V

UVLO

Hyst

6 6.5 7 V

− 0.80 − V

CURRENT LIMIT

Kelvin Short Circuit Current Limit (R

Kelvin Overload Current Limit (R

Limit

= 20 W, Note 4)

Limit

= 20 W, Note 4)

I

Lim−SS

I

Lim−OL

1.76 2.1 2.64 A

− 4.6 − A

dv/dt CIRCUIT

Output Voltage Ramp Time (Enable to V

Output Voltage Ramp Time
(10% to 90% − V

= 2.4 V to 21.6 V with 24W Load)

OUT

Maximum Capacitor Voltage V

= 23.7 V) t

OUT

slew

t

slew

max

− 2.0 − ms

− 1.2 − ms

− − V

CC

V

ENABLE/FAULT

Logic Level Low (Output Disabled)

Logic Level Mid (Thermal Fault, Output Disabled) V

Logic Level High (Output Enabled) V

High State Maximum Voltage V

Logic Low Sink Current (V

Logic High Leakage Current for External Switch (V

= 0 V) I

enable

= 3.3 V) I

enable

Maximum Fanout for Fault Signal (Total number of chips that can be

V

in−low

in−mid

in−high

in−max

in−low

in−leak

0.35 0.58 0.81 V

0.82 1.4 1.95 V

1.96 2.6 3.0 V

2.51 4.6 5 V

− −15 −25

− − 1.0

Fan − − 3.0 Units

mA

mA

connected to this pin for simultaneous shutdown)

TOTAL DEVICE

Bias Current (Operational)

Bias Current (Shutdown) I

I

Bias

Bias

− − 450

− − 220

mA

mA

LOAD CURRENT MONITOR

Current Monitor Sense (R

SENSE

= 1 kW)

Current Monitor Sense Accuracy I

I

SENSE

ACC

− 1 − mA/A

−10 − 10 %

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.

2. Pulse test: Pulse width 300 ms, duty cycle 2%.

3. Verified by design.

4. Refer to explanation of short circuit and overload conditions in application note AND9441.

5. Device will shut down prior to reaching this level based on actual UVLO trip point.

6. For output slew rate calculation with external capacitor, please refer to ”Output Slew Rate (dv/dt)” in the ”Application Information ” section

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