ON Semiconductor NCx57090y, NCx57091y User Manual

Isolated High Current
IGBT/MOSFET Gate Driver

NCx57090y, NCx57091y

(x = D or V, y = A, B, C, D, E or F)

NCx57090y, NCx57091y are high−current single channel
IGBT/MOSFET gate drivers with 5 kVrms internal galvanic isolation,
designed for high system efficiency and reliability in high power
applications. The devices accept complementary inputs and depending
on the pin configuration, offer options such as Active Miller Clamp
(version A/D/F), negative power supply (version B) and separate high
and low (OUTH and OUTL) driver outputs (version C/E) for system
design convenience. The driver accommodate wide range of input
bias voltage and signal levels from 3.3 V to 20 V and they are
available in wide−body SOIC−8 package.

Features

• High Peak Output Current (+6.5 A/−6.5 A)

• Low Clamp Voltage Drop Eliminates the Need of Negative Power

Supply to Prevent Spurious Gate Turn−on (Version A/D/F)

• Short Propagation Delays with Accurate Matching

• IGBT/MOSFET Gate Clamping during Short Circuit

• IGBT/MOSFET Gate Active Pull Down

• Tight UVLO Thresholds for Bias Flexibility

• Wide Bias Voltage Range including Negative V

• 3.3 V, 5 V, and 15 V Logic Input

• 5 kVrms Galvanic Isolation

• High Transient Immunity

• High Electromagnetic Immunity

• NCV Prefix for Automotive and Other Applications Requiring

Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable

• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS

Compliant

Typical Applications

• Motor Control

• Uninterruptible Power Supplies (UPS)

• Automotive Applications

• Industrial Power Supplies

• Solar Inverters

(Version B)

EE2

www.onsemi.com

SOIC8 WB

CASE 751EW

MARKING DIAGRAM

8

5709zy

ALYW

G

1

5709zy = Specific Device Code

z = 0/1

y = A/B/C/D/E/F
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package

PIN CONNECTIONS

See detailed pin connection information on page 2 of this
data sheet.

ORDERING INFORMATION

See detailed ordering and shipping information on page 23 of
this data sheet.

© Semiconductor Components Industries, LLC, 2019

April, 2021 − Rev. 0

1 Publication Order Number:

NCD57090A/D

NCx57090y, NCx57091y

PIN CONNECTIONS

V

DD1

IN+
IN−

GND1

GND2
CLAMP
OUT

V

DD2

V

DD1

IN+
IN−

GND1

NCx57090A, NCx57091A NCx57090B, NCx57091B

V

DD1

IN+
IN−

GND1

NCx57090D

CLAMP
OUT
V

DD2

GND2

V

DD1

IN+
IN−

GND1

NCx57090E

NOTE: x = D or V

Figure 1. Pin Connections

BLOCK DIAGRAM AND APPLICATION SCHEMATIC − VERSION A/D/F

V

DD1

UVLO1

V

DD1

IN−

V
GND2
OUT
V

OUTL
OUTH

V
GND2

V

DD2

UVLO2

EE2

DD2

DD2

V

DD1

IN+
IN−

GND1

NCx57090C, NCx57091C

V

DD1

IN+
IN−

GND1

NCx57090F

V

DD2

OUT

GND2
OUTL

OUTH
V

DD2

V

DD2

OUT
CLAMP
GND2

IN+

GND1

Logic

1

Logic

+

−

V

CLAMP−THR

2

CLAMP

GND2

2

Figure 2. Simplified Block Diagram, NCD57090A/D/F

V

DD1

V

DD1

V

DD2

OUTIN+

IN−

GND1

CLAMP

GND2

V

DD2

Figure 3. Simplified Application Schematics, Version A/D/F

www.onsemi.com

2

NCx57090y, NCx57091y

BLOCK DIAGRAM AND APPLICATION SCHEMATIC − NCx57090B, NCx57091B

IN−

IN+

GND1

V

DD1

V

DD2

UVLO2UVLO1

V

V

DD1

DD2

OUT

Logic

Logic

V

EE2

1

GND2

2

Figure 4. Simplified Block Diagram, NCx57090B, NCx57091B

V

DD1

V

DD2

V

V

DD1

DD2

OUTIN+

IN−

GND1

GND2

V

EE2

Figure 5. Simplified Application Schematics, NCx57090B, NCx57091B

www.onsemi.com

3

NCx57090y, NCx57091y

BLOCK DIAGRAM AND APPLICATION SCHEMATIC − VERSION C/E

IN−

IN+

GND1

V

DD1

V

DD2

UVLO2UVLO1

V

V

DD1

DD2

OUTH

OUTL

Logic

Logic

GND2

1

2

Figure 6. Simplified Block Diagram, Version C/E

V

DD1

V

DD2

V

V

DD1

DD2

OUTHIN+

IN−

GND1

OUTL

GND2

Figure 7. Simplified Application Schematics, Version C/E

www.onsemi.com

4

NCx57090y, NCx57091y

Table 1. FUNCTION DESCRIPTION

Pin Name No. I/O Description

V

DD1

IN+ 2 I Non inverted gate driver input. It is internally clamped to V

IN− 3 I Inverted gate driver input. It is internally clamped to V

GND1 4 Power Input side ground reference.

V

DD2

GND2

(NCD57090A,

NCD57090C)

GND2

(NCD57090B)

GND2

(NCD57090D,

NCD57090E,
NCD57090F)

OUT

(NCD57090A,

NCD57090B)

OUT

(NCD57090D,

NCD57090F)

OUTH

(NCD57090C)

OUTH

(NCD57090E)

OUTL

(NCD57090C)

OUTL

(NCD57090E)

CLAMP

(NCD57090A)

CLAMP

(NCD57090D)

CLAMP

(NCD57090F)

V

EE2

(NCD57090B)

1 Power Input side power supply. A good quality bypassing capacitor is required from this pin to GND1

and should be placed close to the pins for best results.
The under voltage lockout (UVLO) circuit enables the device to operate at power on when
a typical supply voltage higher than V
Please see Figures 9A and 9B for more details.

UVLO1−OUT−ON

pull−down resistor of 125 kW to ensure that output is low in the absence of an input signal.
A minimum positive or negative pulse−width is required at IN+ before OUT or OUTH/OUTL
responds.

resistor of 50 kW to ensure that output is low in the absence of an input signal. A minimum
positive or negative pulse−width is required at IN− before OUT or OUTH/OUTL responds.

5 Power Output side positive power supply. The operating range for this pin is from UVLO2 to its

maximum allowed value. A good quality bypassing capacitor is required from this pin to GND2
and should be placed close to the pins for best results.

The under voltage lockout (UVLO) circuit enables the device to operate at power on when
a typical supply voltage higher than V
for more details.

Power Output side gate drive reference connecting to IGBT emitter or MOSFET source.

8

UVLO2−OUT−ON

7

5

6

O Driver output that provides the appropriate drive voltage and source/sink current to the IGBT/

MOSFET gate. OUT is actively pulled low during start−up.

7

6

O Driver high output that provides the appropriate drive voltage and source current to the IGBT/

MOSFET gate.

7

7

O Driver low output that provides the appropriate drive voltage and sink current to the IGBT/

MOSFET gate. OUTL is actively pulled low during start−up.

8

7

O Provides clamping for the IGBT/MOSFET gate during the off period to protect it from parasitic

turn−on. Its internal N FET is turned on when the voltage of this pin falls below V

8

It is to be tied directly to IGBT/MOSFET gate with minimum trace length for best results.

6

8 Power Output side negative power supply. A good quality bypassing capacitor is required from this pin

to GND2 and should be placed close to the pins for best results.

is present.

and has an equivalent

DD1

and has an equivalent pull−up

DD1

is present. Please see Figure 9C and 9D

CLAMP−THR

.

www.onsemi.com

5

NCx57090y, NCx57091y

Table 2. SAFETY AND INSULATION RATINGS

Symbol Parameter Value Unit

Installation Classifications per DIN VDE 0110/1.89
Table 1 Rated Mains
Voltage

CTI

Comparative Tracking Index (DIN IEC 112/VDE 0303 Part 1) 600

Climatic Classification 40/100/21

Pollution Degree (DIN VDE 0110/1.89) 2

V

V

V

V

E

PR

IORM

IOWM

IOTM

CR

E

Input−to−Output Test Voltage, Method b, V
100% Production Test with tm = 1 s, Partial Discharge < 5 pC

× 1.875 = VPR,

IORM

Maximum Repetitive Peak Voltage 1200 V

Maximum Working Voltage 870 V

Highest Allowable Over Voltage 8400 V

External Creepage 8.0 mm

External Clearance 8.0 mm

CL

DTI Insulation Thickness 17.3

T

Case

P

S,INPUT

P

S,OUTPUT

R

Safety Limit Values – Maximum Values in Failure; Case Temperature 150 °C

Safety Limit Values – Maximum Values in Failure; Input Power 121 mW

Safety Limit Values – Maximum Values in Failure; Output Power 1349 mW

Insulation Resistance at TS, VIO = 500 V 10

IO

< 150 V

< 300 V

< 450 V

< 600 V

< 1000 V

RMS

RMS

RMS

RMS

RMS

I − IV

I − IV

I − IV

I − IV

I − III

2250 V

9

pk

pk

RMS

pk

mm

W

Table 3. ABSOLUTE MAXIMUM RATINGS (Note 1)

Over operating free−air temperature range unless otherwise noted.

Symbol

V

−GND1 Supply Voltage, Input Side −0.3 22 V

DD1

V

−GND2 Positive Power Supply, Output Side −0.3 32 V

DD2

V

−GND2 Negative Power Supply, Output Side −18 0.3 V

EE2

V

DD2−VEE2

(V

MAX2

)

Differential Power Supply, Output Side (NCD57090B) 0 36 V

Gate−driver Output High Voltage

V

V

OUTH

OUT

−GND2

−GND2

NCD57090A/B/D/F
NCD57090C/E

Gate−driver Output Low Voltage

V

−GND2

OUT

−GND2

V

OUTL

I

PK−SRC

I

PK−SNK

I

PK−CLAMP

t

CLP

V

−GND1 Voltage at IN+, IN− −0.3 V

LIM

V

−GND2 Clamp Voltage −0.3 V

CLAMP

P

D

NCD57090A/B/D/F
NCD57090C/E

Gate−driver Output Sourcing Current
(maximum pulse width = 10 ms, maximum duty cycle = 0.2%,

= 15 V, V

V

DD2

EE2

Gate−driver Output Sinking Current
(maximum pulse width = 10 ms, maximum duty cycle = 0.2%,

= 15 V, V

V

DD2

EE2

Clamp Sinking Current
(maximum pulse width = 10 ms, maximum duty cycle = 0.2%,

= 2.5 V)

V

CLAMP

Maximum Short Circuit Clamping Time (I

Power Dissipation (SOIC−8 Wide Package) − 1470 mW

Parameter Minimum Maximum Unit

−

−

V

DD2

−0.3

−

− 6.5 A

= 0 V)

− 6.5 A

= 0 V)

− 2.5 A

OUT_CLAMP

= 500 mA) − 10

DD1

DD2

+ 0.3

−

−

−

+ 0.3 V

+ 0.3 V

V

V

ms

www.onsemi.com

6

NCx57090y, NCx57091y

Table 3. ABSOLUTE MAXIMUM RATINGS (Note 1) (continued)

Over operating free−air temperature range unless otherwise noted.

Symbol UnitMaximumMinimumParameter

TJ(max) Maximum Junction Temperature −40 150 °C

T

STG

ESDHBM ESD Capability, Human Body Model (Note 2) − ±2 kV

ESDCDM ESD Capability, Charged Device Model (Note 2) − ±2 kV

MSL Moisture Sensitivity Level − 1 −

T

SLD

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.

1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.

2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114).
ESD Charged Device Model tested per AEC−Q100−011 (EIA/JESD22−C101).
Latchup Current Maximum Rating: ≤ 100 mA per JEDEC standard: JESD78, 25°C.

3. For information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

Table 4. THERMAL CHARACTERISTICS

Symbol Parameter Value Unit

RqJA Thermal Characteristics, SOIC−8 wide body (Note 4)

4. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.

5. Values based on copper area of 100 mm

Storage Temperature Range −65 150 °C

Lead Temperature Soldering Reflow, Pb−Free (Note 3) − 260 °C

156 (1−Layer)

Thermal Resistance, Junction−to−Air (Note 5)

2

(or 0.16 in2) of 1 oz copper thickness and FR4 PCB substrate.

85 (4−Layer)

°C/W

Table 5. OPERATING RANGES (Note 6)

Symbol Parameter Min Max Unit

V

−GND1 Supply Voltage, Input Side UVLO1 20 V

DD1

V

−GND2 Positive Power Supply, Output Side UVLO2 30 V

DD2

V

−GND2 Negative Power Supply, Output Side (NCD57090B) −15 0 V

EE2

V

−VEE2 (V

DD2

|dV

V

V

ISO

IL

IH

) Differential Power Supply, Output Side (NCD57090B) 0 32 V

MAX2

Low Level Input Voltage at IN+, IN− (Note 7) 0 0.3 × V

High Level Input Voltage at IN+, IN− (Note 7) 0.7 × V

DD1

V

DD1

/dt| Common Mode Transient Immunity (Note 8) 100

DD1

V

V

kV/ms

TA Ambient Temperature −40 125 °C

Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.

6. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.

7. Table values are valid for 3.3 V and 5 V V

DD1, for higher VDD1 voltages, the threshold values are maintained at the 5 V VDD1 levels.

8. Was tested by ±1500 V pulses up to 100 kV/ms.

Table 6. ISOLATION CHARACTERISTICS

Symbol Parameter Conditions Value Unit

V

ISO, input−output

R

ISO

9. Device is considered a two−terminal device: pins 1 to 4 are shorted together and pins 5 to 9 are shorted together.

10.5,000 V

11. The input−output isolation voltage is a dielectric voltage rating per UL1577. It should not be regarded as an input−output continuous voltage

RMS

rating. For the continuous working voltage rating, refer to equipment−level safety specification or DIN VDE V 0884−11 Safety and Insulation
Ratings Table.

Input−Output Isolation
Voltage

TA = 25°C, Relative Humidity < 50%,
t = 1.0 minute, I
(Note 9, 10, 11)

Isolation Resistance V

= 500 V (Note 9) 10

I−O

for 1−minute duration is equivalent to 6,000 V

< 30 mA, 50 Hz

I−O

for 1−second duration.

RMS

5000 V

11

RMS

W

www.onsemi.com

7

NCx57090y, NCx57091y

ELECTRICAL CHARACTERISTICS V

For typical values T

Symbol

VOLTAGE SUPPLY

V

UVLO1−OUT−ON

V

UVLO1−OUT−OFF

V

UVLO1−HYST

V

UVLO2−OUT−ON

V

UVLO2−OUT−OFF

V

UVLO2−HYST

I

DD1−0−3.3

I

DD1−0−5

I

DD1−0−15

I

DD1−100−5

I

DD2−0

I

DD2−100

I

EE2−0

I

EE2−100

LOGIC INPUT AND OUTPUT

V

IL

V

IH

V

IN−HYST

I

IN−L−3.3

I

IN−L−5

I

IN−L−15

I

IN−L−20

I

IN+H−3.3

I

IN+H−5

I

IN+H−15

I

IN+H−20

t

ON−MIN1

t

ON−MIN2

= 25°C, for min/max values, TA is the operating ambient temperature range that applies, unless otherwise noted.

A

Parameter Test Conditions Min Typ Max Unit

UVLO1 Output Enabled − − 3.1 V

UVLO1 Output Disabled 2.4 − − V

UVLO1 Hysteresis 0.1 − − V

UVLO2 Output Enabled

UVLO2 Output Disabled

UVLO2 Hysteresis 0.7 1 − V

Input Supply Quiescent Current

Output Positive Supply
Quiescent Current

Output Negative Supply
Quiescent Current (NCD57090B)

IN+, IN−, Low Input Voltage Level scale for V

IN+, IN−, High Input Voltage Level scale for V

Input Hysteresis Voltage Level scale for V

IN− Input Current

IN+ Input Current

Input Pulse Width of IN+, IN− for
Guaranteed No Response at
Output

Input Pulse Width of IN+, IN− for
Guaranteed Response at Output

DD1

= 5 V, V

= 15 V, (V

DD2

= 0 V for NCD57090B).

EE2

NCx57090y 12.4 12.9 13.4 V

NCx57091y 8.7 9 9.3 V

NCx57090y 11.5 12 12.5 V

NCx57091y 7.7 8 8.3 V

IN+ = Low, IN− = Low, V

= 3.3 V − − 2 mA

DD1

IN+ = Low, IN− = Low − − 2 mA

IN+ = Low, IN− = Low, V

= 15 V − − 2 mA

DD1

IN+ = High, IN− = Low − − 5.5 mA

IN+ = Low, IN− = Low, no load − − 2 mA

IN+ = High, IN− = Low, no load − − 2 mA

IN+ = Low, IN− = Low, no load,
V

= −8 V

EE2

IN+ = High, IN− = Low, no load, V
= −8 V

= 3.3 to 5 V

for V

> 5 V is the same as for

DDI

= 5 V

V

DDI

for V

> 5 V is the same as for

DDI

V

= 5 V

DDI

for V

> 5 V is the same as for

DDI

V

= 5 V

DDI

V

= 0 V, V

IN−

V

= 0 V − − 100

IN−

V

= 0 V, V

IN−

V

= 0 V, V

IN−

V

= V

IN+

V

= V

IN+

V

= V

IN+

V

= V

IN+

DDI

= 3.3 to 5 V

DDI

= 3.3 to 5 V

DDI

= 3.3 V − − 100

DD1

= 15 V − − 100

DD1

= 20 V − − 100

DD1

= 3.3 V − − 100

DD1

= 5 V − − 100

DD1

= 15 V − − 100

DD1

= 20 V − − 100

DD1

EE2

− − 2 mA

− − 2 mA

− − 0.3 ×

V

DD1

0.7 ×
V

DD1

− 0.15 ×

− − V

− V

V

DD1

− − 10 ns

40 − − ns

V

mA

mA

mA

mA

mA

mA

mA

mA

www.onsemi.com

8