The NCV97310 is 3−output regulator consisting of
a low−Iq battery−connected 3 A 2 MHz non−synchronous
switcher and two low−voltage 1.5 A 2 MHz synchronous
switchers; all using integrated power transistors.
The high−voltage switcher is capable of converting
a 4.1 V to 18 V battery input to a 5 V or 3.3 V output at
a constant 2MHz switching frequency, delivering up to 3A.
In overvoltage conditions up to 36 V, the switching
frequency folds back to 1 MHz; in load dump conditions up
to 45 V the regulator shuts down.
The output of the battery− connected buck r egulator serves
as the l ow v oltage i nput f or t he 2 s ynchronous s witchers. E ach
downstream output is adjustable from 1.2 V to 3.3 V, with
a 1.5 A current limit and a constant 2 MHz switching
frequency. Each switcher has independent enable and reset
pins, giving extra power management flexibility.
For low−Iq operating mode the low−voltage switchers are
disabled, and the standby rail is supplied by a low−Iq LDO
(up to 150 mA) with a typical Iq of 30 mA. The LDO
regulator is in parallel to the high−voltage switcher, and is
activated when the switcher is forced in standby mode.
All 3 SMPS outputs use peak current mode control with
internal slope compensation, internally−set soft−start,
battery undervoltage lockout, battery overvoltage
protection, cycle−by−cycle current limiting, hiccup mode
short−circuit protection and thermal shutdown. An error flag
is available for diagnostics.
Key Features
• Low Quiescent Current in Standby Mode
• 2 Microcontroller Enabled Low Voltage Synchronous
• Large Conversion Ratio of 18 V to 3.3 V Battery
• Wide Input of 4.1 to 45 V with Undervoltage Lockout
• Fixed Frequency Operation Adjustable from 2.0 to
• Internal 1.5 ms Soft−starts
• Cycle−by−cycle Current Limit Protections
• Hiccup Overcurrent Protections (OCP)
• Individual Reset Pins with Adjustable Delays
• These Devices are Pb−Free, Halogen Free/BFR Free
GNDCommon dc return
VOUT1Positive 5.0 V dc output voltage (LDO / switcher 1)
VOUT2Positive DC output voltage (switcher 2)
VOUT3Positive DC output voltage (switcher 3)
ENMaster enable input. Includes jumper J3 to connect to VBAT.
STBYBStandby enable input. Includes jumper J4 to connect to VBAT.
EN2Switcher 2 enable input. Includes jumper J6 to connect to VOUT1.
EN3Switcher 3 enable input. Includes jumper J5 to connect to VOUT1.
ERRB
RST1BReset with adjustable delay. Goes low when the VOUT1 is out of regulation.
RST2BReset with adjustable delay. Goes low when the VOUT2 is out of regulation.
RST3BReset with adjustable delay. Goes low when the VOUT3 is out of regulation.
Error flag combining temperature and input and output voltage sensing.
Figure 3. Typical Application
VIN3
VDRV2
SW3H
SW3L
GND3
17
C
BST3
C
DRV2
L
C
3
OUT3
R
FB3U
C
IN2
V
OUT3
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NCV97310MW50GEVB
Table 2. ABSOLUTE MAXIMUM RATINGS (Voltages are with respect to GND)
Rating
Dc Supply Voltage (VBAT, EN, STBYB)−0.3 to 36V
Dc Supply Voltage (VIN2, VIN3)−0.3 to 12V
Dc Supply Voltage (RSTB1, RSTB2,
RSTB3, ERRB, EN2, EN3)
Storage Temperature Range−55 to 150°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
5.0V
Output Voltage (VOUT2)3.3V
Output Voltage (VOUT3)1.2V
Line Regulation (VOUT1)I
Line Regulation (VOUT2)I
Line Regulation (VOUT3)I
Load Regulation (VOUT1)V
Load Regulation (VOUT2)V
Load Regulation (VOUT3)V
= 1.0 A0.03%
OUT1
= 1.0 A0.01%
OUT2
= 1.0 A0.001%
OUT3
= 13.2 V0.3%
BAT
= 13.2 V0.02%
BAT
= 13.2 V0.03%
BAT
SWITCHING
Switching Frequency
2.0MHz
Soft−start Time1.4ms
R
Frequency Range
OSC
50 kW ≥ R
OSC
≥ 10 kW
2.0 to 2.6MHz
CURRENT LIMIT
Peak Current Limit (VOUT1)
STBYB = 0 V0.2A
Peak Current Limit (VOUT1)STBYB = 5 V4.4A
Peak Current Limit (VOUT2)2.9A
Peak Current Limit (VOUT3)2.9A
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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VOUT1
VOUT1
(5.0 V)
1
VOUT1
CO15
VIN2
CO14
VIN2
GND1
1
Place close
to VIN2
4.7 uF
Place close
to VIN2
1 uF
NCV97310MW50GEVB
VOUT2
GND2
VOUT3
VOUT3
1
(1.2 V)
COUT32
COUT31
1
1
VOUT2
(3.3 V)
COUT22
10 uF
VOUT2
VIN2
COUT21
R7
0.0
10 uF
10 uF
10 uF
VOUT3
GND3
1
SW1
COUT13
10 uF
COUT12
10 uF
0.1 uF
DRV1
VIND
10K
BST2
0.1 uF
C3
VBAT_IC
CIN4
CIN3
CIN2
CIN1
CBST2
33
25
26
27
28
29
30
31
32
U1
J2
J1
2.2 uF
1 uF
4.7 uF
4.7 uF
COUT11
10 uF
100
RMIN3
100
RMIN2
100
RMIN1
L1
4.7 uH
SW1
D1
RMIN
NRVB440MFS
C1
RFB2L
5.76K
R1
RMIN
CBST1
100 pF
0.0
FB2
50V
0.1 uF
RFB2U
FB2
CDRV1
CSNB2
100 pF
L2 2.2 uH
RSNB2
10.0
SW2
0.1 uF
FB2
12
12
24
BST2
RMIN
VINL
BST1
SW1
EPAD
VOUT
VIN2
SW2
23
22
SW2
EN
EN
STBYB
STBYB
VIN321VIN2
TP1
RDEPTH
DNP
VOUT1
NCV97310MW50R2G
TP2
GND2
VDRV1
VBAT1EN2STBY3RDEPTH4RMOD5RST16COMP17ROSC
CDRV2
0.47 uF
20
VDRV2
RMOD
DNP
SW3
19
SW3H
RST1B
R3
SW3
18
SW3L
COMP1
10K
CSNB3
L3 1.0 uH
RSNB3
17
8
ROSC
COMP1
100 pF
10.0
GND3
TP3
RCOMP1
12.4K
CBST3
0.1 uF
BST3
EN3
FB3
RST3
GND1
RST2
EN2
ERR
9
ROSC
CCOMP2
VOUT1
VOUT1
J3
EN3
BST3
16
15
14
13
12
11
10
GND
DNP
CCOMP1
22 pF
12
EN3
FB3
Place GND near
330 pF
R4
10K
C2
10K
RFB3U
R2
FB3
RFB3L
DNP
ERRB for logic
reference.
VOUT1
ERRB
ERRB
R5
10K
VOUT1
VOUT1
100 pF
0.0
EN2
J4
12
R6
10K
EN2
RST2B
RST2B
RST3B
RST3B
Figure 4. NCV97310GEVB 5.0 V Board Schematic
Place CIN0, L0, CIN1, CIN2 on VBAT side.
Place CIN3 close to VINL (pin 29)
CIN5
Place CIN4 close to VBAT (pin 1)
L0
1.0 uH
CIN0
VBAT
VBAT_1
1
100 uF
4.7 uF
VBAT
Place CIN5 on
bottom of PCB
1
GND0
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RST1B
Page 6
Operational Guidelines
1. Connect a dc input voltage, within the 6.0 V to 36
V range, between VBAT and GND.
2. Connect a load (< 150 mA) between VOUT1 and
GND
3. Connect a dc enable voltage, within the 2.0 V to
36 V range, between EN and GND. This will
enable the internal LDO for low Iq mode. You
may use jumper J1 to connect EN directly to
VBAT.
a. The VOUT1 signal should be 5.0 V.
b. The VOUT2 signal should be disabled
(regardless of EN2 state) and read 0 V.
c. The VOUT3 signal should be disabled
(regardless of EN3 state) and read 0 V.
4. Connect a dc enable voltage, within the 2.0 V to
36 V range, between STBYB and GND. This will
exit low Iq mode and power up switcher 1. You
may use jumper J2 to connect STBYB directly to
VBAT.
The VOUT1 signal should still be 5.0 V. You
may now add a higher load to VOUT1.
NCV97310MW50GEVB
5. Connect a dc enable voltage, within the 2.0 V to
6 V range, between EN2 and GND. This will
power up switcher 2. You may use jumper J4 to
connect EN2 directly to VOUT1.
The VOUT2 signal should be 3.3 V.
6. Connect a dc enable voltage, within the 2.0 V to
6 V range, between EN3 and GND. This will
power up switcher 3. You may use jumper J3 to
connect EN3 directly to VOUT1.
The VOUT3 signal should be 1.2 V.
Figure 5. NCV97310 Board Connections
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NCV97310MW50GEVB
APPLICATION INFORMATION
Output Voltage Selection
The voltage outputs for switcher 2 and switcher 3 are
adjustable and can be set with a resistor divider. The FB
reference for both switchers is 1.2 V.
VOUT 2 (VOUT 3)
Time DomainFrequency Domain
Unmodulated
V
R
UPPER
FBx= 1 .2 V
R
LOWER
The upper resistor is set to 10 kW and is part of the
feedback loop. To maintain stability over all conditions, it is
recommended to change the only the lower feedback resistor
to set the output voltage. Use the following equation:
V
R
LOWER
+ R
UPPER
FB
V
*V
FB
OUT
Some common setups are listed below:
Desired
Output (V)
1.21.210.0NP
1.51.210.040.0
1.81.210.020.0
2.51.210.09.31
3.31.210.05.76
VREF (V)
R
UPPER
(kW, 1%)
R
LOWER
(kW, 1%)
t
V
t
f
c
f
c
9f
c7fc5fc3fc
9f
c7fc5fc3fc
The spread spectrum used in the NCV97310 is an
“up−spread” technique, meaning the switching frequency is
spread upward from the 2.0 MHz base frequency. For
example, a 5 % spread means that the switching frequency
is swept (spread) from 2.0 MHz up to 2.1 MHz in a linear
fashion – this is called the modulation depth. The rate at
which this spread takes place is called the modulation
frequency. For example, a 10 kHz modulation frequency
means that the frequency is swept from 2.0 MHz to 2.1 MHz
in 50 ms and then back down from 2.1 MHz to 2.0 MHz in
50 ms.
Spread Spectrum
In SMPS devices, switching translates to higher
efficiency. Unfortunately, the switching leads to a much
noisier EMI profile. We can greatly decrease some of the
radiated emissions with some spread spectrum techniques.
Spread spectrum is used to reduce the peak electromagnetic
emissions of a switching regulator.
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NCV97310MW50GEVB
The modulation depth and modulation frequency are each
set by 2 external resistors to GND. The modulation
frequency can be set from 5 kHz up to 50 kHz using a resistor
from the RMOD pin to GND. The modulation depth can be
set from 3% up to 30% of the nominal switching frequency
using a resistor from the RDEPTH pin to GND. Please see
the curves below for typical values:
Spread spectrum i s a u t o m a t i c a l l y t u r n e d o ff when there is
a short to GND or an open circuit on either the RMOD pin
or the RDEPTH pin. Please be sure that the ROSC pin is an
open circuit when using spread spectrum.
Efficiency
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
TYPICAL PERFORMANCE
NCV97310 − SW1 Efficiency − 5.0 V
1
VIN = 8.0 V
VIN = 13.2 V
VIN = 18.0 V
0.1
0
00.511.522.533.5
Figure 6. Efficiency for SW1 with a 5.0 V Output
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NCV97310MW50GEVB
NCV97310 − SW2 Efficiency − 3.3 V
100%
90%
80%
70%
60%
50%
Efficiency
40%
30%
20%
10%
0%
00.511.522.5
Output Current (A)
VIN = 5.0 V
VIN = 8.0 V
100%
90%
80%
70%
60%
50%
40%
Efficiency
30%
20%
10%
Figure 7. Efficiency for SW2 with a 3.3 V Output
NCV97310 − SW3 Efficiency − 1.2 V
VIN = 3.3 V
VIN = 5.0 V
0%
00.511.522.5
Figure 8. Efficiency for SW3 with a 1.2 V Output
Output Current (A)
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Line Regulation
2.00%
1.50%
1.00%
0.50%
NCV97310MW50GEVB
NCV97310 − SW1 − 3.3 V − Line Regulation
0.00%
051015202530
−0.50%
Line Regulation
−1.00%
−1.50%
−2.00%
0.10%
0.05%
IOUT = 100 mA
IOUT = 500 mA
IOUT = 1.0 A
IOUT = 2.0 A
IOUT = 3.0 A
Input Voltage (V)
Figure 9. Line Regulation for SW1 with a 3.3 V Output
NCV97310 − SW2 − 3.3 V − Line Regulation
0.00%
3456789
Line Regulation
−0.05%
−0.10%
Figure 10. Line Regulation for SW2 with a 3.3 V Output
IOUT = 100 mA
IOUT = 500 mA
IOUT = 1.0 A
IOUT = 2.0 A
Input Voltage (V)
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0.10%
0.05%
NCV97310MW50GEVB
NCV97310 − SW3 − 1.2 V − Line Regulation
0.00%
33.544.555.5
Line Regulation
−0.05%
−0.10%
Load Regulation
0.40%
0.30%
0.20%
IOUT = 100 mA
IOUT = 500 mA
IOUT = 1.0 A
IOUT = 2.0 A
Input Voltage (V)
Figure 11. Line Regulation for SW3 with a 1.2 V Output
NCV97310 − SW1 Load Regulation − 5.0 V
0.10%
0.00%
Load Regulation
−0.10%
−0.20%
−0.30%
−0.40%
00.511.522.533.5
Figure 12. Load Regulation for SW1 with a 5.0 V Output
VIN = 8.0 V
VIN = 13.2 V
VIN = 18.0 V
Output Current (A)
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0.10%
0.05%
0.00%
NCV97310MW50GEVB
NCV97310 − SW2 Load Regulation − 3.3 V
Load Regulation
−0.05%
−0.10%
00.511.522.5
0.10%
0.05%
VIN = 5.0 V
VIN = 8.0 V
Output Current (A)
Figure 13. Load Regulation for SW2 with a 3.3 V Output
NCV97310 − SW3 Load Regulation − 1.2 V
0.00%
Load Regulation
−0.05%
−0.10%
00.511.522.5
Figure 14. Load Regulation for SW3 with a 1.2 V Output
ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
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or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
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