ON Semiconductor NCV8501 Technical data

查询NCV8501供应商

NCV8501 Series

Micropower 150 mA LDO
Linear Regulators
with ENABLE, DELAY,
RESET

, and Monitor FLAG

The NCV8501 is a family of precision micropower voltage
regulators. Their output current capability is 150 mA. The family has
output voltage options for adjustable, 2 . 5 V, 3.3 V, 5.0 V, 8.0 V, and 10 V.

The output voltage is accurate within ±2.0% with a maximum
dropout voltage of 0.6 V at 150 mA. Low quiescent current is a feature
drawing only 90 A with a 100 A load. This part is ideal for any and
all battery operated microprocessor equipment.

Microprocessor control logic includes an active RESET

(with
DELAY), and a FLAG monitor which can be used to provide an early
warning signal to the microprocessor of a potential impending RESET
signal. The use of the FLAG monitor allows the microprocessor to
finish any signal processing before the RESET

shuts the

microprocessor down.

The active RESET circuit operates correctly at an output voltage as
low as 1.0 V. The RESET function is activated during the power up
sequence or during normal operation if the output voltage drops
outside the regulation limits.

The regulator is protected against reverse battery, short circuit, and
thermal overload conditions. The device can withstand load dump
transients making it suitable for use in automotive environments. The
device has also been optimized for EMC conditions.

Features

• Output Voltage Options: Adjustable, 2.5 V, 3.3 V, 5.0 V, 8.0 V, 10 V

• ±2.0% Output

• Low 90 A Quiescent Current

• Fixed or Adjustable Output Voltage

• Active RESET

• ENABLE

• 150 mA Output Current Capability

• Fault Protection

♦ +60 V Peak Transient Voltage
♦ −15 V Reverse Voltage
♦ Short Circuit
♦ Thermal Overload

• Early Warning through FLAG/MON Leads

• NCV Prefix for Automotive and Other Applications Requiring Site

and Change Control

• Pb−Free Packages are Available

http://onsemi.com

SO−8

8

1

16

1

MARKING DIAGRAMS

SO−8 SOW−16

8

8501x
ALYW

1

x = Voltage Ratings as Indicated Below:

A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week

See detailed ordering and shipping information in the package
dimensions section on page 13 of this data sheet.

A = Adjustable
2 = 2.5 V
3 = 3.3 V
5 = 5.0 V
8 = 8.0 V
1 = 10 V

ORDERING INFORMATION

D SUFFIX
CASE 751

SOIC 16 LEAD

WIDE BODY

EXPOSED PAD

PDW SUFFIX

CASE 751R

E PAD

16

8501x

AWLYYWW

1

 Semiconductor Components Industries, LLC, 2004

September, 2004 − Rev. 19

1 Publication Order Number:

NCV8501/D

V

MON

ENABLE

V

MON

ENABLE

PIN CONNECTIONS, ADJUSTABLE OUTPUT

SO−8

18

IN

V
V

OUT
ADJ

FLAG
GNDNC

PIN CONNECTIONS, FIXED OUTPUT

SO−8

18

IN

V

OUT

FLAG
RESET
GNDDELAY

NCV8501 Series

SOW−16 E PAD

1

ADJ

OUT

IN

SOW−16 E PAD

1

OUT

IN

16

16

FLAGV
NCV
NCNC
GNDNC
NCNC
NCNC
NCV
ENABLEMON

RESETFLAG
NCV
NCNC
GNDNC
NCNC
NCNC
DELAYV
ENABLEMON

V

BAT

C

DELAY

10 F

V

IN

DELAY

ENABLE
FLAG

NCV8501

(Adjustable

Output Only)

GND

V

OUT

MON

V

ADJ

RESET

R

FLG

10 k

R

RST

10 k

10 F

V

I/O

DD

Microprocessor

I/O

Figure 1. Application Diagram

http://onsemi.com

2

NCV8501 Series

MAXIMUM RATINGS*

Rating Value Unit

V

(dc) −15 to 45 V

IN

Peak Transient Voltage (46 V Load Dump @ VIN = 14 V) 60 V
Operating Voltage 45 V
V

(dc) 16 V

OUT

Voltage Range (RESET, FLAG) −0.3 to 10 V
Input Voltage Range (MON) −0.3 to 10 V

Input Voltage Range (ENABLE) −0.3 to 10** V
ESD Susceptibility (Human Body Model) 2.0 kV
Junction Temperature, T
Storage Temperature, T
Package Thermal Resistance, SO−8: Junction−to−Case, R

J

S



Junction−to−Ambient, R

JC



JA

Package Thermal Resistance, SOW−16 E PAD: Junction−to−Case, R

Junction−to−Ambient, R
Junction−to−Pin, R



JC

(Note 1)



JP



JA

−40 to +150 °C

−55 to 150 °C
45

165

15
56
35

°C/W
°C/W

°C/W
°C/W
°C/W

Lead Temperature Soldering: Reflow: (SMD styles only) (Note 2) 240 peak

260 Peak (Pb−Free)

(Note 3)

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously . If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
*During the voltage range which exceeds the maximum tested voltage of V

Thermal dissipation must be observed closely.

, operation is assured, but not specified. Wider limits may apply.

IN

**Reference Figure 14 for switched−battery ENABLE application.

1. Measured to pin 16.

2. 150 second maximum above 183°C, Pb−Free − 150 second maximum above 217°C.

3. −5°C / +0°C allowable conditions, applies to both Pb and Pb−Free devices.

°C

http://onsemi.com

3

NCV8501 Series

ELECTRICAL CHARACTERISTICS (I

= 1.0 mA, ENABLE = 5.0 V, −40°C ≤ T

OUT

≤ 125°C; VIN dependent on voltage option

J

(Note 4); unless otherwise specified.)

Characteristic

Test Conditions Min Typ Max Unit

Output Stage

Output Voltage for 2.5 V Option

Output Voltage for 3.3 V Option 7.3 V < VIN < 16 V, 100 A ≤ I

Output Voltage for 5.0 V Option 9.0 V < VIN < 16 V, 100 A ≤ I

Output Voltage for 8.0 V Option 9.0 V < VIN < 26 V, 100 A ≤ I
Output Voltage for 10 V Option 11 V < VIN < 26 V, 100 A ≤ I
Output Voltage for Adjustable Option V

Dropout Voltage (VIN − V

OUT

)

(5.0 V, 8.0 V, 10 V, and

6.5 V < VIN < 16 V, 100 A ≤ I

5.5 V < V

5.5 V < V

6.0 V < V

OUT

6.5 V < V

5.5 V < V
I

OUT

I

OUT

< 26 V, 100 A ≤ I

IN

< 26 V, 100 A ≤ I

IN

< 26 V, 100 A ≤ I

IN

= V

(Unity Gain)

ADJ

< 16 V, 100 A < I

IN

< 26 V, 100 A < I

IN

= 150 mA
= 1.0 mA

≤ 150 mA

OUT

≤ 150 mA

OUT

≤ 150 mA

OUT

≤ 150 mA

OUT

≤ 150 mA

OUT

≤ 150 mA

OUT

≤ 150 mA 7.76 8.0 8.24 V

OUT

≤ 150 mA 9.7 10 10.3 V

OUT

< 150 mA

OUT

< 150 mA

OUT

2.450

2.425

3.234

3.201

4.90

4.85

1.254

1.242

−

−

2.5

2.5

3.3

3.3

5.0

5.0

1.280

1.280
400

100

2.550

2.575

3.366

3.399

5.10

5.15

1.306

1.318
600

150

Adj. > 5.0 V Options Only)
Load Regulation VIN = 14 V, 5.0 mA ≤ I
Line Regulation [V
Quiescent Current, Low Load

(Typ) + 1.0] < VIN < 26 V, I

OUT

I

= 100 A, VIN = 12 V, MON = V

OUT

2.5 V Option

3.3 V Option

5.0 V Option

8.0 V Option

10 V Option

Adjustable Option

Quiescent Current, Medium Load

I

= 75 mA, VIN = 14 V, MON = V

OUT

≤ 150 mA −30 5.0 30 mV

OUT

= 1.0 mA − 15 60 mV

OUT

OUT

OUT

−

−

−

−

−

−

90
90

90
100
100

50

125
125
125
150
150

75

− 4.0 6.0 mA

All Options

Quiescent Current, High Load

I

= 150 mA, VIN = 14 V, MON = V

OUT

OUT

− 12 19 mA

All Options

Quiescent Current, (IQ)

ENABLE = 0 V, VIN = 12 V − 12 30 A

Sleep Mode
Current Limit − 151 300 − mA
Short Circuit Output Current V

= 0 V 40 190 − mA

OUT

Thermal Shutdown (Guaranteed by Design) 150 180 − °C

Reset Function (RESET)

Threshold for 2.5 V Option

RESET

HIGH (V

LOW (V

RL

RH

)

)

5.5 V ≤ VIN ≤ 26 V (Note 5)
V

Increasing

OUT

V

Decreasing

OUT

2.28

2.25

2.350

2.300

0.98 ×
V

OUT

0.97 ×
V

OUT

RESET Threshold for 3.3 V Option

HIGH (V
LOW (V

RL

RH

)

)

5.5 V ≤ VIN ≤ 26 V (Note 5)
V

Increasing

OUT

Decreasing

V

OUT

3.00

2.97

3.102

3.036

0.98 ×
V

OUT

0.97 ×
V

OUT

RESET Threshold for 5.0 V Option

HIGH (V
LOW (V

RL

RH

)

)

V
V

OUT
OUT

Increasing
Decreasing

4.55

4.50

4.70

4.60

0.98 ×
V

OUT

0.97 ×
V

OUT

4. Voltage range specified in the Output Stage of the Electrical Characteristics in boldface type.

5. For V

≤ 5.5 V, a RESET = Low may occur with the output in regulation.

IN

V
V

V
V

V
V

V
V

mV
mV

A
A
A
A
A
A

V
V

V
V

V
V

http://onsemi.com

4

NCV8501 Series

ELECTRICAL CHARACTERISTICS (I

= 1.0 mA, ENABLE = 5.0 V, −40°C ≤ T

OUT

≤ 125°C; VIN dependent on voltage option

J

(Note 4); unless otherwise specified.)

Characteristic UnitMaxTypMinTest Conditions

Reset Function (RESET)

RESET Threshold for 8.0 V Option

HIGH (V
LOW (V

RL

RH

)

)

V
V

OUT
OUT

Increasing
Decreasing

6.86

6.80

7.52

7.36

0.98 ×
V

OUT

0.97 ×
V

OUT

RESET Threshold for 10 V Option

HIGH (V
LOW (V

RL

RH

)

)

V
V

OUT
OUT

Increasing
Decreasing

8.60

8.50

9.40

9.20

0.98 ×
V

OUT

0.97 ×
V

OUT

Output Voltage

Low (V

) 1.0 V ≤ V

RLO

OUT

≤ VRL, R

RESET

= 10 k

− 0.1 0.4 V
DELAY Switching Threshold (VDT) − 1.4 1.8 2.2 V
DELAY Low Voltage V
DELAY Charge Current DELAY = 1.0 V, V
DELAY Discharge Current DELAY = 1.0 V, V

< RESET Threshold Low(min) − − 0.1 V

OUT

> V

OUT

RH

= 1.5 V 5.0 − − mA

OUT

1.5 2.5 3.5 A

FLAG/Monitor

Monitor Threshold

Increasing and Decreasing 1.10 1.20 1.31 V
Hysteresis − 20 50 100 mV
Input Current MON = 2.0 V −0.5 0.1 0.5 A
Output Saturation Voltage MON = 0 V, I

= 1.0 mA − 0.1 0.4 V

FLAG

Voltage Adjust (Adjustable Output only)

V

Input Current

= 1.28 V −0.5 − 0.5 A

ADJ

ENABLE

Input Threshold

Low

High

3.0

−

−

−

0.5

−

Input Current ENABLE = 5.0 V − 1.0 5.0 A

4. Voltage range specified in the Output Stage of the Electrical Characteristics in boldface type.

5. For V

≤ 5.5 V, a RESET = Low may occur with the output in regulation.

IN

V
V

V
V

V
V

http://onsemi.com

5

NCV8501 Series

PACKAGE PIN DESCRIPTION, ADJUSTABLE OUTPUT

Package Pin Number

SOW−16

SO−8

1 7 V
2 8 MON Monitor. Input for early warning comparator. If not needed connect to V
3 9 ENABLE ENABLE control for the IC. A high powers the device up.

E PAD

Pin Symbol Function

IN

Input Voltage.

OUT.

4 3−6, 10−12,

NC No connection.

14, 15
5 13 GND Ground. All GND leads must be connected to Ground
6 16 FLAG Open collector output from early warning comparator.
7 1 V
8 2 V

ADJ

OUT

Voltage Adjust. A resistor divider from V
±2.0%, 150 mA output.

to this lead sets the output voltage.

OUT

PACKAGE PIN DESCRIPTION, FIXED OUTPUT

Package Pin Number

SOW−16

SO−8

1 7 V
2 8 MON Monitor. Input for early warning comparator. If not needed connect to V
3 9 ENABLE ENABLE control for the IC. A high powers the device up.
4 10 DELAY Timing capacitor for RESET function.
5 13 GND Ground. All GND leads must be connected to Ground
6 16 RESET Active reset (accurate to V
7 1 FLAG Open collector output from early warning comparator.

E PAD

Pin Symbol Function

IN

Input Voltage.

OUT

≥ 1.0 V)

.

OUT.

.

8 2 V

− 3−6, 11, 12,

14, 15

OUT

±2.0%, 150 mA output.

NC No connection.

http://onsemi.com

6

NCV8501 Series

6

TYPICAL PERFORMANCE CHARACTERISTICS

5.01

5.00

(V)

OUT

V

4.99

4.98

1.2

1.0

0.8

0.6

(mA)

Q

I

0.4

V

OUT

V

= 14 V

IN

= 5.0 mA

I

OUT

−25 −10 1255 203550658095110

−40
Temperature (°C)

Figure 2. Output Voltage vs. Temperature

VIN = 12 V

+125°C

+25°C

= 5.0 V

−40°C

(V)

OUT

V

3.35

3.34

3.33

3.32

3.31

3.30

3.29

3.28

3.27

−25 −10 1255 203550658095110

−40
Temperature (°C)

Figure 3. Output Voltage vs. Temperature

14

12

10

8

(mA)

Q

I

6

4

+125°C

+25°C

V

OUT

= 14 V

V

IN

I

= 5.0 mA

OUT

VIN = 12 V

= 3.3 V

−40°C

0.2

0

0

510152025

(mA)

I

OUT

2

0

0

15 30 45 60 14075 90 105 120 135

(mA)

I

OUT

Figure 4. Quiescent Current vs. Output Current Figure 5. Quiescent Current vs. Output Current

7

6

5

4

(mA)

Q

I

3

2

1

0

I

= 100 mA

OUT

I

= 50 mA

OUT

I

= 10 mA

OUT

6

8101214 2616 18 20 22 24

(V)

V

IN

T = 25°C

120

100

I

OUT

= 100 A

80

60

(A)

Q

I

49

20

0

6

8101214 2

16 18 20 22 24

(V)

V

IN

Figure 6. Quiescent Current vs. Input Voltage Figure 7. Quiescent Current vs. Input Voltage

T = 25°C

http://onsemi.com

7

NCV8501 Series

TYPICAL PERFORMANCE CHARACTERISTICS

450
400
350
300
250
200
150

Dropout Voltage (mV)

100

50

+125°C

0

0

25 50 75 100 150

+25°C

I

OUT

−40°C

V

= 5.0 V, 8.0 V, or 10 V

OUT

(mA)

125

Figure 8. Dropout Voltage vs. Output Current

1000

Unstable Region

100

10 V

10

2.5 V

C

VOUT

3.3 V

= 10 F

ESR ()

1.0

0.1

0.01
0 102030405060708090100

8 V

5 V

Stable Region

OUTPUT CURRENT (mA)

16
14
12
10

8
6
4

Quiescent Current (A)

2
0

−40

−25 −10 1255 203550658095110
Temperature (°C)

VIN = 12 V

Figure 9. Sleep Mode IQ vs. Temperature

1000

C

Unstable Region

100

10

ESR ()

1.0

0.1

0.01
0 102030 5060708090100110

40

OUTPUT CURRENT (mA)

= 10 F

Vout

Stable Region

C

Vout

= 0.1 F

Figure 10. Output Stability with Output

Voltage Change

Figure 11. Output Stability with Output

Capacitor Change

http://onsemi.com

8

V

ENABLE

RESET

NCV8501 Series

V

IN

Current Source

(Circuit Bias)

I

BIAS

Current Limit

Sense

+
+

−

V

BG

I

BIAS

+

−
Error Amplifier

V

+

−

1.8 V

BG

Fixed Voltage only

Thermal

Protection

OUT

Delay

MON

3.0 A
Bandgap

I

BIAS

Reference

V

BG

I

BIAS

V

BG

+

−

Figure 12. Block Diagram

20 k

Adjustable

Version only

V

ADJ

GND

FLAG

http://onsemi.com

9

NCV8501 Series

CIRCUIT DESCRIPTION

REGULATOR CONTROL FUNCTIONS

The NCV8501 contains the microprocessor compatible

control function RESET (Figure 13).

V

IN

V

OUT

DELAY

RESET

T

d

T

d

RESET

Threshold

DELAY

Threshold

(V

DT

Figure 13. Reset and Delay Circuit Wave Forms

RESET Function

A RESET signal (low voltage) is generated as the IC
powers up until V
voltage, or when V

is within 6.0% of the regulated output

OUT

drops out of regulation,and is lower

OUT

than 8.0% below the regulated output voltage. Hysteresis is
included in the function to minimize oscillations.

The RESET output is an open collector NPN transistor,
controlled by a low voltage detection circuit. The circuit is
functionally independent of the rest of the IC thereby
guaranteeing that the RESET

signal is valid for V

OUT

as low

as 1.0 V.

ENABLE Function

The part stays in a low IQ sleep mode when the ENABLE
pin is held low. The part has an internal pull down if the pin
is left floating. This is intended for failure modes only. An
external connection (active pulldown, resistor , or switch) for
normal operation is recommended.

The integrity of the ENABLE pin allows it to be tied
directly to the battery line through an external resistor . It will
withstand load dump potentials in this configuration.

V

BAT

10 k

V

IN

NCV8501

ENABLE

V

OUT

The DELAY lead provides s ource c urrent ( typically 2 .5 A)
to the external DELAY capacitor during the following
proceedings:

1. During Power Up (once the regulation threshold
has been verified).

2. After a reset event has occurred and the device is
back in regulation. The DELAY capacitor is
discharged when the regulation (RESET
has been violated. This is a latched incident. The
capacitor will fully discharge and wait for the
device to regulate before going through the delay

)

FLAG/Monitor Function

time event again.

An on−chip comparator is provided to perform an early
warning to the microprocessor of a possible reset signal. The
reset signal typically turns the microprocessor off
instantaneously. This can cause unpredictable results with
the microprocessor. The signal received from the FLAG
will allow the microprocessor time to complete its present
task before shutting down. This function is performed by a
comparator referenced to the bandgap reference. The actual
trip point can be programmed externally using a resistor
divider to the input monitor (MON) (Figure 15). The typical
threshold is 1.20 V on the MON pin.

V

BAT

V

IN

MON

R

ADJ

DELAY

NCV8501

FLAG

RESET

GND

V

OUT

C

Figure 15. FLAG/Monitor Function

Voltage Adjust

Figure 16 shows the device setup for a user configurable
output voltage. The feedback to the V

pin is taken from

ADJ

a voltage divider referenced to the output voltage. The loop
is balanced around the Unity Gain threshold (1.28 V
typical).

OUT

threshold)

V

CC

P

I/O

RESET

pin

GND

Figure 14. ENABLE Function

DELAY Function

The reset delay circuit provides a programmable (by

external capacitor) delay on the RESET output lead.

http://onsemi.com

10

V

NCV8501

V

OUT

ADJ

15 k

1.28 V

5.1 k

≈5.0 V

C

OUT

Figure 16. Adjustable Output Voltage

V

IN

NCV8501

V

ADJ

V

OUT

MJD31C

NCV8501 Series

APPLICATION NOTES

>1 Amp

5.0 V

V

IN

0.1 F

CIN*

NCV8501

RESET

V

OUT

C

**

R

RST

OUT

10 F

C2

V

BAT

0.1 F

R1

294 k

R2

100 k

C1
47 F

Figure 17. Additional Output Current

Adding Capability

Figure 17 shows how the adjustable version of parts can
be used with an external pass transistor for additional current
capability. The setup as shown will provide greater than 1
Amp of output current.

FLAG MONITOR

Figure 18 shows the FLAG Monitor waveforms as a result
of the circuit depicted in Figure 15. As the output voltage
falls (V

), the Monitor threshold is crossed. This causes

OUT

the voltage on the FLAG output to go low sending a warning
signal to the microprocessor that a RESET signal may occur
in a short period of time. T

WARNING

is the time the
microprocessor has to complete the function it is currently
working on and get ready for the RESET

V

OUT

MON

FLAG Monitor

Ref. Voltage

RESET

FLAG

shutdown signal.

*CIN required if regulator is located far from the power supply filter

**C

required for stability. Capacitor must operate at minimum

OUT

temperature expected

Figure 19. Test and Application Circuit Showing

Output Compensation

SETTING THE DELAY TIME

The delay time is controlled by the Reset Delay Low
Voltage, Delay Switching Threshold, and the Delay Charge
Current. The delay follows the equation:

t

DELAY



[

C

DELAY(Vdt

Delay Charge Current

 Reset Delay Low Voltage)

]

Example:

Using C

DELAY

= 33 nF.
Assume reset Delay Low Voltage = 0.
Use the typical value for Vdt = 1.8 V.
Use the typical value for Delay Charge Current = 2.5 A.

t

DELAY

[

33 nF(1.8 0)



2.5 A

]

 23.8 ms

STABILITY CONSIDERATIONS

The output or compensation capacitor helps determine

three main characteristics of a linear regulator: start−up
delay , load transient response and loop stability.

The capacitor value and type should be based on cost,

availability, size and temperature constraints. A tantalum or
aluminum electrolytic capacitor is best, since a film or
ceramic capacitor with almost zero ESR can cause
instability. The aluminum electrolytic capacitor is the least
expensive solution, but, if the circuit operates at low
temperatures (−25°C to −40°C), both the value and ESR of
the capacitor will vary considerably. The capacitor
manufacturers data sheet usually provides this information.

The value for the output capacitor C

shown i n F igure 19

OUT

should work for most applications, however it is not
necessarily the optimized solution.

T

WARNING

Figure 18. FLAG Monitor Circuit Waveform

http://onsemi.com

11

NCV8501 Series

CALCULATING POWER DISSIPATION IN A

SINGLE OUTPUT LINEAR REGULATOR

The maximum power dissipation for a single output

regulator (Figure 20) is:

P

D(max)

 [V

 V

IN(max)

IN(max)IQ

 V

OUT(min)]IOUT(max)

(eq. 1)

where:

V
V
I

OUT(max)

is the maximum input voltage,

IN(max)
OUT(min)

is the minimum output voltage,

is the maximum output current for the
application, and
IQ is the quiescent current the regulator consumes at
I

OUT(max)

Once the value of P

permissible value of R

The value of R

.

is known, the maximum

D(max)

can be calculated:

JA



R

JA

JA



150°C 



can then be compared with those in the

T

A

P

D

(eq. 2)

package section of the data sheet. Those packages with
R

’s less than the calculated value in Equation 2 will keep

JA



the die temperature below 150°C.

In some cases, none of the packages will be sufficient to

dissipate the heat generated by the IC, and an external
heatsink will be required.

I

IN

V

IN

SMART

REGULATOR

Control

}

Features

I

Q

Figure 20. Single Output Regulator with Key

Performance Parameters Labeled

I

OUT

V

OUT

100

90

, (°C/W)

JA



80

70

60

Thermal Resistance,

50

Junction to Ambient, R

40

0

200 400 800

Copper Area (mm

600

2

)

Figure 21. 16 Lead SOW (Exposed Pad), JA as a

Function of the Pad Copper Area (2 oz. Cu

Thickness), Board Material = 0.0625 G−10/R−4

HEATSINKS

A heatsink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.

Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed to
determine the value of R

R

 R

JA



JC

JA

:

 R

CS

 R

SA

(eq. 3)

where:

R

= the junction−to−case thermal resistance,

JC



R

= the case−to−heatsink thermal resistance, and

CS



R

= the heatsink−to−ambient thermal resistance.

SA



R

appears in the package section of the data sheet. Like

JC



R

, it too is a function of package type. R

JA





CS

and R

are

SA



functions of the package type, heatsink and the interface
between them. These values appear in heatsink data sheets
of heatsink manufacturers.

http://onsemi.com

12

NCV8501 Series

Adj

SOW

d

V

SOW

d

V

SOW

d

V

SOW

d

V

SOW

d

V

SOW

d

ORDERING INFORMATION

Device Output Voltage Package Shipping†

NCV8501DADJ Adjustable SO−8 98 Units/Rail
NCV8501DADJG

NCV8501DADJR2 Adjustable SO−8 2500 Tape & Reel
NCV8501DADJR2G

NCV8501PDWADJ
NCV8501PDWADJR2
NCV8501D25 2.5 V SO−8 98 Units/Rail
NCV8501D25G

NCV8501D25R2 2.5 V SO−8 2500 Tape & Reel
NCV8501D25R2G

NCV8501PDW25
NCV8501PDW25R2
NCV8501D33 3.3 V SO−8 98 Units/Rail
NCV8501D33G

NCV8501D33R2 3.3 V SO−8 2500 Tape & Reel
NCV8501D33R2G

NCV8501PDW33
NCV8501PDW33R2
NCV8501D50 5.0 V SO−8 98 Units/Rail
NCV8501D50G

NCV8501D50R2 5.0 V SO−8 2500 Tape & Reel
NCV8501D50R2G

NCV8501PDW50
NCV8501PDW50R2
NCV8501D80 8.0 V SO−8 98 Units/Rail
NCV8501D80G

NCV8501D80R2 8.0 V SO−8 2500 Tape & Reel
NCV8501D80R2G

NCV8501PDW80
NCV8501PDW80R2
NCV8501D100 10 V SO−8 98 Units/Rail
NCV8501D100G

NCV8501D100R2 10 V SO−8 2500 Tape & Reel
NCV8501D100R2G

NCV8501PDW100
NCV8501PDW100R2

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specification Brochure, BRD8011/D.

Adjustable

Adjustable

ustable

2.5 V

2.5 V

2.5

3.3 V

3.3 V

3.3

5.0 V

5.0 V

5.0

8.0 V

8.0 V

8.0

10 V

10 V

10

SO−8

(Pb−Free)

SO−8

(Pb−Free)

p

−16 Exposed Pa

SO−8

(Pb−Free)

SO−8

(Pb−Free)

p

−16 Exposed Pa

SO−8

(Pb−Free)

SO−8

(Pb−Free)

p

−16 Exposed Pa

SO−8

(Pb−Free)

SO−8

(Pb−Free)

p

−16 Exposed Pa

SO−8

(Pb−Free)

SO−8

(Pb−Free)

p

−16 Exposed Pa

SO−8

(Pb−free)

SO−8

(Pb−Free)

p

−16 Exposed Pa

98 Units/Rail

2500 Tape & Reel

47 Units/Rail

1000 Tape & Reel

98 Units/Rail

2500 Tape & Reel

47 Units/Rail

1000 Tape & Reel

98 Units/Rail

2500 Tape & Reel

47 Units/Rail

1000 Tape & Reel

98 Units/Rail

2500 Tape & Reel

47 Units/Rail

1000 Tape & Reel

98 Units/Rail

2500 Tape & Reel

47 Units/Rail

1000 Tape & Reel

98 Units/Rail

2500 Tape & Reel

47 Units/Rail

1000 Tape & Reel

http://onsemi.com

13

−Y−

−Z−

NCV8501 Series

PACKAGE DIMENSIONS

SO−8 NB

D SUFFIX

CASE 751−07

ISSUE AB

NOTES:

−X−
A

58

B

1

S

0.25 (0.010)

4

M

M

Y

K

G

C

SEATING
PLANE

0.10 (0.004)

H

D

0.25 (0.010) Z

M

SXS

Y

N

X 45



M

J

1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.

6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.

MILLIMETERS

DIMAMIN MAX MIN MAX

4.80 5.00 0.189 0.197

B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.053 0.069
D 0.33 0.51 0.013 0.020
G 1.27 BSC 0.050 BSC
H 0.10 0.25 0.004 0.010
J 0.19 0.25 0.007 0.010
K 0.40 1.27 0.016 0.050
M 0 8 0 8



N 0.25 0.50 0.010 0.020
S 5.80 6.20 0.228 0.244

INCHES

SOLDERING FOOTPRINT*

1.52

0.060

7.0

0.275

0.6

0.024

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.

4.0

0.155

1.270

0.050

SCALE 6:1



inches

mm



http://onsemi.com

14

0.25 (0.010) W

M

PIN 1 I.D.

0.10 (0.004) T

A

−U−

16 9

P

1

M

B

8

14 PL

G

TOP SIDE

D16 PL

0.25 (0.010) T UW

M

H

NCV8501 Series

PACKAGE DIMENSIONS

SOIC 16 LEAD WIDE BODY

EXPOSED PAD

PDW SUFFIX

CASE 751R−02

ISSUE A

R x 45



−W−

DETAIL E

C

−T−

SEATING

K

PLANE

S S

DETAIL E

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

M

F

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION SHALL BE

0.13 (0.005) TOTAL IN EXCESS OF THE D DIMENSION
AT MAXIMUM MATERIAL CONDITION.

6. 751R−01 OBSOLETE, NEW STANDARD 751R−02.

MILLIMETERS

DIMAMIN MAX MIN MAX

10.15 10.45 0.400 0.411

B 7.40 7.60 0.292 0.299
C 2.35 2.65 0.093 0.104
D 0.35 0.49 0.014 0.019
F 0.50 0.90 0.020 0.035
G 1.27 BSC 0.050 BSC
H 3.76 3.86 0.148 0.152
J 0.25 0.32 0.010 0.012
K 0.10 0.25 0.004 0.009
L 4.58 4.78 0.180 0.188

M 0 7 0 7

P 10.05 10.55 0.395 0.415
R 0.25 0.75 0.010 0.029

INCHES



J

EXPOSED PAD

18

L

16

9

BACK SIDE

http://onsemi.com

15

NCV8501 Series

SMART REGULATOR is a registered trademark of Semiconductor Components Industries, LLC.

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATION

LITERATURE FULFILLMENT:

Literature Distribution Center for ON Semiconductor
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA

Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada
Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada
Email: [e-mail]

N. American Technical Support: 800−282−9855 Toll Free

USA/Canada
Japan: ON Semiconductor, Japan Customer Focus Center

2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051

Phone: 81−3−5773−3850

http://onsemi.com

ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder

For additional information, please contact your
local Sales Representative.

NCV8501/D

16