NCV7450V1GEVB
NCV7450 System Basis
Chip Evaluation Board
User's Manual
Introduction
This document describes the evaluation board for the
ON Semiconductor system basis chip (SBC) NCV7450, which
contains a CAN−FD transceiver, 5 V / 250 mA LDO regulator and HS
driver. The board provides basic connections for a device evaluation.
Evaluation Board Features
• One−row pin header providing access to all the device pins, enables
easy insertion of the evaluation board into a more complex
application setup
• Separated supply path for VS1 and VS2
• Standard CAN termination
• Position for optional ESD protection
• LED for RSTN signal activity indication
• Jumpers for enable signals
SCHEMATIC
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EVAL BOARD USER’S MANUAL
Figure 1. NCV7450V1GEVB Evaluation Board
© Semiconductor Components Industries, LLC, 2020
June, 2020 − Rev. 0
Figure 2. NCV7450 Evaluation Board Schematic
1 Publication Order Number:
EVBUM2737/D
NCV7450V1GEVB
Table 1. ABSOLUTE MAXIMUM RATINGS
Rating Pins Min Max Unit
Battery supply voltage Vbat1, Vbat2 −40 40 V
LDO Regulator output voltage VR1 −0.3 6 or VS1 + 0.5 V
Digital inputs/outputs voltage TxDC, RxDC, EN_WD, EN_CAN,
EN_HS, HS_DIAG, WDI, RSTN
CAN bus line voltage CANH, CANL −40 40 V
HS Driver output voltage HS
− with Cbuf2
− without Cbuf2
NCV7450 junction temperature −40 +150
Board temperature −40 +125
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
−0.3 VR1 + 0.3 V V
−0.3
−0.3
(whichever is lower)
Vbat2
40
Table 2. RECOMMENDED BOARD OPERATING CONDITIONS
Rating Pins Min Max Unit
Battery supply voltage Vbat1, Vbat2 6 18 V
LDO Regulator output current
(thermally limited)
Digital inputs/outputs voltage TxDC, RxDC, EN_WD, EN_CAN,
EN_HS, HS_DIAG, WDI, RSTN
CAN bus line voltage CANH, CANL 0 5 V
HS Driver output voltage HS 0 VS2 V
HS Driver output current HS 0 1.7 A
NCV7450 junction temperature −40 +150
Board temperature −40 +125
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
VR1 −0.1 250 mA
0 5 V
V
V
V
°C
°C
°C
°C
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NCV7450V1GEVB
OPERATIONAL GUIDELINES
NCV7450 evaluation board allows easy evaluation of
NCV7450 system basis chip. It provides connection to all
the device’s pins as well as positions for all the necessary
Configurations and assembly options are listed in Table 3.
For more information please check NCV7450
datasheet at www.onsemi.com
CAN bus external components.
Table 3. ASSEMBLY OPTIONS AND CONFIGURATIONS
Component Default Function
Rth, Rtl, Cst 2x 62R, 4.7nF CAN bus termination
ESD −
(optional)
Ch, Cl 47 pF ESD capacitors. Should be selected per application needs and ESD used
CMC − Optional common−mode choke
Rl, Rh 0R Bypass of CMC
Rtxdc − Not used
Cbuf2 −
(optional 47 mF)
CANEN_hi − CAN_EN pin connection
HSEN_hi − HS_EN pin connection
WDEN_lo − WD_EN pin connection
Position for optional NUP2105 ESD protection
HS driver supply buffer capacitor for, optional
w Should be used for HS driver PWM operation
w Should not be used if short to voltage higher than Vbat2 can occur
Open = CAN_EN weak internal pull−down = CAN transceiver disabled
Closed = CAN_EN connected to VR1 = CAN transceiver enabled
Open = HSN_EN weak internal pull−down = HS driver disabled
Closed = HSN_EN connected to VR1 = HS driver enabled
Open = WD_EN weak internal pull−up current source (periodically activated) =
watchdog enabled
Closed = WD_EN shorted to GND = watchdog disabled
transceiver
.
Figure 3. NCV7450 Evaluation Board Picture, Top Side
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Composite Drawings
NCV7450V1GEVB
PCB DRAWINGS
Figure 4. NCV7450 EVB PCB Top Drawing Figure 5. NCV7450 EVB PCB Bottom Drawing
(Bottom View)
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