ON Semiconductor NCV7356 Technical data

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NCV7356

Single Wire CAN Transceiver

The NCV7356 is a physical layer device for a single wire data link
capable of operating with various Carrier Sense Multiple Access
with Collision Resolution (CSMA/CR) protocols such as the Bosch
Controller Area Network (CAN) version 2.0. This serial data link
network is intended for use in applications where high data rate is not
required and a lower data rate can achieve cost reductions in both the
physical media components and in the microprocessor and/or
dedicated logic devices which use the network.

The network shall be able to operate in either the normal data rate
mode or a high−speed data download mode for assembly line and
service data transfer operations. The high−speed mode is only
intended to be operational when the bus is attached to an off−board
service node. This node shall provide temporary bus electrical loads
which facilitate higher speed operation. Such temporary loads should
be removed when not performing download operations.

The bit rate for normal communications is typically 33 kbit/s, for
high−speed transmissions like described above a typical bit rate of
83 kbit/s is recommended. The NCV7356 is designed in accordance
to the Single Wire CAN Physical Layer Specification GMW3089
V2.4 and supports many additional features like undervoltage
lockout, timeout for faulty blocked input signals, output blanking
time in case of bus ringing and a very low sleep mode current.

Features

• Fully Compatible with J2411 Single Wire CAN Specification

• 60 mA (max) Sleep Mode Current

• Operating Voltage Range 5.0 to 27 V

• Up to 100 kbps High−Speed Transmission Mode

• Up to 40 kbps Bus Speed

• Selective BUS Wake−Up

• Logic Inputs Compatible with 3.3 V and 5 V Supply Systems

• Control Pin for External Voltage Regulators (14 Pin Package Only)

• Standby to Sleep Mode Timeout

• Low RFI Due to Output Wave Shaping

• Fully Integrated Receiver Filter

• Bus Terminals Short−Circuit and Transient Proof

• Loss of Ground Protection

• Protection Against Load Dump, Jump Start

• Thermal Overload and Short Circuit Protection

• ESD Protection of 4.0 kV on CAN Pin (2.0 kV on Any Other Pin)

• Undervoltage Lock Out

• Bus Dominant Timeout Feature

• NCV Prefix for Automotive and Other Applications Requiring Site

and Change Control

• Pb−Free Packages are Available

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MARKING DIAGRAMS

8

1

SOIC−8

D SUFFIX

CASE 751

14

1

SOIC−14

D SUFFIX

CASE 751A

GND GND

TxD

MODE1

RxD V

GND GND

ORDERING INFORMATION

Device Package Shipping

NCV7356D1G SOIC−8

NCV7356D1R2G SOIC−8
NCV7356D2 SOIC−14 55 Units / Rail

NCV7356D2R2 SOIC−14 2500 Tape & Reel

†For information on tape and reel specifications,

including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.

A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G = Pb−Free Package

PIN CONNECTIONS

1TxD 8 GND
2MODE0
3MODE1
4RxD

(Top View)

1

NC INH

(Top View)

(Pb−Free)

(Pb−Free)

8

1

14

AWLYWW

1

14
132
123
114
105

96
87

2500 Tape & Reel

V7356
ALYW

G

NCV7356

7 CANH
6 LOAD
5V

BAT

NC
CANHMODE0
LOAD

BAT

98 Units / Rail

†

© Semiconductor Components Industries, LLC, 2005

June, 2005 − Rev. 2

1 Publication Order Number:

NCV7356/D

NCV7356

V

BAT

NCV7356

TxD

MODE0

MODE1

5 V Supply

and

References

RC−Osc

Time Out

MODE

CONTROL

Biasing and

V

Monitor

BAT

Wave Shaping

Receive

Comparator

Input Filter

Reverse

Protection

CAN Driver

Feedback

Loss of
Ground

Detection

Current

CANH

Loop

LOAD

RxD

RxD Blanking

Time Filter

Figure 1. 8−Pin Package Block Diagram

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2

Reverse

Current

Protection

GND

NCV7356

V

TxD

BAT

5 V Supply

and

References

RC−Osc

Time Out

Biasing and

V

Monitor

BAT

Wave Shaping

Input Filter

Reverse

Current

Protection

CAN Driver

Feedback

Loop

INH

NCV7356

CANH

MODE0

MODE1

RxD

MODE

CONTROL

Receive

Comparator

RxD Blanking

Time Filter

Loss of
Ground

Detection

Figure 2. 14−Pin Package Block Diagram

LOAD

Reverse

Current

Protection

GND

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3

NCV7356

P ACKAGE PIN DESCRIPTION

SOIC−8 SOIC−14 Symbol Description

1 2 TxD Transmit data from microprocessor to CAN.
2 3 MODE0 Operating mode select input 0.
3 4 MODE1 Operating mode select input 1.
4 5 RxD Receive data from CAN to microprocessor.
5 10 V
6 11 LOAD Resistor load (loss of ground detection low side switch).
7 12 CANH Single wire CAN bus pin.
8 1, 7, 8, 14 GND Ground

− 6, 13 NC No Connection (Note 1)

− 9 INH Control pin for external voltage regulator (high voltage high side switch) (14 pin package only)

1. PWB terminal 13 can be connected to ground which will allow the board to be assembled with either the 8 pin package or the 14 pin package.

BAT

Battery input voltage.

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4

NCV7356

Electrical Specification

All voltages are referenced to ground (GND). Positive
currents flow into the IC. The maximum ratings given in
the table below are limiting values that do not lead to a

MAXIMUM RATINGS

Rating Symbol Condition Min Max Unit

permanent damage of the device but exceeding any of these
limits may do so. Long term exposure to limiting values
may affect the reliability of the device.

Supply Voltage, Normal Operation V
Short−Term Supply Voltage, T ransient V

BAT

BAT.LD

Load Dump; t < 500 ms − 40 V

− −0.3 18 V

(peak)

Jump Start; t < 1.0 min − 27 V
Transient Supply Voltage V
Transient Supply Voltage V
Transient Supply Voltage V
CANH Voltage V

Transient Bus Voltage V
Transient Bus Voltage V
Transient Bus Voltage V

CANHTR1
CANHTR2
CANHTR3

DC Voltage on Pin LOAD V
DC Voltage on Pins TxD, MODE1, MODE0, RxD V
ESD Capability of CANH V

ESDBUS

BAT.TR1
BAT.TR2
BAT.TR3

CANH

LOAD

DC

ISO 7637/1 Pulse 1 (Note 2) −50 − V

ISO 7637/1 Pulses 2 (Note 2) − 100 V

ISO 7637/1 Pulses 3A, 3B −200 200 V

V

< 27 V −20

BAT

V

= 0 V −40

BAT

40

ISO 7637/1 Pulse 1 (Note 3) −50 − V

ISO 7637/1 Pulses 2 (Note 3) − 100 V

ISO 7637/1 Pulses 3A, 3B (Note 3) −200 200 V

Via RT > 2.0 kW −40 40 V

− −0.3 7.0 V

Human Body Model

−4000 4000 V

V

Eq. to Discharge 100 pF with 1.5 kW
ESD Capability of Any Other Pins V

ESD

Human Body Model

−2000 2000 V

Eq. to Discharge 100 pF with 1.5 kW
Maximum Latchup Free Current at Any Pin I

LATCH

Storage Temperature T
Junction Temperature T
Lead Temperature Soldering

Reflow: (SMD styles only)

SOIC−14 T

SOIC−8 60 s − 150 s above 217°C − 260 peak

STG

sld

J

60 s − 150 s above 183°C − 240 peak °C

− −500 500 mA

− −55 150 °C

− −40 150 °C

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values
(not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage
may occur and reliability may be affected.

2. ISO 7637 test pulses are applied to V

3. ISO 7637 test pulses are applied to CANH via a coupling capacitance of 1.0 nF.

via a reverse polarity diode and >1.0 mF blocking capacitor.

BAT

4. ESD measured per Q100−002 (EIA/JESD22−A114−A).

TYPICAL THERMAL CHARACTERISTICS

Parameter

SOIC−8

Junction−to−Lead (psi−JL7, Y
Junction−to−Ambient (R

q

SOIC−14

Junction−to−Lead (psi−JL8, Y
Junction−to−Ambient (R

q

5. 1 oz copper, 53 mm2 coper area, 0.062″ thick FR4.

6. 1 oz copper, 716 mm2 coper area, 0.062″ thick FR4.

7. 1 oz copper, 94 mm2 coper area, 0.062″ thick FR4.

8. 1 oz copper, 767 mm2 coper area, 0.062″ thick FR4.

) or Pins 6−7 57 (Note 5) 51 (Note 6) °C/W

JL8

, qJA) 187 (Note 5) 128 (Note 6) °C/W

JA

) 30 (Note 7) 30 (Note 8) °C/W

JL8

, qJA) 122 (Note 7) 84 (Note 8) °C/W

JA

Min Pad Board 1, Pad Board

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Test Condition, Typical Value

Unit

NCV7356

ELECTRICAL CHARACTERISTICS (V

Characteristic

= 5.0 to 27 V , T

BAT

Symbol Condition Min Typ Max Unit

= −40 to +125°C, unless otherwise specified.)

A

GENERAL

Undervoltage Lock Out
Supply Current, Recessive,

All Active Modes

Normal Mode Supply Current,

Dominant

High−Speed Mode Supply Current,

Dominant

Wake−Up Mode Supply Current,

Dominant

Sleep Mode Supply Current I

V

BATuv

I

BATN

I

BATN

(Note 9)

I

BATN

(Note 9)

I

BATW

(Note 9)

BATS

V

BAT

= 18 V ,

Not High Speed Mode − 5.0 6.0 mA

TxD Open

V

= 27 V , MODE0 = MODE1 = H,

BAT

TxD = L, R

V

= 16 V , MODE0 = H, MODE1 = L,

BAT

TxD = L, R

V

= 27 V , MODE0 = L, MODE1 = H,

BAT

TxD = L, R

V

= 18 V, TxD, RxD, MODE0,

BAT

MODE1 Open
Thermal Shutdown (Note 9) T
Thermal Recovery (Note 9) T

SD

REC

CANH

Bus Output Voltage V

oh

RL > 200 W, Normal Mode

6.0 V < V

Bus Output Voltage

Low Battery

Bus Output Voltage

High−Speed Mode

Fixed Wake−Up

Output High Voltage

Offset Wake−Up

Output High Voltage

Recessive State

Output Voltage
Bus Short Circuit Current −I
Bus Leakage Current

During Loss of Ground
Bus Leakage Current, Bus Positive I
Bus Input Threshold V

V

oh

V

oh

V

ohWuFix

V

ohWuOffset

V

ol

CAN_SHORTVCANH

I

LKN_CAN

RL > 200 W, Normal High−Speed Mode

Recessive State or Sleep Mode,

(Note 10)

LKP_CAN

ih

5.0 V < V

RL > 75 W, High−Speed Mode

8.0 V < V

Wake−Up Mode, R

11.4 V < V

Wake−Up Mode, R

5.0 V < V

R

load

= 0 V , V

BAT

Loss of Ground, V

TxD High −10 − 10 mA

Normal, High−Speed Mode,

6.0 v V
Bus Input Threshold Low Battery V
Fixed Wake−Up

Input High Voltage Threshold

Offset Wake−Up

Input High Voltage Threshold

V
(Note 9)

V

ihWuOffset

(Note 9)

ihlb

ihWuFix

Normal, V

BAT

Sleep Mode, V

Sleep Mode V

LOAD

Voltage on Switched Ground Pin V

LOAD_1mA

Voltage on Switched Ground Pin V
Voltage on Switched Ground Pin V
Load Resistance During Loss of

LOAD_LOB

R

LOAD_LOB

LOAD

I

LOAD

I

= 1.0 mA − − 0.1 V

LOAD

I

= 5.0 mA − − 0.5 V

LOAD

= 7.0 mA, V

V

BAT

Battery

9. Thresholds not tested in production, guaranteed by design.

10.Leakage current in case of loss of ground is the summary of both currents I

− 3.5 − 4.8 V

High Speed Mode − − 8.0

− 30 35 mA

= 200 W

load

− 70 75 mA

= 75 W

load

− 60 75 mA

= 200 W

load

− 30 60 mA

− 155 − 180 °C

− 126 − 150 °C

4.4 − 5.1 V

< 27 V

BAT

3.4 − 5.1 V

< 6.0 V

BAT

4.2 − 5.1 V

< 16 V

BAT

BAT

BAT

> 200 W,

L

< 27 V

> 200 W,

L

< 11.4 V

9.9 − 12.5 V

V

–1.5 − V

BAT

BAT

−0.20 − 0.20 V

= 6.5 kW

= 27 V, TxD = 0 V 50 − 350 mA

= 0 V −50 − 10 mA

CANH

2.0 2.1 2.2 V

v 27 V

BAT

= 5.0 V to 6.0 V 1.6 1.7 2.2 V

> 10.9 V 6.6 − 7.9 V

BAT

−4.3 − V

BAT

= 0 V − − 1.0 V

BAT

= 0 R

LOAD

− R

−10%

LKN_CAN

and I

LKN_LOAD

.

−3.25 V

BAT

LOAD

+35%

V

W

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NCV7356

ELECTRICAL CHARACTERISTICS (continued) (V

Characteristic

Symbol Condition Min Typ Max Unit

BAT

TXD, MODE0, MODE1

High Level Input Voltage
Low Level Input Voltage V
TxD Pullup Current −I

MODE0 and 1 Pulldown Resistor R

V

ih

il

IL_TXD

MODE_pd

TxD = L, MODE0 and 1 = H

RXD

Low Level Output Voltage V
High Level Output Leakage I

ol_rxd

ih_rxd

RxD Output Current Irxd V

INH (14 Pin Package Only)

High Level Output Voltage V
Leakage Current I

oh_INH
INH_lk

MODE0 = MODE1 = L, INH = 0 V −5.0 − 5.0 mA

= 5.0 to 27 V , T

6.0 < V

6.0 < V

= −40 to +125°C, unless otherwise specified.)

A

< 27 V 2.0 − − V

BAT

< 27 V − − 0.8 V

BAT

10 − 50 mA

5.0 < V

BAT

< 27 V

10 − 50 kW

I

= 2.0 mA − − 0.4 V

RxD

V

= 5.0 V −10 − 10 mA

RxD

= 5.0 V − − 70 mA

RxD

I

= −180 mA V

INH

BAT

−0.8 V

−0.5 V

BAT

BAT

V

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TIMING MEASUREMENT LOAD CONDITIONS

Normal and High Voltage Wake−Up Mode High−Speed Mode

min load / min tau 3.3 kohm / 540 pF
min load / max tau 3.3 kohm / 1.2 nF
max load / min tau 200 ohm / 5.0 nF
max load / max tau 200 ohm / 20 nF

NCV7356

Additional 140 ohm tool resistance

to ground in parallel

Additional 120 ohm tool resistance

to ground in parallel

ELECTRICAL CHARACTERISTICS (5.0 V ≤ V

≤ 27 V, −40°C ≤ TA ≤ 125°C, unless otherwise specified.)

BAT

AC CHARACTERISTICS (See Figures 3, 4, and 5)

Characteristic Symbol Condition Min Typ Max Unit

Transmit Delay in Normal and Wake−Up

Mode, Bus Rising Edge (Note 11)

Transmit Delay in Wake−Up Mode to V

ihWU

,

Bus Rising Edge (Note 12)

Transmit Delay in Normal Mode,

Bus Falling Edge (Note 13)

Transmit Delay in Wake−Up Mode,

Bus Falling Edge (Note 13)

Transmit Delay in High−Speed Mode,

Bus Rising Edge (Note 14)

Transmit Delay in High−Speed Mode,

Bus Falling Edge (Note 15)
Receive Delay, All Active Modes (Note 16) t
Receive Delay, All Active Modes (Note 16) t
Input Minimum Pulse Length,

All Active Modes (Note 16)
Wake−Up Filter Time Delay t
Receive Blanking Time

t

Tr

t

TWUr

t

Tf

t

TWU1f

t

THSr

t

THSf

DR
RD

t

mpDR

t

mpRD

WUF

t

rb

Min and Max Loads per Timing

2.0 − 6.3 ms

Measurement Load Conditions

Min and Max Loads per Timing

2.0 − 18 ms

Measurement Load Conditions

Min and Max Loads per Timing

1.8 − 10 ms

Measurement Load Conditions

Min and Max Loads per Timing

3.0 − 13.7 ms

Measurement Load Conditions

Min and Max Loads per Timing

0.1 − 1.5 ms

Measurement Load Conditions

Min and Max Loads per Timing

0.04 − 3.0 ms

Measurement Load Conditions
CANH High to Low Transition 0.3 − 1.0 ms
CANH Low to High Transition 0.3 − 1.0 ms
CANH High to Low Transition

CANH Low to High Transition

0.15

0.15

−

−

1.0

1.0

ms

See Figure 4 10 − 70 ms
See Figure 5 0.5 − 6.0 ms

After TxD L−H Transition

TxD Timeout Reaction Time t
TxD Timeout Reaction Time t
Delay from Normal to High−Speed and

tout

toutwu

t

dnhs

Normal and High−Speed Mode − 17 − ms
Wake−Up Mode − 17 − ms

− − − 30 ms

High Voltage W ake−Up Mode

Delay from High−Speed and High Voltage

t

dhsn

− − − 30 ms

Wake−Up to Normal Mode
Delay from Normal to Standby Mode t
Delay from Sleep to Normal Mode t
Delay from Standby to Sleep Mode (Note 17) t

dsby
dsnwu
dsleep

V

= 6.0 V to 27 V − − 500 ms

BAT

V

= 6.0 V to 27 V − − 50 ms

BAT

V

= 6.0 V to 27 V 100 250 500 ms

BAT

11.The maximum signal delay time for a bus rising edge is measured from Vcmos_il on the TxD input pin to the VihMax + Vgoff max level on CANH
at maximum network time constant, minimum signal delay time for a bus rising edge is measured from Vcmos_ih on the TxD input pin to 1 V
on CANH at minimum network time constant. These definitions are valid in both normal and High Voltage Wake−Up (HVWU) mode.

12.The maximum signal delay time for a bus rising edge in HVWU mode is measured from Vcmos_il on the TxD input pin to the VihWuMax + Vgoff
max level on CANH at maximum network time constant, minimum signal delay time for a bus rising edge is measured from Vcmos_ih on the
TxD input pin to 1 V on CANH at minimum network time constant.

13.Maximum signal delay time for a bus falling edge is measured from Vcmos_ih on the TxD input pin to 1 V on CANH at maximum network time
constant, minimum signal delay time for a bus falling edge is measured from Vcmos_ih on the TxD input pin to the VihMax + Vgoff max level on
CANH. These definitions are valid in both normal and HVWU mode.

14.The signal delay time in high−speed mode for a bus rising edge is measured from Vcmos_il on the TxD input pin to the VihMax + Vgoff max level
on CANH at maximum high−speed network time constant.

15.The signal delay time in high−speed mode for a bus falling edge is measured from Vcmos_ih on the TxD input pin to 1 V on CANH at maximum
high−speed network time constant.

16.Receive delay time is measured from the rising / falling edge crossing of the nominal Vih value on CANH to the falling (Vcmos_il_max) / rising
(Vcmos_ih_min) edge of RxD. This parameter is tested by applying a square wave signal to CANH. The minimum slew rate for the bus rising
and falling edges is 50 V/ms. The low level on bus is always 0 V. For normal mode and high−speed mode testing the high level on bus is 4 V.
For HVWU mode testing the high level on bus is V

17.Tested on 14 Pin package only.

BAT

− 2 V .

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8

NCV7356

BUS LOADING REQUIREMENTS

Characteristic Symbol Min Typ Max Unit

Number of System Nodes − 2 − 32 −
Network Distance Between Any Two ECU Nodes Bus Length − − 60 m
Node Series Inductor Resistance (If required) R
Ground Offset Voltage V
Ground Offset V oltage, Low Battery V
Device Capacitance (Unit Load) C
Network Total Capacitance C
Device Resistance (Unit Load) R
Device Resistance (Min Load) R
Network Total Resistance R

ind

goff

gofflowbat

ul

tl

ul

min

tl

Network Time Constant (Note 18) t 1.0 − 4.0 ms
Network Time Constant in High−Speed Mode t − − 1.5 ms
High−Speed Mode Network Resistance to GND R

load

18.The network time constant incorporates the bus wiring capacitance. The minimum value is selected to limit radiated emission. The maximum
value is selected to ensure proper communication modes. Not all combinations of R and C are possible.

− − 3.5 W

−

−

− 0.1 x V

BAT

1.5 V

0.7 V
135 150 300 pF
396 − 19000 pF

6435 6490 6565 W
2000 − − W

200 − 4596 W

75 − 135 W

Vihmax + V

V

goff

V

TxD

50%

CANH

max

1 V

V

RxD

50%

TIMING DIAGRAMS

t

T

t

R

t

D

t

t

t

F

t

DR

Figure 3. Input/Output Timing

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9

t

V

Vih + V

V

CANH

goff

RxD

t

WU

NCV7356

TIMING DIAGRAMS

tWU < t

WUF

t

WUF

t

t

WU

wake−up

interrupt

t

V

V

TxD

50%

CANH

V

V

RxD

Figure 4. Wake−Up Filter Time Delay

t

ih

t

50%

Figure 5. Receive Blanking Time

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10

t

t

RB

NCV7356

FUNCTIONAL DESCRIPTION

TxD Input Pin

TxD Polarity

• TxD = logic 1 (or floating) on this pin produces an

undriven or recessive bus state (low bus voltage)

• TxD = logic 0 on this pin produces either a bus normal

or a bus high voltage dominant state depending on the
transceiver mode state (high bus voltage)

If the TxD pin is driven to a logic low state while the sleep
mode (Mode 0 = 0 and Mode 1 = 0) is activated, the
transceiver can not drive the CANH pin to the dominant
state.

The transceiver provides an internal pullup current on the
TxD pin which will cause the transmitter to default to the
bus recessive state when TxD is not driven.

TxD input signals are standard CMOS logic levels.

Timeout Feature

In case of a faulty blocked dominant TxD input signal,
the CANH output is switched off automatically after the
specified TxD timeout reaction time to prevent a dominant
bus.

The transmission is continued by next TxD L to H
transition without delay.

MODE0 and MODE1 Pins

The transceiver provides a weak internal pulldown
current on each of these pins which causes the transceiver
to default to sleep mode when they are not driven. The
mode input signals are standard CMOS logic level for

3.3 V and 5 V supply voltages.

MODE0 MODE1 Mode

L L Sleep Mode

H L High−Speed Mode

L H High Voltage Wake−Up

H H Normal Mode

Sleep Mode

Transceiver is in low power state, waiting for wake−up
via high voltage signal or by mode pins change to any state
other than 0,0. In this state, the CANH pin is not in the
dominant state regardless of the state of the TxD pin.

High−Speed Mode

This mode allows high−speed download with bit rates up
to 100 Kbit/s. The output wave shapingaping circuit is
disabled in this mode. Bus transmitter drive circuits for
those nodes which are required to communicate in
high−speed mode are able to drive reduced bus resistance
in this mode.

High Voltage Wake−Up Mode

This bus includes a selective node awake capability,
which allows normal communication to take place among
some nodes while leaving the other nodes in an undisturbed
sleep state. This is accomplished by controlling the signal
voltages such that all nodes must wake−up when they
receive a higher voltage message signal waveform. The
communication system communicates to the nodes
information as to which nodes are to stay operational
(awake) and which nodes are to put themselves into a non
communicating low power “sleep” state. Communication
at the lower, normal voltage levels shall not disturb the
sleeping nodes.

Normal Mode

Transmission bit rate in normal communication is
33 Kbits/s. In normal transmission mode the NCV7356
supports controlled waveform rise and overshoot times.
Waveform trailing edge control is required to assure that
high frequency components are minimized at the
beginning of the downward voltage slope. The remaining
fall time occurs after the bus is inactive with drivers off and
is determined by the RC time constant of the total bus load.

RxD Output Pin

Logic data as sensed on the single wire CAN bus.

RxD Polarity

• RxD = logic 1 on this pin indicates a bus recessive

state (low bus voltage)

• RxD = logic 0 on this pin indicates a bus normal or

high voltage bus dominant state

RxD in Sleep Mode

RxD does not pass signals to the microprocessor while in
sleep mode until a valid wake−up bus voltage level is
received or the MODE0 and MODE 1 pins are not 0, 0
respectively. When the valid wake−up bus voltage signal
awakens the transceiver, the RxD pin signals an interrupt
(logic 0). If there is no mode change within 250 ms (typ),
the transceiver re−enters the sleep mode.

When not in sleep mode all valid bus signals will be sent
out on the RxD pin.

RxD will be placed in the undriven or off state when in
sleep mode.

RxD Typical Load

Resistance: 2.7 kW

Capacitance: < 25 pF

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11

NCV7356

Bus LOAD Pin

Resistor ground connection with internal open−on−loss−
of−ground protection

When the ECU experiences a loss of ground condition,

this pin is switched to a high impedance state.

The ground connection through this pin is not interrupted
in any transceiver operating mode including the sleep
mode. The ground connection only is interrupted when
there is a valid loss of ground condition.

This pin provides the bus load resistor with a path to
ground which contributes less than 0.1 V to the bus offset
voltage when sinking the maximum current through one
unit load resistor. This path exists in all operating modes,
including the sleep mode.

The transceiver’s maximum bus leakage current
contribution to Vol from the LOAD pin when in a loss of
ground state is 50 mA over all operating temperatures and

3.5 < V

V

BAT

Vehicle Battery Voltage

< 27 V.

BAT

Input Pin

The transceiver is fully operational as described in the
Electrical Characteristics Table over the range 6.0 V <
V

< 18 V as measured between the GND pin and the

BAT

V

pin.

BAT

For 5.0 V < V

< 6.0 V, the bus operates in normal

Bat

mode with reduced dominant output voltage and reduced
receiver input voltage. High voltage wake−up is not
possible (dominant output voltage is the same as in normal
or high−speed mode).

The transceiver operates in normal mode when 18 V <
V

< 27 V at 85°C for one minute.

Bat

For 0 < V

< 4.0 V, the bus is passive (not driven

BAT

dominant) and RxD is undriven (high), regardless of the
state of the TxD pin (undervoltage lockout).

CAN BUS

Input/Output Pin
Wave Shaping in Normal and High Voltage Wake−Up

Mode

Wave shaping is incorporated into the transmitter to
minimize EMI radiated emissions. An important
contributor to emissions is the rise and fall times during
output transitions at the “corners” of the voltage waveform.
The resultant waveform is one half of a sin wave of

frequency 50−65 kHz at the rising waveform edge and one
quarter of this sin wave at falling or trailing edge.

Wave Shaping in High−Speed Mode

Wave shaping control of the rising and falling waveform
edges are disabled during high−speed mode. EMI
emissions requirements are waived during this mode. The
waveform rise time in this mode is less than 1.0 ms.

Short Circuits

If the CAN BUS pin is shorted to ground for any duration
of time, the current is limited as specified in the Electrical
Characteristics Table until an overtemperature shutdown
circuit disables the output high side drive source transistor
preventing damage to the IC.

Loss of Ground

In case of a valid loss of ground condition, the LOAD pin
is switched into high impedance state. The CANH
transmission is continued until the undervoltage lock out
voltage threshold is detected.

Loss of Battery

In case of loss of battery (V

= 0 or open) the

BAT

transceiver does not disturb bus communication. The
maximum reverse current into the power supply system
(V

) doesn’t exceed 500 mA.

BAT

INH Pin (14 pin package only)

The INH pin is a high−voltage highside switch used to
control the ECU’s regulated microcontroller power supply.
After power−on, the transceiver automatically enters an
intermediate standby mode, the INH output will go high
(up to V

) turning on the external voltage regulator. The

BAT

external regulator provides power to the ECU. If there is no
mode change within 250 ms (typ), the transceiver re−enters
the sleep mode and the INH output goes to logic 0
(floating).

When the transceiver has detected a valid wake−up
condition (bus HVWU traffic which exceeds the wake−up
filter time delay) the INH output will become high (up to
V

) again and the same procedure starts as described

BAT

after power−on. In case of a mode change into any active
mode, the sleep timer is stopped and INH stays high (up to
V

). If the transceiver enters the sleep mode, INH goes

BAT

to logic 0 (floating) after 250 ms (typ) when no wake−up
signal is present.

http://onsemi.com

12

NCV7356

HVWU Mode

MODE0&1 => Low

after 250 ms

−> no mode change

−> no valid wake−up

MODE0

low

High−Speed Mode

MODE0

high

Normal Mode

MODE0

high

MODE0/1 => High

(If V

CC_ECU

on)

Sleep Mode

MODE1

high

MODE1

low

MODE1

high

MODE0/1

low

MODE0/1 => High

V

standby

BAT

RxD

high/low

wake−up

request

from Bus

V

on

BAT

CAN

(1)

float

MODE0/1

(1)

low after HVWU, high after V

Figure 6. State Diagram, 8 Pin Package

low

BAT

on & V

CAN

float

CCECU

present

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13

NCV7356

HVWU Mode

MODE0&1 => Low

after 250 ms

−> no mode change

−> no valid wake−up

MODE0

low

High−Speed Mode

MODE0

high

Normal Mode

MODE0

high

MODE0/1 => High

(If V

CC_ECU

on)

Sleep Mode

MODE1

high

MODE1

low

MODE1

high

INH

V

INH

V

INH

V

BAT

BAT

BAT

MODE0/1

low

MODE0/1 => High

V

standby

BAT

INH

V

S

RxD

high/low

wake−up

request

from Bus

V

on

BAT

CAN

(1)

float

MODE0/1

low

(1)

low after HVWU, high after V

Figure 7. State Diagram, 14 Pin Package

BAT

INH/CAN

on & V

floating

CCECU

present

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14

NCV7356

MRA4004T3

V

BAT

*
+

Voltage Regulator

+5 V

+

V

BAT_ECU

V

BAT

CAN Controller

RxD

MODE0

MODE1

TxD

2.7 kW

4

NCV7356

2

3

1

100 nF

ECU Connector to

Single Wire CAN Bus

100 pF

V

BAT

1 k

5

47 mH

7

CANH

6.49 kW

100 pF

6

LOAD

8

ESD Protection −
NUP1105L

*Recommended capacitance at V

Figure 8. Application Circuitry, 8 Pin Package

GND

> 1.0 mF (immunity to ISO7637/1 test pulses)

BAT_ECU

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15

NCV7356

MRA4004T3

V

BAT

*
+

Voltage Regulator

+5 V

+

V

BAT_ECU

V

BAT

CAN Controller

RxD

MODE0

MODE1

TxD

2.7 kW

INH

9

5

3

4

2

V

BAT

10

NCV7356

1, 7, 8, 14

100 nF

100 pF

12

11

CANH

LOAD

ECU Connector to

Single Wire CAN Bus

1 k

47 mH

6.49 kW

100 pF

ESD Protection −
NUP1105L

*Recommended capacitance at V

Figure 9. Application Circuitry, 14 Pin Package

GND

> 1.0 mF (immunity to ISO7637/1 test pulses)

BAT_ECU

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16

SOIC−8 Thermal Information

Parameter

Junction−to−Lead (psi−JL7, Y
Junction−to−Ambient (R

19.1 oz copper, 53 mm2 coper area, 0.062″ thick FR4.

20.1 oz copper, 716 m m2 coper area, 0.062″ thick FR4.

with and without Mold Compound

q

Package Construction

) or Pins 6−7 57 51 °C/W

JL8

, qJA) 187 128 °C/W

JA

NCV7356

Test Condition, Typical Value

Min Pad Board

(Note 19)

Various copper areas used

for heat spreading

1, Pad Board

(Note 20)

Unit

Lead #1

Active Area (red)

Figure 10. Internal constrution of the package

simulation.

190
180
170
160
150

(°C/W)

140

JA

q

130
120
110
100

0 100 200 300 400 500 600 800

1.0 oz. Cu

2.0 oz. Cu

Copper Area (mm2)

Figure 11. Min pad is shown as the red traces.

1, pad includes the yellow area. Internal

construction is shown for later reference.

700

Figure 12. SOIC−8, qJA as a Function of the Pad Copper

Area Including Traces,

Board Material

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17

NCV7356

Junction

R

R

R

R

Table 1. SOIC−8 Thermal RC Network Models*

2

53 mm

Cauer Network Foster Network

C’s C’s Units Tau Tau Units

5.86E−06 5.86E−06 W−s/C 1.00E−06 1.00E−06 sec

2.29E−05 2.29E−05 W−s/C 1.00E−05 1.00E−05 sec

6.98E−05 6.97E−05 W−s/C 1.00E−04 1.00E−04 sec

3.68E−04 3.68E−04 W−s/C 1.99E−04 1.99E−04 sec

3.75E−04 3.74E−04 W−s/C 1.00E−03 1.00E−03 sec

1.57E−03 1.56E−03 W−s/C 1.64E−02 1.64E−02 sec

2.05E−02 2.24E−02 W−s/C 5.60E−01 5.60E−01 sec

9.13E−02 7.35E−02 W−s/C 4.50E+00 4.50E+00 sec

2.64E−01 1.22E+00 W−s/C 7.61E+01 7.61E+01 sec

1.66E+01 9.74E+00 W−s/C 3.00E+01 3.00E+01 sec
R’s R’s R’s R’s

0.22 0.22 C/W 1.30E−01 1.30E−01 C/W

0.50 0.50 C/W 2.82E−01 2.82E−01 C/W

1.30 1.30 C/W 8.91E−01 8.91E−01 C/W

1.80 1.79 C/W 0.17 0.18 C/W

0.95 0.96 C/W 1.88 1.88 C/W

7.43 7.37 C/W 7.15 7.24 C/W

31.19 31.59 C/W 19.80 16.27 C/W

59.97 47.70 C/W 30.1 54.7 C/W

75.79 28.63 C/W 14.1 23.3 C/W

4.41 6.15 C/W 109.0 21.3 C/W

*Bold face items in the Cauer network above, represent the package without the external thermal system. The Bold face items in the Foster network

are computed by the square root of time constant R(t) = 130 * sqrt(time(sec)). The constant is derived based on the active area of the device
with silicon and epoxy at the interface of the heat generation.

The Cauer networks generally have physical
significance and may be divided between nodes to separate
thermal behavior due to one portion of the network from
another. The Foster networks, though when sorted by time
constant (as above) bear a rough correlation with the Cauer
networks, are really only convenient mathematical models.
Both Foster and Cauer networks can be easily implemented

719 mm

2

Copper Area 53 mm2 719 mm

2

Copper Area

using circuit simulating tools, whereas Foster networks
may be more easily implemented using mathematical tools
(for instance, in a spreadsheet program), according to the
following formula:

R(t) +

n

S

i + 1

−tńtau

ǒ

R

1−e

i

i

Ǔ

Junction

1

C

1

Time constants are not simple RC products.
Amplitudes of mathematical solution are not the resistance values.

2

C

2

3

C

3

Figure 13. Grounded Capacitor Thermal Network (“Cauer” Ladder)

R

1

C

1

Each rung is exactly characterized by its RC−product time constant; Am­plitudes are the resistances

R

2

C

2

R

3

C

3

Figure 14. Non−Grounded Capacitor Thermal Ladder (“Foster” Ladder)

http://onsemi.com

18

n

C

n

Ambient

(thermal ground)

R

n

C

n

Ambient

(thermal ground)

NCV7356

1000

Cu Area = 53 mm2 1.0 oz.

100

10

(°C/W)

q

R

1

0.1

0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000
Time (s)

Figure 15. SOIC−8 Single Pulse Heating Curve

1000

D = 0.50

100

0.20

0.10

10

(°C/W)
R

0.05

q

0.02

Cu Area = 93 mm2 1.0 oz.

Cu Area = 719 mm

2

1.0 oz.

1

0.01

0.1

0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000

Single Pulse

Time (s)

Figure 16. SOIC−8 Thermal Duty Cycle Curves on 1, Spreader Test Board

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19

SOIC−14 Thermal Information

150

(

C/W)

0

Parameter

Junction−to−Lead (psi−JL8, Y
Junction−to−Ambient (R

21.1 oz copper, 94 mm2 coper area, 0.062″ thick FR4.

22.1 oz copper, 767 m m2 coper area, 0.062″ thick FR4.

q

) 30 30 °C/W

JL8

, qJA) 122 84 °C/W

JA

NCV7356

Test Condition, Typical Value

Min Pad Board

(Note 21)

1, Pad Board

(Note 22)

Unit

Figure 18. Min pad is shown as the red traces.

1 inch pad includes the yellow area. Pin 1, 7, 8

Figure 17. Internal construction of the package

simulation.

and 14 are connected to flag internally to the

package and externally to the heat spreading area.

140
130
120
110

°

100

JA

q

90
80
70
60

2.0 oz. Cu

0 100 200 300 400 500 600 800

1.0 oz. Cu

700

Copper Area (mm2)

Figure 19. SOIC−14, qJA as a Function of the Pad Copper Area Including Traces,

Board Material

Sim 1.0 oz.
Sim 2.0 oz.

90

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20

NCV7356

Junction

R

R

R

R

Table 2. SOIC−14 Thermal RC Network Models*

2

96 mm

Cauer Network Foster Network

C’s C’s Units Tau Tau Units

3.12E−05 3.12E−05 W−s/C 1.00E−06 1.00E−06 sec

1.21E−04 1.21E−04 W−s/C 1.00E−05 1.00E−05 sec

3.53E−04 3.50E−04 W−s/C 1.00E−04 1.00E−04 sec

1.19E−03 1.19E−03 W−s/C 0.028 0.001 sec

4.86E−03 5.05E−03 W−s/C 0.001 0.009 sec

2.17E−02 7.16E−03 W−s/C 0.280 0.047 sec

8.94E−02 3.51E−02 W−s/C 2.016 0.875 sec

0.304 0.262 W−s/C 16.64 7.53 sec

1.71 2.43 W−s/C 59.47 68.4 sec

R’s R’s R’s R’s

0.041 0.041 °C/W 2.44E−02 2.44E−02 °C/W

0.095 0.096 °C/W 5.28E−02 5.28E−02 °C/W

0.279 0.281 °C/W 1.67E−01 1.67E−01 °C/W

1.154 0.995 °C/W 3.5 0.7 °C/W

5.621 6.351 °C/W 0.7 0.1 °C/W

13.180 1.910 °C/W 8.7 5.8 °C/W

23.823 21.397 °C/W 15.9 16.4 °C/W

53.332 27.150 °C/W 31.9 27.1 °C/W

24.794 25.276 °C/W 61.3 29.0 °C/W

*Bold face items in the Cauer network above, represent the package without the external thermal system. The Bold face items in the Foster network

are computed by the square root of time constant R(t) = 24.4 * sqrt(time(sec)). The constant is derived based on the active area of the device
with silicon and epoxy at the interface of the heat generation.

The Cauer networks generally have physical
significance and may be divided between nodes to separate
thermal behavior due to one portion of the network from
another. The Foster networks, though when sorted by time
constant (as above) bear a rough correlation with the Cauer
networks, are really only convenient mathematical models.
Both Foster and Cauer networks can be easily implemented

2

767 mm

411 W−s/C 92.221 sec

0.218 °C/W 4.3 °C/W

Copper Area 96 mm

2

767 mm

2

Copper Area

using circuit simulating tools, whereas Foster networks
may be more easily implemented using mathematical tools
(for instance, in a spreadsheet program), according to the
following formula:

R(t) +

n

S

i + 1

−tńtau

ǒ

R

1−e

i

i

Ǔ

Junction

1

C

1

Time constants are not simple RC products.
Amplitudes of mathematical solution are not the resistance values.

Figure 20. Grounded Capacitor Thermal Network (“Cauer” Ladder)

R

1

C

1

Each rung is exactly characterized by its RC−product time constant; Am­plitudes are the resistances

2

C

2

R

2

C

2

3

C

3

R

3

C

3

Figure 21. Non−Grounded Capacitor Thermal Ladder (“Foster” Ladder)

http://onsemi.com

21

n

C

n

Ambient

(thermal ground)

R

n

C

n

Ambient

(thermal ground)

NCV7356

1000

0

R

(

C/W)

1000

Cu Area = 96 mm2 1.0 oz.

100

2

Cu Area = 767 mm

2

1.0 oz. 1S2P

(°C/W)

q

R

10

Cu Area = 767 mm

1

0.1

0.01

0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000
Time (s)

Figure 22. SOIC−14 Single Pulse Heating

D = 0.50

0.20

100

0.10

0.05

10

°

0.01

q

Cu Area = 717 mm

1

2

1.0 oz.

1.0 oz.

0.1

0.01

0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 100
PULSE DURATION (sec)

Figure 23. SOIC−14 Thermal Duty Cycle Curves on 1, Spreader Test Board

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22

−Y−

−Z−

NCV7356

PACKAGE DIMENSIONS

SOIC−8

D SUFFIX

CASE 751−07

ISSUE AG

NOTES:

−X−
A

58

B

1

S

0.25 (0.010)

4

M

M

Y

K

G

N

C

SEATING
PLANE

0.10 (0.004)

H

D

0.25 (0.010) Z

M

Y

SXS

X 45

_

M

J

1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.

6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.

MILLIMETERS

DIMAMIN MAX MIN MAX

4.80 5.00 0.189 0.197

B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.053 0.069
D 0.33 0.51 0.013 0.020
G 1.27 BSC 0.050 BSC
H 0.10 0.25 0.004 0.010

J 0.19 0.25 0.007 0.010
K 0.40 1.27 0.016 0.050
M 0 8 0 8

____

N 0.25 0.50 0.010 0.020

S 5.80 6.20 0.228 0.244

INCHES

SOLDERING FOOTPRINT*

1.52

0.060

7.0

0.275

0.6

0.024

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.

4.0

0.155

1.270

0.050

SCALE 6:1

mm

ǒ

inches

Ǔ

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23

SOIC−14

−T−

SEATING
PLANE

NCV7356

PACKAGE DIMENSIONS

D SUFFIX

CASE 751A−03

ISSUE G

NOTES:

1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

−A−

14

1

G

D 14 PL

0.25 (0.010) A

8

−B−

P 7 PL

M

0.25 (0.010) B

7

C

R X 45

K

M

S

B

T

S

M

_

M

J

3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.

5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.

F

DIM MIN MAX MIN MAX

A 8.55 8.75 0.337 0.344
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.054 0.068
D 0.35 0.49 0.014 0.019

F 0.40 1.25 0.016 0.049

G 1.27 BSC 0.050 BSC

J 0.19 0.25 0.008 0.009
K 0.10 0.25 0.004 0.009
M 0 7 0 7

____

P 5.80 6.20 0.228 0.244
R 0.25 0.50 0.010 0.019

INCHESMILLIMETERS

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice

to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any
liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over
time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under
its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body,
or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees,
subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of
personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.
SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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For additional information, please contact your
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NCV7356/D