ON Semiconductor NCV317 Technical data

查询LM317BD2TG供应商
LM317, NCV317
1.5 A Adjustable Output, Positive Voltage Regulator
The LM317 is an adjustable 3−terminal positive voltage regulator
1.2 V to 37 V. This voltage regulator is exceptionally easy to use and requires only two external resistors to set the output voltage. Further, it employs internal current limiting, thermal shutdown and safe area compensation, making it essentially blow−out proof.
The LM317 serves a wide variety of applications including local, on card regulation. This device can also be used to make a programmable output regulator, or by connecting a fixed resistor between the adjustment and output, the LM317 can be used as a precision current regulator.
Features
Output Current in Excess of 1.5 A
Output Adjustable between 1.2 V and 37 V
Internal Thermal Overload Protection
Internal Short Circuit Current Limiting Constant with Temperature
Output Transistor Safe−Area Compensation
Floating Operation for High Voltage Applications
Available in Surface Mount D
Transistor Package
Eliminates Stocking many Fixed Voltages
Pb−Free Packages are Available
2
PAK−3, and Standard 3−Lead
http://onsemi.com
D2PAK−3
D2T SUFFIX
2
1
3
Heatsink surface (shown as terminal 4 in
case outline drawing) is connected to Pin 2.
1
2
3
Pin 1. Adjust
2. V
3. V
CASE 936
TO−220
T SUFFIX
CASE 221A
out in
V
in
Cin*
0.1 mF
**Cin is required if regulator is located an appreciable distance from power supply filter.
**C
is not needed for stability, however, it does improve transient response.
O
V
+ 1.25Vǒ1 )
out
Since I
is controlled to less than 100 mA, the error associated with this term is
Adj
negligible in most applications.
I
Adj
LM317
Adjust
R
2
R
R
2
1
Ǔ
 )I
Adj
V
out
R
1
240
+
CO**
1.0 mF
R
2
Figure 1. Standard Application
Heatsink surface connected to Pin 2.
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet.
DEVICE MARKING INFORMATION
See general marking information in the device marking section on page 10 of this data sheet.
© Semiconductor Components Industries, LLC, 2005
August, 2005 − Rev. 8
1 Publication Order Number:
LM317/D
LM317, NCV317
MAXIMUM RATINGS
Rating Symbol Value Unit
Input−Output Voltage Differential VI−V
O
Power Dissipation
Case 221A
TA = +25°C P Thermal Resistance, Junction−to−Ambient Thermal Resistance, Junction−to−Case
D
q
JA
q
JC
Case 936 (D2PAK−3)
TA = +25°C P Thermal Resistance, Junction−to−Ambient
Thermal Resistance, Junction−to−Case Operating Junction Temperature Range T Storage Temperature Range T
D
q
JA
q
JC
J
stg
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.
ELECTRICAL CHARACTERISTICS (V
I−VO
= 5.0 V; I
= 0.5 A for D2T and T packages; TJ = T
O
low
to T
high
(Note 2); unless otherwise noted.)
Characteristics Figure Symbol Min Typ Max Unit
Line Regulation (Note 3), TA = +25°C, 3.0 V ≤ VI−VO 40 V 1 Reg Load Regulation (Note 3), TA = +25°C, 10 mA ≤ IO I
max
2 Reg VO 5.0 V VO 5.0 V
Thermal Regulation, TA = +25°C (Note 4), 20 ms Pulse Reg Adjustment Pin Current 3 I Adjustment Pin Current Change, 2.5 V ≤ VI−VO 40 V,
10 mA ≤ IL I
max
, PD P
max
Reference Voltage, 3.0 V ≤ VI−VO 40 V,
10 mA ≤ IO I
max
, PD P
max
1, 2
3 V
DI
Line Regulation (Note 3), 3.0 V ≤ VI−VO 40 V 1 Reg Load Regulation (Note 3), 10 mA ≤ IO I
max
2 Reg VO 5.0 V VO 5.0 V
Temperature Stability (T Minimum Load Current to Maintain Regulation (VI−VO = 40 V) 3 I Maximum Output Current
VI−VO 15 V, PD P VI−VO = 40 V, PD P
TJ T
low
T Package
max,
, TA = +25°C, T Package
max
) 3 T
high
Lmin
3 I
line
load
therm
Adj
Adj
ref
line
load
S
max
0.01 0.04 %/V
5.0
0.1
0.03 0.07 % VO/W
50 100
0.2 5.0
1.2 1.25 1.3 V
0.02 0.07 % V
20
0.3
0.7 % V
3.5 10 mA
1.5
0.15
2.2
0.4 RMS Noise, % of VO, TA = +25°C, 10 Hz ≤ f ≤ 10 kHz N 0.003 % V Ripple Rejection, VO = 10 V, f = 120 Hz (Note 5)
Without C C
Long−Term Stability, TJ = T
= 10 mF
Adj
Adj
(Note 6), TA = +25°C for
high
4 RR
66
65 80
3 S 0.3 1.0 %/1.0 k
Endpoint Measurements
Thermal Resistance Junction−to−Case, T Package
1. T
to T
low
NCV317BT, BD2T.
2. I
max
3. Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account
= 0° to +125°C, for LM317T, D2T. T
high
= 1.5 A, P
max
= 20 W
low
to T
= −40° to +125°C, for LM317BT, BD2T, T
high
R
q
JC
5.0 °C/W to T
low
separately. Pulse testing with low duty cycle is used.
4. Power dissipation within an IC voltage regulator produces a temperature gradient on the die, affecting individual IC components on the die. These effects can be minimized by proper integrated circuit design and layout techniques. Thermal Regulation is the effect of these temperature gradients on the output voltage and is expressed in percentage of output change per watt of power change in a specified time.
5. C
, when used, is connected between the adjustment pin and ground.
Adj
6. Since Long−Term Stability cannot be measured on each device before shipment, this specification is an engineering estimate of average stability from lot to lot.
40 Vdc
Internally Limited W
65 °C/W
5.0 °C/W
Internally Limited W
70 °C/W
5.0 °C/W
− 55 to +150 °C
− 65 to +150 °C
(Note 1); I
0.5
25
max
and P
mV
% V
mA mA
70
1.5
mV
% V
A
dB
Hrs.
= −55° to +150°C, for
high
max
O
O O
O
http://onsemi.com
2
310 310 230 120
Adj
125 k
135
12.4 k
LM317, NCV317
5.6 k
6.7 k
5.0 pF
12 k
6.8 k
510
170
160
200
6.3 V
13 k
6.3 V
V
in
6.3 V
190
*
*Pulse testing required.
*1% Duty Cycle *is suggested.
3.6 k 5.8 k 110 5.1 k
Figure 2. Representative Schematic Diagram
V
CC
V
IH
V
IL
V
C
0.1 mF
in
30pF
30pF
2.4 k
12.5 k
This device contains 29 active transistors.
LineRegulation(%ńV) +
V
in
LM317
out
Adjust
R
I
Adj
1
240
1%
|VOH–VOL|
|VOL|
+
C
O
1.0 mF
x100
105
4.0
0.1
V
out
Adjust
V
OH
V
OL
R
L
R
2
1%
Figure 3. Line Regulation and DI
http://onsemi.com
3
/Line Test Circuit
LM317, NCV317
V
I
C
in
V
0.1 mF
in
Load Regulation (mV) = V
V
I
C
in
LM317
I
Adj
Adjust
R
2
out
R
I
L
240
1
1%
V
1%
(min Load) − V
O
(max Load) Load Regulation (% VO) = x 100
O
Figure 4. Load Regulation and DI
V
in
0.1 mF
LM317
I
Adj
Adjust
V
(min Load)
R
L
(max Load)
*
+
C
1.0 mF
O
R
L
(min Load)
O
(max Load)
V
O
*Pulse testing required.
*1% Duty Cycle is suggested.
V
(min Load) − V
O
(max Load)
O
VO (min Load)
/Load Test Circuit
Adj
V
out
240
R
1
1%
I
L
V
ref
R
L
+
C
1.0 mF
O
V
O
24 V
14 V
f = 120 Hz
* Pulse testing required.
* 1% Duty Cycle is suggested.
V
in
C
0.1 mF
in
I
SET
R
2
1%
To Calculate R2: V
To Calculate R2: Assume I
= I
out
Figure 5. Standard Test Circuit
V
LM317
R
2
Adjust
1.65 k 1%
out
240
R
1
1%
+
C
10 mF
Adj
SET R2
SET
+ 1.250 V
= 5.25 mA
D1* 1N4002
C
R
+
L
1.0 mF
O
V
= 10 V
out
V
O
*D1 Discharges C
if output is shorted to Ground.
Adj
Figure 6. Ripple Rejection Test Circuit
http://onsemi.com
4
Loading...
+ 8 hidden pages