ON Semiconductor NCP3163, NCV3163 Technical data

NCP3163, NCV3163

8

3.4 A, Step−Up/Down/
Inverting 50−300 kHz
Switching Regulator

The NCP3163 Series is a performance enhancement to the popular
MC33163 and MC34163 monolithic DC−DC converters. These
devices consist of an internal temperature compensated reference,
comparator, controlled duty cycle oscillator with an active current
limit circuit, driver and high current output switch. This controller was
specifically designed to be incorporated in step−down, step−up, or
voltage−inverting applications with a minimum number of external
components. The NCP3163 comes in an exposed pad package which
can greatly increase the power dissipation of the built in power switch.

Features

• Output Switch Current in Excess of 3.0 A

• 3.4 A Peak Switch Current

• Frequency is Adjustable from 50 kHz to 300 kHz

• Operation from 2.5 V to 40 V Input

• Externally Adjustable Operating Frequency

• Precision 2% Reference for Accurate Output Voltage Control

• Driver with Bootstrap Capability for Increased Efficiency

• Cycle−by−Cycle Current Limiting

• Internal Thermal Shutdown Protection

• Low Voltage Indicator Output for Direct Microprocessor Interface

• Exposed Pad Power Package

• Low Standby Current

• NCV Prefix for Automotive and Other Applications Requiring Site

and Control Changes

• These are Pb−Free Devices

Current

8

V

in

7

+

V

C

in

CC

6

Oscillator

Limit

−

+

9

10

11

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MARKING

DIAGRAMS

16

1

SOIC−16W

EXPOSED PAD

PW SUFFIX

CASE 751AG

18

1

NCx3163x = Specific Device Code

A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G or G = Pb−Free Package

(Note: Microdot may be in either location)

18−LEAD DFN

MN SUFFIX

CASE 505

16

NCx3163yPW

AWLYYWWG

1

11

NCP3163y

AWLYYWW G

G

x = P or V
y = blank or B

ORDERING INFORMATION

See detailed ordering and shipping information in the package
dimensions section on page 18 of this data sheet.

5

Thermal

4

3

2

LVI

+
+

−

1

+
+

−

R

S

V

CC

(Bottom View)

Figure 1. Typical Buck Application Circuit

© Semiconductor Components Industries, LLC, 2007

January, 2007 − Rev. 4

Q

V

CC

12

13

14

15

16

V

out

+

C

O

1 Publication Order Number:

*For additional information on our Pb−Free strategy

and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.

NCP3163/D

NCP3163, NCV3163

Thermal

+
+

−

Current

Limit

−

+

45 k

+
+

−

1.25 V

1.125 V

(Bottom View)

R

Q

S

Latch

V

CC

2.0 mA

Feedback

Comparator

15 k

9

Driver Collector

10

Switch Collector

11

Q1

Q2

12

60

13

14

Switch Emitter

15

7.0 V

V

CC

16

Bootstrap Input

+

= Sink Only

−

Positive True Logic

Shutdown

I

PKsense

R

SC

V

CC

Timing Capacitor

C

T

R

DT

Gnd

Voltage Feedback 1

Voltage Feedback 2

LVI Output

0.25 V

8

7

V

CC

6

Oscillator

5

4

3

2

1

LVI

Figure 2. Representative Block Diagram

PIN FUNCTION DESCRIPTION

SOIC16 DFN18 PIN NAME DESCRIPTION

1 15 LVI Output This pin will sink current when FB1 and FB2 are less than the LVI threshold (Vth).
2 16 Voltage Feedback 2 Connecting this pin to a resistor divider off of the output will regulate the application

3 17 Voltage Feedback 1 Connecting this pin directly to the output will regulate the device to 5.05 V.
4 18 GND Ground pin for all internal circuits and power switch.
6 1 Timing Capacitor Connect a capacitor to this pin to set the frequency. The addition of a parallel resis-

7 3 V

CC

8 4 Ipk Sense When (VCC−V

9 5 Drive Collector Voltage driver collector
10,11 6,7,8,9 Switch Collector Internal switch transistor collector
14,15 10,11,12,13 Switch Emitter Internal switch transistor emitter

16 14 Bootstrap Input Connect this pin to VCC for operation at low VCC levels. For some topologies, a

5,12,13 2 No Connect These pins have no connection.

Exposed

Pad

Exposed

Pad

Exposed Pad The exposed pad beneath the package must be connected to GND (pin 4). Addi-

according to the V

design equation in Figure 22.

out

tor will decrease the maximum duty cycle and increase the frequency.
Power pin for the IC.

) > 250 mV the circuit resets the output driver on a pulse by

pulse basis.

IPKsense

series resistor and capacitor can be utilized to improve the converter efficiency.

tionally, using proper layout techniques, the exposed pad can greatly enhance the
power dissipation capabilities of the NCP3163.

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2

NCP3163, NCV3163

MAXIMUM RATINGS (Note 1)

Rating

Power Supply Voltage V
Switch Collector Voltage Range V
Switch Emitter Voltage Range V
Switch Collector to Emitter Voltage V
Switch Current I
Driver Collector Voltage (Pin 8) V
Driver Collector Current (Pin 8) I
Bootstrap Input Current Range I
Current Sense Input Voltage Range V
Feedback and Timing Capacitor Input Voltage Range V
Low Voltage Indicator Output Voltage Range V
Low Voltage Indicator Output Sink Current I

Power Dissipation and Thermal Characteristics

Thermal Characteristics

Thermal Resistance, Junction−to−Case

Thermal Resistance, Junction−to−Air
Storage Temperature Range T
Maximum Junction Temperature T
Operating Ambient Temperature (Note 3)

NCP3163PW

NCP3163BPW

NCV3163PW

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.

1. This device series contains ESD protection and exceeds the following tests:
Human Body Model 1500 V per MIL−STD−883, Method 3015.
Machine Model Method 150 V.

2. This device contains latch−up protection and exceeds 100 mA per JEDEC Standard JESD78.

3. Maximum package power dissipation limits must be observed. Maximum Junction Temperature must not be exceeded.

4. The pins which are not defined may not be loaded by external signals.

Symbol Value Unit

CC
CSW
ESW

CESW

SW

CC

CC

BST

IPKSNS

in

CLVI

CLVI

(VCC − 7.0) to (VCC + 1.0) V

0 to +40 V

−1.0 to +40 V

−2.0 to +40 V
+40 V

3.4 A

−1.0 to +40 V
150 mA

−100 to +100 mA

−1.0 to +7.0 V

−1.0 to +40 V

10 mA

°C/W

R

R

Jmax

q

JC

q

JA

stg

T

A

15
56

−65 to +150 °C
+150 °C

°C

0 to +70

−40 to +85

−40 to +125

LVI Output

Voltage Feedback 2

Voltage Feedback 1

GND

N/C

Timing Capacitor

V

Ipk Sense

PIN CONNECTIONS

116

2

3

4

5

6

7

CC

8

(Top View)

Bootstrap Input

15

14

13

12

11

10

9

Driver Collector

Switch
Emitter

N/C

Switch Collector

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Timing Capacitor

Driver Collector
Switch Collector
Switch Collector
Switch Collector
Switch Collector

3

1

N/C

V

Ipk Sense

2
3

CC

4

GND

5
6
7

EP Flag

8
9

Note: Pin 18 must be tied to EP Flag on PCB

18

17
16
15
14
13
12
11
10

GND
Voltage Feedback 1
Voltage Feedback 2

LVI Output
Bootstrap Input
Switch Emitter
Switch Emitter
Switch Emitter
Switch Emitter

NCP3163, NCV3163

ELECTRICAL CHARACTERISTICS (V

values T

is the operating ambient temperature range that applies (Note 7), unless otherwise noted.)

A

Characteristic

= 15 V, Pin 16 = VCC, CT = 270 pF, RT = 15 kW, for typical values TA = 25°C, for min/max

CC

Symbol Min Typ Max Unit

OSCILLATOR

Frequency

T

= 25°C, VCC = 15 V

A

Total Variation over V

= 2.5 V to 40 V and Temperature

CC

Charge Current I
Discharge Current I
Charge to Discharge Current Ratio I
Sawtooth Peak Voltage V
Sawtooth Valley Voltage V

f

OSC

chg

dischg

chg/Idischg

OSC(P)
OSC(V)

225
212

250
250

− 225 −

− 25 −

8.0 9.0 10.5 −

− 1.25 − V

− 0.55 − V

FEEDBACK COMPARATOR 1

Threshold Voltage

TA = 25°C
Total Variation over VCC = 2.5 V to 40 V and Temperature

Threshold Voltage

Line Regulation (VCC = 2.5 V to 40 V, TA = 25°C)

Input Bias Current (V

= 5.05 V) I

FB1

V

th(FB1)

REGline

IB(FB1)

(FB1)

4.9

4.85

5.05

−

− 0.008 0.03

− 100 200

5.25

FEEDBACK COMPARATOR 2

Threshold Voltage

TA = 25°C, VCC = 15 V
Total Variation over VCC = 2.5 V to 40 V and Temperature

Threshold Voltage

Line Regulation (VCC = 2.5 V to 40 V, TA = 25°C)

Input Bias Current (V

= 1.25 V) I

FB2

V

th(FB2)

REGline

IB(FB2)

(FB1)

1.225

1.213

1.25

−

1.275

1.287

− 0.008 0.03

− 0.4 − 0.4

CURRENT LIMIT COMPARATOR

Threshold Voltage

TA = 25°C
Total Variation over VCC = 2.5 V to 40 V, and Temperature

Input Bias Current (V

Ipk (Sense)

= 15 V) I

V

th(Sense)

IB(Sense)

−

225

250

−

− 1.0 20

DRIVER AND OUTPUT SWITCH (Note 6)

Saturation Voltage (ISW = 2.5 A, Pins 14, 15 grounded)

NCP3163 − Non−Darlington (R
NCV3163 − Non−Darlington (R

= 110 W to VCC, ISW/I

Pin 9

= 110 W to VCC, ISW/I

Pin 9

DRV
DRV

≈ 20)
≈ 20)

Darlington Connection (Pins 9, 10, 11 connected)
Collector Off−State Leakage Current (VCE = 40 V) I
Bootstrap Input Current Source (VBS = VCC + 5.0 V) I
Bootstrap Input Zener Clamp Voltage (IZ = 25 mA) V

V

CE(sat)

C(off)

source(DRV)

Z

−

−

−

0.6

0.6

1.0

− 0.02 100

0.5 2.0 4.0 mA

VCC + 6.0 VCC + 7.0 VCC + 9.0 V

LOW VOLTAGE INDICATOR

Input Threshold (V
Input Hysteresis (V
Output Sink Saturation Voltage (I
Output Off−State Leakage Current (VOH = 15 V) I

Increasing) V

FB2

Decreasing) V

FB2

= 2.0 mA) V

sink

th
H

OL(LVI)

OH

1.07 1.125 1.18 V

− 15 − mV

− 0.15 0.4 V

− 0.01 5.0

TOTAL DEVICE

Standby Supply Current (VCC = 2.5 V to 40 V, Pin 8 = VCC,

I

CC

− 6.0 10 mA

Pins 6, 14, 15 = GND, remaining pins open)

5. Maximum package power dissipation limits must be observed.

6. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.

7. T

=0°C for NCP3163 T

low

=−40°C for NCP3163B = + 85°C for NCP3163B

=+70°C for NCP3163

high

=−40°C for NCV3163 = + 125°C for NCV3163

275

kHz

288

mA
mA

V

5.2

%/V

mA

V

%/V

mA

mV

−

270

mA

V

1.0

1.2

1.4

mA

mA

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4

NCP3163, NCV3163

2.0

−2.0

300

250

200

150

FREQUENCY (kHz)

100

Rt = open

50

0

100 200 300 400 500 600 700

CT, TIMER CAPACITANCE (pF)

VCC = 15 V
TA = 25°C

Rt = 15 kW

Figure 3. Oscillator Frequency vs. Timer

Capacitance (C

VCC = 15 V
CT = 620 pF

0

4.0

2.0

−2.0

−4.0

)

T

VCC = 15 V
CT = 230 pF
RT = 20 kW

0

−4.0

, OSCILLATOR FREQUENCY CHANGE (%)Δ

−6.0

OSC

f

−55

−25 0 25 50 75 100 125
TA, AMBIENT TEMPERATURE (°C)

Figure 4. Oscillator Frequency Change vs.

Temperature when only C

140

120

100

80

, INPUT BIAS CURRENT (A)μ

IB

I

60

−55

−25 0 25 50 75 100 125

TA, AMBIENT TEMPERATURE (°C)

Figure 6. Feedback Comparator 1 Input Bias

Current vs. Temperature

is connected to Pin 6

T

VCC = 15 V
V

= 5.05 V Vth Max = 1275 mV

FB1

−6.0

−8.0

, OSCILLATOR FREQUENCY CHANGE (%)Δ

−10

OSC

f

−50

−25 0 25 50 75 100 125
TEMPERATURE (°C)

Figure 5. Oscillator Frequency Change vs.

Temperature when C

1300

VCC = 15 V

1280

1260

1240

1220

1200

, COMPARATOR 2 THRESHOLD VOLTAGE (mV)

th(FB2)

V

−55

−25 0 25 50 75 100 125

Figure 7. Feedback Comparator 2 Threshold

and RT are connected to Pin 6

T

Vth Typ = 1250 mV

Vth Min = 1225 mV

TA, AMBIENT TEMPERATURE (°C)

Voltage vs. Temperature

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5

NCP3163, NCV3163

A

5

V

2.8

VCC = 15 V

2.4

2.0

1.6

, BOOTSTRAP INPUT CURRENT SOURCE (m

1.2

−55 −25 0 25 50 75 100 125
TA, AMBIENT TEMPERATURE (°C)

source (DRV)

I

−0.4

−0.8

−1.2

, SOURCE SATURATION (V)

−1.6

CE (sat)

V

−2.0

0

Figure 8. Bootstrap Input Current

Source vs. Temperature

V

CC

Bootstrapped, Pin 16 = VCC + 5.0 V

Non−Bootstrapped, Pin 16 = V

0 0.8 2.4 3.2

IE, EMITTER CURRENT (A)

Pin 16 = VCC + 5.0 V

Darlington Configuration
Emitter Sourcing Current to GND
Pins 7, 8, 10, 11 = V
Pins 4, 5, 12, 13 = GND
TA = 25°C, (Note 2)

CC

1.6

CC

Figure 10. Output Switch Source Saturation

vs. Emitter Current

7.6

IZ = 25 mA

7.4

7.2

7.0

6.8

−55 −25 0 25 50 75 100 12

, BOOTSTRAP INPUT ZENER CLAMP VOLTAGE (

Z

V

TA, AMBIENT TEMPERATURE (°C)

Figure 9. Bootstrap Input Zener Clamp

Voltage vs. Temperature

1.2

Darlington, Pins 9, 10, 11 Connected

1.0

0.8

Grounded Emitter Configuration
Collector Sinking Current From V

0.6
Pins 7, 8 = VCC = 15 V

, SINK SATURATION (V)

CE (sat)

V

Pins 4, 5, 12, 13, 14, 15 = GND

0.4
TA = 25°C, (Note 2)

0.2

0

0 0.8 2.4 3.21.6

CC

Saturated Switch, R

GND

IC, COLLECTOR CURRENT (A)

= 110 W to V

Pin9

Figure 11. Output Switch Sink Saturation

vs. Collector Current

CC

0

GND

−0.4

−0.8

−1.2

, EMITTER VOLTAGE (V)

E

V

−1.6

−2.0

−55 −25 0 25 50 75 100 125

IC = 10 mA

IC = 10 mA

VCC = 15 V
Pins 7, 8, 9, 10, 16 = V
Pins 4, 6 = GND
Pin 14 Driven Negative

TA, AMBIENT TEMPERATURE (°C)

Figure 12. Output Switch Negative Emitter

Voltage vs. Temperature

0.5

0.4

0.3

0.2

CC

, OUTPUT SATURATION VOLTAGE (V)

V

OL (LVI)

0.1

0

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6

VCC=5 V
TA=25°C

0 2.0 4.0 6.0 8.0

I

, OUTPUT SINK CURRENT (mA)

sink

Figure 13. Low Voltage Indicator Output Sink

Saturation Voltage vs. Sink Current