NCP1523
s
3 MHz, 600 mA,
High−Efficiency, Adjustable
Output Voltage Step−down
Converter
The NCP1523 step−down PWM DC−DC converter is optimized for
portable applications powered from 1−cell Li−ion or 3 cell
Alkaline/NiCd/NiMH batteries. The device is available in an
adjustable output voltage from 0.9 V to 3.3 V. It uses synchronous
rectification to increase efficiency and reduce external part count. The
device also has a built−in 3 MHz (nominal) oscillator which reduces
component size by allowing use of a small inductor and capacitors.
NCP1523 is available in automatic switching PWM/PFM
(NCP1523FCT2G) improving system efficiency and in PWM mode
only (NCP1523BFCT2G) offering a very efficient load transient
solution.
Additional features include integrated soft−start, cycle−by−cycle
current limiting and thermal shutdown protection. The NCP1523 is
available in a space saving, 8 pin chip scale package.
Features
• Sources up to 600 mA
• 3 MHz Switching Frequency
• Up to 93% Efficiency
• Synchronous rectification for higher efficiency
• Thermal limit protection
• Shutdown current consumption of 0.3 A
• These are Pb−Free Devices
Special Features for NCP1523FCT2G
• Auto PFM/PWM mode solution
• High efficiency at light load
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A1
FLIP−CHIP−8
CASE 766AE
NCPxxxx = Device Code
A = Assembly Location
Y = Year
WW = Work Week
G = Pb−Free Package
A1
B1
C1
D1
Top View
(Bumps Below)
xxxx = 1523 or 523B
PIN CONNECTIONS
A2
PIN: A1 − GND
B2
C2
D2
MARKING
DIAGRAM
NCPxxxxG
AYWW
A1
A2 − V
IN
B1 − SW
B2 − EN
C1 − GND
C2 − ADJ
D1 − V
OUT
D2 − FB
Special Features for NCP1523BFCT2G
• Load Transient Highly Efficient Solution
• Very small Output Voltage Ripple
• Adjustable Output Voltage from 0.9 V to 3.3 V
Typical Applications
• Cellular Phones, Smart Phones and PDAs
• Digital Still Cameras
• MP3 Players and Portable Audio Systems
• Wireless and DSL Modems
• Portable Equipment
© Semiconductor Components Industries, LLC, 2007
February, 2007 − Rev. 2
ORDERING INFORMATION
Device Package Shipping
NCP1523FCT2G
(NCP1523)
NCP1523BFCT2G
(NCP1523B)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
1 Publication Order Number:
FLIP−CHIP−8
(Pb−Free)
FLIP−CHIP−8
(Pb−Free)
Tape & Reel
Tape & Reel
NCP1523/D
†
3000 /
3000 /
NCP1523
V
BATTERY
4.7 F
V
A2
GND
C1
V
IN
C
IN
A2
C1
A1
V
IN
GND
GND
V
SW
OUT
ADJ
B1
D1
C2
L
V
OUT
C
OUT
R1
OFF ON
B2
EN
FB
D2
R2
Figure 1. NCP1523 Typical Applications
TYPICAL APPLICATIONS
IN
Q1
Q2
Mode
Control
SW
B1
V
D1
2.2 H
4.7 F
OUT
Enable
GND
A1
EN
B2
I
Reference Voltage
Logic Control &
Thermal Shutdown
Figure 2. Simplified Block Diagram
LIMIT
Comp
ADJ
C2
R1
FB
D2
R2
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NCP1523
PIN FUNCTION DESCRIPTION
Pin Pin Name Type Description
A1 GND Power Ground Ground connection for the NFET Power Stage and the analog sections.
A2 V
B1 S
IN
W
B2 EN Digital Input Enable for Switching Regulator. This pin is active high. This pin contains an internal
C1 GND Power Ground Ground connection for the NFET Power Stage and the analog sections.
C2 ADJ Analog Input This pin is the compensation input. R1 is connected to this pin.
D1 V
OUT
D2 FB Analog Input Feedback voltage from the output of the power supply. This is the input to the error
MAXIMUM RATINGS
Minimum Voltage All Pins V
Maximum Voltage All Pins (Note 1) V
Maximum Voltage Enable, FB, SW V
Thermal Resistance, Junction−to−Air (Note 2)
Operating Ambient Temperature Range T
Storage Temperature Range T
Junction Operating Temperature T
Latch−up Current Maximum Rating TA = 85°C (Note 4) L
ESD Withstand Voltage (Note 3)
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. According to JEDEC standard JESD22−A108B
2. For the 8−Pin Chip Scale Package, the R
3. This device series contains ESD protection and exceeds the following tests:
Human Body Model (HBM) $2.0 kV per JEDEC standard: JESD22−A114
Machine Model (MM) $200 V per JEDEC standard: JESD22−A115
4. Latchup current maximum rating per JEDEC standard: JESD78.
Human Body Model
Machine Model
Power Input Power Supply Input for the PFET Power Stage and the Analog Sections of the IC.
Analog Output Connection from Power MOSFETs to the Inductor.
pulldown resistor.
Analog Input This pin is connected of the converter’s output. This is the sense of the output voltage.
amplifier.
Rating Symbol Value Unit
−0.3 V
7 V
VIN + 0.3 V
159 °C/W
−40 to 85 °C
−55 to 150 °C
−40 to 125 °C
"100 mA
2.0
V
R
MIN
MAX
MAX
JA
A
STG
J
U
ESD
200
is highly dependent of the PCB heatsink area. R
JA
= 159°C/W with 50 mm2 PCB heatsink area.
JA
kV
V
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NCP1523
ELECTRICAL CHARACTERISTICS FOR NCP1523
(Typical values are referenced to TA = +25°C, Minimum and Maximum values are referenced −40°C to +85°C ambient temperature,
unless otherwise noted, operating conditions VIN = 3.6 V, V
Symbol Rating Min Typ Max Unit
V
IN
V
UVLO
I
q
I
STB
F
OSC
I
LIM
V
REF
V
FBtol
V
FB
V
OUT
V
OUT
V
OUT
V
OUT
V
LOADREG
Input Voltage Range 2.7 5.5 V
Under Voltage Lockout (VIN Falling) 2.4 V
Quiescent Current (Light Load Mode) 60 95
Standby Current, EN Low 0.3 1.2
Oscillator Frequency 2.400 3 3.600 MHz
Peak Inductor Current 1200 mA
Feedback Reference Voltage 0.6 V
FB Pin Tolerance Overtemperature −3 3 %
Reference Voltage Line Regulation 0.1 %
Output Voltage Accuracy (Note 5) −3% V
Minimum Output Voltage 0.9 V
Maximum Output Voltage 2.3 V
Output Voltage Line Regulation (VIN from 2.7 to 5.5) IO = 100 mA 0.1 %
Voltage Load Regulation (IO = 150 mA to 600 mA) 0.001 %/mA
Duty Cycle 100 %
R
SWH
R
SWL
I
LeakH
I
LeakL
V
ENH
V
ENL
T
START
P−Channel On−Resistance 300
N−Channel On−Resistance 300
P−Channel Leakage Current 0.05
N−Channel Leakage Current 0.01
Enable Pin High 1.2 V
Enable Pin Low 0.4 V
Soft Start Time 350 450
5. The overall output voltage tolerance depends upon the accuracy of the external resistor (R1, R2).
= 1.2 V unless otherwise noted)
OUT
nom
+3% V
A
A
m
m
A
A
s
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NCP1523
ELECTRICAL CHARACTERISTICS FOR NCP1523B
(Typical values are referenced to TA = +25°C, Minimum and Maximum values are referenced −40°C to +85°C ambient temperature,
unless otherwise noted, operating conditions VIN = 3.6 V, V
Symbol Rating Min Typ Max Unit
V
IN
V
UVLO
I
q
I
STB
F
OSC
I
LIM
V
REF
V
FBtol
V
FB
V
OUT
V
OUT
V
OUT
V
OUT
V
LOADREG
Input Voltage Range 2.7 5.2 V
Under voltage Lockout (VIN Falling) 2.4 V
Quiescent Current − No Switching
Quiescent Current − Oscillator Running
Standby Current, EN Low 0.3 1.2
Oscillator Frequency 2.400 3 3.600 MHz
Peak Inductor Current 1200 mA
Feedback Reference Voltage 0.6 V
FB Pin Tolerance Overtemperature −3 3 %
Reference Voltage Line Regulation 0.1 %
Output Voltage Accuracy (Note 6) −3% V
Minimum Output Voltage (Note 7) 0.9 V
Maximum Output Voltage 3.3 V
Output Voltage Line Regulation (VIN = 2.7 – 5.2) IO = 100 mA (Note 7) 0.1 %
Voltage Load Regulation (IO = 1 mA to 600 mA) (Note 7) 0.001 %/mA
Duty Cycle 100 %
R
SWH
R
SWL
I
LeakH
I
LeakL
V
ENH
V
ENL
T
START
P−Channel On−Resistance 300
N−Channel On−Resistance 300
P−Channel Leakage Current 0.05
N−Channel Leakage Current 0.01
Enable Pin High 1.2 V
Enable Pin Low 0.4 V
Soft−Start Time 350 450
6. The overall output voltage tolerance depends upon the accuracy of the external resistor (R1, R2).
7. Electrical values are guaranteed for drop between input and output voltages less than 4.0 V (Page 13).
= 1.2 V unless otherwise noted)
OUT
250
2.5
nom
350
+3% V
A
mA
A
m
m
A
A
s
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TABLE OF GRAPHS
Efficiency
Output Voltage vs. Temperature
Frequency Variation vs. Input Voltage 9, 10 19
Load Regulation
Line Regulation
Load Transient Response 15, 16 32, 33
Line Transient Response 31
Shutdown Current
Quiescent Current vs. Temperature 4 29
PWM Mode Operation 13 18
PFM Mode Operation 14
PFM/PWM Threshold vs. Input Voltage 12
Soft Start 17 30
V
F
V
V
V
V
T
OUT
OSC
OUT
OUT
OUT
OUT
I
stb
I
start
q
NCP1523
TYPICAL CHARACTERISTICS NCP1523FCT2G NCP1523BFCT2G
vs. Load Current 6, 7, 8 20, 21, 22
vs. Input Voltage 23
vs. Load Current 11 24
vs. Temperature 25
vs. Output Current 26
vs. Temperature 27
vs. Input Voltage 5
vs. Temperature 3 28
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NCP1523
NCP1523 CHARACTERISTICS
100
90
80
70
60
50
40
30
20
, QUIESCENT CURRENT (A)
q
I
10
0
2.5 3.0 3.5 4.0 4.5 5.0 5.5
VIN, INPUT VOLTAGE (V)
EN = VIN
I
OUT
Figure 3. Quiescent Current vs. Supply
Voltage
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
SHUTDOWN CURRENT (A)
0.1
0
2.5 3.0 3.5 4.0 4.5 5.0 5.5
VIN, INPUT VOLTAGE (V)
Figure 5. Shutdown Current vs. Supply
Voltage
= 0 mA
EN = GND
I
= 0 mA
OUT
100
90
80
70
60
50
40
30
20
, QUIESCENT CURRENT (A)
q
I
10
0
−40 10 60 110
VIN = 5.5 V
TEMPERATURE (°C)
VIN = 2.7 V
Figure 4. Quiescent Current vs. Temperature
100
90
80
70
60
EFFICIENCY (%)
50
40
30
1 10 100 1000
−40°C
105°C
I
, OUTPUT CURRENT (mA)
OUT
25°C
Figure 6. Efficiency vs. Output Current
(V
= 1.8 V, VIN = 3.6 V)
OUT
100
90
80
70
60
EFFICIENCY (%)
50
40
30
1 10 100 1000
I
, OUTPUT CURRENT (mA)
OUT
−40°C
25°C
105°C
Figure 7. Efficiency vs. Output Current
(V
= 0.9 V, VIN = 3.6 V)
OUT
100
90
80
70
60
50
EFFICIENCY (%)
40
30
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−40°C
25°C
105°C
1 10 100 1000
I
, OUTPUT CURRENT (mA)
OUT
Figure 8. Efficiency vs. Output Current
(V
= 2.0 V, VIN = 3.6 V)
OUT
NCP1523
NCP1523 CHARACTERISTICS
3.6
3.4
I
= 400 mA
3.2
3.0
2.8
FREQUENCY (MHz)
2.6
2.4
2.8 3.3 3.8 4.3 4.8 5.3
OUT
I
= 600 mA
OUT
VIN, INPUT VOLTAGE (V)
Figure 9. Frequency vs. Input Voltage
5.0
3.0
1.0
−1.0
LOAD REGULATION (%)
−3.0
−5.0
V
= 0.9 V
OUT
V
= 2.0 V
OUT
0 100 200 300 400 500 600
I
, OUTPUT CURRENT (mA)
OUT
Figure 11. Load Regulation
3.6
3.4
I
= 400 mA
I
OUT
OUT
= 600 mA
3.2
3.0
2.8
FREQUENCY (MHz)
2.6
2.4
−40 −20 0 20 40 60 80
TEMPERATURE (°C)
Figure 10. Frequency vs. Temperature
300
250
200
150
100
, OUTPUT CURRENT (mA)
50
OUT
I
0
2.7 3.2 3.7 4.2 4.7 5.2
VIN, INPUT VOLTAGE (V)
Figure 12. PFM/PWM Threshold vs. Input
Voltage
Figure 13. Step Down Converter PFM Mode
Operation
Figure 14. Step Down Converter PWM Mode
Operation
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NCP1523
NCP1523 CHARACTERISTICS
Figure 15. Load Transient Response in PFM
Operation (10 mA to 100 mA)
Figure 17. Soft Start Time (VIN = 3.6 V)
Figure 16. Load Transient Response Between
PFM and PWM Operation (100 mA to 200 mA)
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V
2 V/Div
V
2 V/Div
V
OUT
10 mV/Div
I
OUT
200 mA/Div
LX
IN
Figure 18. PWM Mode of Operation
(V
= 3.6 V, V
IN
OUT
= 1.2 V, I
NCP1523
NCP1523B CHARACTERISTICS
3.6
3.5
3.4
3.3
3.2
3.1
3.0
2.9
2.8
FREQUENCY (MHz)
2.7
2.6
2.5
2.4
= 300 mA, 255C)
OUT
2.8 3.3 4.3 5.3
3.8 4.8
Vin, INPUT VOLTAGE (V)
Figure 19. Switching Frequency vs. Input
Voltage (V
= 1.2 V, I
OUT
= 300 mA, 255C)
OUT
100
2.7 V
3.6 V
Vin = 5.2 V
0 100 200 300 400 500 600
I
, OUTPUT CURRENT (mA)
OUT
EFFICIENCY (%)
90
80
70
60
50
40
30
Figure 20. Efficiency vs. Output Current
(V
= 1.2 V, 255C)
OUT
100
90
80
70
60
3.3 V
1.2 V
0.9 V
90
80
70
EFFICIENCY (%)
60
50
0 100 200 600
I
, OUTPUT CURRENT (mA)
OUT
25°C
300 400 500
−40°C
85°C
Figure 21. Efficiency vs. Output Current
(V
= 1.2 V, VIN = 3.6 V)
OUT
100
90
80
70
60
25°C
−40°C
85°C
EFFICIENCY (%)
50
40
30
0 100 200 600
I
, OUTPUT CURRENT (mA)
OUT
300 400 500
Figure 22. Efficiency vs. Output Current
(V
= 3.6 V, 255C)
IN
EFFICIENCY (%)
50
40
30
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2.5 3.0 3.5 5.5
VIN, INPUT VOLTAGE (V)
4.0 4.5 5.0
Figure 23. Efficiency vs. Input Current
(V
OUT
= 1.2 V, I
= 100 mA)
OUT
NCP1523
NCP1523B CHARACTERISTICS
6
4
2
0
−2
LOAD REGULATION (mV)
−4
−6
0 100 200 300 400 600
I
(mA)
OUT
3.6 V
Vin = 5.5 V
Figure 24. Load Regulation vs. Input Voltage
(V
= 1.2 V, 255C)
OUT
6
5
4
3
I
= 600 mA
OUT
2
1
0
100 mA
−1
−2
−3
LINE REGULATION (mV)
−4
−5
−6
2.5 3.0 3.5 4.0 4.5 5.0 5.5
1 mA
Vin (V)
Figure 26. Line Regulation vs. Output Current
(V
= 1.2 V, 255C)
OUT
500
2.7 V
4
3
2
1
0
−1
−2
LOAD REGULATION (mV)
−3
−4
0 100 200 300 400 500 600
I
(mA)
out
Figure 25. Load Regulation vs. Temperature
(V
= 3.6 V, V
IN
6
5
4
3
2
1
−40°C
0
85°C
−1
−2
−3
LINE REGULATION (mV)
−4
−5
−6
2.5 3.0 3.5 4.0 4.5 5.5
25°C
Vin, INPUT VOLTAGE (V)
OUT
= 1.2 V)
Figure 27. Line Regulation vs. Temperature
(V
= 1.2 V, I
OUT
= 100 mA)
OUT
−40°C
25°C
85°C
5.0
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
, SHUTDOWN CURRENT
0.10
stb
I
0.05
0
−40 −15 10 35 60 85
TEMPERATURE (°C)
Figure 28. Shutdown Current vs. Temperature
(V
= 3.6 V)
OUT
3.9
3.7
3.5
3.3
3.1
2.9
, QUIESCENT CURRENT
q
I
2.7
2.5
−40 −15 10 35 85
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Vin = 4.2 V
2.7 V
3.6 V
60
TEMPERATURE (°C)
Figure 29. Quiescent Current vs. Temperature
NCP1523
NCP1523B CHARACTERISTICS
500 mV/Div
V
V
OUT
I
OUT
OUT
EN
(V
= 3.6 V, V
IN
20 mV/Div
2 V/Div
200 mA/Div
Figure 30. Soft Start Time
16 mV
= 1.2 V, I
OUT
= 600 mA)
OUT
V
V
OUT
V
OUT
IN
20 mV/Div
500 mV/Div
Figure 31. Line Transient Response
(VIN step = 600 mV, V
50 mV/Div
45 mV
OUT
= 1.2 V)
I
OUT
50 mA/Div
Figure 32. Load Transient Response
(V
= 3.6 V, V
IN
= 1.2 V, 0 mA to 95 mA step)
OUT
I
OUT
(VIN = 3.6 V, V
200 mA/Div
Figure 33. Load Transient Response
= 1.2 V, 0 mA to 400 mA step)
OUT
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NCP1523
OPERATION DESCRIPTION
Overview
The NCP1523 uses a constant frequency, voltage mode
step−down architecture. Both the main (P−channel
MOSFET) and synchronous (N−channel MOSFET)
switches are internal.
It delivers a constant voltage from either a single Li−Ion
or three cell NiMH/NiCd battery to portable devices such as
cell phones and PDA. The output voltage is sets by external
resistor divider and has a voltage tolerance of ±3% with 90%
efficiency or better. The NCP1523 sources up to 600 mA
depending on external components chosen.
Additional features include soft−start, under voltage
protection, current overload protection, and thermal
shutdown protection. As shown in Figure 1, only six
external components are required for implementation. The
part uses an internal reference voltage of 0.6 V. It is
recommended to keep the part in shutdown until the input
voltage is 2.7 V or higher.
PWM Operating Mode: NCP1523 & NCP1523B
In this mode, the output voltage of the NCP1523 is
regulated by modulating the on−time pulse width of the
main switch Q1 at a fixed frequency of 3 MHz. The
switching of the PMOS Q1 is controlled by a flip−flop
driven by the internal oscillator and a comparator that
compares the error signal from an error amplifier with the
PWM ramp. At the beginning of each cycle, the main switch
Q1 is turned ON by the rising edge of the internal oscillator
clock. The inductor current ramps up until the sum of the
current sense signal and compensation ramp becomes higher
than the amplifier’s error voltage. Once this has occurred,
the PWM comparator resets the flip−flop, Q1 is turned OFF
and the synchronous switch Q2 is turned ON. Q2 replaces
the external Schottky diode to reduce the conduction loss
and improve the efficiency. To avoid overall power loss, a
certain amount of dead time is introduced to ensure Q1 is
completely turned OFF before Q2 is being turned ON.
PFM Operating Mode at Light Load: NCP1523 Only
The NCP1523FCT2G works with two mode of operation
PWM/PFM depending on the current required. Under light
load conditions, the NCP1523FCT2G enters in low current
PFM mode of operation to reduce power consumption (IQ =
60 A typ). The output regulation is implemented by pulse
frequency modulation. If the output voltage drops below the
threshold of PM comparator (typically V
−2%), a new
nom
cycle will be initiated by the PM comparator to turn on the
switch Q1. Q1 remains ON until the peak inductor current
reaches 200 mA (nom). Then I
comparator goes high to
LIM
switch OFF Q1. After a short dead time delay, switch
rectifier Q2 is turn ON. The Negative current detector
(NCD) will detect when the inductor current drops below
zero and the output voltage decreases through discharging
the output capacitor. When the output voltage falls below the
threshold of the PFM comparator, a new cycle starts
immediately.
PWM Operating Mode at Light Load: NCP1523B Only
At low light conditions, NCP1523BFCT2G works also in
PWM mode offering very good load transient results from
light load to full charge. When there is no load on the output,
the PMOS Q1 remains ON during a small pulse according
to the flip−flop driven by the internal oscillator and the error
comparator. If the drop between input and output voltage is
higher than 4.0 V, the structure reaches the minimum ON
time (T
). In this particular case, the part can not supply
ONmin
correctly the desired output voltage and shows a small
output voltage deregulation. For an output voltage
configured to 0.9 V, 4.9 V is the maximum input voltage
which guarantees the correct output value; for an output set
to 1.5 V, the maximum input is 5.5 V.
Cycle−by−Cycle Current Limitation
From the block diagram (Figure 3), an I
comparator is
LIM
used to realize cycle−by−cycle current limit protection. The
comparator compares the SW pin voltage with the reference
voltage, which is biased by a constant current. If the inductor
current reaches the limit, the I
comparator detects the
LIM
SW voltage falling below the reference voltage and releases
the signal to turn off the switch Q1. The cycle−by−cycle
current limit is set at 1200 mA (nom).
Soft Start
The NCP1523 uses soft−start to limit the inrush current
when the device is initially powered up or enabled.
Soft−start is implemented by gradually increasing the
reference voltage until it reaches the full reference voltage.
During startup, a pulsed current source charges the internal
soft−start capacitor to provide gradually increasing
reference voltage. When the voltage across the capacitor
ramps up to the nominal reference voltage, the pulsed
current source will be switched off and the reference voltage
will switch to the regular reference voltage.
Shutdown Mode
When a voltage less than 0.4 V is applied on the EN pin,
the NCP1523 will be disabled. In shutdown mode, the
internal reference, oscillator and most of the control
circuitries are turned off. Therefore, the typical current
consumption will be 0.3 A (typical value). Applying a
voltage above 1.2 V to EN pin will enable the device for
normal operation. The device will go through soft−start to
normal operation. EN pin should be activated after the input
voltage is applied.
Thermal Shutdown
Internal Thermal Shutdown circuitry is provided to
protect the integrated circuit in the event that the maximum
junction T emperature is exceeded. I f t he j unction t emperature
exceeds 160_C, the device shuts down. In this mode switch
Q1 and Q2 and the control circuits are all turned off. The
device restarts in soft start after the temperature drops below
135°C. This feature is provided to prevent catastrophic
failures from accidental device overheating.
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13
NCP1523
APPLICATION INFORMATION
Output Voltage Selection
The output voltage is programmed through an external
resistor divider connected from ADJ to FB then to GND. For
low power consumption and noise immunity, the resistor
from FB to GND (R2) should be in the [100 k − 600 k]
range. If R2 is 200 k given the VFB is 0.6 V, the current
through the divider will be 3 A.
The formula below gives the value of V
, given the
OUT
desired R1 and the R1 value,
V
+ V
OUT
• V
• V
: output voltage (volts)
OUT
: feedback voltage = 0.6 V
FB
FB
• R1: feedback resistor from V
ǒ
OUT
1 )
R2
to FB
Ǔ
R1
• R2: feedback resistor from FB to GND
Input Capacitor Selection
In PWM operating mode, the input current is pulsating
with large switching noise. Using an input bypass capacitor
can reduce the peak current transients drawn from the input
supply source, thereby reducing switching noise
significantly. The capacitance needed for the input bypass
capacitor depends on the source impedance of the input
supply.
The maximum RMS current occurs at 50% duty cycle
with maximum output current, which is IO, max/2.
For NCP1523, a low profile ceramic capacitor of 4.7 F
should be used for most of the cases. For effective bypass
results, the input capacitor should be placed as close as
possible to the VIN Pin.
Table 1. LIST OF INPUT CAPACITOR
Murata
Taiyo Yuden JMK212BY475MG
TDK
Output L−C Filter Design Considerations:
The NCP1523 is built in 3 MHz frequency and uses
voltage mode architecture. The correct selection of the
output filter ensures good stability and fast transient
response.
Due to the nature of the buck converter, the output L−C
filter must be selected to work with internal compensation.
For NCP1523, the internal compensation is internally fixed
and it is optimized for an output filter of L = 2.2 H and
C
= 4.7 F
OUT
The corner frequency is given by:
f
+
c
1
Ǹ
2 L C
OUT
GRM188R60J475KE
GRM21BR71C475KA
C2012X5R0J475KT
C1608X5R0J475KT
+
2 2.2 H 4.7 F
1
Ǹ
+ 49.5 KHz
The device operates with inductance value between 1 H
and maximum of 4.7 H.
If the corner frequency is moved, it is recommended to
check the loop stability depending of the output ripple
voltage accepted and output current required. For lower
frequency, the stability will be increase; a larger output
capacitor value could be chosen without critical effect on the
system. On the other hand, a smaller capacitor value
increases the corner frequency and it should be critical for
the system stability. Take care to check the loop stability.
The phase margin is usually higher than 45°.
Table 2. L−C FILTER EXAMPLE
Inductance (L) Output Capacitor (C
1 H 10 F
2.2 H 4.7 F
4.7 H 2.2 F
Inductor Selection
OUT
)
The inductor parameters directly related to device
performances are saturation current and DC resistance and
inductance value. The inductor ripple current (IL)
decreases with higher inductance:
I
V
OUT
+
L
L f
SW
V
OUT
ǒ
1−
Ǔ
V
IN
IL = peak to peak inductor ripple current
L = inductor value
fSW = Switching frequency
The Saturation current of the inductor should be rated
higher than the maximum load current plus half the ripple
current:
I
)
L
2
I
L(MAX)
I
O(MAX)
I
L(MAX)
+ I
O(MAX)
Maximum inductor current
Maximum Output current
The inductor’s resistance will factor into the overall
efficiency of the converter. For best performances, the DC
resistance should be less than 0.3 for good efficiency.
Table 3. LIST OF INDUCTOR
FDK MIPW3226 Series
TDK
Taiyo Yuden LQ CBL2012
Coil Craft
VLF3010AT Series
TFC252005 Series
DO1605−T Series
LPO3010
http://onsemi.com
14
NCP1523
Output Capacitor Selection
Selecting the proper output capacitor is based on the
desired output ripple voltage. Ceramic capacitors with low
ESR values will have the lowest output ripple voltage and
are strongly recommended. The output capacitor requires
either an X7R or X5R dielectric.
The output ripple voltage in PWM mode is given by:
V
OUT
+ I
ǒ
L
4 fSW C
1
OUT
) ESR
Ǔ
In PFM mode (at light load), the output voltage is
regulated by pulse frequency modulation. The output
voltage ripple is independent of the output capacitor value.
It is set by the threshold of PM comparator.
Table 4. LIST OF OUTPUT CAPACITOR ROHS
Murata
Taiyo Yuden
TDK
GRM188R60J475KE 4.7 F
GRM21BR71C475KA
GRM188R60OJ106ME
JMK212BY475MG
JMK212BJ106MG
C2012X5R0J475KT 4.7 F
C1608X5R0J475KT
C2012X5R0J106KT
10 F
4.7 F
10 F
10 F
http://onsemi.com
15
NCP1523
PACKAGE DIMENSIONS
8 PIN FLIP−CHIP, 2.05x1.05, 0.5P
CASE 766AE−01
ISSUE C
2X
TERMINAL A1
LOCATOR
2X
8X
NOTE 3
8X
0.03 C
0.10 C
0.10 C
0.05 C
b
A0.05 BC
0.10 C
1
2
BOTTOM VIEW
D
TOP VIEW
SIDE VIEW
D1
AB
C
A
A2
B
E
A1
C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
MILLIMETERS
DIMAMIN MAX
−−−
A1
A2 0.335 0.385
b 0.290 0.340
D 2.050 BSC
D1
E
e 0.500 BSC
0.655
0.210 0.270
1.500 BSC
1.050 BSC
A
SEATING
PLANE
e
e/2
D
e
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NCP1523/D
16
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