ON Semiconductor NCP1397A, NCP1397B Technical data

NCP1397A, NCP1397B
查询"NCP1397-D"供应商
High Performance Resonant Mode Controller with Integrated High--Voltage Drivers
The NCP1397 is a high performance controller that can be utilized in half bridge resonant topologies such as series resonant, parallel resonant and LLC resonant converters. It integrates 600 V gate drivers, simplifying layout and reducing external component count. With its unique architecture, including a 500 kHz Voltage Controlled Oscillator whose control mode permits flexibility when an ORing function is required, the NCP1397 delivers everything needed to build a reliable and rugged resonant mode power supply.
The NCP1397 provides a suite of protection features with configurable settings to optimize any application. These include: auto--recovery or fault latch--off, brown--out, open optocoupler, soft--start and short--circuit protection. Deadtime is also adjustable to overcome shoot through current.
Features
High--Frequency Operation from 50 kHz up to 500 kHz600 V High--Voltage Floating DriverAdjustable Minimum Switching Frequency with ±3% AccuracyAdjustable Deadtime from 100 ns to 2 ms.Startup Sequence Via an Externally Adjustable Soft--StartBrown--Out Protection for a Simpler PFC AssociationLatched Input for Severe Fault Conditions, e.g. Over Temperature or
OVP
Timer--Based Input with Auto--Recovery Operation for Delayed
Event Reaction
Latched Overcurrent ProtectionDisable Input for Immediate Event Reaction or Simple ON/OFF
Control
VLow Startup Current of 300 mA1 A / 0.5 A Peak Current Sink / Source Drive CapabilityCommon Collector Optocoupler Connection for Easier ORingOptional Common Emitter Optocoupler ConnectionInternal Temperature ShutdownThese Devices are Pb--Free, Halogen Free/BFR Free and are RoHS
Operationupto20V
CC
Compliant
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MARKING
DIAGRAMS
16
SO--16, LESS PIN 13
Skip/Disable
See detailed ordering and shipping information in the package dimensions section on page 26 of this data sheet.
1
D SUFFIX
CASE 751AM
x=AorB A = Assembly Location WL = Wafer Lot Y = Year WW = Work Week G = Pb--Free Package
PIN CONNECTIONS
CSS(dis)
Ctimer
1
Fmax
2
3
Rt
4
BO
5
FB
6
DT
7
8
ORDERING INFORMATION
16
1
(Top View)
NCP1397xG
AWLYWW
Vboot
16
Mupper
15
HB
14
V
12
CC
Mlower
11
GND
10
Fault
9
Typical Applications
Flat Panel Display Power ConvertersHigh Power ac--dc Adapters for NotebooksComputing Power Supplies
Semiconductor Components Industries, LLC, 2010
November, 2010 -- Rev. 2
Industrial and Medical Power SourcesOffline Battery Chargers
1 Publication Order Number:
NCP1397/D
查询"NCP1397-D"供应商
R18
NCP1397A, NCP1397B
Figure 1. Typical Application Example
PIN FUNCTION DESCRIPTION
Pin # Pin Name Function Pin Description
1 CSS(dis) Soft--Start Discharge Soft--start capacitor discharge pin. Connect to the soft--start capacitor to reset it
2 Fmax Maximum frequency clamp A resistor sets the maximum frequency excursion
3 Ctimer Timer duration Sets the timer duration in presence of a fault
4 Rt Minimum frequency c lamp Connecting a resistor to this pin, sets the minimum oscillator frequency reached
5 BO Brown--Out Detects low input voltage conditions. When brought above V
6 FB Feedback Injecting current into this pin increases the oscillation frequency up to Fmax.
7 DT Deadtime A simple resistor adjusts the dead-- time width
8 Skip/Disable Skip or Disable input Upon release, a clean startup sequence occurs if VFB< 0.3 V. During the skip
9 Fault Fault detection input When asserted, the external timer starts to countdown and shuts down the
10 GND Analog ground --
11 Mlower Low side output Drives the lower side MOSFET
12 V
13 NC Not c onnected Increases the creepage distance
14 HB Half--bridge connection Connects to the half--bridge output
15 Mupper High side output Drives the higher side MOSFET
16 Vboot Bootstrap pin ThefloatingVCCsupply for the upper stage
CC
Supplies the controller Thecontrolleracceptsupto20V
before startup or during overload conditions.
=1V.
for V
FB
(4 V typically), it
fully latches off the controller.
mode, when FB doesn’t drop below 0.3 V, the IC restarts without soft--start sequence.
controller at the end of its time duration. Simultaneously the Soft--Start discharge switch is activated so the converter operating frequency goes up to protect application power stage. This input features also second fault comparator with higher threshold (1.5 V typically) that: A) Speeds up the timer capacitor charging current 8 times – NCP1397A B) latches off the IC permanently – NCP1397B In both versions the second fault comparator helps to protect application in case of short circuit on the output or transformer secondary winding.
latch
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2
NCP1397A, NCP1397B
查询"NCP1397-D"供应商
VDD
Imin VFB VFB(off)
Vref
Rt
I = Imax for Vfb = 5.3 V I = 0 for Vfb < Vfb(min)
Fmax
Time r
VDD
Vref
C
Itimer1
IDT
VDD
Imax VFB = 5
Vdd
Itimer2
Temperature
Shutdown
S
D
Q
+
--
+
DT Adj.
+
--
+
Vref
Timeout Fault
Clk
Q
R
50% DC
PON Reset
Fault
Timeout Fault
Vref
Management
VCC
FF
BO Reset
Fast Fault
Level
Shifter
UVLO
V
BOOT
Mupper
HB
NC
SS(dis)
FB
RFB
DT
BO
IBO
+
--
+
VFB(fault)
VDD
+
IDT
+
--
VBO
PON Reset Fault
G=1
+
--
+
VFB(min)
20 msNoise Filter
+
--
+
Vlatch
> 0 only V=V(FB)-- VFB(min)
Vref
20 msNoise Filter
VDD
Deadtime
Adjustment
S
Fault
V
CC
Mlower
GND
Filter
Skip/ Disable
--
+
Vref Skip/Disable
Q
Q
R
PON Reset
20 ns Noise
+
Fault
+
Vref(fault)
+
--
Vref( OCP )
+
--
+
1 msNoise Filter
Figure 2. Internal Circuit Architecture (NCP1397A)
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3
NCP1397A, NCP1397B
查询"NCP1397-D"供应商
VDD
Imin
Itimer1
+
Vref
C
VFB VFB(off)
IDT
VDD
Imax Vfb = 5
+
--
Rt
I = Imax for Vfb = 5.3 V I = 0 for Vfb < Vfb_min
Fmax
Time r
Vref
Vref
VDD
Vref
If FAULT Itimer else 0
+
+
--
DT Adj.
Time out Fault
Temperature
Shutdown
S
D
Q
PON Reset
Fault
Timeout Fault
Vref
Management
VCC
FF
BO Reset
Fast Fault
Level
Shifter
UVLO
Clk
Q
R
50% DC
V
BOOT
Mupper
HB
NC
SS(dis)
FB
DT
BO
Fault
RFB
IBO
+
+
VFB(fault)
VDD
+
+
Vref(fault)
--
IDT
+
--
VBO
+
--
Vref( OCP )
PON Reset Fault
Fault
G=1
+
+
--
+
VFB(min)
20 msNoise Filter
+
--
+
Vlatch
+
--
> 0 only V=V(FB)-- VFB(min)
Vref
20 msNoise Filter
1 msNoise Filter
VDD
Deadtime
Adjustment
Q
Q
S
Figure 3. Internal CircuitArchitecture (NCP1397B)
V
CC
Mlower
GND
Filter
Skip/ Disable
--
+
Vref Skip
R
PON Reset
20 ns Noise
+
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NCP1397A, NCP1397B
MAXIMUM RATINGS
查询"NCP1397-D"供应商
Rating Symbol Valu e Unit
High Voltage bridge pin, pin 14 V
Floating supply voltage, ground referenced V
High side output voltage V
Low side output voltage V
Allowable output slew rate dV
Power Supply voltage, pin 12 V
BOOT
BRIDGE
-- V
BRIDGE
DRV(HI)
DRV(LO)
/dt 50 V/ns
BRIDGE
CC
Maximum voltage, all pins (except pin 11 and 10) -- --0.3to10 V
Thermal Resistance Junction--to--Air, PDIP version
Thermal Resistance Junction--to--Air, SOIC version
R
θ
JA
R
θ
JA
Storage Temperature Range -- -- 60 to +150 C
ESD Capability, Human Body Model (HBM) (All pins except HV pins) -- 2 kV
ESD Capability, Machine Model (MM) -- 200 V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
1. This device(s) contains ESD protection and exceeds the following tests:
Human Body Model 2000 V per JEDEC Standard JESD22--A114E Machine Model 200 V per JEDEC Standard JESD22--A115--A
2. This device meets latchup tests defined by JEDEC Standard JESD78.
--1to600 V
0to20 V
V
BRIDGE
V
BOOT
-- 0 . 3 t o +0.3
--0.3toVCC+0.3 V
20 V
100 C/W
130 C/W
V
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NCP1397A, NCP1397B
ELECTRICAL CHARACTERISTICS (For typical values T
查询"NCP1397-D"供应商
= 12 V unless otherwise noted)
Symbol
Rating Pin Min Typ Max Unit
=25C, for min/max values TJ=--40C to +125C, Max TJ= 150C, V
J
CC
SUPPLY SECTION
V
CC(on)
V
CC(min)
V
boot(on)
V
boot(min)
I
startup
V
CC(reset)VCC
I
CC1
I
CC2
I
CC3
Turn-- on threshold level, VCCgoing up 12 9.7 10.5 11.3 V
Minimum operating voltage after turn--on 12 8.7 9.5 10.3 V
Startup voltage on the floating section 16--14 8 9 10 V
Cutoff voltage on the floating section 16--14 7.4 8.4 9.4 V
Startup current, VCC<V
CC(on)
12 -- -- 300
level at which the internal logic gets reset 12 -- 6.6 -- V
Internal IC consumption, no output load on pin 15/14 – 11/10,
= 300 kHz
F
SW
Internal IC consumption, 1 nF output load on pin 15/14 – 11/10,
= 300 kHz
F
SW
Consumption in fault or disable mode (All drivers disabled, Rt = 34 kΩ,R
=10kΩ)
DT
12 -- 4 -- mA
12 -- 11 -- mA
12 -- 1.5 -- mA
mA
VOLTAGE CONTROL OSCILLATOR (VCO)
F
SW(min)
F
SW(max)
FB
Minimum switching frequency, Rt = 34 kΩ on pin 4, V DT = 300 ns
Maximum switching frequency, R
5.3V,Rt=34kΩ, DT = 300 ns
Feedback pin swing above which Δf=0
SW
f(max)
pin6
=1.9kΩ on pin 2, V
=0.8V,
>
pin6
4 58.2 60 61.8 kHz
2 440 500 560 kHz
6 -- 5.3 -- V
DC Operating duty--cycle symmetry 11 --1 5 48 50 52 %
T
T
V
ref(Rt)
del1
del2
Delay before driver restart from fault or disable mode -- -- 700 -- ns
Delay before driver restart after V
event (Note 4) -- -- 11 --
CC(on)
ms
Reference voltage for Rt pin 4 2.18 2.3 2.42 V
FEEDBACK SECTION
R
FB
V
FB(min)
V
FB(off)
V
FBoff(hyste)
Internal pulldown resistor 6 -- 20 --
kΩ
Voltage on pin 6 below which the FB level has no VCO action 6 -- 1.1 -- V
Voltage on pin 6 below which the controller considers the FB fault 6 240 280 320 mV
Feedback fault comparator hysteresis 6 -- 45 -- mV
DRIVE OUTPUT
T
T
R
OH
R
OL
T
dead
T
dead(max)
T
dead(min)
I
HV(LEAK)
Output voltage risetime @ CL= 1 nF, 10--90% of output signal 15-- 14/11-- 10 -- 40 -- ns
r
Output voltage falltime @ CL= 1 nF, 10--90% of output signal 15--14/11--10 -- 20 -- ns
f
Source resistance 15--14/11-- 10 -- 13 --
Sink resistance 15--14/11-- 10 -- 5.5 --
Deadtime with RDT=10kΩ frompin7toGND
Maximum deadtime with RDT=82kΩ frompin7toGND
Minimum deadtime, RDT=3kΩ frompin7toGND
7 250 290 340 ns
7 -- 2 --
7 -- 100 -- ns
Leakage current on high voltage pins to GND 14, 15,16 -- -- 5
Ω
Ω
ms
mA
TIMERS
I
timer1
Timer capacitor charge current during feedback fault or when V
ref(fault)<Vpin9<Vref(OCP)
3 150 175 190
mA
3. The IC does not activate soft--start (unless the feedback pin voltage is below 0.3 V) when the skip/disable input is released, this is for skip cycle implementation.
4. Guaranteed by design.
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NCP1397A, NCP1397B
ELECTRICAL CHARACTERISTICS (For typical values T
查询"NCP1397-D"供应商
= 12 V unless otherwise noted)
=25C, for min/max values TJ=--40C to +125C, Max TJ= 150C, V
J
CC
Symbol UnitMaxTypMinPinRating
TIMERS
I
timer2
T
timer
T
timerR
V
timer(on)
V
timer(off)
R
SS(dis)
Timer capacitor charge current when V
) – A version only
I
charge2
pin9>Vref(OCP)(Icharge1
Timer duration with a 1 mF capacitor anda1MΩ resistor, I current applied
timer1
+
3 1.1 1.3 1.5 mA
3 -- 24 -- ms
Timer recurrence in permanent fault, same values as above 3 -- 1.4 -- s
Voltage at which pin 3 stops output pulses 3 3.8 4 4.2 V
Voltage at which pin 3 restarts output pulses 3 0.95 1 1.05 V
Soft--start discharge switch channel resistance 1 -- 100 --
Ω
PROTECTION
V
ref(Skip)
Hyste
V
ref(Fault)
Hyste
V
ref(OCP)
Hyste
T
p(Disable)
IBO
(bias)
Reference voltage for Skip/Disable input (Note 4) 8 630 660 690 mV
Hysteresis for Skip/Disable (Note 4) 8 -- 45 -- mV
(Skip)
Reference voltage for Fault comparator 9 0.99 1.04 1.09 V
Hysteresis for fault comparator input 9 -- 60 -- mV
(Fault)
Reference voltage for OCP comparator 9 1.47 1.55 1.63 V
Hysteresis for OCP comparator input 9 -- 90 -- mV
(OCP)
Propagation delay from disable input to the drive shutdown 8 -- 60 100 ns
Brown--Out input bias current 5 -- 0.02 --
mA
VBO Brown--Out level 5 0.99 1.04 1.09 V
IBO Hysteresis current, V
Vl
atch
T
SD
T
SD(hyste)
Latching voltage 5 3.7 4 4.3 V
Temperature shutdown -- 140 -- -- C
Hysteresis -- -- 30 -- C
> VBO 5 25 28 31
pin5
mA
3. The IC does not activate soft--start (unless the feedback pin voltage is below 0.3 V) when the skip/disable input is released, this is for skip cycle implementation.
4. Guaranteed by design.
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NCP1397A, NCP1397B
5
p
)
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10.55
10.50
(V)
10.45
CC(on)
V
10.40
10.35
--40 --25 --10 5 20 35 50 65 80 95 110 125
TEMPERATURE (C)
Figure 4. V
60.05
60
59.95
(kHz)
59.9
SW(min)
59.85
F
59.8
CC(on)
TYPICAL CHARACTERISTICS
9.52
9.50
9.48
(V)
9.46
9.44
CC(min)
V
9.42
9.40
9.38
Threshold
510
509
508
507
(kHz)
506
SW(max)
F
505
504
--40 --25 --10 5 20 35 50 65 80 95 110 125
TEMPERATURE (C)
Figure 5. V
CC(min)
Threshold
59.75
--40 --20 0 20 40 60 80 100 120 TEMPERATURE (C)
Figure 6. F
23.0
22.5
22.0
21.5
21.0
(kΩ)
20.5
FB
R
20.0
19.5
19.0
18.5
--40 --25 --10 5 20 35 50 65 80 95 110 125
SW(min)
TEMPERATURE (C)
Frequency Clamp
Figure 8. Pulldown Resistor (RFB)
503
--40 --25 --10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C)
Figure 7. F
0.661
0.660
0.659
(V)
0.658
ref(skip)
V
0.657
0.656
0.655
--40 --25 --10 5 20 35 50 65 80 95 110 12
SW(max)
TEMPERATURE (C)
Frequency Clamp
Figure 9. Skip/Disable Threshold (V
ref(ski
)
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NCP1397A, NCP1397B
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17.0
16.0
15.0
14.0
13.0
12.0
ROHA (Ω)
11. 0
10.0
9.0
8.0
--40 --25 --10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C)
TYPICAL CHARACTERISTICS
Figure 10. Source Resistance (ROH)
114
113
112
111
110
(ns)
109
108
dead(min)
T
107
106
105
104
--40 --25 --10 5 20 35 50 65 80 95 110 125
TEMPERATURE (C)
Figure 12. T
dead(min)
9.0
8.5
8.0
7.5
7.0
6.5
6.0
ROLA (Ω)
5.5
5.0
4.5
4.0
--40 --25 --10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C)
Figure 11. Sink Resistance (ROL)
297
296
295
294
293
(ns)
292
291
dead(nom)
290
T
289
288
287
286
--40 --25 --10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C)
Figure 13. T
dead(nom)
2.065
2.060
2.055
(ms)
2.050
dead(max)
2.045
T
2.040
2.035
--40 --25 --10 5 20 35 50 65 80 95 110 125
TEMPERATURE (C)
Figure 14. T
dead(max)
4.035
4.030
4.025
(V)
4.020
latch
V
4.015
4.010
4.005
--40 --25 --10 5 20 35 50 65 80 95 110 125
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TEMPERATURE (C)
Figure 15. Latch Level (V
latch
)
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