ON Semiconductor NCP1337 Technical data

NCP1337
l
PWM Current−Mode Controller for Free Running Quasi−Resonant Operation
By monitoring the feedback pin activity, the controller enters ripple mode as soon as the power demand falls below a predetermined level. As each restart is softened by an internal soft−start, and as the frequency cannot go below 25 kHz, no audible noise can be heard.
The NCP1337 also features an efficient protective circuitry which, in presence of an overcurrent condition, disables the output pulses and enters a safe burst mode, trying to restart. Once the default has gone, the device auto−recovers. Also included is a bulk voltage monitoring function (known as brown−out protection), an adjustable overpower compensation, and a VCC OVP. Finally, an internal 4.0 ms soft−start eliminates the traditional startup stress.
Features
Free−Running Borderline/Critical Mode Quasi−Resonant Operation
Current−Mode
Soft Ripple Mode with Minimum Switching Frequency for Standby
Auto−Recovery Short−Circuit Protection Independent of Auxiliary
Voltage
Overvoltage Protection
Brown−Out Protection
Two Externally Triggerable Fault Comparators (one for a disable
function, and the other for a permanent latch)
Internal 4.0 ms Soft−Start
500 mA Peak Current Drive Sink Capability
130 kHz Max Frequency
Internal Leading Edge Blanking
Internal Temperature Shutdown
Direct Optocoupler Connection
Dynamic Self−Supply with Levels of 12 V (On) and 10 V (Off)
SPICE Models Available for TRANsient and AC Analysis
These are Pb−Free Devices*
T ypical Applications
AC−DC Adapters for Notebooks, etc.
Offline Battery Chargers
Consumer Electronics (DVD Players, Set−Top Boxes, TVs, etc.)
Auxiliary Power Supplies (USB, Appliances, TVs, etc.)
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MARKING DIAGRAM
PDIP−7
P SUFFIX
CASE 626B
SOIC−7
D SUFFIX
CASE 751U
A = Assembly Location WL = Wafer Lot Y, YY = Y ear WW = Work Week G = Pb−Free Package G = Pb−Free Package
PIN CONNECTIONS
1
BO
2
FB
3
CS
4
GND DRV
(Top V iew)
ORDERING INFORMATION
Device Package Shipping
NCP1337PG PDIP−7
(Pb−Free)
NCP1337DR2G SOIC−7
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.
NCP1337P AWL
YYWWG
1
8
P1337
AYWW
G
1
8
HV
6
VCC
5
50 Units/Tube
2500 Tape & Ree
© Semiconductor Components Industries, LLC, 2006
July, 2006 − Rev . 2
*For additional information on our Pb−Free strategy
and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
1 Publication Order Number:
NCP1337/D
NCP1337
PIN FUNCTION DESCRIPTION
Pin No. Symbol Function Description
1 BO Brown−out and external
triggering
By connecting this pin to the input voltage through a resistor divider, the
controller ensures operation at a safe mains level.
If an external event brings this pin above 3.0 V, the controller’s output is
disabled.
If an external event brings this pin above 5.0 V, the controller is
permanently latched−off.
2 FB Sets the peak current
setpoint
By connecting an optocoupler or an auxiliary winding to this pin, the peak
current setpoint is adjusted accordingly to the output power demand.
When the requested peak current setpoint is below the internal standby
level, the device enters soft ripple mode.
3 CS Current sense input and
overpower compensation adjustment
4 GND IC ground 5 DRV Output driver
6 VCC IC supply
8 HV High−voltage pin
This pin senses the primary current and routes it to the internal comparator
via an L.E.B.
Inserting a resistor in series with the pin allows to control the overpower
compensation level.
To be connected to an external MOSFET.
Connected to a tank capacitor (and possibly an auxiliary winding).
When V
reaches 18.6 V , an internal OVP stops the output pulses.
CC
Connected to the high−voltage rail, this pin injects a constant current into
the VCC bulk capacitor and ensures a clean lossless startup sequence.
V
OUT
BO
+
C
bulk
NCP1337
1 8 2 3 4
6 5
Rcomp
V
CC
+
V
+
CC
Figure 1. Typical Application Schematic
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NCP1337
V
C
BO
FB
CS
GND
+
5 V
V
BO
500 mV
3 V
V
BO
Ton
4 k
Vdd
+
+
3 V
+
+
100 mV 130 mV
20 kHz
Low−pass
filter
Vdd
activated
70 mA x VBO − 35 mA
2 p
+
10 mA
+
500 mV
FAULT
if Zener
350 ns
LEB
DISABLE
Vdd
BOK
OVP
Skip
+
S
R
Setpoint
Q
SSkip
PERM. LATCH
Vdd
VCC < 4 V
TSD
Startup
Ton
Soxyless
Ton
SStart
67 ms
max Ton
+
CS comp.
300 ms
Soft−Skipt
4 ms
soft−start
PERM. LATCH
SSkip
SStart
(*If FAULT duration > 80 ms = > STOP Restart when 2nd time VCC = VCCon)
timeout
TSD
7.5 ms min period
Management*
FAULT
8 ms
TSD
FAULT
35 ms
max Toff
Toff
S
Clk
D
R1
R2
Ton
Q Q
Toff
12 V 10 V
5 V
OVP
5.5 ms
blanking
V
CC
Inhib
Soxyless
demag
detection
Soxyless
+
+
9.5 mA or 600 mA
DR
HV
VC
+
+
18.6 V
Figure 2. Internal Circuit Architecture
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NCP1337
MAXIMUM RATINGS
Rating Symbol Value Unit
Voltage on Pin 8 (HV) when Pin 6 (VCC) is Decoupled to Ground with 10 mF V
HV
Maximum Current in Pin 8 (HV) 20 mA Power Supply Voltage, Pin 6 (VCC) and Pin 5 (DRV) V
CCmax
Maximum Current in Pin 6 (VCC) "30 mA Maximum Voltage on all Pins except Pin 8 (HV), Pin 6 (VCC) and Pin 5 (DRV) −0.3 to 10 V Maximum Current into all Pins except Pin 8 (HV), Pin 6 (VCC) and Pin 5 (DRV) "10 mA Maximum Current into Pin 6 (DRV) during ON Time and T Maximum Current into Pin 6 (DRV) after T
during OFF Time "15 mA
BLANK
BLANK
Thermal Resistance, Junction−to−Case R Thermal Resistance, Junction−to−Air, SOIC Version R Thermal Resistance, Junction−to−Air, DIP Version R Maximum Junction Temperature TJ
"1.0 A
q
JC
q
JA
q
JA
MAX
Operating Temperature Range −40 to +125 °C Storage Temperature Range −60 to +150 °C ESD Capability, HBM Model per Mil−std−883, Method 3015 (All Pins except HV) 2.0 kV ESD Capability, Machine Model 200 V
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.
1. This device contains latchup protection and exceeds 100 mA per JEDEC standard JESD78.
−0.3 to 500 V
−0.3 to 20 V
57 °C/W 178 °C/W 100 °C/W 150 °C
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NCP1337
ELECTRICAL CHARACTERISTICS (For typical values T
= 25°C, for min/max values TJ = 0°C to +125°C, Max TJ = 150°C,
J
VCC = 11 V, unless otherwise noted.)
Characteristic Pin Symbol Min Typ Max Unit
SUPPLY SECTION
VCC Increasing Level at which the Controller Starts 6 VCC VCC Decreasing Level at which the Controller Stops 6 VCC Protection Mode is Activated if VCC reaches this Level whereas the HV
6 VCC
ON MIN OFF
11 12 13 V
9.0 10 11 V
9.0 V
Current Source is ON VCC Decreasing Level at which the Latch−Off Phase Ends 6 VCC Margin between VCC Level at which Latch Fault is Released and
VCC
LATCH
V
MARGIN
VCC Increasing Level at which the Controller Enters Protection Mode 6 VCC VCC Level below which HV Current Source is Reduced 6 VCC Internal IC Consumption, No Output Load on Pin 5, F Internal IC Consumption, 1.0 nF Output Load on Pin 5, F
= 60 kHz 6 ICC1 1.2 mA
SW
= 60 kHz 6 ICC2 2.0 mA
SW
LATCH
OVP
INHIB
3.6 5.0 6.0 V
0.3 V
17.6 18.6 19.6 V
1.5 V
Internal IC Consumption, Latch−Off Phase, VCC = 8.0 V 6 ICC3 600 mA Internal IC Consumption in Skip 6 ICC
LOW
600 mA
INTERNAL STARTUP CURRENT SOURCE
Minimum Guaranteed Startup Voltage on HV Pin 8 V High−Voltage Current Source when VCC > VCC
INHIB
8 IC1 5.5 9.5 15 mA
HVmin
55 V
(VCC = 10.5 V , VHV = 60 V) High−Voltage Current Source when VCC < VCC
INHIB
8 IC2 0.3 0.6 1.1 mA
(VCC = 0 V , VHV = 60 V) Leakage Current Flowing when the HV Current Source is OFF
8 I
HVLeak
90 mA
(VCC = 17 V , VHV = 500 V)
DRIVE OUTPUT
Output Voltage Rise−T ime @ CL = 1.0 nF, 10−90% of Output Signal 5 T Output Voltage Fall−T ime @ CL = 1.0 nF, 10−90% of Output Signal 5 T Source Resistance 5 R Sink Resistance 5 R
R
F OH OL
50 ns
20 ns
20 W
8.0 W
TEMPERATURE SHUTDOWN
Temperature Shutdown TSD 130 °C Hysteresis on Temperature Shutdown 30 °C
CURRENT COMPARATOR
Maximum Internal Current Setpoint (@ I
Minimum Internal Current Setpoint (@ I
Internal Current Setpoint for IFB = I
Propagation Delay from Current Detection to Gate OFF State 3 T
Leading Edge Blanking Duration 3 T
Internal Current Offset Injected on the CS Pin during ON Time
= I
FB
= I
FB
FBrippleOUT
) 3 V
FB100%
) 3 V
FBrippleIN
3 V
CSrippleOUT
3 I
CSLimit
CSrippleIN
DEL
LEB
OPC
475 500 525 mV
100 mV
130 mV
120 150 ns
350 ns
(Over Power Compensation)
@ 1.0 V on Pin 1 and Vpin3 = 0.5 V @ 2.0 V on Pin 1 and Vpin3 = 0.5 V
Maximum ON Time 5 MaxT
ON
35
105
52 67 82 ms
mA
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