ON Semiconductor NCN5192NGEVB User Manual

NCN5192NGEVB

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NCN5192NG Evaluation
Board User's Manual

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EVAL BOARD USER’S MANUAL

Introduction

The NCN5192NGEVB includes all external components
needed for operating NCN5192 and demonstrates the small
PCB surface area such an implementation requires. The
EVB allows easy design of HART implementations using
NCN5192.

Overview

The NCN5192 is a single-chip, CMOS modem for use in
highway addressable remote transducer (HART) field
instruments and masters. The modem and a few external
passive components provide all of the functions needed to
satisfy HART physical layer requirements including
modulation, demodulation, receive filtering, carrier detect,
and transmit-signal shaping.

The NCN5192 also includes an internal 16-bit
sigma-delta modulation DAC for easy implementation of
slave devices. An SPI bus provides easy communication to
this DAC and internal registers.

Features

• Single-chip, Half-duplex 1200 bits per Second FSK

Modem

• Bell 202 Shift Frequencies of 1200 Hz and 2200 Hz

• 3.0 V − 5.5 V Power Supply

• Transmit-signal Wave Shaping

• Receive Band-pass Filter

• Low Power: Optimal for Intrinsically Safe Applications

• Compatible with 3.3 V or 5 V Microcontroller

• Internal Oscillator with 1.84 MHz Crystal

• Meets HART Physical Layer Requirements

• Includes 16-bit DAC for Slave Implementation

• Industrial Temperature Range of −40°C to +85°C

• Available in 32-pin QFN

Applications

• HART Multiplexers

• HART Modem Interfaces

• 4-20 mA Loop Powered Transmitters

Figure 1. NCN5192NGEVB Evaluation Board

© Semiconductor Components Industries, LLC, 2012

October, 2012 − Rev. 4

1 Publication Order Number:

EVBUM2047/D

NCN5192NGEVB

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Table 1. ELECTRICAL CHARACTERISTICS OF THE NCN5192NGEVB BOARD

Symbol Characteristic Min Typ Max Units

V

DD

Current Consumption

I

DD

I

DD

I

DD

I

DD

I

DD

Transmitted Frequency

f

M

f

S

Levels

V

TxA

V

CD

Reference Voltages

V

AREF

V

CDREF

Supply Voltage 2.80 3.00 6.00 V

VDD = 2.80 V, idle − 350 −

VDD = 3.00 V, idle − 360 −

VDD = 6.00 V, idle − 490 −

External Clock, VDD = 3.00 V, idle − 290 −

External Clock, VDD = 2.80 V, idle − 240 −

Mark “1” − 1194 − Hz

Space “0” − 2204 − Hz

Amplitude Transmit Output − 500 − mV p-p

Carrier Detect Level − 110 − mV p-p

AREF − 1.248 − V

CDREF − 1.163 − V

mA

mA

mA

mA

mA

NCN5192 Description

The NCN5192 modem is a single-chip CMOS modem for
use in HART field instruments and masters. It includes
on-chip oscillator and a modulator and demodulator module
communicating with a UART without internal buffer, as
well as an internal 16 bit sigma delta DAC. The NCN5192
requires some external filter components and a 460.8 kHz,

921.6 kHz, or 1.84 MHz clock source. This clock source can
either be the interface oscillator by using a crystal or ceramic
resonator, or an external clock signal.

When the device is transmitting data, the receive module
is shut down and vice versa to conserve power. With simple
power-saving maneuvers, the IC can be made to operate
with a current consumption of as little as 250 mA. The same
techniques apply as explained for the A5191HRT in the
Design Note “A5191HRT Design for Low-Power
Environments” (AND9030/D).

Test and Measurement Tools

Listed below are the tools used to acquire the values

presented in this evaluation board.

• Oscilloscope: Tektronix DPO4101 1 GHz

• Signal Generator: Agilent 33250A

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Schematic Diagram − BOM List

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NCN5192NGEVB

NCN5192NGEVB DESCRIPTION

Figure 2. NCN5192NGEVB Schematic

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Table 2. NCN5192NGEVB BILL OF MATERIALS

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Reference Manufacturer & Comments Value Size Quantity

C1, C2, C3, C7, C

C4, C

5

C6, C14, C

C

9

C10, C

11

C

12

C

13

IDC1, IDC2, IDC3, IDC

J

2

R12, R14, R20, R24, R38, R

R13, R21, R22, R23, R30, R31, R

R15, R

39

R

25

R26, R27, R28, R32, R

R

29

R

33

R

34

R

37

TP5, TP6, TP7, TP

U

1

U

2

Y

1

8

15

Do Not Populate DNP 0603 1

4

SMB Connector, Do Not Populate DNP 0603 1

40

36

35

8

Do Not Populate DNP 0603 6

Do Not Populate DNP 4

ON Semiconductor NCN5192 1

Linear Technology LT1790−1.25 1

NCN5192NGEVB

100 nF 0603 5

27 pF 0603 2

1 mF

470 nF 0603 1

1nF 0603 2

220 pF 0603 1

IDC10 4

220 kW

0R 0603 2

560 kW

470 kW

33 kW

680 kW

3M3 0603 1

4k7 0603 1

TOKEN ZTACC1.84MG 1

0603 3

0603 7

0603 1

0603 5

0603 1

0603 1

General Overview

The NCN5192NGEVB evaluation board demonstrates
the external components required for the operation of the IC.
We will cover the different sections below as well as possible

Figure 3. Board Drawing with Indication of Different Sections

alternatives. A drawing of the board where the different
sections are indicated is shown below.

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Power Supply and References

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NCN5192NGEVB

Power Supply

The NCN5192NGEVB is designed for a nominal voltage
of 3 V. However, NCN5192 can be operated up to 6 V. For
optimal functioning of the board, the values of several
resistors should be changed for operation at voltages higher
than 3 V (see the sections on reference voltages and bias for
more information).

Figure 4. Supply Voltage and Power on Reset

Current consumption of the module is very limited,
making it ideal to be battery or loop-powered.
Measurements of the power consumption of the module are
listed in Table 1.

The module will use less power when clock signal is
applied externally, as this allows the modem to shut down
the oscillator circuit. As is to be expected, a higher supply
voltage increases current consumption.

The NCN5192 includes an internal voltage supervisor.
This will guarantee correct operation of the digital circuitry
during start-up. All that is required for using this supervisor
is an external resistor divider (R
supervisor compares the voltage offered by the resistor
divider on the VPOR pin to AREF. The resistor divider
should be dimensioned such that at the desired turn-on point
of the voltage supervisor, the VPOR pin is equal to AREF.
On the evaluation board the resistor divider is dimensioned
to make the POR trip at 2.8 V.

The voltage supervisor will keep the RESETB pin low
until its threshold value is reached, and will then wait an
additional minimum of 35 ms until it releases the RESETB.
This ensures that some time has passed after the supply
voltage reaches the turn-on voltage.

The RESETB en V
shown in Figure 5. The measured start-up delay is 48 ms.

pin signals during startup are

DD

, R26). The voltage

25

Figure 5. Power (Light Blue) and RESETB (Dark Blue) Waveform during Startup, Showing 48 ms Startup Delay

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