ON Semiconductor NCL35076 User manual

Page 1

CCM Buck Controller for

Precise Current Regulation and Wide Analog Dimming

NCL35076

The NCL35076 is a DC−DC buck controller for wide dimming range down to 1% by analog dimming control to relieve audible noise and flicker in PWM dimming. ON Semiconductor’s proprietary LED current calculation technique driven by zero input offset amplifiers performs precise constant current in the whole analog dimming range. Multi−mode operation provides low LED current ripple with small output capacitor by CCM at heavy load and deep analog dimming by DCM at light load.

PWM dimming is also provided in case that constant LED color temperature is required. NCL35076 ensures high system reliability with LED short protection, over current protection and thermal shutdown.

Features

• Wide Analog Dimming Range: 1~100%

• Low CC Tolerance: ±2% at 100% Load & ±20% at 1% Load

• Low System BOM

• LED Off Mode at Standby

• Low Standby Current

• PWM Dimming Available

• Gate Sourcing and Sinking Current of 0.5 A/0.8 A

• Robust Protection Features

♦ LED Short Protection ♦ Over Current Protection ♦ Thermal Shutdown ♦ V

Over Voltage Protection

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SOIC−8 NB

CASE 751

MARKING DIAGRAM

L35076AA

AWLYYWW

L30076 = Specific Device Code AA = Default Trimming Option A = Assembly Location WL = Wafer Lot Traceability Code YYWW = 4 Digit Data Code

PIN ASSIGNMENT

PGBIAS

Typical Applications

• LED Lighting System

April, 2021 − Rev. 2

DRVCSZCD VDDSG

DIMFB

(Top View)

ORDERING INFORMATION

Device Package Shipping

NCL35076AADR2G SOIC−8 NB 3000 /

Tape & Ree

†For information on tape and reel specifications,

including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.

1 Publication Order Number:

NCL35076/D

Page 2

NCL35076

APPLICATION SCHEMATIC

30~200 Vin

Dimming

Signal

PFC

Flyback

DIM

DRV

CSZCD

NCL35076

BIAS

VDD

External source

Figure 1. Application Schematic

BLOCK DIAGRAM

RCS

VDD

BIAS

DIM

CSZCD

10 V /

3.3 V

8 V

LDO

Toff generator

OTA

Reference control PWM dimming control

Standby mode control

Over voltage protection

LED short protection

Over current protection

Thermal Shutdown

Soft start

LED

REF

DD−ON

TO FF.SS

TO FF.FB

+ 30 mV

PDIM

SHUTDOWN

CS.LIM

PDIM

OFF

Protection

AR control

|| V

SHUTDOWN

PWM

S R

Precise LED

current calculator

SHUTDOWN

DRV

CS.LIM

CSZCD

Figure 2. Simplified Block Diagram

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Page 3

NCL35076

PIN FUNCTION DESCRIPTION

Pin No.

Pin Name

Function

Description

BIAS

3.3 V BIAS

This pin is 3.3 V LDO output to bias the internal digital circuit

CSZCD

CS and ZCD Sensing

This pin detects the switch current and the inductor current zero cross time

3SGSignal Ground

Signal Ground is close to control pin circuit such as CSZCD, DIM and FB

4FBFeedback

Output of feedback OTA

DIM

Dimming Input

Dimming signal is provided to this pin

VDD

Power Supply

IC operating current is supplied to this pin

DRV

Output Drive

This pin is connected to drive external switch

8PGPower Ground

Power Ground is close to the capacitors at BIAS and VDD pin

PIN CONFIGURATION

(Top View)

Figure 3. Pin Configuration

PGBIAS DRVCSZCD VDDSG DIMFB

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Page 4

NCL35076

MAXIMUM RATINGS

Parameter

Symbol

Value

Unit

VDD, DRV Pin Voltage Range

−0.3 to 30

DIM, FB, CSZCD, BIAS Pin Voltage Range

−0.3 to 5.5

Maximum Power Dissipation (TA < 50°C)

550

Maximum Junction Temperature

150

Storage Temperature Range

−55 to 150

Junction−to−Ambient Thermal Impedance

145

C/W

ESD Capability, Human Body Model (Note 2)

ESD

ESD Capability, Charged Device Model (Note 2)

ESD

RECOMMENDED OPERATING RANGES

Parameter

Symbol

Min

Max

Unit

Junction Temperature

TJ−40

125

ELECTRICAL CHARACTERISTICS (V

= 15 V and TJ = −40~125°C unless otherwise specified)

Parameter

Test Conditions

Symbol

Min

Typ

Max

Unit

VDD SECTION

IC Turn−On Threshold Voltage

9.3

10.0

10.7

IC Turn−Off Threshold Voltage

7.4

8.0

8.6

Startup Current

VDD = V

− 1.6 V

−

250

400

Operating Current

−

6.5

8.0

Standby Current

−

200

300

BIAS SECTION

3.23

3.30

3.37

TJ = 25~100°C (Note 4)

3.25

3.30

3.35

DIM SECTION

DIM Voltage for 100% V

= 2.6 V

)

2.44

2.50

2.56

DIM Voltage for 99% V

)

2.400

2.475

2.528

Standby Enabling DIM Voltage

5075100

Standby Disabling DIM Voltage

100

140

Standby Delay Time

91011

FB SECTION

FB OTA Source Current

IFB = (V

− V

) x g

x 12.5

−14.0

−11.5

−9.0

FB OTA Sink Current

IFB = (V

− V

) x g

x 12.5

9.0

11.5

14.0

SPECIFICATIONS

MV(MAX)

LV(MAX)

D(MAX)

J(max)

STG

θJA

HBM CDM

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.

1. Refer to ELECTRICAL CHARACTERISTICS, RECOMMENDED OPERATING RANGES and/or APPLICATION INFORMATION for Safe Operating parameters.

2. This device series incorporates ESD protection and is tested by the following methods:

− ESD Human Body Model per JEDEC Standard JESD22−A114

− ESD Charged Device Model per JEDEC Standard JESD22−C101

− Latch−up Current Maximum Rating ±100 mA per JEDEC Standard JESD78

Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability.

DD(ON)

DD(OFF)

DD(ON)

BIAS Voltage V

REF

DIM

DIM(REF−MAX DIM(MAX−EFF

DIM(SB−ENA)

DIM(SB−DIS)

SB(DELAY)

DD(ST)

DD(OP)

DD(SB)

BIAS

LED

REF

= 120 mV, V

REF

= 40 mV, V

REF

LED

REF

LED

M(FB)

= 80 mV

M(FB)

= 80 mV

FB(SOURCE)

FB(SINK)

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Page 5

NCL35076

FB OTA Transconductance

= IFB / {(V

− V

) x 12.5}

182328

mho

FB OTA High Voltage

= 120 mV, V

= 80 mV

4.7−−

FB Minimum Clamping Voltage

= 0 mV, V

= 80 mV

0.4

0.5

0.6

CS SECTION

CS Regulation

)

175

180

185

CS Current Ripple Voltage

253035

CS Current Limit Minimum

728088

DUTY SECTION

Leading Edge Blanking Time at

360

400

440

Maximum Ton Time

455055

Minimum Toff T ime

VFB = 3.8 V

400

850

1000

Maximum Toff Time

VFB = 0.5 V

1.17

1.30

1.43

Maximum FB Voltage for Min. Toff

)

3.30

3.43

3.55

Minimum FB Voltage for Max. Toff

)

0.9

1.1

1.3

DRV SECTION

DRV Low Voltage

−−0.2

DRV High Voltage

VDD = 15 V

111213

DRV Rising Time

= 3.3 nF

100

145

DRV Falling Time

= 3.3 nF

2555105

AUTO RESTART SECTION

Auto Restart Time at Protection

0.9

1.0

1.1

VDD OVER VOLTAGE PROTECTION SECTION

VDD Over Voltage Threshold Voltage

222324

SHORT LED PROTECTION SECTION

SLP Monitoring Triggering Delay

)

182022

SLP Monitoring Disable Time at

10.8

12.0

13.2

OVER CURRENT PROTECTION SECTION

CS Over Current Protection Thresh-

0.4

0.5

0.6

THERMAL SHUTDOWN SECTION

Thermal Shut Down Temperature

TSD130

150

170°C

Thermal Shut Down Hysteresis

253035°C

LECTRICAL CHARACTERISTICS (V

Parameter UnitMaxTypMinSymbolTest Conditions

FB SECTION

Turn−on

= 15 V and TJ = −40~125°C unless otherwise specified) (continued)

M(FB)

REF REF

DRV DRV

REF

LED

M(FB)

FB(HIGH)

FB(CLP)

CS(REG−MAX

CS(RIPPLE)

CS(LIM−MIN)

LEB(TON)

ON(MAX) OFF(MIN)

OFF(MAX)

FB(MAX−TOFF

FB(MIN−TOFF

DRV(LOW)

DRV(HIGH)

DRV(R) DRV(F)

AR(PROT)

DD(OVP)

Time

Startup

old

SLP(MON−DEL

SLP(MON−DIS)

CS(OCP)

(Note 3)

SD(HYS)

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.

3. Guaranteed by design.

4. Guaranteed by characterization.

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Page 6

NCL35076

1.006

CS(LIM−MIN)

DD(OVP)

TYPICAL CHARACTERISTICS

(These characteristic graphs are normalized at TA = 25°C)

1.004

1.002

0.998

Normalized at 255C

0.996

0.994

−40 −20 0 20 40 60 80 100 120 140

Temperature (5C)

Figure 4. V

1.03

1.02

1.01

0.99

Normalized at 255C

0.98

0.97

−40 −20 0 20 40 60 80 100 120 140

vs. Temperature Figure 5. V

BIAS

Temperature (5C)

1.004

1.002

0.998

Normalized at 255C

0.996

0.994

−40 −20 0 20 40 60 80 100 120 140

Temperature (5C)

DIM(MAX)

1.006

1.004

1.002

0.998

Normalized at 255C

0.996

0.994

−40 −20 0 20 40 60 80 100 120 140

vs. Temperature

Temperature (5C)

Figure 6. g

1.006

1.004

1.002

0.998

Normalized at 255C

0.996

0.994

−40 −20 0 20 40 60 80 100 120 140

vs. Temperature Figure 7. V

M(FB)

Temperature (5C)

Figure 8. V

vs. Temperature Figure 9. V

CS(REG−MAX)

1.006

1.004

1.002

0.998

Normalized at 255C

0.996

0.994

−40 −20 0 20 40 60 80 100 120 140

vs. Temperature

Temperature (5C)

vs. Temperature

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Page 7

NCL35076

APPLICATION INFORMATION

General

NCL35076 provides wide analog dimming down to 1% with high CC accuracy. According to buck inductor, input voltage and output voltage, deep dimming down to

0.1~0.2% load can be achieved. Thanks to the ON semiconductor’s proprietary LED current calculation technique, NCL35076 is able to measure the current of LED load connected at input voltage node without the upper limit of the input voltage with high system reliability. LED current is sensed and regulated by internal zero input offset amplifiers so that NCL35076 performs precise CC regulation in the whole analog dimming range. Therefore, CC tolerance is tightly controlled in ±2% at 100% load and ±20% at 1% load.

Wide Analog Dimming

Wide analog dimming range is obtained by transitioning multi−mode between CCM and DCM according to the dimming condition. At full load condition, CCM with ±17% inductor current ripple minimizes the conduction loss with high efficiency and DCM is entered at light load condition to perform analog deep dimming. Dimming curve linearity is obtained by a digital compensator in the entire dimming range.

PWM Dimming

Analog dimming has benefits for less audible noise and flicker compared to PWM dimming. However, there is a need of PWM dimming method to keep the constant LED color temperature in specific applications. NCL35076 supports PWM dimming by simply inputting PWM dimming signal to DIM pin.

Precise CC Regulation

CC regulation is very important especially in programmable LED driver because the driver should keep precise CC control under the system variation of LED load, inductor, temperature, etc. Since NCL35076 applies zero input offset amplifiers at LED current calculator block and

OTA, CC tolerance is less than ±2% at 100% load and ±20% at 1% load in the system variation.

Soft start

Without soft start in the closed loop CC control, the LED current overshoot is easily occurred at startup so that the overshoot can affect a lifetime of LEDs and incur an undesirable flash. NCL35076 provides soft start technique to prevent the LED current overshoot by T

Standby Mode

When V

is lower than a standby threshold voltage for

DIM

time control.

OFF

10 ms, standby mode is triggered with LED turn−off and IC current consumption is minimized.

Auto Restart (AR) at Protection

Once protection is triggered, IC operation stops for 1 second and begins soft start operation after the auto restart time delay.

VDD Over Voltage Protection (OVP)

When VDD is higher than 23 V, over voltage protection is triggered.

Short LED Protection (SLP)

When LED is short circuited, the buck stage operates in CCM with maximum turn−off time. By detecting this condition, short LED protection is triggered.

Over Current Protection (OCP)

When CSZCD voltage exceeds the over current threshold voltage, switching is immediately shut down after leading edge blanking time in the short circuit condition of the inductor, the freewheeling diode or the LED load.

Thermal Shot Down (TSD)

When IC junction temperature is higher than 150°C, TSD is triggered and released when the temperature is lower than 120°C.

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Page 8

NCL35076

BASIC OPERATION

NCL35076 is the current mode buck controller in which DRV is off when V 30 mV) and DRV is on by T

is calculated based on V

LED

CSZCD

reaches to V

generator controlled by VFB.

OFF

in precise LED current

CSZCD

calculator block composed of zero input offset amplifiers and V block, V

which controls T inversely proportional to V V

DIM

is controlled by DIM signal. In reference control

REF

is obtained by below equation.

REF

* 0.25 V

DIM

[V] +

REF

time in T

. Therefore, T

1.8

VFB* 1.1

− 0.25 V

DIM

LED

12.5 x R

OFF

LED

current calculator

REF

+ 30 mV

STANDBY

12.5

at OTA to generate V

generator. T

OFF

) 0.1

PWM

CS.LIM

Precise LED

= I

x R

LED

CS.LIM

is compared with V

LED

increases. T

Flyback

OFF.SS

Soft

start

OFF.FB

OFF

generator

OTA

Reference control

Standby mode control

REF

OFF

is set by below equation.

OFF

[ms] +

OFF

CS.LIM

OFF

(= V

REF

(eq. 1)

OFF

is shorter as

(eq. 2)

LED

BUCK

ZCD1

DRV

BUCK

ZCD2

CSZCD

x R

210 mV

180 mV

80 mV

1.1 V

0.5 V

ABC

0.75 V

0.25 V

0.1/0.07 5 V

2.5 V

CS.LIM

REF

Figure 11. Operation Mode vs. V

+ 30 mV

DIM

INDUCTOR

A(CCM)

B(DCM)

DIM

Precise CC Regulation

The output of the precise LED current calculator, V is generated by analog sensing amplifiers and V compared with V

by OTA to generate VFB. Those

REF

LED

sensing amplifiers and OTA have zero input offset compensation technique which performs the excellent CC regulation.

Table 1 shows CC tolerance measured by changing inductor (±20%), temperature (−10, 25, 90 °C), output voltage (10, 30, 50 V) and controller 150 pcs(3 lot variation) in 60 V input 75 W driver. As a result, CC tolerance with system variables at 1% deep dimming condition is less than ±20% and less than ±2.0% at full load condition.

Figure 10. NCL35076 Block Diagram

Wide Analog Dimming

NCL35076 operates in CCM at heavy load and in DCM at light load for a wide analog dimming. Figure 11 shows how NCL35076 operates with V

• A: V

CS.LIM

follows V

REF

inductor current ripple at 2.5 V constant with same T

• B: V

DIM

is clamped to 80 mV and doesn’t changed by

CS.LIM

. T

is lengthened for dimming as VFB is

OFF

in the CCM region.

OFF

DIM

+ 30 mV which is ±17%

. VFB is almost

DIM

decreased. Operating mode is transitioned from CCM to DCM at the boundary of A and B region.

• C: When V

is pulled down to 0.5 V clamping voltage with min.

LED current under open loop control. When V

is lower than 0.25 V, V

DIM

is set to 0 V and

REF

DIM

is further lower than 0.1/0.075 V, standby is triggered with LED turn−off.

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Figure 12. NCL35076 Dimming Curve and CC

Tolerance

Page 9

Table 1. CC TOLERANCE (150 pcs)

Inductor : + 20%

Temp. : −10 / 25 / 90 5C

100% Load

50% Load

10% Load

5% Load

2% Load

1% Load

: 10 V

1.52

1.92

3.24

4.18

7.43

13.06

: 30 V

1.40

1.54

3.26

4.38

7.99

13.87

: 50 V

1.25

1.37

2.68

3.57

7.17

14.06

: 10 / 30 / 50 V

1.62

1.98

4.10

4.94

8.24

15.40

OUT OUT OUT

OUT

NCL35076

Standby Mode

Standby mode is triggered by V

as shown in

DIM

Figure 13.

• A: When V

is lower than V

DIM

DIM(SB−ENA)

is shut down. So, LED lamps turn off.

• B: After t

SB(DELAY)

(10 ms), standby mode is entered and

NCL35076 current consumption drops to I

• C: When V

is higher than V

DIM

DIM(SB−DIS)

mode is immediately terminated and IC starts up.

A B C

100 mV V

75 mV V

DRV

SB(DELAY)

DIM(SB−DIS)

DIM(SB−ENA)

Standby Mode

Figure 13. NCL35076 Standby Mode

Soft Start

During soft start operation, T T start up because T T regulation level and T

or T

OFF_SS

reaches to the steady state level, VFB is settled to the

OFF_SS

OFF_FB

OFF_SS

. T

is governed by T

OFF

decreases from t

is finally decided by T

OFF

the end of the soft start time, T doesn’t affect T

control anymore. Figure 14 shows how

OFF

is decided by either

OFF

OFF_SS

OFF(MAX)

reaches to 0 and

OFF_SS

the soft start operates.

, DRV block

DD(SB)

, standby

Time

in early

. When

OFF_FB

. In

OFF (MAX )

1300

REF

LED

INDUCTOR

ZCD in DCM

Fast

OFF

OFF.SS

OFF.FB

No ZCD in CCM

Slow

Steady

State

Time

Figure 14. Soft Start Sequence

• A: V

is pulled up as V

is reduced quickly from t

is far below V

LED

OFF(MAX)

. T

REF

in Fast SS. Fast SS ends when inductor current zero cross (ZCD) is not detected.

• B: Slow SS starts when there is no ZCD in CCM.

• C: V

is closer to V

LED

is determined by T

OFF

, and VFB starts falling. Then,

REF

and the steady state starts.

OFF_FB

OFF_SS

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Page 10

NCL35076

Protections

When protection is triggered, all functional blocks stop

operating and begin to start up after 1 second AR time.

• VDD Over Voltage Protection (OVP)

When VDD is higher than V

DD(OVP)

is triggered. Open LED protection can be implemented by VDD OVP when VDD is supplied by auxiliary winding in the buck inductor.

(23 V), VDD OVP

• Over Current Protection (OCP)

When CSZCD voltage is higher than V after leading edge blanking time, t

LEB(TON)

immediately shuts down.

CSZCD

CS(OCP)

Figure 15. OCP Block

LE B(TON)

CS(OCP)

(0.5 V)

(400 ns), IC

OCP

• Short LED Protection (SLP)

When LED load is short−circuited, demagnetizing time of the inductor is very long due to zero output voltage so that

is lengthened and TON is very short. If CCM and

OFF

OFF(MAX)

SLP(MON−DEL)

are detected for SLP monitoring time,

(20 ms), SLP is triggered. In order to prevent abnormal SLP triggering at startup, SLP monitoring is disabled for t

SLP(MON−DIS)

(12 ms) after 1

switching begins.

• Thermal Shut Down (TSD)

When the junction temperature is higher than T system shuts down and the junction temperature is monitored at every 1 second delay time (AR time). When the temperature is lower than T

– T

SD(HYS)

restarts.

, the system

, the

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Page 11

NCL35076

APPENDIX: DIMMING CURVE AND CC TOLERANCE WITH SYSTEM VARIABLES

− System: NCL35076 75 W (V

: 60V / V

: 10 ~ 50V / I

OUT

− Temperature variation: −10 / 25 / 90 °C

− Inductance variation: ±20% (120 uH ~ 180 uH)

− Output Voltage: 10 / 30 / 50 V

− NCL35076 Controller: 150 pcs (3 lot variation)

Wide Output Condition (10/30/50V)

NCL35076 150pcs (3lot) + Temp & Inductor variation

+/− 20%

+/− 10%

+/− 6%

Single Output Condition (10V)

NCL35076 150pcs (3lot) + Temp & Inductor variation

+/− 15%

+/− 8%

+/− 5%

OUT(MAX)

: 1.5 A)

+/− 5%

+/− 4%

+/− 3%

Single Output Condition (30V)

NCL35076 150pcs (3lot) + Temp & Inductor variation

+/− 15%

+/− 8%

+/− 5%

Single Output Condition (50V)

NCL35076 150pcs (3lot) + Temp & Inductor variation

+/− 15%

+/− 8%

+/− 5%

Figure 16. CC Tolerance (150 pcs)

+/− 4%

+/− 3%

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Page 12

NCL35076

PCB LAYOUT GUIDANCE

(PCB Layout Guidance)(75−W Demo Board Schematic)

Jumper

(75−W Demo Board PCB Layout − Bottom)

Figure 17. Layout Guidance

Jumper

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Page 13

MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

SCALE 1:1

−Y−

−Z−

−X− A

0.25 (0.010) Z

SOLDERING FOOTPRINT*

7.0

0.275

SXS

0.25 (0.010)

SEATING PLANE

0.060

0.155

0.10 (0.004)

1.52

4.0

CASE 751−07

SOIC−8 NB

ISSUE AK

X 45

MARKING DIAGRAM*

XXXXX ALYWX

XXXXX = Specific Device Code A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb−Free Package

XXXXX ALYWX

(Pb−Free)

DATE 16 FEB 2011

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.

6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07.

MILLIMETERS

DIMAMIN MAX MIN MAX

4.80 5.00 0.189 0.197

B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.053 0.069 D 0.33 0.51 0.013 0.020 G 1.27 BSC 0.050 BSC H 0.10 0.25 0.004 0.010 J 0.19 0.25 0.007 0.010 K 0.40 1.27 0.016 0.050 M 0 8 0 8

____

N 0.25 0.50 0.010 0.020 S 5.80 6.20 0.228 0.244

INCHES

GENERIC

XXXXXX

AYWW

Discrete

XXXXXX = Specific Device Code A = Assembly Location Y = Year WW = Work Week G = Pb−Free Package

XXXXXX

AYWW

Discrete

(Pb−Free)

0.6

0.024

1.270

0.050

SCALE 6:1

inches

*This information is generic. Please refer to

device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking.

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

STYLES ON PAGE 2

DOCUMENT NUMBER:

DESCRIPTION:

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others.

98ASB42564B

SOIC−8 NB

Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 1 OF 2

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Page 14

STYLE 1:

PIN 1. EMITTER

2. COLLECTOR

3. COLLECTOR

4. EMITTER

5. EMITTER

6. BASE

7. BASE

8. EMITTER

STYLE 5:

PIN 1. DRAIN

2. DRAIN

3. DRAIN

4. DRAIN

5. GATE

6. GATE

7. SOURCE

8. SOURCE

STYLE 9:

PIN 1. EMITTER, COMMON

2. COLLECTOR, DIE #1

3. COLLECTOR, DIE #2

4. EMITTER, COMMON

5. EMITTER, COMMON

6. BASE, DIE #2

7. BASE, DIE #1

8. EMITTER, COMMON

STYLE 13:

PIN 1. N.C.

2. SOURCE

3. SOURCE

4. GATE

5. DRAIN

6. DRAIN

7. DRAIN

8. DRAIN

STYLE 17:

PIN 1. VCC

2. V2OUT

3. V1OUT

4. TXE

5. RXE

6. VEE

7. GND

8. ACC

STYLE 21:

PIN 1. CATHODE 1

2. CATHODE 2

3. CATHODE 3

4. CATHODE 4

5. CATHODE 5

6. COMMON ANODE

7. COMMON ANODE

8. CATHODE 6

STYLE 25:

PIN 1. VIN

2. N/C

3. REXT

4. GND

5. IOUT

6. IOUT

7. IOUT

8. IOUT

STYLE 29:

PIN 1. BASE, DIE #1

2. EMITTER, #1

3. BASE, #2

4. EMITTER, #2

5. COLLECTOR, #2

6. COLLECTOR, #2

7. COLLECTOR, #1

8. COLLECTOR, #1

STYLE 2:

PIN 1. COLLECTOR, DIE, #1

2. COLLECTOR, #1

3. COLLECTOR, #2

4. COLLECTOR, #2

5. BASE, #2

6. EMITTER, #2

7. BASE, #1

8. EMITTER, #1

STYLE 6:

PIN 1. SOURCE

2. DRAIN

3. DRAIN

4. SOURCE

5. SOURCE

6. GATE

7. GATE

8. SOURCE

STYLE 10:

PIN 1. GROUND

2. BIAS 1

3. OUTPUT

4. GROUND

5. GROUND

6. BIAS 2

7. INPUT

8. GROUND

STYLE 14:

PIN 1. N−SOURCE

2. N−GATE

3. P−SOURCE

4. P−GATE

5. P−DRAIN

6. P−DRAIN

7. N−DRAIN

8. N−DRAIN

STYLE 18:

PIN 1. ANODE

2. ANODE

3. SOURCE

4. GATE

5. DRAIN

6. DRAIN

7. CATHODE

8. CATHODE

STYLE 22:

PIN 1. I/O LINE 1

2. COMMON CATHODE/VCC

3. COMMON CATHODE/VCC

4. I/O LINE 3

5. COMMON ANODE/GND

6. I/O LINE 4

7. I/O LINE 5

8. COMMON ANODE/GND

STYLE 26:

PIN 1. GND

2. dv/dt

3. ENABLE

4. ILIMIT

5. SOURCE

6. SOURCE

7. SOURCE

8. VCC

STYLE 30:

PIN 1. DRAIN 1

2. DRAIN 1

3. GATE 2

4. SOURCE 2

5. SOURCE 1/DRAIN 2

6. SOURCE 1/DRAIN 2

7. SOURCE 1/DRAIN 2

8. GATE 1

SOIC−8 NB

CASE 751−07

ISSUE AK

STYLE 3:

STYLE 7:

STYLE 11:

STYLE 15:

STYLE 19:

STYLE 23:

PIN 1. DRAIN, DIE #1

2. DRAIN, #1

3. DRAIN, #2

4. DRAIN, #2

5. GATE, #2

6. SOURCE, #2

7. GATE, #1

8. SOURCE, #1

PIN 1. INPUT

2. EXTERNAL BYPASS

3. THIRD STAGE SOURCE

4. GROUND

5. DRAIN

6. GATE 3

7. SECOND STAGE Vd

8. FIRST STAGE Vd

PIN 1. SOURCE 1

2. GATE 1

3. SOURCE 2

4. GATE 2

5. DRAIN 2

6. DRAIN 2

7. DRAIN 1

8. DRAIN 1

PIN 1. ANODE 1

2. ANODE 1

3. ANODE 1

4. ANODE 1

5. CATHODE, COMMON

6. CATHODE, COMMON

7. CATHODE, COMMON

8. CATHODE, COMMON

PIN 1. SOURCE 1

2. GATE 1

3. SOURCE 2

4. GATE 2

5. DRAIN 2

6. MIRROR 2

7. DRAIN 1

8. MIRROR 1

PIN 1. LINE 1 IN

2. COMMON ANODE/GND

3. COMMON ANODE/GND

4. LINE 2 IN

5. LINE 2 OUT

6. COMMON ANODE/GND

7. COMMON ANODE/GND

8. LINE 1 OUT

STYLE 27:

PIN 1. ILIMIT

2. OVLO

3. UVLO

4. INPUT+

5. SOURCE

6. SOURCE

7. SOURCE

8. DRAIN

DATE 16 FEB 2011

STYLE 4:

PIN 1. ANODE

2. ANODE

3. ANODE

4. ANODE

5. ANODE

6. ANODE

7. ANODE

8. COMMON CATHODE

STYLE 8:

PIN 1. COLLECTOR, DIE #1

2. BASE, #1

3. BASE, #2

4. COLLECTOR, #2

5. COLLECTOR, #2

6. EMITTER, #2

7. EMITTER, #1

8. COLLECTOR, #1

STYLE 12:

PIN 1. SOURCE

2. SOURCE

3. SOURCE

4. GATE

5. DRAIN

6. DRAIN

7. DRAIN

8. DRAIN

STYLE 16:

PIN 1. EMITTER, DIE #1

2. BASE, DIE #1

3. EMITTER, DIE #2

4. BASE, DIE #2

5. COLLECTOR, DIE #2

6. COLLECTOR, DIE #2

7. COLLECTOR, DIE #1

8. COLLECTOR, DIE #1

STYLE 20:

PIN 1. SOURCE (N)

2. GATE (N)

3. SOURCE (P)

4. GATE (P)

5. DRAIN

6. DRAIN

7. DRAIN

8. DRAIN

STYLE 24:

PIN 1. BASE

2. EMITTER

3. COLLECTOR/ANODE

4. COLLECTOR/ANODE

5. CATHODE

6. CATHODE

7. COLLECTOR/ANODE

8. COLLECTOR/ANODE

STYLE 28:

PIN 1. SW_TO_GND

2. DASIC_OFF

3. DASIC_SW_DET

4. GND

5. V_MON

6. VBULK

7. VBULK

8. VIN

DOCUMENT NUMBER:

DESCRIPTION:

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others.

98ASB42564B

SOIC−8 NB

Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

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Page 15

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ON Semiconductor NCL35076 User manual

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Frequently Asked Questions

User Manual