ON Semiconductor NC7WZ07 Users guide

TinyLogic UHS Dual Buffer (Open-Drain Outputs)
NC7WZ07
Description
Features
UltraHigh Speed: t
High I
Broad V
Output Drive: ±24 mA at 3 V V
OL
Operating Range: 1.65 V to 5.50 V
CC
= 2.3 ns (Typical)
PZL
Power Down HighImpedance Inputs / Outputs
OverVoltage Tolerance Inputs Facilitate 5 V to 3 V Translation
Proprietary Noise / EMI Reduction Circuitry
UltraSmall MicroPak Packages
These Devices are PbFree, Halogen Free/BFR Free and are RoHS
Compliant
operating range. The device is
CC
operating range. The
CC
range. The
CC
is 0 V. Inputs
CC
operating voltage.
CC
CC
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SIP6
CASE 127EB
Pin 1
UDFN6
CASE 517DP
Pin 1
SC88
CASE 419B−02
MARKING
DIAGRAMS
D3KK
XYZ
D3KK
XYZ
6
Z07M
G
1
G
IEEC / IEC
A
1
A
2
Figure 1. Logic Symbol
1
1
D3, Z07 = Specific Device Code KK = 2Digit Lot Run Traceability Code
Y
1
Y
2
XY = 2−Digit Date Code Format Z = Assembly Plant Code M = Date Code* G = Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may
vary depending upon manufacturing location.
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the package dimensions section on page 5 of this data sheet.
Semiconductor Components Industries, LLC, 2000
January, 2021 Rev. 3
1 Publication Order Number:
NC7WZ07/D
NC7WZ07
A
1
1
GND V
2
A
3
2
Y
6
1
5
CC
Y
4
2
Figure 2. SC−88 (Top View)
(Top View)
Pin One
NOTES:
1. AAA represents product code top mark (see Ordering Information).
2. Orientation of top mark determines pin one location.
3. Read the top mark left to right, pin one is the lower left pin.
AAA
Figure 4. Pin 1 Orientation
PIN DEFINITIONS
Pin # SC88 Pin # MicroPak Name Description
1 1 A
2 2 GND Ground
3 3 A
4 4 Y
5 5 V
6 6 Y
1
2
2
CC
1
Input
Input
Output
Supply Voltage
Output
A1 1 6 Y
GND 2 5 V
A2 3 4 Y
Figure 3. MicroPak (Top Through View)
FUNCTION TABLE (Y = A)
Inputs
A Y
LOW Logic Level LOW Logic Level
HIGH Logic Level HIGH Impedance Output
State, Open Drain
1
CC
2
Output
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2
NC7WZ07
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Min Max Unit
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
ICC or I
T
STG
T
J
T
L
P
D
ESD
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.
Supply Voltage −0.5 6.5 V
DC Input Voltage −0.5 6.5 V
DC Output Voltage −0.5 6.5 V
DC Input Diode Current VIN < 0 V 50 mA
DC Output Diode Current V
< 0 V 50 mA
OUT
DC Output Current ±50 mA
DC VCC or Ground Current ±50 mA
GND
Storage Temperature Range −65 +150 °C
Junction Temperature Under Bias +150 °C
Junction Lead Temperature (Soldering, 10 Seconds) +260 °C
Power Dissipation in Still Air
SC88 332
MicroPak−6 812
MicroPak26 812
Human Body Model, JEDEC: JESD22A114 4000
Charge Device Model, JEDEC: JESD22C101 2000
mW
V
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Conditions Min Max Unit
V
CC
Supply Voltage Operating 1.65 5.5
Supply Voltage Data Retention 1.5 5.5
V
V
OUT
tr, t
IN
Input Voltage 0 5.5 V
Output Voltage 0 5.5 V
Input Rise and Fall Times
f
VCC at 1.8 V ±0.15 V, 2.5 V ±0.2 V 0 20
VCC at 3.3 V ±0.3 V 0 10
VCC at 5.0 V ±0.5 V 0 5
T
q
JA
Operating Temperature −40 +85 °C
A
Thermal Resistance
SC88−6 377
MicroPak−6 154
MicroPak2−6 154
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability.
4. Unused inputs must be held HIGH or LOW. They may not float.
V
ns/V
°C/W
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3
DC ELECTICAL CHARACTERISTICS
Symbol
V
IH
V
IL
I
LKG
V
OL
I
IN
I
OFF
I
CC
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Leakage Current
LOW Level Output Voltage
Input Leakage Current 1.65 to 5.5 0 VIN 5.5 V ±0.1 ±10
Power Off Leakage Current 0 V
Quiescent Supply Current 1.65 to 5.50 V
Parameter V
1.65 to 1.95 0.65 V
2.30 to 5.50 0.70 V
1.65 to 1.95 0.35 V
2.30 to 5.50 0.30 V
1.65 to 1.95 V
NC7WZ07
TA = +25°C TA = 40 to +85°C
(V) Conditions
CC
= VIH or VIL,
IN
V
= VCC or GND
OUT
V
1.65
1.80 0.00 0.10 0.10
= VIH or VIL,
IN
= 100 mA
I
OL
2.30 0.00 0.10 0.10
3.00 0.00 0.10 0.10
4.50 0.00 0.10 0.10
1.65 I
2.30 I
3.00 I
3.00 I
4.50 I
= 4 mA 0.80 0.24 0.24
OL
= 8 mA 0.10 0.30 0.30
OL
= 16 mA 0.16 0.40 0.40
OL
= 24 mA 0.24 0.55 0.55
OL
= 32 mA 0.25 0.55 0.55
OL
IN
IN
or V
= 5.5 V 1 10
OUT
= 5.5 V, GND 1 10
Min Typ Max Min Max
0.65 V
CC
0.70 V
CC
CC
CC
CC
CC
0.35 V
0.30 V
±5 ±10
0.00 0.10 0.00
CC
CC
Unit
V
V
mA
V
mA
mA
mA
AC ELECTRICAL CHARACTERISTICS
TA = +25°C TA = 40 to +85°C
Symbol Parameter V
t
, t
PZL
C
C
OUT
C
Propagation Delay
PLZ
(Figure 5, 6)
Input Capacitance 0 2.5 pF
IN
Output Capacitance 0 4.0 pF
Power Dissipation Capacitance
PD
(Note 5)
(Figure 7)
5. CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (I
no output loading and operating at 50% duty cycle. C
= (CPD) (VCC) (fIN) + (ICCstatic).
I
CCD
(V) Conditions Min Typ Max Min Max Unit
CC
C
1.65
1.80 5.5 9.5 10.5
2.50 ±0.20 3.7 5.8 6.4
= 50 pF,
L
= 500 W,
RU
= 500 W,
RD
= 2 x V
V
I
6.6 11.5 12.6
CC
3.30 ±0.30 2.9 4.4 4.8
5.00 ±0.50 2.3 3.5 3.9
C
1.65
1.80 4.3 9.5 10.5
2.50 ±0.20 2.8 5.8 6.4
= 50 pF,
L
= 500 W,
RU
= 500 W,
RD V
= 2 x V
I
5.5 11.5 12.6
CC
3.30 ±0.30 2.1 4.4 4.8
5.00 ±0.50 1.4 3.5 3.9
3.30 3
5.00 4
is related to I
PD
dynamic operating current by the expression:
CCD
CCD
ns
pF
) at
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4
NC7WZ07
V
I
V
CC
INPUT OUTPUT
NOTE:
includes load and stray capacitance.
6. C
L
7. Input PRR = 1.0 MHz, t
Figure 5. AC Test Circuit Figure 6. AC Waveforms
V
CC
A
INPUT
C
L
W
R
U
R
D
= 500 ns.
NOTE:
= t
8. Input = AC Waveform; t PRR = Variable; Duty Cycle = 50%.
Figure 7. I
Test Circuit
CCD
r
= 1.8 ns;
f
ORDERING INFORMATION
Part Number Top Mark Package Shipping
NC7WZ07P6X Z07 SC88 3000 / Tape & Reel
NC7WZ07L6X D3 MicroPak 5000 / Tape & Reel
NC7WZ07FHX D3 MicroPak2 5000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
MicroPak and MicroPak2 are trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SIP6 1.45X1.0
CASE 127EB
ISSUE O
DATE 31 AUG 2016
DOCUMENT NUMBER:
DESCRIPTION:
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
98AON13590G
SIP6 1.45X1.0
Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
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MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC88/SC706/SOT363
1
SCALE 2:1
D
A
654
E
123
2X
bbb H
D
e
B
TOP VIEW
6X
ccc
C
SIDE VIEW END VIEW
RECOMMENDED
SOLDERING FOOTPRINT*
6X
0.30
0.65
PITCH
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
2X
aaa H D
D
E1
L2
aaa C
2X 3 TIPS
b
6X
M
A2
A
A1
C
6X
0.66
SEATING PLANE
2.50
DIMENSIONS: MILLIMETERS
Cddd
A-B D
DETAIL A
CASE 419B02
ISSUE Y
H
L
DETAIL A
GAGE
PLANE
DATE 11 DEC 2012
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRU­SIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.
4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY AND DATUM H.
5. DATUMS A AND B ARE DETERMINED AT DATUM H.
6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP.
7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDI­TION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OF THE FOOT.
MILLIMETERS
DIM MIN NOM MAX
A −−− −−− 1.10 A1 0.00 −−− 0.10 A2 0.70 0.90 1.00 0.027 0.035 0.039
b 0.15 0.20 0.25 C 0.08 0.15 0.22 D 1.80 2.00 2.20 E
2.00 2.10 2.20
E1 1.15 1.25 1.35
e 0.65 BSC
L 0.26 0.36 0.46
L2 0.15 BSC 0.006 BSC aaa 0.15 0.006 bbb 0.30 0.012 ccc 0.10 0.004 ddd
c
0.10 0.004
INCHES
MIN NOM MAX
−−− −−− 0.043
0.000 −−− 0.004
0.006 0.008 0.010
0.003 0.006 0.009
0.070 0.078 0.086
0.078 0.082 0.086
0.045 0.049 0.053
0.026 BSC
0.010 0.014 0.018
GENERIC
MARKING DIAGRAM*
6
XXXMG
G
1
XXX = Specific Device Code M = Date Code* G = Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may
vary depending upon manufacturing location.
*This information is generic. Please refer to
device data sheet for actual part marking. PbFree indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking.
STYLES ON PAGE 2
DOCUMENT NUMBER:
DESCRIPTION:
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
98ASB42985B
SC88/SC706/SOT363
Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 2
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SC88/SC706/SOT363
CASE 419B−02
ISSUE Y
DATE 11 DEC 2012
STYLE 1:
PIN 1. EMITTER 2
2. BASE 2
3. COLLECTOR 1
4. EMITTER 1
5. BASE 1
6. COLLECTOR 2
STYLE 7:
PIN 1. SOURCE 2
2. DRAIN 2
3. GATE 1
4. SOURCE 1
5. DRAIN 1
6. GATE 2
STYLE 13:
PIN 1. ANODE
2. N/C
3. COLLECTOR
4. EMITTER
5. BASE
6. CATHODE
STYLE 19:
PIN 1. I OUT
2. GND
3. GND
4. V CC
5. V EN
6. V REF
STYLE 25:
PIN 1. BASE 1
2. CATHODE
3. COLLECTOR 2
4. BASE 2
5. EMITTER
6. COLLECTOR 1
STYLE 2:
CANCELLED
STYLE 8:
CANCELLED
STYLE 14:
PIN 1. VREF
2. GND
3. GND
4. IOUT
5. VEN
6. VCC
STYLE 20:
PIN 1. COLLECTOR
2. COLLECTOR
3. BASE
4. EMITTER
5. COLLECTOR
6. COLLECTOR
STYLE 26:
PIN 1. SOURCE 1
2. GATE 1
3. DRAIN 2
4. SOURCE 2
5. GATE 2
6. DRAIN 1
STYLE 3:
CANCELLED
STYLE 9:
PIN 1. EMITTER 2
2. EMITTER 1
3. COLLECTOR 1
4. BASE 1
5. BASE 2
6. COLLECTOR 2
STYLE 15:
PIN 1. ANODE 1
2. ANODE 2
3. ANODE 3
4. CATHODE 3
5. CATHODE 2
6. CATHODE 1
STYLE 21:
PIN 1. ANODE 1
2. N/C
3. ANODE 2
4. CATHODE 2
5. N/C
6. CATHODE 1
STYLE 27:
PIN 1. BASE 2
2. BASE 1
3. COLLECTOR 1
4. EMITTER 1
5. EMITTER 2
6. COLLECTOR 2
STYLE 4:
PIN 1. CATHODE
2. CATHODE
3. COLLECTOR
4. EMITTER
5. BASE
6. ANODE
STYLE 10:
PIN 1. SOURCE 2
2. SOURCE 1
3. GATE 1
4. DRAIN 1
5. DRAIN 2
6. GATE 2
STYLE 16:
PIN 1. BASE 1
2. EMITTER 2
3. COLLECTOR 2
4. BASE 2
5. EMITTER 1
6. COLLECTOR 1
STYLE 22:
PIN 1. D1 (i)
2. GND
3. D2 (i)
4. D2 (c)
5. VBUS
6. D1 (c)
STYLE 28:
PIN 1. DRAIN
2. DRAIN
3. GATE
4. SOURCE
5. DRAIN
6. DRAIN
Note: Please refer to datasheet for style callout. If style type is not called out in the datasheet refer to the device datasheet pinout or pin assignment.
STYLE 5:
PIN 1. ANODE
2. ANODE
3. COLLECTOR
4. EMITTER
5. BASE
6. CATHODE
STYLE 11:
PIN 1. CATHODE 2
2. CATHODE 2
3. ANODE 1
4. CATHODE 1
5. CATHODE 1
6. ANODE 2
STYLE 17:
PIN 1. BASE 1
2. EMITTER 1
3. COLLECTOR 2
4. BASE 2
5. EMITTER 2
6. COLLECTOR 1
STYLE 23:
PIN 1. Vn
2. CH1
3. Vp
4. N/C
5. CH2
6. N/C
STYLE 29:
PIN 1. ANODE
2. ANODE
3. COLLECTOR
4. EMITTER
5. BASE/ANODE
6. CATHODE
STYLE 6:
PIN 1. ANODE 2
2. N/C
3. CATHODE 1
4. ANODE 1
5. N/C
6. CATHODE 2
STYLE 12:
PIN 1. ANODE 2
2. ANODE 2
3. CATHODE 1
4. ANODE 1
5. ANODE 1
6. CATHODE 2
STYLE 18:
PIN 1. VIN1
2. VCC
3. VOUT2
4. VIN2
5. GND
6. VOUT1
STYLE 24:
PIN 1. CATHODE
2. ANODE
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
STYLE 30:
PIN 1. SOURCE 1
2. DRAIN 2
3. DRAIN 2
4. SOURCE 2
5. GATE 1
6. DRAIN 1
DOCUMENT NUMBER:
DESCRIPTION:
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
98ASB42985B
SC88/SC706/SOT363
Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 2 OF 2
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MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
UDFN6 1.0X1.0, 0.35P
CASE 517DP
ISSUE O
DATE 31 AUG 2016
DOCUMENT NUMBER:
DESCRIPTION:
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
98AON13593G
UDFN6 1.0X1.0, 0.35P
Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
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ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/PatentMarking.pdf ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
. ON Semiconductor reserves the right to make changes without further notice to any products herein.
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