ON Semiconductor NC7WV04 User Manual

TinyLogic ULP-A Dual Inverter
NC7WV04
The NC7WV04 is a dual inverter in tiny footprint packages. The
Features
Designed for 0.9 V to 3.6 V V
1.6 ns t
at 3.3 V (Typ)
PD
=
CC
Operation
CC
0.9 V to 3.6 V.
Inputs/Outputs OverVoltage Tolerant up to 3.6 V
I
Supports Partial Power Down Protection
OFF
Source/Sink 24 mA at 3.3 V
Available in SC88A and MicroPak™ Packages
These Devices are PbFree, Halogen Free/BFR Free and are RoHS
Compliant
A1
GND
A2
Y1
1
2
3
SC88A
6
CC
GND 2
V
5
Y2
4
Figure 1. Pinout Diagrams (Top Views)
MicroPak
6Y1A1 1
5V
4Y2A2 3
CC
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MARKING
DIAGRAMS
SIP6 1.45X1.0
MicroPak
CASE 127EB
Pin 1
CC = Specific Device Code KK = 2Digit Lot Run Traceability Code XY = 2−Digit Date Code Z = Assembly Plant Code
SC88
DF SUFFIX
CASE 419B02
1
XXX = Specific Devic Code M = Date Code* G = Pb−Free Package
CCKK
XYZ
6
XXXM
G
1
G
PIN ASSIGNMENT
Pin Function
1 A1
2 GND
3 A2
4 Y2
5 V
6 Y1
A1
A2
1
1
Figure 2. Logic Symbol
CC
Y1
Y2
(Note: Microdot may be in either location)
*Date Code orientation and/or position may
vary depending upon manufacturing location.
ORDERING INFORMATION
See detailed ordering, marking and shipping information on page 6 of this data sheet.
FUNCTION TABLE
A Input Y Output
L H
H L
© Semiconductor Components Industries, LLC, 2004
February, 2021 − Rev. 1
1 Publication Order Number:
NC7WV04/D
NC7WV04
MAXIMUM RATINGS
Symbol Characteristics Value Unit
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
ICC or I
T
STG
T
L
T
J
q
JA
P
D
MSL Moisture Sensitivity Level 1
F
R
V
ESD
I
Latchup
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.
1. Applicable to devices with outputs that may be tri−stated.
2. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2 ounce copper trace no air flow per JESD51−7.
3. HBM tested to EIA / JESD22−A114A. CDM tested to JESD22C101−A. JEDEC recommends that ESD qualification to EIA/JESD22−A115A (Machine Model) be discontinued.
4. Tested to EIA/JESD78 Class II.
DC Supply Voltage −0.5 to +4.3 V
DC Input Voltage −0.5 to +4.3 V
DC Output Voltage ActiveMode (High or Low State)
TriState Mode (Note 1)
PowerDown Mode (V
CC
= 0 V)
0.5 to VCC + 0.5
0.5 to +4.3
0.5 to +4.3
DC Input Diode Current VIN < GND 50 mA
DC Output Diode Current V
< GND 50 mA
OUT
DC Output Source/Sink Current ±50 mA
DC Supply Current per Supply Pin or Ground Pin ±50 mA
GND
Storage Temperature Range −65 to +150 °C
Lead Temperature, 1 mm from Case for 10 Seconds 260 °C
Junction Temperature Under Bias +150 °C
Thermal Resistance (Note 2) SC−88A
MicroPak
Power Dissipation in Still Air SC−88A
MicroPak
377 154
332 812
Flammability Rating Oxygen Index: 28 to 34 UL 94 V0 @ 0.125 in
ESD Withstand Voltage (Note 3) Human Body Model
Charged Device Model
2000 1000
Latchup Performance (Note 4) ±100 mA
V
°C/W
mW
V
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NC7WV04
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
CC
V
V
OUT
T
t
r
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
Symbol
V
IH
V
IL
V
OH
Positive DC Supply Voltage 0.9 3.6 V
DC Input Voltage 0 3.6
IN
DC Output Voltage ActiveMode (High or Low State)
TriState Mode (Note 1)
PowerDown Mode (V
Operating Temperature Range −40 +85 °C
A
, t
Input Transition Rise and Fall Time VCC = 3.3 V ± 0.3 V 0 10 ns/V
f
CC
= 0 V)
0 0 0
TA = 255C TA = 405C to +855C
Parameter Condition V
HighLevel Input Voltage
(V)
CC
0.9
1.1 to 1.3 0.65 x V
1.4 to 1.6 0.65 x V
1.65 to 1.95 0.65 x V
Min Typ Max Min Max
0.5
0.65 x V
CC
0.65 x V
CC
0.65 x V
CC
CC
CC
CC
2.3 to <2.7 1.6 1.6
2.0 2.0
CC
CC
CC
0.35 x V
0.35 x V
0.35 x V
LowLevel Input Voltage
2.7 to 3.6
0.9 0.5
1.1 to 1.3 0.35 x V
1.4 to 1.6 0.35 x V
1.65 to 1.95 0.35 x V
2.3 to <2.7 0.7 0.7
2.7 to 3.6 0.8 0.8
HighLevel Output Voltage
VIN = V
IOH = 100 mA
or V
IH
IL
0.9 VCC –
0.1
1.1 to 1.3 VCC – 0.1 VCC – 0.1
1.4 to 1.6 VCC – 0.1 VCC – 0.1
1.65 to 1.95 VCC – 0.2 VCC – 0.2
2.3 to <2.7 VCC – 0.2 VCC – 0.2
2.7 to 3.6 VCC – 0.2 VCC – 0.2
IOH = 2 mA 1.1 o 1.3 0.75 x V
IOH = 4 mA 1.4 to 1.6 0.75 x V
IOH = 6 mA
1.65 to 1.95 1.25 1.25
0.75 x V
CC
0.75 x V
CC
CC
CC
2.3 to <2.7 2.0 2.0
IOH = 12 mA
2.3 to <2.7 1.8 1.8
2.7 to 3.6 2.2 2.2
IOH = 18 mA
2.3 to <2.7 1.7 1.7
2.7 to 3.6 2.4 2.4
IOH = 24 mA 2.7 to 3.6 2.2 2.2
V
3.6
3.6
CC
V
Unit
V
V
CC
CC
CC
V
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3
NC7WV04
DC ELECTRICAL CHARACTERISTICS (continued)
T
= 405C to +855CTA = 255C
A
Symbol Unit
V
OL
LowLevel Output Voltage
VIN = V
IOL = 100 mA
or V
IH
IL
V
(V)ConditionParameter
CC
0.9 0.1
1.1 to 1.3 0.1 0.1
1.4 to 1.6 0.1 0.1
1.65 to 1.95 0.2 0.2
2.3 to < 2.7 0.2 0.2
2.7 to 3.6 0.2 0.2
IOL = 2 mA 1.1 o 1.3 0.25 x V
IOL = 4 mA 1.4 to 1.6 0.25 x V
CC
CC
0.25 x V
0.25 x V
IOL = 6 mA 1.65 to 1.95 0.3 0.3
IOL = 12 mA
2.3 to <2.7 0.4 0.4
2.7 to 3.6 0.4 0.4
IOL = 18 mA
2.3 to <2.7 0.6 0.6
2.7 to 3.6 0.4 0.4
IOL = 24 mA 2.7 to 3.6 0.55 0.55
I
Input Leakage
IN
Current
I
Power Off Leakage
OFF
Current
I
Quiescent Supply
CC
Current
VIN = 0 V to 3.6 V 0.9 to 3.6 ±0.1 ±0.5
VIN = 0 V to 3.6 V or V
= 0 V to 3.6 V
OUT
0 0.5 0.5
VIN = VCC or GND 0.9 to 3.6 0.9 0.9
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.
MaxMinMaxTypMin
V
CC
CC
mA
mA
mA
AC ELECTRICAL CHARACTERISTICS
Symbol
t
PLH
t
PHL
Parameter
,
Propagation Delay, A to Y (Figures 3 and 4)
TA = 25°C
Min
Condition
RL = 1 MW, CL = 15 pF
VCC (V)
0.9 17.4
Typ
RL = 2 kW, CL = 15 pF 1.1 to 1.3 4.5 12.1 14.9
1.4 to 1.6 2.9 5.4 6.0
RL = 500 W, CL = 30 pF 1.65 to 1.95 2.5 4.6 5.2
2.3 to 2.7 1.9 3.6 3.8
2.7 to 3.6 1.6 3.0 3.3
TA = 405C to +855C
Max
Min
Max
Unit
ns
CAPACITIVE CHARACTERISTICS
Symbol Parameter Test Condition Typical (TA = 25°C) Unit
C
C
C
5. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation I power consumption: P
Input Capacitance VCC = 0 V 2.0 pF
IN
Output Capacitance VCC = 0 V 4.5 pF
OUT
Power Dissipation Capacitance (Note 5) f = 10 MHz, VCC = 0.9 to 3.6 V, VIN = 0 V or V
PD
= CPD VCC fin + ICC. CPD is used to determine the noload dynamic
)
= CPD V
D
2
fin + ICC VCC.
CC
CC(OPR
CC
10.0 pF
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NC7WV04
OPEN
2 x V
CC
R
INPUT
R
T
DUT
1
R
L
CL includes probe and jig capacitance R
is Z
T
of pulse generator (typically 50 W)
OUT
f = 1 MHz
tr = 3 ns
90%
90%
INPUT
V
mi
V
10%
t
PHL
t
PLH
V
mo
V
mo
OUTPUT
OUTPUT
GND
t
PLH
t
t
PHZ
PLZ
Test
/ t
/ t
/ t
PHL
PZL
PZH
Switch Position
Open
2 x V
CC
GND
OUTPUT
CL*
Figure 3. Test Circuit
V
GND
VOL + V
V
V
VOH V
~V
OL
OH
CC
CC
Y
Y
tf = 3 ns
V
CC
INPUT
mi
t
PLH
t
10%
V
PHL
V
mo
mo
GND
V
OH
V
OL
V
OH
OUTPUT
OUTPUT
t
PZL
t
PZH
V
mi
V
mo
V
mo
V
mi
t
PLZ
t
PHZ
V
OL
VCC, V Vmi, V Vmo, V VY, V
0.9 V
1.1 to 1.3 V
1.4 to 1.6 V
1.65 to 1.95 V
2.3 to 2.7 V
/ 2 V
CC
/ 2 V
CC
/ 2 V
CC
/ 2 V
CC
/ 2 V
CC
/ 2 0.1
CC
/ 2 0.1
CC
/ 2 0.1
CC
/ 2 0.15
CC
/ 2 0.15
CC
3.0 to 3.6 1.5 1.5 0.3
Figure 4. Switching Waveforms
~0 V
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NC7WV04
ORDERING INFORMATION
Pin 1 Orientation
Device Package Marking
NC7WV04P6X SC88 V04 Q4 3000 / Tape & Reel
NC7WV04L6X MicroPak BA Q4 5000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
(See below)
Shipping
Pin 1 Orientation in Tape and Reel
MicroPak is trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
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6
NC7WV04
PACKAGE DIMENSIONS
SIP6 1.45X1.0
CASE 127EB
ISSUE O
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7
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC88/SC706/SOT363
1
SCALE 2:1
D
A
654
E
123
2X
bbb H
D
e
B
TOP VIEW
6X
ccc
C
SIDE VIEW END VIEW
RECOMMENDED
SOLDERING FOOTPRINT*
6X
0.30
0.65
PITCH
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
2X
aaa H D
D
E1
L2
aaa C
2X 3 TIPS
b
6X
M
A2
A
A1
C
6X
0.66
SEATING PLANE
2.50
DIMENSIONS: MILLIMETERS
Cddd
A-B D
DETAIL A
NC7WV04
CASE 419B02
ISSUE Y
H
L
DETAIL A
GAGE
PLANE
DATE 11 DEC 2012
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRU­SIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.
4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY AND DATUM H.
5. DATUMS A AND B ARE DETERMINED AT DATUM H.
6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP.
7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDI­TION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OF THE FOOT.
MILLIMETERS
DIM MIN NOM MAX
A −−− −−− 1.10 A1 0.00 −−− 0.10 A2 0.70 0.90 1.00 0.027 0.035 0.039
b 0.15 0.20 0.25
C 0.08 0.15 0.22
D 1.80 2.00 2.20
E
2.00 2.10 2.20
E1 1.15 1.25 1.35
e 0.65 BSC
L 0.26 0.36 0.46 L2 0.15 BSC 0.006 BSC
aaa 0.15 0.006
bbb 0.30 0.012
ccc 0.10 0.004
ddd
c
0.10 0.004
INCHES
MIN NOM MAX
−−− −−− 0.043
0.000 −−− 0.004
0.006 0.008 0.010
0.003 0.006 0.009
0.070 0.078 0.086
0.078 0.082 0.086
0.045 0.049 0.053
0.026 BSC
0.010 0.014 0.018
GENERIC
MARKING DIAGRAM*
6
XXXMG
G
1
XXX = Specific Device Code M = Date Code* G = Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may
vary depending upon manufacturing location.
*This information is generic. Please refer to
device data sheet for actual part marking. PbFree indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking.
STYLES ON PAGE 2
DOCUMENT NUMBER:
DESCRIPTION:
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
98ASB42985B
SC88/SC706/SOT363
Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 9
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NC7WV04
SC88/SC706/SOT363
CASE 419B−02
ISSUE Y
DATE 11 DEC 2012
STYLE 1:
PIN 1. EMITTER 2
2. BASE 2
3. COLLECTOR 1
4. EMITTER 1
5. BASE 1
6. COLLECTOR 2
STYLE 7:
PIN 1. SOURCE 2
2. DRAIN 2
3. GATE 1
4. SOURCE 1
5. DRAIN 1
6. GATE 2
STYLE 13:
PIN 1. ANODE
2. N/C
3. COLLECTOR
4. EMITTER
5. BASE
6. CATHODE
STYLE 19:
PIN 1. I OUT
2. GND
3. GND
4. V CC
5. V EN
6. V REF
STYLE 25:
PIN 1. BASE 1
2. CATHODE
3. COLLECTOR 2
4. BASE 2
5. EMITTER
6. COLLECTOR 1
STYLE 2:
CANCELLED
STYLE 8:
CANCELLED
STYLE 14:
PIN 1. VREF
2. GND
3. GND
4. IOUT
5. VEN
6. VCC
STYLE 20:
PIN 1. COLLECTOR
2. COLLECTOR
3. BASE
4. EMITTER
5. COLLECTOR
6. COLLECTOR
STYLE 26:
PIN 1. SOURCE 1
2. GATE 1
3. DRAIN 2
4. SOURCE 2
5. GATE 2
6. DRAIN 1
STYLE 3:
CANCELLED
STYLE 9:
PIN 1. EMITTER 2
2. EMITTER 1
3. COLLECTOR 1
4. BASE 1
5. BASE 2
6. COLLECTOR 2
STYLE 15:
PIN 1. ANODE 1
2. ANODE 2
3. ANODE 3
4. CATHODE 3
5. CATHODE 2
6. CATHODE 1
STYLE 21:
PIN 1. ANODE 1
2. N/C
3. ANODE 2
4. CATHODE 2
5. N/C
6. CATHODE 1
STYLE 27:
PIN 1. BASE 2
2. BASE 1
3. COLLECTOR 1
4. EMITTER 1
5. EMITTER 2
6. COLLECTOR 2
STYLE 4:
PIN 1. CATHODE
2. CATHODE
3. COLLECTOR
4. EMITTER
5. BASE
6. ANODE
STYLE 10:
PIN 1. SOURCE 2
2. SOURCE 1
3. GATE 1
4. DRAIN 1
5. DRAIN 2
6. GATE 2
STYLE 16:
PIN 1. BASE 1
2. EMITTER 2
3. COLLECTOR 2
4. BASE 2
5. EMITTER 1
6. COLLECTOR 1
STYLE 22:
PIN 1. D1 (i)
2. GND
3. D2 (i)
4. D2 (c)
5. VBUS
6. D1 (c)
STYLE 28:
PIN 1. DRAIN
2. DRAIN
3. GATE
4. SOURCE
5. DRAIN
6. DRAIN
Note: Please refer to datasheet for style callout. If style type is not called out in the datasheet refer to the device datasheet pinout or pin assignment.
STYLE 5:
PIN 1. ANODE
2. ANODE
3. COLLECTOR
4. EMITTER
5. BASE
6. CATHODE
STYLE 11:
PIN 1. CATHODE 2
2. CATHODE 2
3. ANODE 1
4. CATHODE 1
5. CATHODE 1
6. ANODE 2
STYLE 17:
PIN 1. BASE 1
2. EMITTER 1
3. COLLECTOR 2
4. BASE 2
5. EMITTER 2
6. COLLECTOR 1
STYLE 23:
PIN 1. Vn
2. CH1
3. Vp
4. N/C
5. CH2
6. N/C
STYLE 29:
PIN 1. ANODE
2. ANODE
3. COLLECTOR
4. EMITTER
5. BASE/ANODE
6. CATHODE
STYLE 6:
PIN 1. ANODE 2
2. N/C
3. CATHODE 1
4. ANODE 1
5. N/C
6. CATHODE 2
STYLE 12:
PIN 1. ANODE 2
2. ANODE 2
3. CATHODE 1
4. ANODE 1
5. ANODE 1
6. CATHODE 2
STYLE 18:
PIN 1. VIN1
2. VCC
3. VOUT2
4. VIN2
5. GND
6. VOUT1
STYLE 24:
PIN 1. CATHODE
2. ANODE
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
STYLE 30:
PIN 1. SOURCE 1
2. DRAIN 2
3. DRAIN 2
4. SOURCE 2
5. GATE 1
6. DRAIN 1
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