Page 1
TinyLogic UHS 3-Input NOR
Gate
NC7SZ27
Description
T h e N C 7SZ27 is a single 3−Input NOR Gate from
ON Semiconductor’s Ultra High Speed Series of TinyLogic. The
device is fabricated with advanced CMOS technology to achieve ultra
high speed with high output drive while maintaining low static power
dissipation over a very broad V
specified to operate over the 1.65 V to 5.5 V V
and output are high impedance when V
voltages up to 5.5 V independent of V
Features
• Space Saving SC−88 6−Lead Package
• Ultra Small MicroPak™ Leadless Package
• Ultra High Speed: t
= 2.9 ns Typ into 50 pF at 5 V V
PD
• High Output Drive: ±24 mA at 3 V V
• Broad V
Operating Range: 1.65 V − 5.5 V
CC
• Power Down High Impedance Inputs / Output
• Overvoltage Tolerant Inputs Facilitate 5 V to 3 V Translation
• Patented Noise / EMI Reduction Circuitry Implemented
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
A
B
C
operating range. The device is
CC
range. The inputs
CC
is 0 V. Inputs tolerate
CC
operating voltage.
CC
CC
IEEC / IEC
≥1
Y
CC
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MARKING
DIAGRAMS
SIP6 1.45x1.0
CASE 127EB
Pin 1
SC−88
CASE 419B−02
E9, Z27 = Specific Device Code
KK = 2−Digit Lot Run Traceability Code
XY = 2−Digit Date Code Format
Z = Assembly Plant Code
M = Date Code*
G = Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may
vary depending upon manufacturing location.
E9KK
XYZ
6
Z27M
G
1
G
Figure 1. Logic Symbol
© Semiconductor Components Industries, LLC, 2004
January, 2021 − Rev. 2
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
1 Publication Order Number:
NC7SZ27/D
Page 2
Connection Diagrams
NC7SZ27
1
AC
2
GND V
BY
3
6
5
CC
4
Figure 2. SC−88 (Top View)
(Top View) AAA
Pin One
AAA represents Product Code Top Mark − see ordering code.
NOTE: Orientation of Top Mark determines Pin One location.
Read the Top Product Code Mark left to right, Pin One
is the lower left pin (see diagram).
Figure 3. Pin 1 Orientation
A 1 6 C
GND 2 5 V
B 3 4 Y
CC
Figure 4. MicroPak (Top Through View)
PIN DESCRIPTIONS
Pin Name Description
A, B, C Inputs
Y Output
FUNCTION TABLE (Y = A + B + C)
Inputs
A B C Y
H X X L
X H X L
X X H L
L L L H
H = HIGH Logic Level
L = LOW Logic Level
X = Don’t Care
Output
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Page 3
NC7SZ27
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Min Max Unit
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
ICC / I
T
STG
T
J
T
L
P
D
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Conditions Min Max Unit
V
CC
V
IN
V
OUT
T
A
tr, t
f
q
JA
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
1. Unused inputs must be held HIGH or LOW. They may not float.
Supply Voltage −0.5 6.5 V
DC Input Voltage −0.5 6.5 V
DC Output Voltage −0.5 6.5 V
DC Input Diode Current VIN < 0 V − −50 mA
DC Output Diode Current V
< 0 V − −50 mA
OUT
DC Output Current − ±50 mA
DC VCC / GND Current − ±50 mA
GND
Storage Temperature −65 +150 °C
Junction Temperature under Bias − +150 °C
Junction Lead Temperature (Soldering, 10 Seconds) − +260 °C
Power Dissipation in Still Air
SC−88 − 332
MicroPak − 812
Supply Voltage Operating 1.65 5.5
Supply Voltage Data Retention 1.5 5.5
Input Voltage 0 5.5 V
Output Voltage 0 V
CC
Operating Temperature −40 +85 °C
Input Rise and Fall Time
VCC @ 1.8 V, 2.5 V ±0.2 V 0 20
VCC @ 3.3 V ±0.3 V 0 10
V
@ 5.0 V ±0.5 V 0 5
CC
Thermal Resistance
SC−88 − 377
MicroPak − 154
mW
V
V
ns/V
°C/W
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Page 4
DC ELECTICAL CHARACTERISTICS
Symbol Parameter V
V
V
V
V
I
OFF
I
HIGH Level Input
IH
Voltage
LOW Level Input
IL
Voltage
HIGH Level Output
OH
Voltage
LOW Level Output
OL
Voltage
I
Input Leakage
IN
Current
Power Off Leakage
Current
Quiescent Supply
CC
Current
CC
1.65 to 1.95 0.65 V
2.3 to 5.5 0.70 V
1.65 to 1.95 − − 0.35 V
2.3 to 5.5 − − 0.30 V
1.65
2.3 2.2 2.3 − 2.2 −
3.0 2.9 3.0 − 2.9 −
4.5 4.4 4.5 − 4.4 −
1.65 I
2.3 I
3.0 I
3.0 I
4.5 I
1.65
2.3 − 0.0 0.1 − 0.1
3.0 − 0.0 0.1 − 0.1
4.5 − 0.0 0.1 − 0.1
1.65 I
2.3 I
3.0 I
3.0 I
4.5 I
1.65 to 5.5 VIN = 5.5 V, GND − − ±1 − ±10
0.0 VIN or V
1.65 to 5.5 V
NC7SZ27
(V) Conditions
V
= V
IN
or V
IL
V
= V
IN
or V
IL
= 5.5 V, GND − − 2.0 − 20
IN
I
= −100 mA 1.55 1.65 − 1.55 −
IH
OH
= −4 mA 1.29 1.52 − 1.29 −
OH
= −8 mA 1.9 2.15 − 1.9 −
OH
= −16 mA 2.4 2.80 − 2.4 −
OH
= −24 mA 2.3 2.68 − 2.3 −
OH
= −32 mA 3.8 4.20 − 3.8 −
OH
I
= 100 mA − 0.0 0.1 − 0.1
IH
OL
= 4 mA − 0.08 0.24 − 0.24
OL
= 8 mA − 0.10 0.3 − 0.3
OL
= 16 mA − 0.15 0.4 − 0.4
OL
= 24 mA − 0.22 0.55 − 0.55
OL
= 32 mA − 0.22 0.55 − 0.55
OL
= 5.5 V − − 1 − 10
OUT
TA = +25°C TA = −40 to +85°C
Min Typ Max Min Max
− − 0.65 V
CC
− − 0.70 V
CC
CC
CC
CC
CC
− 0.35 V
− 0.30 V
−
−
CC
CC
Unit
V
V
V
V
mA
mA
mA
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Page 5
NC7SZ27
AC ELECTRICAL CHARACTERISTICS
TA = +25°C TA = −40 to +85°C
Symbol Parameter V
t
, t
PLH
C
C
Propagation Delay
PHL
(Figure 5, 7)
Input Capacitance 0 − 4 − − − pF
IN
Power Dissipation Capacitance
PD
(Figure 6)
2. CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (I
no output loading and operating at 50% duty cycle.(See Figure 6) C
= (CPD) (VCC) (fIN) + (ICCstatic).
I
CCD
AC Loading and Waveforms
(V) Conditions Min Typ Max Min Max Unit
CC
C
1.8 ±0.15
2.5 ±0.2 − 5.0 10.5 − 11.0
= 15 pF,
L
= 1 MW
R
L
− 10.0 18.5 − 19.0
3.3 ±0.3 − 3.2 8.0 − 8.5
5.0 ±0.5 − 2.6 5.5 − 6.0
C
3.3 ±0.3
5.0 ±0.5 − 2.9 5.5 − 6.0
3.3
= 50 pF,
L
= 500 W
R
L
(Note 2)
− 3.9 8.0 − 8.5
− 23 − − −
5.0 − 30 − − −
is related to I
PD
dynamic operating current by the expression:
CCD
CCD
ns
pF
) at
V
CC
INPUT
C
R
L
CL includes load and stray capacitance
Input PRR = 1.0 MHz, t
= 500 ns.
W
Figure 5. AC Test Circuit
V
CC
A
INPUT
Input = AC Waveform; t
PRR = 10 MHz; Duty Cycle = 50%.
Figure 6. I
CCD
= t
= 1.8 ns;
r
f
Test Circuit
L
OUTPUT
tr = 3 ns
INPUT
OUTPUT
90%
90%
50% 50%
10%
t
PHL
t
W
50%
Figure 7. AC Waveforms
t
PLH
50%
10%
= 3 ns
t
f
V
CC
GND
V
OH
V
OL
DEVICE ORDERING INFORMATION
Device Top Mark Packages Shipping
NC7SZ27P6X Z27 6−Lead SC70, EIAJ SC88, 1.25 mm Wide 3000 / Tape & Reel
NC7SZ27L6X E9 6−Lead MicroPak, 1.00 mm Wide 5000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
MicroPak is trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
†
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Page 6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SIP6 1.45X1.0
CASE 127EB
ISSUE O
DATE 31 AUG 2016
DOCUMENT NUMBER:
DESCRIPTION:
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
98AON13590G
SIP6 1.45X1.0
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
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Page 7
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−88/SC70−6/SOT−363
1
SCALE 2:1
D
A
654
E
123
2X
bbb H
D
e
B
TOP VIEW
6X
ccc
C
SIDE VIEW END VIEW
RECOMMENDED
SOLDERING FOOTPRINT*
6X
0.30
0.65
PITCH
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
2X
aaa H D
D
E1
L2
aaa C
2X 3 TIPS
b
6X
M
A2
A
A1
C
6X
0.66
SEATING
PLANE
2.50
DIMENSIONS: MILLIMETERS
Cddd
A-B D
DETAIL A
CASE 419B−02
ISSUE Y
H
L
DETAIL A
GAGE
PLANE
DATE 11 DEC 2012
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.
4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF
THE PLASTIC BODY AND DATUM H.
5. DATUMS A AND B ARE DETERMINED AT DATUM H.
6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE
LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP.
7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN
EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDITION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OF THE FOOT.
MILLIMETERS
DIM MIN NOM MAX
A −−− −−− 1.10
A1 0.00 −−− 0.10
A2 0.70 0.90 1.00 0.027 0.035 0.039
b 0.15 0.20 0.25
C 0.08 0.15 0.22
D 1.80 2.00 2.20
E
2.00 2.10 2.20
E1 1.15 1.25 1.35
e 0.65 BSC
L 0.26 0.36 0.46
L2 0.15 BSC 0.006 BSC
aaa 0.15 0.006
bbb 0.30 0.012
ccc 0.10 0.004
ddd
c
0.10 0.004
INCHES
MIN NOM MAX
−−− −−− 0.043
0.000 −−− 0.004
0.006 0.008 0.010
0.003 0.006 0.009
0.070 0.078 0.086
0.078 0.082 0.086
0.045 0.049 0.053
0.026 BSC
0.010 0.014 0.018
GENERIC
MARKING DIAGRAM*
6
XXXMG
G
1
XXX = Specific Device Code
M = Date Code*
G = Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may
vary depending upon manufacturing location.
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
STYLES ON PAGE 2
DOCUMENT NUMBER:
DESCRIPTION:
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
98ASB42985B
SC−88/SC70−6/SOT−363
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 2
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Page 8
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE Y
DATE 11 DEC 2012
STYLE 1:
PIN 1. EMITTER 2
2. BASE 2
3. COLLECTOR 1
4. EMITTER 1
5. BASE 1
6. COLLECTOR 2
STYLE 7:
PIN 1. SOURCE 2
2. DRAIN 2
3. GATE 1
4. SOURCE 1
5. DRAIN 1
6. GATE 2
STYLE 13:
PIN 1. ANODE
2. N/C
3. COLLECTOR
4. EMITTER
5. BASE
6. CATHODE
STYLE 19:
PIN 1. I OUT
2. GND
3. GND
4. V CC
5. V EN
6. V REF
STYLE 25:
PIN 1. BASE 1
2. CATHODE
3. COLLECTOR 2
4. BASE 2
5. EMITTER
6. COLLECTOR 1
STYLE 2:
CANCELLED
STYLE 8:
CANCELLED
STYLE 14:
PIN 1. VREF
2. GND
3. GND
4. IOUT
5. VEN
6. VCC
STYLE 20:
PIN 1. COLLECTOR
2. COLLECTOR
3. BASE
4. EMITTER
5. COLLECTOR
6. COLLECTOR
STYLE 26:
PIN 1. SOURCE 1
2. GATE 1
3. DRAIN 2
4. SOURCE 2
5. GATE 2
6. DRAIN 1
STYLE 3:
CANCELLED
STYLE 9:
PIN 1. EMITTER 2
2. EMITTER 1
3. COLLECTOR 1
4. BASE 1
5. BASE 2
6. COLLECTOR 2
STYLE 15:
PIN 1. ANODE 1
2. ANODE 2
3. ANODE 3
4. CATHODE 3
5. CATHODE 2
6. CATHODE 1
STYLE 21:
PIN 1. ANODE 1
2. N/C
3. ANODE 2
4. CATHODE 2
5. N/C
6. CATHODE 1
STYLE 27:
PIN 1. BASE 2
2. BASE 1
3. COLLECTOR 1
4. EMITTER 1
5. EMITTER 2
6. COLLECTOR 2
STYLE 4:
PIN 1. CATHODE
2. CATHODE
3. COLLECTOR
4. EMITTER
5. BASE
6. ANODE
STYLE 10:
PIN 1. SOURCE 2
2. SOURCE 1
3. GATE 1
4. DRAIN 1
5. DRAIN 2
6. GATE 2
STYLE 16:
PIN 1. BASE 1
2. EMITTER 2
3. COLLECTOR 2
4. BASE 2
5. EMITTER 1
6. COLLECTOR 1
STYLE 22:
PIN 1. D1 (i)
2. GND
3. D2 (i)
4. D2 (c)
5. VBUS
6. D1 (c)
STYLE 28:
PIN 1. DRAIN
2. DRAIN
3. GATE
4. SOURCE
5. DRAIN
6. DRAIN
Note: Please refer to datasheet for
style callout. If style type is not called
out in the datasheet refer to the device
datasheet pinout or pin assignment.
STYLE 5:
PIN 1. ANODE
2. ANODE
3. COLLECTOR
4. EMITTER
5. BASE
6. CATHODE
STYLE 11:
PIN 1. CATHODE 2
2. CATHODE 2
3. ANODE 1
4. CATHODE 1
5. CATHODE 1
6. ANODE 2
STYLE 17:
PIN 1. BASE 1
2. EMITTER 1
3. COLLECTOR 2
4. BASE 2
5. EMITTER 2
6. COLLECTOR 1
STYLE 23:
PIN 1. Vn
2. CH1
3. Vp
4. N/C
5. CH2
6. N/C
STYLE 29:
PIN 1. ANODE
2. ANODE
3. COLLECTOR
4. EMITTER
5. BASE/ANODE
6. CATHODE
STYLE 6:
PIN 1. ANODE 2
2. N/C
3. CATHODE 1
4. ANODE 1
5. N/C
6. CATHODE 2
STYLE 12:
PIN 1. ANODE 2
2. ANODE 2
3. CATHODE 1
4. ANODE 1
5. ANODE 1
6. CATHODE 2
STYLE 18:
PIN 1. VIN1
2. VCC
3. VOUT2
4. VIN2
5. GND
6. VOUT1
STYLE 24:
PIN 1. CATHODE
2. ANODE
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
STYLE 30:
PIN 1. SOURCE 1
2. DRAIN 2
3. DRAIN 2
4. SOURCE 2
5. GATE 1
6. DRAIN 1
DOCUMENT NUMBER:
DESCRIPTION:
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
98ASB42985B
SC−88/SC70−6/SOT−363
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 2 OF 2
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Page 9
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ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
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arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
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regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
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