The NC7SZ19 is a 1−of−2 decoder with a common output enable.
The device is fabricated with advanced CMOS technology to achieve
ultra−high speed with high output drive while maintaining low static
power dissipation over a broad VCC operating range. The device is
specified to operate over the 1.65 V to 5.5 V V
and outputs are high impedance when V
voltages up to 5.5 V independent of V
Features
• Ultra High−Speed: t
• Broad V
Operating Range: 1.65 V to 5.55 V
CC
= 2.7 ns Typical at 5 V V
PD
CC
operating voltage.
CC
• Power Down High Impednce Inputs / Outputs
• Over−Voltage Tolerance Inputs Facilitate 5 V to 3 V Translation
• Proprietary Noise / EMI Reduction Circuitry
• Ultra−Small MicroPak Packages
• Space Saving SC−88 6−Lead Package
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
range. The inputs
CC
is 0 V. Inputs tolerate
CC
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SIP6 1.45x1.0
CASE 127EB
Pin 1
UDFN6
1.0X1.0, 0.35P
CASE 517DP
SC−88
CASE 419B−02
MARKING
DIAGRAMS
B4KK
XYZ
Pin 1
6
Z19M
1
B4KK
XYZ
G
G
B4, Z19= Specific Device Code
KK= 2−Digit Lot Run Traceability Code
XY= 2−Digit Date Code Format
Z= Assembly Plant Code
M= Data Code*
G= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may
vary depending upon manufacturing location.
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
Semiconductor Components Industries, LLC, 1999
January, 2021 − Rev. 3
1Publication Order Number:
NC7SZ19/D
Page 2
Pin Configurations
AY
NC7SZ19
1
6
0
A 16 Y
0
2
GNDV
3
EY
5
CC
4
1
Figure 1. SC−88 (Top View)
(Top View)AAA
Pin One
NOTES:
1. AAA represents product code top mark (see Ordering Information
2. Orientation of top mark determines pin one location.
3. Reading the top mark left to right, pin one is the lower left pin.
Figure 3. Pin 1 Orientation
PIN DEFINITIONS
Pin # SC−88 Pin # MicroPak NameDescription
11A Decoder Address /
22GND Ground
33E Decoder Output Enable /
44Y1 Output
55VCC Supply Voltage
66Y0 Output
Demultiplexer Select
Demultiplexer Data
Figure 2. MicroPak (Top Through View)
).
FUNCTION TABLE
AEY0 = A + EY1 = A + E
LLLH
HLHL
XHHH
H = HIGH Logic Level
L = LOW Logic Level
X = 3−STATE
GND 25 V
E 34 Y
InputsOutput
CC
1
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2
Page 3
NC7SZ19
ABSOLUTE MAXIMUM RATINGS
SymbolParameterMinMaxUnit
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
ICC or I
T
STG
T
J
T
L
P
D
ESD
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
Supply Voltage−0.56.5V
DC Input Voltage−0.56.5V
DC Output Voltage−0.56.5V
DC Input Diode CurrentVIN < 0 V−−50mA
DC Output Diode CurrentV
< 0 V−−50mA
OUT
DC Output Current−±50mA
DC VCC or Ground Current−±50mA
GND
Storage Temperature Range−65+150°C
Junction Temperature Under Bias−+150°C
Junction Lead Temperature (Soldering, 10 Seconds)−+260°C
Power Dissipation in Still Air
SC−88−332
MicroPak−6−812
MicroPak2−6−812
Human Body Model, JEDEC: JESD22−A114−4000
Charge Device Model, JEDEC: JESD22−C101−2000
mW
V
RECOMMENDED OPERATING CONDITIONS
SymbolParameterConditionsMinMaxUnit
V
CC
Supply Voltage Operating1.655.50
Supply Voltage Data Retention1.55.5
V
V
OUT
tr, t
Input Voltage05.5V
IN
Output Voltage0V
Input Rise and Fall Times
f
VCC at 1.8 V ±0.15 V, 2.5 V ±0.2 V020
CC
VCC at 3.3 V ±0.3 V010
VCC at 5.0 V ±0.5 V05
T
q
JA
Operating Temperature−40+85°C
A
Thermal Resistance
SC−88−377
MicroPak−6−154
MicroPak2−6−154°C/W
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
V
V
ns/V
°C/W
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3
Page 4
DC ELECTICAL CHARACTERISTICS
SymbolParameterV
V
V
V
I
I
HIGH Level Input Voltage
IH
1.65 to 1.950.65 V
2.30 to 5.500.70 V
V
LOW Level Input Voltage
IL
1.65 to 1.95−−0.35 V
2.30 to 5.50−−0.30 V
HIGH Level Output Voltage
OH
LOW Level Output Voltage
OL
I
Input Leakage Current1.65 to 5.5VIN = 5.5 V, GND−−±0.1−±1.0
IN
Power Off Leakage Current0VIN or V
OFF
Quiescent Supply Current1.65 to 5.50 V
CC
NC7SZ19
TA = +25°CTA = −40 to +85°C
(V)Conditions
CC
V
1.65
2.302.202.30−2.20−
= VIH,or VIL,
IN
= −100 mA
I
OH
3.002.903.00−2.90−
4.504.404.50−4.40−
1.65I
2.30I
3.00I
3.00I
4.50I
1.65
2.30−0.000.10−0.10
= −4 mA1.291.52−1.29−
OH
= −8 mA1.902.15−1.90−
OH
= −16 mA2.402.80−2.40−
OH
= −24 mA2.303.68−2.30−
OH
= −32 mA3.804.20−3.80−
OH
V
= VIH,or V
IN
I
OL
= 100 mA
IL,
3.00−0.000.10−0.10
4.50−0.000.10−0.10
1.65I
2.30I
3.00I
3.00I
4.50I
= 4 mA−0.080.24−0.24
OL
= 8 mA−0.100.30−0.30
OL
= 16 mA−0.150.40−0.40
OL
= 24 mA−0.220.55−0.55
OL
= 32 mA−0.220.55−0.55
OL
= 5.5 V−−1−10
OUT
= 5.5 V, GND−−1−10
IN
MinTypMaxMinMax
−−0.65 V
CC
−−0.70 V
CC
CC
CC
CC
CC
−0.35 V
−0.30 V
−
−
1.551.65−1.55−
−0.000.10−0.10
CC
CC
Unit
V
V
V
V
mA
mA
mA
AC ELECTRICAL CHARACTERISTICS
TA = +25°CTA = −40 to +85°C
SymbolParameterV
t
, t
PLH
Propagation Delay A or /E to Output
PHL
(Figure 5, 6)
(V)Conditions
CC
1.80 ±0.15
2.50 ±0.20−3.56.0−6.4
CL = 15 pF,
= 1 MW
R
L
MinTypMaxMinMax
−5.910.5−11.0
3.30 ±0.30−2.74.1−4.5
5.00 ±0.50−2.13.2−3.5
3.30 ±0.30
5.00 ±0.50−2.74.0−4.3
C
C
Input Capacitance0−2.3−−−pF
IN
Power Dissipation Capacitance
PD
(Note 4) (Figure 5)
3.30
5.00
CL = 50 pF,
= 500 W
R
L
−3.25.1−5.4
−10.5−−−
−12.8−−−
4. CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (I
no output loading and operating at 50% duty cycle. C
NC7SZ19L6XB46−Lead MicroPak, 1.00 mm Wide5000 / Tape & Reel
NC7SZ19FHXB46−Lead, MicroPak2, 1x1 mm Body, .35 mm Pitch5000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
†
MicroPak and MicroPak2 are trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other
countries.
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5
Page 6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SIP6 1.45X1.0
CASE 127EB
ISSUE O
DATE 31 AUG 2016
DOCUMENT NUMBER:
DESCRIPTION:
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
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Page 7
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−88/SC70−6/SOT−363
1
SCALE 2:1
D
A
654
E
123
2X
bbb H
D
e
B
TOP VIEW
6X
ccc
C
SIDE VIEWEND VIEW
RECOMMENDED
SOLDERING FOOTPRINT*
6X
0.30
0.65
PITCH
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
2X
aaa H D
D
E1
L2
aaa C
2X 3 TIPS
b
6X
M
A2
A
A1
C
6X
0.66
SEATING
PLANE
2.50
DIMENSIONS: MILLIMETERS
Cddd
A-B D
DETAIL A
CASE 419B−02
ISSUE Y
H
L
DETAIL A
GAGE
PLANE
DATE 11 DEC 2012
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.
4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF
THE PLASTIC BODY AND DATUM H.
5. DATUMS A AND B ARE DETERMINED AT DATUM H.
6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE
LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP.
7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN
EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDITION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OF THE FOOT.
XXX = Specific Device Code
M= Date Code*
G= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may
vary depending upon manufacturing location.
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
STYLES ON PAGE 2
DOCUMENT NUMBER:
DESCRIPTION:
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 2
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Page 8
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE Y
DATE 11 DEC 2012
STYLE 1:
PIN 1. EMITTER 2
2. BASE 2
3. COLLECTOR 1
4. EMITTER 1
5. BASE 1
6. COLLECTOR 2
STYLE 7:
PIN 1. SOURCE 2
2. DRAIN 2
3. GATE 1
4. SOURCE 1
5. DRAIN 1
6. GATE 2
STYLE 13:
PIN 1. ANODE
2. N/C
3. COLLECTOR
4. EMITTER
5. BASE
6. CATHODE
STYLE 19:
PIN 1. I OUT
2. GND
3. GND
4. V CC
5. V EN
6. V REF
STYLE 25:
PIN 1. BASE 1
2. CATHODE
3. COLLECTOR 2
4. BASE 2
5. EMITTER
6. COLLECTOR 1
STYLE 2:
CANCELLED
STYLE 8:
CANCELLED
STYLE 14:
PIN 1. VREF
2. GND
3. GND
4. IOUT
5. VEN
6. VCC
STYLE 20:
PIN 1. COLLECTOR
2. COLLECTOR
3. BASE
4. EMITTER
5. COLLECTOR
6. COLLECTOR
STYLE 26:
PIN 1. SOURCE 1
2. GATE 1
3. DRAIN 2
4. SOURCE 2
5. GATE 2
6. DRAIN 1
STYLE 3:
CANCELLED
STYLE 9:
PIN 1. EMITTER 2
2. EMITTER 1
3. COLLECTOR 1
4. BASE 1
5. BASE 2
6. COLLECTOR 2
STYLE 15:
PIN 1. ANODE 1
2. ANODE 2
3. ANODE 3
4. CATHODE 3
5. CATHODE 2
6. CATHODE 1
STYLE 21:
PIN 1. ANODE 1
2. N/C
3. ANODE 2
4. CATHODE 2
5. N/C
6. CATHODE 1
STYLE 27:
PIN 1. BASE 2
2. BASE 1
3. COLLECTOR 1
4. EMITTER 1
5. EMITTER 2
6. COLLECTOR 2
STYLE 4:
PIN 1. CATHODE
2. CATHODE
3. COLLECTOR
4. EMITTER
5. BASE
6. ANODE
STYLE 10:
PIN 1. SOURCE 2
2. SOURCE 1
3. GATE 1
4. DRAIN 1
5. DRAIN 2
6. GATE 2
STYLE 16:
PIN 1. BASE 1
2. EMITTER 2
3. COLLECTOR 2
4. BASE 2
5. EMITTER 1
6. COLLECTOR 1
STYLE 22:
PIN 1. D1 (i)
2. GND
3. D2 (i)
4. D2 (c)
5. VBUS
6. D1 (c)
STYLE 28:
PIN 1. DRAIN
2. DRAIN
3. GATE
4. SOURCE
5. DRAIN
6. DRAIN
Note: Please refer to datasheet for
style callout. If style type is not called
out in the datasheet refer to the device
datasheet pinout or pin assignment.
STYLE 5:
PIN 1. ANODE
2. ANODE
3. COLLECTOR
4. EMITTER
5. BASE
6. CATHODE
STYLE 11:
PIN 1. CATHODE 2
2. CATHODE 2
3. ANODE 1
4. CATHODE 1
5. CATHODE 1
6. ANODE 2
STYLE 17:
PIN 1. BASE 1
2. EMITTER 1
3. COLLECTOR 2
4. BASE 2
5. EMITTER 2
6. COLLECTOR 1
STYLE 23:
PIN 1. Vn
2. CH1
3. Vp
4. N/C
5. CH2
6. N/C
STYLE 29:
PIN 1. ANODE
2. ANODE
3. COLLECTOR
4. EMITTER
5. BASE/ANODE
6. CATHODE
STYLE 6:
PIN 1. ANODE 2
2. N/C
3. CATHODE 1
4. ANODE 1
5. N/C
6. CATHODE 2
STYLE 12:
PIN 1. ANODE 2
2. ANODE 2
3. CATHODE 1
4. ANODE 1
5. ANODE 1
6. CATHODE 2
STYLE 18:
PIN 1. VIN1
2. VCC
3. VOUT2
4. VIN2
5. GND
6. VOUT1
STYLE 24:
PIN 1. CATHODE
2. ANODE
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
STYLE 30:
PIN 1. SOURCE 1
2. DRAIN 2
3. DRAIN 2
4. SOURCE 2
5. GATE 1
6. DRAIN 1
DOCUMENT NUMBER:
DESCRIPTION:
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 2 OF 2
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Page 9
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
UDFN6 1.0X1.0, 0.35P
CASE 517DP
ISSUE O
DATE 31 AUG 2016
DOCUMENT NUMBER:
DESCRIPTION:
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
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Page 10
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor ’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
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. ON Semiconductor reserves the right to make changes without further notice to any products herein.
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