TinyLogic HST 2-Input NOR
Gate
NC7ST02
Description
The NC7ST02 is a single 2−Input high performance CMOS NOR
Gate, with TTL−compatible inputs. Advanced Silicon Gate CMOS
fabrication assures high speed and low power circuit operation. ESD
protection diodes inherently guard both inputs and output with respect
to the V
immunity and reduced sensitivity to input edge rate. The
TTL−compatible inputs facilitate TTL to NMOS / CMOS interfacing.
Device performance is similar to MM74HCT but with
current drive of HC / HCT.
Features
• Space Saving SC−74A and SC−88A 5−Lead Package
• Ultra Small MicroPak™ Leadless Package
• High Speed: t
• Low Quiescent Power: I
• Balanced Output Drive: 2 mA I
• TTL−compatible Inputs
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
and GND rails. High gain circuitry offers high noise
CC
1
/2 the output
< 7 ns Typ, VCC = 5 V, CL = 15 pF
PD
< 1 mA Typ, V
CC
, −2 mA I
OL
= 5.5 V
CC
OH
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SIP6
CASE 127EB
Pin 1
SC−74A
CASE 318BQ
SC−88A
CASE 419A−02
MARKING
DIAGRAMS
D9KK
XYZ
8S02MG
G
T02MG
G
IEEE / IEC
A
B
Figure 1. Logic Symbol
≥1
Y
D9, 8S02, T02 = Specific Device Code
KK = 2−Digit Lot Run Traceability Code
XY = 2−Digit Date Code Format
Z = Assembly Plant Code
M = Date Code*
*Date Code orientation and/or position may
vary depending upon manufacturing location.
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 4 of this data sheet.
© Semiconductor Components Industries, LLC, 2004
January, 2021 − Rev. 2
1 Publication Order Number:
NC7ST02/D
Pin Configurations
NC7ST02
A
B
GND Y
Figure 2. SC−88A and SC−74A (Top View)
PIN DESCRIPTIONS
Pin Name Description
A, B Inputs
Y Output
NC No Connect
1
5
V
CC
2
3
4
A 1 6 V
B 2 5 NC
GND 3 4 Y
Figure 3. MicroPak (Top Through View)
FUNCTION TABLE (Y = A + B)
Inputs
A B Y
L L H
L H L
CC
Output
H L L
H H L
H = HIGH Logic Level
L = LOW Logic Level
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Min Max Unit
V
CC
I
IK
V
IN
I
OK
V
OUT
I
OUT
ICC or I
T
STG
T
J
T
L
P
D
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
Supply Voltage −0.5 6.5 V
DC Input Diode Current
DC Input Voltage −0.5 V
DC Output Diode Current
Output Voltage −0.5 V
VIN < 0 V − −20
VIN > V
CC
V
< 0 V − −20
OUT
V
> V
OUT
CC
− +20
CC
− +20
CC
+ 0.5 V
+ 0.5 V
DC Output Source or Sink Current − ±12.5 mA
DC VCC or Ground Current per Supply Pin − ±25 mA
GND
Storage Temperature −65 +150 °C
Junction Temperature − +150 °C
Lead Temperature (Soldering, 10 Seconds) − +260 °C
Power Dissipation in Still Air
SC−74A − 390
SC−88A − 332
MicroPak−6 − 812
mA
mA
mW
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2
NC7ST02
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Conditions Min Max Unit
V
CC
V
V
T
tr, t
q
JA
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
1. Unused inputs must be held HIGH or LOW. They may not float.
DC ELECTICAL CHARACTERISTICS
Symbol
V
IH
V
IL
V
OH
V
OL
I
IN
I
CC
I
CCT ICC
Supply Voltage 4.5 5.5 V
Input Voltage 0 V
I
Output Voltage 0 V
O
Operating Temperature −40 +85 °C
A
Input Rise and Fall Time VCC = 5.0 V 0 10 ns/V
f
Thermal Resistance
SC−74A − 320
CC
CC
SC−88A − 377
MicroPak−6 − 154
TA = +25°C TA = −40 to +85°C
Parameter V
(V) Conditions
CC
Min Typ Max Min Max
HIGH Level Input Voltage 4.5 − 5.5 2.0 − − 2.0 − V
LOW Level Input Voltage 4.5 − 5.5 − − 0.8 − 0.8 V
HIGH Level Output Voltage 4.5
4.5
LOW Level Output Voltage 4.5
4.5
I
OH
V
IN
I
OH
I
OL
V
IN
I
OL
= –20 mA
= VIH or V
= –2 mA
= 20 mA
= VIH or V
= 2 mA
IL
IL
4.4
4.18
− 0
4.5
4.35
0.10
− 4.4
0.1
0.26
4.13
− 0.1
0.33
Input Leakage Current 5.5 0V ≤ VIN ≤ 5.5 V − − ±0.1 − ±1.0
Quiescent Supply Current 5.5 V
per Input 5.5 One Input V
= VCC or GND − − 1.0 − 10.0
IN
= 0.5 V or
2.4 V, Other Input VCC or
IN
− − 2.0 − 2.9 mA
GND
V
V
°C/W
Unit
− V
V
mA
mA
AC ELECTRICAL CHARACTERISTICS
TA = +25°C TA = −40 to +85°C
Symbol Parameter V
t
, t
PLH
Propagation Delay (Figure 4, 6) 5.0 C
PHL
(V) Conditions
CC
= 15 pF
L
Min Typ Max Min Max
− 3.5 12 − −
Unit
ns
− 6.3 17 − −
4.5 C
= 50 pF
L
− 6.1 16 − 20
− 11.7 27 − 31
5.5
− 4.2 14 − 18
− 11.4 26 − 30
t
, t
TLH
Output Transition Time
THL
(Figure 4, 6)
5.0 C
4.5
C
= 15 pF − 4 10 − −
L
= 50 pF
L
− 11 25 − 31
ns
5.5 − 10 21 − 26
C
C
Input Capacitance Open − 2 10 − − pF
IN
Power Dissipation Capacitance
PD
(Figure 5)
5.0 (Note 2) − 6 − − − pF
2. CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current. Current consumption
) at no output loading and operating at 50% duty cycle. (See Figure 5).CPD is related to I
(I
CCD
expression: I
= (CPD) (VCC) (fIN) + (I
CCD
CCstatic
).
dynamic operating current by the
CCD
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3
AC Loading and Waveforms
V
CC
NC7ST02
INPUT
CL includes load and stray capacitance
Input PRR = 1.0 MHz; t
CL
= 500 ns
W
OUTPUT
Figure 4. AC Test Circuit
V
CC
A
INPUT
Input = AC Waveform;
PRR = Variable; Duty Cycle = 50%.
Figure 5. I
Test Circuit
CCD
Figure 6. AC Waveforms
ORDERING INFORMATION
Order Number Top Mark Package Description Shipping
NC7ST02M5X 8S02 SC−74A 3000 / Tape & Reel
NC7ST02P5X T02 SC−88A 3000 / Tape & Reel
NC7ST02L6X D9 SIP6, MicroPak 5000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
†
MicroPak is trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
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4
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SIP6 1.45X1.0
CASE 127EB
ISSUE O
DATE 31 AUG 2016
DOCUMENT NUMBER:
DESCRIPTION:
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
98AON13590G
SIP6 1.45X1.0
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
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MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
5
1
SCALE 2:1
b
5X
0.20
C AB
54
E1
123
B
A
D
TOP VIEW
SIDE VIEW
RECOMMENDED
SOLDERING FOOTPRINT*
0.95
PITCH
E
e
A
SEATING
C
PLANE
0.05
SC−74A
CASE 318BQ
ISSUE B
A1
L
DETAIL A
c
END VIEW
DETAIL A
DATE 18 JAN 2018
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
M
THICKNESS. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT
EXCEED 0.15 PER SIDE.
MILLIMETERS
DIM MIN MAX
A 0.90 1.10
A1 0.01 0.10
b 0.25 0.50
c 0.10 0.26
D
2.85 3.15
E 2.50 3.00
E1
1.35 1.65
e 0.95 BSC
L 0.20 0.60
M 0 10
__
GENERIC
MARKING DIAGRAM*
XXX MG
G
2.40
5X
1.00
5X
0.70
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON66279G
SC−74A
XXX = Specific Device Code
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2018
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MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−88A (SC−70−5/SOT−353)
SCALE 2:1
CASE 419A−02
ISSUE L
DATE 17 JAN 2013
S
0.40
0.0157
A
G
12 3
H
SOLDER FOOTPRINT
0.50
0.0197
D
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
45
−B−
MM
5 PL
B0.2 (0.008)
N
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
INCHES
DIMAMIN MAX MIN MAX
B 1.15 1.350.045 0.053
C 0.80 1.100.031 0.043
D 0.10 0.300.004 0.012
G 0.65 BSC0.026 BSC
H --- 0.10---0.004
J 0.10 0.250.004 0.010
K 0.10 0.300.004 0.012
N 0.20 REF0.008 REF
S 2.00 2.200.079 0.087
MILLIMETERS
1.80 2.200.071 0.087
J
C
GENERIC MARKING
DIAGRAM*
K
XXXMG
G
XXX = Specific Device Code
M = Date Code
G = Pb−Free Package
0.65
0.025
0.65
0.025
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
1.9
0.0748
STYLE 1:
PIN 1. BASE
2. EMITTER
3. BASE
4. COLLECTOR
5. COLLECTOR
STYLE 6:
PIN 1. EMITTER 2
2. BASE 2
3. EMITTER 1
4. COLLECTOR
5. COLLECTOR 2/BASE 1
DOCUMENT NUMBER:
DESCRIPTION:
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2018
STYLE 2:
PIN 1. ANODE
2. EMITTER
3. BASE
4. COLLECTOR
5. CATHODE
STYLE 7:
PIN 1. BASE
2. EMITTER
3. BASE
4. COLLECTOR
5. COLLECTOR
98ASB42984B
SC−88A (SC−70−5/SOT−353)
SCALE 20:1
STYLE 3:
PIN 1. ANODE 1
STYLE 8:
PIN 1. CATHODE
mm
ǒ
Ǔ
inches
STYLE 4:
2. N/C
3. ANODE 2
4. CATHODE 2
5. CATHODE 1
2. COLLECTOR
3. N/C
4. BASE
5. EMITTER
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PIN 1. SOURCE 1
2. DRAIN 1/2
3. SOURCE 1
4. GATE 1
5. GATE 2
STYLE 9:
PIN 1. ANODE
2. CATHODE
3. ANODE
4. ANODE
5. ANODE
STYLE 5:
PIN 1. CATHODE
2. COMMON ANODE
3. CATHODE 2
4. CATHODE 3
5. CATHODE 4
Note: Please refer to datasheet for
style callout. If style type is not called
out in the datasheet refer to the device
datasheet pinout or pin assignment.
PAGE 1 OF 1
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