ON Semiconductor NB4N11MDTEVB User Manual
© Semiconductor Components Industries, LLC, 2012
February, 2012 − Rev. 1
1 Publication Order Number:
EVBUM2071/D
NB4N11MDTEVB
Evaluation Board User's
Manual for NB4N11M
Description
ON Semiconductor has developed an evaluation board for
the NB4N11M device as a convenience for the customers
interested in performing their own device engineering
assessment. This board provides a high bandwidth 50 W
controlled impedance environment. The pictures in Figure 1
show the top and bottom view of the evaluation board, which
can be configured in several different ways.
This NB4N11M evaluation board manual contains:
• Appropriate Lab Setup
• Assembly Instructions
• Bill of Materials
This manual should be used in conjunction with the
NB4N11M device data sheet, which contains full technical
details on the device specifications and operation.
Board Lay−Up
The NB4N11M evaluation board is implemented in four
layers with split (dual) power supplies (Figure 7, Evaluation
Board Lay−up). For standard lab setup, a split (dual) power
supply is essential to enable the 50 W internal impedance in
the oscilloscope as a devices termination. The first layer or
primary trace layer is 0.005″ thick Rogers RO4003 material,
which is designed to have equal electrical length on all signal
traces from the device under the test (DUT) to the sense
output. The second layer is the 1.0 oz copper ground plane.
The FR4 dielectric material is placed between second and
third layer and between third and fourth layer. The third
layer is also 1.0 oz copper ground plane. The fourth layer is
the secondary trace layer.
Top View Bottom View
Figure 1. Top and Bottom View of the NB4N11M Evaluation Board
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Figure 2. Top & Bottom Layers (Top View)
V
EE
SMA_GND
V
CC
TOP LAYER BOTTOM LAYER
V
EE
SMA_GND
V
CC
Figure 3. Evaluation Board Lay−up
Connecting Power and Ground Planes
The side launch 9 pin power supply connector is wired as
shown in Figure 4. Test points can be soldered on the top of
the PCB to accommodated easier connections. Exact values
that need to be applied can be found in Table 1.
Table 1. Power Supply Levels
Power Supply Span V
TT
(Termination)
V
CC
(Pin 8)
VEE / GND
(Pin 5)
SMA_GND
(PCB SMA Ground)
3.3 V 1.8 V 1.5 V −1.8 V 0 V
3.3 V 2.5 V 0.8 V −2.5 V 0 V
3.3 V 3.3 V 0 V −3.3 V 0 V
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V
CC
SMA_GND
V
EE
Figure 4. Power Supply Connector − 9 Pin Side
View (Left) and PCB Top View (Right)
NC
NC
V
CC
V
EE
V
CC
V
EE
SMA_GND
C3 = 10 mF; C4 = 10 mF
Stimulus (Generator) Termination
All ECL outputs need to be terminated to V
TT
(VTT =
V
CC
– 2.0 V = GND) via a 50 W resistor. The current board
design utilizes the space for placement of the external
termination resistors. (More information on termination is
provided in AN8020). The 0402 chip resistor pads are
provided on the bottom side of the evaluation board. Solder
the chip resistors to the bottom side of the board between the
appropriate input of the device pin pads and the ground pads
as shown in Figure 5 (for split power supply setup, PCB is
assembled in this configuration).
Figure 5. Expanded Bottom View
C1 = 0.01 mF
C2 = 0.01 mF
R2 = 50 W
R1 = 50 W
Likewise for CML outputs, CML stimulus signal need to
be terminated to V
CC
via a 50 W resistor. To accomplish this
configuration the external termination resistor has to be
moved from SMA_GND ring to V
CC
ring on the bottom of
the board.
For the LVDS configuration Input pin pads of the D0 or
D1 input has to be shorted using 100 W resistor across
differential lines.
DUT Termination
For standard lab setup and test, a split (dual) power supply
is required enabling the 50 W internal impedance in the
oscilloscope to be used as a termination of the signals (in
split power supply setup SMA_GND as a system ground,
V
CC
, and VEE are varied; see Table 1, Power Supply Levels).
Board Components Configuration
The NB4N11MDTEVB evaluation board requires six
side SMA connectors. Placement locations are described in
the Table 2 below.
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