ON Semiconductor MJE 13005 User Manual

Î

ON Semiconductor

SWITCHMODE Series NPN Silicon Power Transistors

These devices are designed for high–voltage, high–speed power switching inductive circuits where fall time is critical. They are particularly suited for 115 and 220 V SWITCHMODE applications such as Switching Regulator’s, Inverters, Motor Controls, Solenoid/Relay drivers and Deflection circuits.

SPECIFICATION FEATURES:

• V

CEO(sus)

• Reverse Bias SOA with Inductive Loads @ T

• Inductive Switching Matrix 2 to 4 Amp, 25 and 100C

• 700 V Blocking Capability

• SOA and Switching Applications Information.

MAXIMUM RATINGS

Collector–Emitter Voltage Collector–Emitter Voltage Emitter Base Voltage Collector Current — Continuous

ООООООООООООООО

Base Current — Continuous

ООООООООООООООО

Emitter Current — Continuous

ООООООООООООООО

Total Power Dissipation @ TA = 25C

Derate above 25C

ООООООООООООООО

Total Power Dissipation @ TC = 25C

Derate above 25C

Operating and Storage Junction Temperature Range

400 V

tc @ 3A, 100C is 180 ns (Typ)

Rating

— Peak (1)

= 100C

C

Symbol

V

CEO(sus)

V

CEV

V

EBO

I

C

I

ООООО

CM

I

BM

I

EM

P

TJ, T

I

B

I

E

D

stg

MJE13005

*ON Semiconductor Preferred Device

4 AMPERE

NPN SILICON

POWER TRANSISTOR

400 VOLTS

75 WATTS

CASE 221A–09

TO–220AB

Value

400 700

9 4

ОООООО

8 2

4 6

12

2

16 75

600

–65 to +150

Unit

Vdc Vdc Vdc Adc

ÎÎ

Adc

ÎÎ

Adc

ÎÎ

Watts

mW/C

ÎÎ

Watts

mW/C

C

*

THERMAL CHARACTERISTICS

Characteristic

Thermal Resistance, Junction to Ambient Thermal Resistance, Junction to Case Maximum Lead Temperature for Soldering

ООООООООООООООО

Purposes: 1/8″ from Case for 5 Seconds

(1) Pulse Test: Pulse Width = 5 ms, Duty Cycle  10%.

 Semiconductor Components Industries, LLC, 2001

April, 2001 – Rev. 5

Symbol

R

θ

JA

R

θ

JC

T

ООООО

L

ОООООО

Max

62.5

1.67 275

Unit

C/W C/W

C

ÎÎ

1 Publication Order Number:

MJE13005/D

MJE13005

Î

Duty Cycle

1%)

)

I

V

Vdc, T

100 C)

ELECTRICAL CHARACTERISTICS (T

= 25C unless otherwise noted)

C

Characteristic

*OFF CHARACTERISTICS

Collector–Emitter Sustaining Voltage

(I

= 10 mA, IB = 0)

C

ООООООООООООООООО

Collector Cutoff Current

(V

= Rated Value, V

CEV

ООООООООООООООООО

(V

= Rated Value, V

CEV

= 1.5 Vdc)

BE(off)

= 1.5 Vdc, TC = 100C)

BE(off)

Emitter Cutoff Current

(V

ООООООООООООООООО

= 9 Vdc, IC = 0)

EB

SECOND BREAKDOWN

Second Breakdown Collector Current with base forward biased Clamped Inductive SOA with Base Reverse Biased

*ON CHARACTERISTICS

DC Current Gain

(I

= 1 Adc, VCE = 5 Vdc)

C

ООООООООООООООООО

= 2 Adc, VCE = 5 Vdc)

(I

C

Collector–Emitter Saturation Voltage

(I

= 1 Adc, IB = 0.2 Adc)

C

ООООООООООООООООО

= 2 Adc, IB = 0.5 Adc)

(I

C

ООООООООООООООООО

(I

= 4 Adc, IB = 1 Adc)

C

(I

= 2 Adc, IB = 0.5 Adc, TC = 100C)

C

ООООООООООООООООО

Base–Emitter Saturation Voltage

(I

= 1 Adc, IB = 0.2 Adc)

C

ООООООООООООООООО

= 2 Adc, IB = 0.5 Adc)

(I

C

(I

= 2 Adc, IB = 0.5 Adc, TC = 100C)

ООООООООООООООООО

C

DYNAMIC CHARACTERISTICS

Current–Gain — Bandwidth Product

(I

= 500 mAdc, VCE = 10 Vdc, f = 1 MHz)

C

ООООООООООООООООО

Output Capacitance

(V

= 10 Vdc, IE = 0, f = 0.1 MHz)

CB

SWITCHING CHARACTERISTICS

Resistive Load (Table 2)

Delay Time Rise Time Storage Time

(VCC = 125 Vdc, IC = 2 A, IB1 = IB2 = 0.4 A, tp = 25 µs, Duty Cycle  1%)



Fall Time

Inductive Load, Clamped (Table 2, Figure 13)

Voltage Storage Time Crossover Time

(IC = 2 A, V I

= 0.4 A, V

= 0.4 A,

B1

clamp

BE(off)

= 300 Vdc,

= 5 Vdc, T

= 5

= 100C

=

C

Fall Time

*Pulse Test: Pulse Width = 300 µs, Duty Cycle = 2%.

Symbol

V

CEO(sus)

ÎÎÎ

I

CEV

ÎÎÎ

I

EBO

ÎÎÎ

I

S/b

RBSOA

h

FE

ÎÎÎ

V

CE(sat)

ÎÎÎ

V

BE(sat)

ÎÎÎ

f

T

ÎÎÎ

C

ob

t

d

t

r

t

s

t

f

t

sv

t

c

t

fi

Min

400

ÎÎ

—

ÎÎ

— —

ÎÎ

10

ÎÎ

8

—

ÎÎ

—

ÎÎ

— —

ÎÎ

—

ÎÎ

—

ÎÎ

—

4

ÎÎ

—

— — — —

— — —

Typ

—

Î

—

Î

— —

Î

—

Î

—

Î

—

Î

— —

Î

—

Î

—

Î

—

Î

65

0.025

0.3

1.7

0.4

0.9

0.32

0.16

Max

—

ÎÎ

1

ÎÎ

5 1

ÎÎ

See Figure 11 See Figure 12

60

ÎÎ

40

0.5

ÎÎ

0.6

ÎÎ

1 1

ÎÎ

1.2

ÎÎ

1.6

ÎÎ

1.5

—

ÎÎ

—

0.1

0.7 4

0.9

4

0.9

—

Unit

Vdc

Î

mAdc

Î

mAdc

Î

—

Î

Vdc

Î

Vdc

Î

MHz

Î

pF

µs µs µs µs

µs µs µs

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MJE13005

)

100

70

T

= 150°C

J

50

25°C

30

, DC CURRENT GAIN

FE

h

20

10

7

-55°C

VCE = 2 V V

= 5 V

CE

5

0.04

0.1 0.4 2 4

0.06

0.2 1

0.6

IC, COLLECTOR CURRENT (AMP)

Figure 1. DC Current Gain

1.3

V

@ IC/IB = 4

BE(sat)

V

@ VCE = 2 V

1.1

0.9 0.35

BE(on)

T

= -55°C

J

, COLLECTOR-EMITTER VOLTAGE (VOLTS

V

CE

0.55

0.45

1.6

1.2

0.8

0.4

2

0

0.03

IC = 1 A

2 A

0.1 0.2 0.5 3 , BASE CURRENT (AMP)

I

B

3 A 4 A

0.30.05

Figure 2. Collector Saturation Region

IC/IB = 4

T

= 25°C

J

0.7 1 2

T

= -55°C

J

0.7

, BASE-EMITTER VOLTAGE (VOLTS)

0.5

BE

V

0.3

0.06 0.1 10.04 0.40.2 0.6

10 k

1 k

100

10

, COLLECTOR CURRENT (A)µI

1

C

0.1

-0.4 -0.2

25°C

VOLTAGE (VOLTS)

0.25

25°C

, COLLECTOR-EMITTER SATURATION

0.15

150°C

CE(sat)

V

2

4

0.05

0.06 0.1 10.04 0.40.2 0.6 2 4

IC, COLLECTOR CURRENT (AMP)IC, COLLECTOR CURRENT (AMP)

Figure 3. Base–Emitter Voltage Figure 4. Collector–Emitter Saturation Voltage

2 k

VCE = 250 V

T

= 150°C

J

125°C 100°C

75°C

50°C

25°C

REVERSE FORWARD

0

V

, BASE-EMITTER VOLTAGE (VOLTS)

BE

Figure 5. Collector Cutoff Region

1 k 700 500

300

200

100

C, CAPACITANCE (pF)

70 50

30

20

+0.4+0.2

+0.6

0.3

C

ib

3

V

, REVERSE VOLTAGE (VOLTS)

R

10 30

Figure 6. Capacitance

150°C

10050510.5

C

ob

300

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3

MJE13005

Î

I

CPK

90% V

clamp

I

C

V

CE

I

B

90% I

t

sv

B1

t

rv

10% V

clamp

t

c

90% I

t

V

clamp

C

t

fi

ti

10%

2% I

I

CPK

C

TIME

Figure 7. Inductive Switching Measurements

Table 1. Typical Inductive Switching Performance

I

AMP

ÎÎ

2

ÎÎ

3

4

ÎÎ

NOTE: All Data recorded in the inductive Switching Circuit In Table 2.

T

C

C

Î

25

100

Î

25

100

25

Î

100

C

t

sv

ns

Î

600 900

Î

t

rv

ns

Î

70

110

Î

650 95060100

550

Î

850

70

Î

110

t

ns

Î

100 240

Î

140 330

160

Î

350

ns

Î

t

ti

fi

80

130

Î

60

100 100

Î

160

t

c

ns

ÎÎ

180 320

ÎÎ

200 350

220

ÎÎ

390

SWITCHING TIMES NOTE

In resistive switching circuits, rise, fall, and storage times

have been defined and apply to both current and voltage waveforms since they are in phase. However, for inductive loads which are common to SWITCHMODE power supplies and hammer drivers, current and voltage waveforms are not in phase. Therefore, separate measurements must be made on each waveform to determine the total switching time. For this reason, the following new terms have been defined.

t

= Voltage Storage Time, 90% IB1 to 10% V

sv

trv = Voltage Rise Time, 10–90% V

tfi = Current Fall Time, 90–10% I

tti = Current Tail, 10–2% I

tc = Crossover Time, 10% V

C

clamp

to 10% I

clamp

C

clamp

C

An enlarged portion of the inductive switching

waveforms is shown in Figure 7 to aid in the visual identity of these terms.

For the designer, there is minimal switching loss during

storage time and the predominant switching power losses occur during the crossover interval and can be obtained using the standard equation from AN–222:

P

= 1/2 VCCIC(tc)f

SWT

In general, trv + tfi  tc. However, at lower test currents

this relationship may not be valid.

As is common with most switching transistors, resistive

switching is specified at 25°C and has become a benchmark for designers. However, for designers of high frequency converter circuits, the user oriented specifications which make this a “SWITCHMODE” transistor are the inductive switching speeds (t

and tsv) which are guaranteed at 100C.

c

RESISTIVE SWITCHING PERFORMANCE

1

VCC = 125 V

0.5

t

r

I

C/IB

T

= 25°C

J

= 5

0.2

0.1

t, TIME (s)µ

0.05 td @ V

BE(off)

= 5 V

0.02

0.01

0.1

0.2

I

, COLLECTOR CURRENT (AMP)

C

0.4 4120.04

Figure 8. Turn–On Time

10

t

5

s

VCC = 125 V I

= 5

C/IB

= 25°C

T

J

2

1

t, TIME (s)µ

0.5

0.3

t

f

0.2

0.1

0.2

0.5 4120.04

IC, COLLECTOR CURRENT (AMP)

Figure 9. Turn–Off Time

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MJE13005

Table 2. Test Conditions for Dynamic Performance

REVERSE BIAS SAFE OPERATING AREA AND INDUCTIVE SWITCHING

DUTY CYCLE ≤ 10%

t

, t

r

f

TEST CIRCUITS

NOTE

PW and V RB Adjusted for Desired I

Coil Data: Ferroxcube Core #6656

VALUES

CIRCUIT

Full Bobbin (~16 Turns) #16

I

C

V

CE

TEST WAVEFORMS

5 V

P

W

≤ 10 ns

Adjusted for Desired I

CC

I

C(pk)

t

1

VCE or

V

clamp

TIME

68

0.02 µF

B1

tf CLAMPED

t

f

t

0.001 µF

1 k

+5 V

1N493

3

270

C

t

UNCLAMPED ≈ t

f

2

+5 V

33

1N4933

MJE210

1N4933

33

2N222

2

R

1 k

2N2905

47

1/2 W

MJE200

100

-V

GAP for 200 µH/20 A L

= 200 µH

coil

OUTPUT WAVEFORMS

2

1

ADJUSTED TO

t OBTAIN I

t

≈

1

t

≈

2

t

B

I

BE(off)

B

T.U.T.

C

L

coil (ICpk)

V

CC

L

coil (ICpk)

V

clamp

RESISTIVE

SWITCHING

V

CC

+125 V

L

MR826*

R

C

SCOPE

I

C

*SELECTED FOR ≥ 1 kV

5.1 k

V

clamp

V

CE

TUT

R

B

D1

51

-4.0 V

V

= 125 V

= 20 V

V

CC

V

= 300 Vdc

clamp

Test Equipment

Scope–Tektronics

475 or Equivalent

CC

R

= 62 Ω

C

D1 = 1N5820 or Equiv.

= 22 Ω

R

B

+10 V

25 µs

0

-8 V

t

, tf < 10 ns

r

Duty Cycle = 1.0%

and RC adjusted

R

B

for desired I

and I

B

C

1

0.7

0.5

0.3

0.2

0.1

0.07

(NORMALIZED)

0.05

0.03

0.02

r(t), TRANSIENT THERMAL RESISTANCE

0.01

D = 0.5

0.2

0.1

0.05

0.02

SINGLE PULSE

0.02

P

Z

= r(t) R

θ

JC(t)

R

= 1.67°C/W MAX

θ

JC

θ

JC

(pk)

D CURVES APPLY FOR POWER PULSE TRAIN SHOWN

0.01

0.05 1 2 5 10 20 50 100 200 500

0.1 0.50.2

READ TIME AT t T

- TC = P

J(pk)

(pk)

1

Z

θ

JC(t)

t

1

t

2

DUTY CYCLE, D = t1/t

2

t, TIME (ms)

Figure 10. Typical Thermal Response [Z

(t)]

θ

JC

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1 k

MJE13005

SAFE OPERATING AREA INFORMATION

The Safe Operating Area Figures 11 and 12 are specified ratings for these devices under the test conditions shown.

10

5

2

1

0.5

0.2

0.1

0.05

, COLLECTOR CURRENT (AMP)

C

I

0.02

0.01 7

520

10

V

, COLLECTOR-EMITTER VOLTAGE (VOLTS)

CE

30 50 70 100

5 ms

dc

500 µs

MJE13005

200

1 ms

300 500

400

Figure 11. Forward Bias Safe Operating Area

FORWARD BIAS

There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate I

– V

C

CE

limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate.

The data of Figure 11 is based on T

= 25C; T

C

J(pk)

is variable depending on power level. Second breakdown pulse limits are valid for duty cycles to 10% but must be derated when TC ≥ 25C. Second breakdown limitations do not derate the same as thermal limitations. Allowable current at the voltages shown on Figure 11 may be found at any case temperature by using the appropriate curve on Figure 13.

T

may be calculated from the data in Figure 10. At

J(pk)

high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown.

4

T

≤ 100°C

C

I

= 2.0 A

3

2

1

, COLLECTOR CURRENT (AMP)

C(pk)

I

0

100 300

V

CE

MJE13005

200 400 600

, COLLECTOR-EMITTER CLAMP VOLTAGE (VOLTS)

B1

V

= 9 V

BE(off)

500 700

5 V 3 V

1.5 V 800

Figure 12. Reverse Bias Switching Safe Operating Area

REVERSE BIAS

For inductive loads, high voltage and high current must be sustained simultaneously during turn–off, in most cases, with the base to emitter junction reverse biased. Under these conditions the collector voltage must be held to a safe level at or below a specific value of collector current. This can be accomplished by several means such as active clamping, RC snubbing, load line shaping, etc. The safe level for these devices is specified as Reverse Bias Safe Operating Area and represents the voltage–current conditions during reverse biased turn–off. This rating is verified under clamped conditions so that the device is never subjected to an avalanche mode. Figure 12 gives the complete RBSOA characteristics.

POWER DERATING FACTOR

1

SECOND BREAKDOWN

0.8

0.6

0.4

0.2

0

20

THERMAL

DERATING

40 120 160

60 100 14080

T

, CASE TEMPERATURE (°C)

C

Figure 13. Forward Bias Power Derating

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DERATING

MJE13005

PACKAGE DIMENSIONS

TO–220AB

CASE 221A–09

ISSUE AA

SEATING

–T–

PLANE

B

4

Q

123

F

T

A

U

C

S

H

K

Z

L

V

R J

G

D

N

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED.

DIM MIN MAX MIN MAX

A 0.570 0.620 14.48 15.75 B 0.380 0.405 9.66 10.28 C 0.160 0.190 4.07 4.82 D 0.025 0.035 0.64 0.88 F 0.142 0.147 3.61 3.73 G 0.095 0.105 2.42 2.66 H 0.110 0.155 2.80 3.93 J 0.018 0.025 0.46 0.64 K 0.500 0.562 12.70 14.27 L 0.045 0.060 1.15 1.52 N 0.190 0.210 4.83 5.33 Q 0.100 0.120 2.54 3.04 R 0.080 0.110 2.04 2.79 S 0.045 0.055 1.15 1.39 T 0.235 0.255 5.97 6.47 U 0.000 0.050 0.00 1.27 V 0.045 --- 1.15 --- Z --- 0.080 --- 2.04

MILLIMETERSINCHES

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MJE13005

SWITCHMODE is a trademark of Semiconductor Components Industries, LLC.

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.

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