ON Semiconductor MJ15023, MJ15025 User Manual

MJ15023 (PNP),
MJ15025 (PNP)

Silicon Power Transistors

The MJ15023 and MJ15025 are power transistors designed for high

power audio, disk head positioners and other linear applications.

Features

• High Safe Operating Area

• High DC Current Gain

• Complementary to MJ15022 (NPN), MJ15024 (NPN)

• These Devices are Pb−Free and are RoHS Compliant*

MAXIMUM RATINGS

Rating Symbol Value Unit

Collector−Emitter Voltage

MJ15023
MJ15025

Collector−Base Voltage

MJ15023

MJ15025
Emitter−Base Voltage V
Collector−Emitter Voltage V
Collector Current − Continuous (Note 1) I
Collector Current − Peak (Note 1) I
Base Current − Continuous I
Total Device Dissipation

= 25_C

@ T

C

Derate above 25_C
Operating and Storage Junction

Temperature Range

Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.

1. Pulse Test: Pulse Width = 5 ms, Duty Cycle ≤ 10%.

V

CEO

V

CBO

EBO
CEX

CM

P

TJ, T

C

B

D

stg

200
250

350
400

5 Vdc

400 Vdc

16 Adc
30 Adc

5 Adc

250

1.43

−65 to +200

Vdc

Vdc

W

W/_C

_C

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16 AMPERES

SILICON POWER TRANSISTORS

200 − 250 VOLTS, 250 WATTS

COLLECTOR

CASE

1

BASE

2

EMITTER

CASE

2

1

TO−204 (TO−3)

CASE 1−07

STYLE 1

MARKING DIAGRAM

MJ1502xG

AYWW

MEX

THERMAL CHARACTERISTICS

Characteristics Symbol Max Unit

Thermal Resistance, Junction−to−Case

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.

© Semiconductor Components Industries, LLC, 2013

August, 2013 − Rev. 12

R

q

JC

0.70

_C/W

1 Publication Order Number:

MJ1502x = Device Code

G = Pb−Free Package
A = Assembly Location
Y = Year
WW = Work Week
MEX = Country of Origin

x = 3 or 5

ORDERING INFORMATION

Device Package Shipping

MJ15023G TO−204

MJ15025G TO−204

(Pb−Free)

(Pb−Free)

100 Units / Tray

100 Units / Tray

MJ15023/D

MJ15023 (PNP), MJ15025 (PNP)

ELECTRICAL CHARACTERISTICS (T

= 25_C unless otherwise noted)

C

Characteristic

OFF CHARACTERISTICS

Collector−Emitter Sustaining Voltage (Note 2)

(I

= 100 mAdc, IB = 0)

C

MJ15023
MJ15025

Collector Cutoff Current

(VCE = 200 Vdc, V

MJ15023

(VCE = 250 Vdc, V

MJ15025

BE(off)

BE(off)

= 1.5 Vdc)
= 1.5 Vdc)

Collector Cutoff Current

(V

= 150 Vdc, IB = 0)

CE

MJ15023

(VCE = 200 Vdc, IB = 0)

MJ15025

Emitter Cutoff Current

(V

= 5 Vdc, IB = 0)

CE

Both

SECOND BREAKDOWN

Second Breakdown Collector Current with Base Forward Biased

(V

= 50 Vdc, t = 0.5 s (non−repetitive))

CE

(VCE = 80 Vdc, t = 0.5 s (non−repetitive))

ON CHARACTERISTICS

DC Current Gain

(I

= 8 Adc, VCE = 4 Vdc)

C

(IC = 16 Adc, VCE = 4 Vdc)
Collector−Emitter Saturation Voltage

(I

= 8 Adc, IB = 0.8 Adc)

C

(IC = 16 Adc, IB = 3.2 Adc)
Base−Emitter On Voltage

(I

= 8 Adc, VCE = 4 Vdc)

C

DYNAMIC CHARACTERISTICS

Current−Gain − Bandwidth Product

(I

= 1 Adc, VCE = 10 Vdc, f

C

= 1 MHz)

test

Output Capacitance

(V

= 10 Vdc, IE = 0, f

CB

= 1 MHz)

test

2. Pulse Test: Pulse Width = 300 ms, Duty Cycle ≤ 2%.

Symbol Min Max Unit

V

CEO(sus)

I

CEX

I

CEO

I

EBO

200
250

−

−

−

−

−

−
mAdc

250
250

mAdc

500
500

mAdc

− 500

I

h

V

CE(sat)

V

BE(on)

C

S/b

f

FE

5
2

15

5

−

−

−

−

60

−

1.4

4.0

− 2.2

T

ob

4 −

− 600

Adc

Vdc

Vdc

MHz

−

−

pF

100

50

TC = 25°C

20

10

5.0

1.0
BONDING WIRE LIMITED

THERMAL LIMITATION

, COLLECTOR CURRENT (AMPS)

C

I

0.2

0.1

0.1 0.2 0.5 10 1 k

(SINGLE PULSE)
SECOND BREAKDOWN LIMITED

20

50 250

500100

VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)

Figure 1. Active−Region Safe Operating Area

There are two limitations on the powerhandling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate I
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.

The data of Figure 1 is based on T
variable depending on conditions. At high case
temperatures, thermal limitations will reduce the power that
can be handled to values less than the limitations imposed by
second breakdown.

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2

= 200_C; TC is

J(pk)

− V

C

CE

MJ15023 (PNP), MJ15025 (PNP)

TYPICAL CHARACTERISTICS

4000
3000

1000

500

C, CAPACITANCE (pF)

100

0.3

200

100

50

20

10

, DC CURRENT GAIN

FE

h

5.0

2.0

0.2 10 205.02.01.00.5

C

ib

TJ = 25°C

C

ob

5.0

V

, REVERSE VOLTAGE (VOLTS)

R

50

Figure 2. Capacitances

TJ = 100°C

TJ = 25°C

I

, COLLECTOR CURRENT (AMPS)

C

Figure 4. DC Current Gain

10010

VCE = 4.0 V

9

8

TJ = 25°C
V

= 10 V

CE

= 1 MHz

f

Tes t

7

6

5

4

3

2

1

0

, CURRENT-GAIN — BANDWIDTH PRODUCT (MHz)

300301.00.5

0.1 0.3 0.5

T

f

1.0 5.0

2.0 10

IC, COLLECTOR CURRENT (AMPS)

Figure 3. Current−Gain − Bandwidth Product

1.8

1.4

1.0

TJ = 25°C

V

@ VCE = 4.0 V

0.8

BE(on)

V, VOLTAGE (VOLTS)

100°C

25°C

V

@ IC/IB = 10

0.5

CE(sat)

100°C

2.01.0

5.0

10

0.2

0

0.1

, COLLECTOR CURRENT (AMPS)

I

C

Figure 5. “On” Voltages

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3

MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

SCALE 1:1

TO−204 (TO−3)

CASE 1−07

ISSUE Z DATE 05/18/1988

A

N

C

E

D

2 PL

0.13 (0.005) Y

U

V

H

L

2

1

G

K

M

−Y−

−T−

B

T

SEATING
PLANE

M

Q

M

−Q−

0.13 (0.005) T

STYLE 1:

PIN 1. BASE

2. EMITTER

CASE: COLLECTOR

STYLE 6:

PIN 1. GATE

2. EMITTER

CASE: COLLECTOR

M

STYLE 2:

STYLE 7:

M

Y

PIN 1. BASE

2. COLLECTOR

CASE: EMITTER

PIN 1. ANODE

2. OPEN

CASE: CATHODE

STYLE 3:

PIN 1. GATE

2. SOURCE

CASE: DRAIN

STYLE 8:

PIN 1. CATHODE #1

2. CATHODE #2

CASE: ANODE

STYLE 4:

STYLE 9:

NOTES:

PIN 1. GROUND

2. INPUT

CASE: OUTPUT

PIN 1. ANODE #1

2. ANODE #2

CASE: CATHODE

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. ALL RULES AND NOTES ASSOCIATED WITH
REFERENCED TO-204AA OUTLINE SHALL APPLY.

DIM MIN MAX MIN MAX

A 1.550 REF 39.37 REF
B --- 1.050 --- 26.67
C 0.250 0.335 6.35 8.51
D 0.038 0.043 0.97 1.09
E 0.055 0.070 1.40 1.77
G 0.430 BSC 10.92 BSC
H 0.215 BSC 5.46 BSC
K 0.440 0.480 11.18 12.19
L 0.665 BSC 16.89 BSC
N --- 0.830 --- 21.08
Q 0.151 0.165 3.84 4.19
U 1.187 BSC 30.15 BSC
V 0.131 0.188 3.33 4.77

STYLE 5:

PIN 1. CATHODE

2. EXTERNAL TRIP/DELAY

CASE: ANODE

MILLIMETERSINCHES

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
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SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable
attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.

© Semiconductor Components Industries, LLC, 2000

1 Case Outline Number:

January , 2000 − Rev. 07Z

1

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