NPN − MJ15022, MJ15024*
*MJ15024 is a Preferred Device
Silicon Power Transistors
The MJ15022 and MJ15024 are PowerBase power transistors
designed for high power audio, disk head positioners and other linear
applications.
Features
• High Safe Operating Area (100% Tested) − 2 A @ 80 V
• High DC Current Gain − h
= 15 (Min) @ IC = 8 Adc
FE
• Pb−Free Packages are Available*
MAXIMUM RATINGS
Rating Symbol Value Unit
Collector−Emitter Voltage
MJ15022
MJ15024
Collector−Base Voltage
MJ15022
MJ15024
Emitter−Base Voltage V
Collector−Emitter Voltage V
Collector Current − Continuous
− Peak (Note 1)
Base Current − Continuous I
Total Device Dissipation @ TC = 25_C
Derate above 25_C
Operating and Storage Junction
Temperature Range
THERMAL CHARACTERISTICS
Characteristics Symbol Max Unit
Thermal Resistance, Junction−to−Case
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously . If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. Pulse Test: Pulse Width = 5 ms, Duty Cycle v 10%.
V
CEO
V
CBO
EBO
CEX
P
TJ, T
R
200
250
350
400
5 Vdc
400 Vdc
I
C
B
D
stg
q
JC
16
30
5 Adc
250
1.43
−65 to +200
0.70
Vdc
Vdc
Adc
W
W/_C
_C
_C/W
http://onsemi.com
16 AMPERES
SILICON POWER TRANSISTORS
200 − 250 VOLTS, 250 WATTS
TO−204AA (TO−3)
CASE 1−07
STYLE 1
MARKING DIAGRAM
MJ1502xG
AYWW
MEX
MJ1502x = Device Code
x = 2 or 4
G = Pb−Free Package
A = Assembly Location
Y = Year
WW = Work Week
MEX = Country of Origin
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
February, 2006 − Rev. 10
1 Publication Order Number:
ORDERING INFORMATION
Device Package Shipping
MJ15022 TO−204 100 Units / Tray
MJ15022G TO−204
MJ15024 TO−204 100 Units / Tray
MJ15024G TO−204
Preferred devices are recommended choices for future use
and best overall value.
(Pb−Free)
(Pb−Free)
100 Units / Tray
100 Units / Tray
MJ15022/D
NPN − MJ15022, MJ15024*
ELECTRICAL CHARACTERISTICS (T
= 25_C unless otherwise noted)
C
Characteristic
OFF CHARACTERISTICS
Collector−Emitter Sustaining Voltage (Note 2)
= 100 mAdc, IB = 0) MJ15022
(I
C
ОООООООООООООООООООО
MJ15024
Collector Cutoff Current
(V
ОООООООООООООООООООО
ОООООООООООООООООООО
= 200 Vdc, V
CE
= 250 Vdc, V
(V
CE
= 1.5 Vdc) MJ15022
BE(off)
= 1.5 Vdc) MJ15024
BE(off)
Collector Cutoff Current
(V
= 150 Vdc, IB = 0) MJ15022
CE
ОООООООООООООООООООО
= 200 vdc, IB = 0) MJ15024
(V
CE
Emitter Cutoff Current
(V
= 5 Vdc, IB = 0)
CE
ОООООООООООООООООООО
SECOND BREAKDOWN
Second Breakdown Collector Current with Base Forward Biased
(V
= 50 Vdc, t = 0.5 s (non−repetitive))
CE
ОООООООООООООООООООО
= 80 Vdc, t = 0.5 s (non−repetitive))
(V
CE
ON CHARACTERISTICS
DC Current Gain
(I
= 8 Adc, VCE = 4 Vdc)
C
ОООООООООООООООООООО
= 16 Adc, VCE = 4 Vdc)
(I
C
Collector−Emitter Saturation Voltage
ОООООООООООООООООООО
(I
= 8 Adc, IB = 0.8 Adc)
C
= 16 Adc, IB = 3.2 Adc)
(I
ОООООООООООООООООООО
C
Base−Emitter On Voltage
(I
= 8 Adc, VCE = 4 Vdc)
C
ОООООООООООООООООООО
DYNAMIC CHARACTERISTICS
Current−Gain − Bandwidth Product
(I
= 1 Adc, VCE = 10 Vdc, f
C
= 1 MHz)
test
Output Capacitance
(V
ОООООООООООООООООООО
= 10 Vdc, IE = 0, f
CB
= 1 MHz)
test
2. Pulse Test: Pulse Width = 300 ms, Duty Cycle v 2%.
Symbol
V
CEO(sus)
ÎÎÎ
I
CEX
ÎÎÎ
ÎÎÎ
I
CEO
ÎÎÎ
I
EBO
ÎÎÎ
I
S/b
ÎÎÎ
h
FE
ÎÎÎ
V
CE(sat)
ÎÎÎ
ÎÎÎ
V
BE(on)
ÎÎÎ
f
T
C
ob
ÎÎÎ
Min
200
Î
250
Î
−
−
Î
−
Î
−
−
Î
5
Î
2
15
Î
5
Î
−
Î
−
−
Î
4
−
Î
Max
−
ÎÎ
−
ÎÎ
250
250
ÎÎ
500
ÎÎ
500
500
ÎÎ
−
ÎÎ
−
60
ÎÎ
−
ÎÎ
1.4
ÎÎ
4.0
2.2
ÎÎ
−
500
ÎÎ
Unit
−
Î
mAdc
Î
Î
mAdc
Î
mAdc
Î
Adc
Î
−
Î
Vdc
Î
Î
Vdc
Î
MHz
pF
Î
100
50
20
10
5.0
BONDING WIRE LIMITED
1.0
THERMAL LIMITATION
(SINGLE PULSE)
SECOND BREAKDOWN
, COLLECTOR CURRENT (AMPS)
C
I
0.2
LIMITED
0.1
0.1 0.2 0.5 10 1 k
20
50 250
VCE, COLLECTOR−EMITTER VOLTAGE (VOLTS)
Figure 1. Active−Region Safe Operating Area
TC = 25°C
There are two limitations on the powerhandling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate I
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 1 is based on T
variable depending on conditions. At high case
temperatures, thermal limitations will reduce the power that
can be handled to values Ion than the limitations imposed by
second breakdown.
500100
http://onsemi.com
2
= 200_C; TC is
J(pk)
− V
C
CE