ON Semiconductor MG2040, SZMG2040 User Manual

MG2040, SZMG2040

ESD Protection Diodes

Low Capacitance ESD Protection for
High Speed Video Interface

The MG2040 ESD protection diode is designed specifically to
protect HDMI and Display Port with full functionality ESD protection
and back drive current protection for V
and low ESD clamping voltage make this device an ideal solution for
protecting voltage sensitive high speed data lines. The flow−through
style package allows for easy PCB layout and matched trace lengths
necessary to maintain consistent impedance for the high speed TMDS
lines.

Features

• Full Function HDMI / Display Port Solution

• Single Connect, Flow through Routing for TMDS Lines

• Low Capacitance (0.35 pF Typical, I/O to GND)

• Protection for the Following IEC Standards:

IEC 61000−4−2 Level 4 (±8 kV Contact)

• UL Flammability Rating of 94 V−0

• SZ Prefix for Automotive and Other Applications Requiring Unique

Site and Control Change Requirements; AEC−Q101 Qualified and
PPAP Capable

• This is a Pb−Free Device

Typical Applications

• HDMI

• Display Port

line. Ultra−low capacitance

CC

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MARKING
DIAGRAM

18

UDFN18

CASE 517CP

1

2040 = Specific Device Code
M = Date Code
G = Pb−Free Package

(Note: Microdot may be in either location)

ORDERING INFORMATION

Device Package Shipping

MG2040MUTAG UDFN18

SZMG2040MUTAG UDFN18

†For information on tape and reel specifications,

including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.

(Pb−Free)

(Pb−Free)

2040MG

G

3000 / Tape &

Reel

3000 / Tape &

Reel

MAXIMUM RATINGS (T

Rating

Operating Junction Temperature Range T

Storage Temperature Range T

Lead Solder Temperature −
Maximum (10 Seconds)

IEC 61000−4−2 Contact (ESD)
IEC 61000−4−2 Air (ESD)

Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.

= 25°C unless otherwise noted)

J

Symbol Value Unit

J

stg

T

L

ESD
ESD

−55 to +125 °C

−55 to +150 °C

260 °C

±15
±15

kV
kV

See Application Note AND8308/D for further description of
survivability specs.

© Semiconductor Components Industries, LLC, 2014

October, 2017 − Rev. 5

1 Publication Order Number:

MG2040/D

MG2040, SZMG2040

Pin 1 Pin 2 Pin 3

Pin 4 Pin 5 Pin 6

Note: Common GND – Only Minimum of 1 GND connection required

Pin 7 Pin 8 Pin 9

Center Pins, Pin 12, 14, 16, 18

=

Pin 10 Pin 11 Pin 13 Pin 15 Pin 17

Figure 1. Pin Schematic

I/O

I/O

I/O

1

2

GND

3

GND

18

I/O

17

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

4

5

6

7

8

9

10

11

GND

GND

16

GND

15

I/O

14

GND

13

I/O

12

GND

Figure 2. Pin Configuration

Note: Pins 12, 14, 16, 18 and center pins are connected internally as a common ground.

Only minimum of one pin needs to be connected to ground for functionality of all pins.

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MG2040, SZMG2040

RWM

BR

R

C

C

V

C

J

= 25°C unless otherwise specified)

A

I/O Pin to GND (Note 1) 5.0 V

IT = 1 mA, I/O Pin to GND 5.5 V

V

= 5 V, I/O Pin to GND 1.0

RWM

IPP = 1 A, I/O Pin to GND (8 x 20 ms pulse)

IEC61000−4−2, ±8 kV Contact See Figures 3 and 4 V

IPP = 8 A
I

= 16 A

PP

I

= −8 A

PP

= −16 A

I

PP

11.4

15.3

−4.6

−8.1

VR = 0 V, f = 1 MHz between I/O Pins 0.15 0.20

ELECTRICAL CHARACTERISTICS (T

Parameter

Reverse Working Voltage V

Breakdown Voltage V

Reverse Leakage Current I

Clamping Voltage (Note 1) V

Clamping Voltage (Note 2) V

Clamping Voltage
TLP (Note 3)
See Figures 8 through 11

Junction Capacitance C

Symbol Conditions Min Typ Max Unit

VR = 0 V, f = 1 MHz between I/O Pins and GND 0.35 0.42

Junction Capacitance
Difference

DC

VR = 0 V, f = 1 MHz between I/O Pins 0.02

J

VR = 0 V, f = 1 MHz between I/O Pins and GND 0.04

1. Surge current waveform per Figure 7.

2. For test procedure see Figures 5 and 6 and application note AND8307/D.

3. ANSI/ESD STM5.5.1 − Electrostatic Discharge Sensitivity Testing using Transmission Line Pulse (TLP) Model.
TLP conditions: Z

= 50 W, tp = 100 ns, tr = 4 ns, averaging window; t1 = 30 ns to t2 = 60 ns.

0

90

80

0

70

60

−10

50

40

30

VOLTAGE (V)

20

10

−20

−30

VOLTAGE (V)

−40

0

−10

−20 0 20 40 60 80 100 120 140

−50

−20 0 20 40 60 80 100 120 140

TIME (ns) TIME (ns)

Figure 3. IEC61000−4−2 +8 KV Contact

Clamping Voltage

Figure 4. IEC61000−4−2 −8 KV Contact

Clamping Voltage

mA

10 V

pF

pF

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