ON Semiconductor MC14043B, MC14044B Technical data

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MC14043B, MC14044B

CMOS MSI

Quad R–S Latches

The MC14043B and MC14044B quad R–S latches are constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. Each latch has an independent Q output and set and reset inputs. The Q outputs are gated through three–state buffers having a common enable input. The outputs are enabled with a logical “1” or high on the enable input; a logical “0” or low disconnects the latch from the Q outputs, resulting in an open circuit at the Q outputs.

• Double Diode Input Protection

• Three–State Outputs with Common Enable

• Outputs Capable of Driving T wo Low–power TTL Loads or One

Low–Power Schottky TTL Load Over the Rated T emperature Range

• Supply Voltage Range = 3.0 Vdc to 18 Vdc

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PDIP–16

P SUFFIX

CASE 648

SOIC–16

D SUFFIX

CASE 751B

MARKING

DIAGRAMS

MC140XXBCP

AWLYYWW

140XXB

AWLYWW

MAXIMUM RATINGS (Voltages Referenced to V

Symbol

Vin, V

Iin, I

stg

2. Maximum Ratings are those values beyond which damage to the device

may occur.

3. Temperature Derating:

Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high–impedance circuit. For proper operation, V to the range V

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either V

DC Supply Voltage Range –0.5 to +18.0 V Input or Output Voltage Range

out

Input or Output Current

out

Power Dissipation,

Ambient Temperature Range –55 to +125 °C

Storage Temperature Range –65 to +150 °C Lead Temperature

or VDD). Unused outputs must be left open.

Parameter Value Unit

(DC or Transient)

(DC or Transient) per Pin

per Package (Note 3.)

(8–Second Soldering)

v (Vin or V

) v VDD.

out

) (Note 2.)

–0.5 to VDD + 0.5 V

±10 mA

500 mW

260 °C

and V

should be constrained

out

SOEIAJ–16

F SUFFIX

CASE 966

XX = Specific Device Code A = Assembly Location WL or L = Wafer Lot YY or Y = Year WW or W = Work Week

MC140XXB

AWLYWW

ORDERING INFORMATION

Device Package Shipping

MC14043BCP PDIP–16 2000/Box MC14043BD SOIC–16 2400/Box MC14043BDR2 SOIC–16 2500/Tape & Reel MC14043BF SOEIAJ–16 See Note 1. MC14043BFEL SOEIAJ–16 See Note 1. MC14044BCP PDIP–16 2000/Box MC14044BD SOIC–16 2400/Box MC14044BDR2 SOIC–16 2500/Tape & Reel

1. For ordering information on the EIAJ version of the SOIC packages, please contact your local ON Semiconductor representative.

 Semiconductor Components Industries, LLC, 2000

March, 2000 – Rev . 3

1 Publication Order Number:

MC14043B/D

MC14043B, MC14044B

PIN ASSIGNMENT

MC14043B MC14044B

7 8

125

S0 R0

E R1 S1

NC = NO CONNECTION

1 2 3 4

6 7 8

15 14

125

ENABLE

MC14043B

= PIN 16

= PIN 8

NC = PIN 13

TRUTH TABLE

SRE Q

XX0

X = Don’t Care

Impedance No Change

1 1 1 1

High

MC14044B

0 1 1

ENABLE

= PIN 16

= PIN 8

NC = PIN 2

TRUTH TABLE

S R EQ

XX0

X = Don’t Care

Impedance

1 1 1

No Change

High

0 1 0

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MC14043B, MC14044B

ELECTRICAL CHARACTERISTICS (Voltages Referenced to V

Characteristic

Output Voltage “0” Level

= VDD or 0

ОООООООО

“1” Level

= 0 or V

ОООООООО

Input Voltage “0” Level

ОООООООО

Output Drive Current

ОООООООО

= 4.5 or 0.5 Vdc) = 9.0 or 1.0 Vdc) = 13.5 or 1.5 Vdc)

“1” Level = 0.5 or 4.5 Vdc) = 1.0 or 9.0 Vdc) = 1.5 or 13.5 Vdc)

= 2.5 Vdc) Source = 4.6 Vdc) = 9.5 Vdc) = 13.5 Vdc)

(VOL = 0.4 Vdc) Sink (V

= 0.5 Vdc)

ОООООООО

= 1.5 Vdc)

Input Current Input Capacitance

ОООООООО

= 0)

Quiescent Current

(Per Package)

ОООООООО

Total Supply Current

ОООООООО

(Dynamic plus Quiescent, Per Package)

ОООООООО

= 50 pF on all outputs all

ОООООООО

buffers switching)

(5.) (6.)

Three–State Output Leakage

Current

ОООООООО

Symbol

ÎÎ

Vdc

5.0 10

5.0

5.0 10

15 15

—

5.0 10

5.0

10 15

Min

— —

—

4.95

9.95

14.95

— —

—

3.5

7.0

– 3.0

– 0.64

– 1.6

– 4.2

0.64

1.6

4.2 — —

— —

—

ООООООООООООООО

—

– 55_C

)

Max

0.05

0.05 —

—

1.5

3.0

4.0

— —

—

— —

—

— —

—

± 0.1

—

1.0

2.0

4.0

± 0.1

25_C

Min

— —

ÎÎ

—

4.95

9.95

ÎÎ

14.95

ÎÎ

— —

ÎÎ

—

ÎÎ

3.5

7.0

ÎÎ

– 2.4

– 0.51

ÎÎ

– 1.3

ÎÎ

– 3.4

0.51

1.3

ÎÎ

3.4 — —

ÎÎ

— —

ÎÎ

—

(4.)

Typ

0 0

5.0 10

2.25

4.50

6.75

2.75

5.50

8.25

– 4.2

– 0.88

– 2.25

– 8.8

0.88

2.25

8.8

±0.00001

5.0

0.002

0.004

0.006

IT = (0.58 µA/kHz) f + I IT = (1.15 µA/kHz) f + I IT = (1.73 µA/kHz) f + I

—

± 0.0001

ÎÎ

Max

0.05

ÎÎ

0.05 —

—

ÎÎ

—

ÎÎ

1.5

3.0

ÎÎ

4.0

ÎÎ

— —

ÎÎ

—

ÎÎ

— —

ÎÎ

—

ÎÎ

— —

—

ÎÎ

—

± 0.1

7.5

ÎÎ

1.0

2.0

ÎÎ

4.0

DD DD DD

± 0.1

ÎÎ

Min

— —

—

4.95

9.95

14.95

— —

—

3.5

7.0

– 1.7

– 0.36

– 0.9

– 2.4

0.36

0.9

2.4 — —

— —

—

125_C

Max

0.05

± 1.0

± 3.0

4. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.

5. The formulas given are for the typical characteristics only at 25_C.

6. To calculate total supply current at loads other than 50 pF: ) = IT(50 pF) + (CL – 50) Vfk

T(CL

where: I

is in µA (per package), CL in pF, V = (VDD – VSS) in volts, f in kHz is input frequency, and k = 0.004.

— — —

1.5

3.0

4.0

— — —

— — — —

— — —

—

30 60

120

Unit

Vdc

mAdc

µAdc

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ON Semiconductor MC14043B, MC14044B Technical data

Specifications and Main Features

Frequently Asked Questions

User Manual