
MC14027B
Dual J-K Flip-Flop
The MC14027B dual J–K flip–flop has independent J, K, Clock (C),
Set (S) and Reset (R) inputs for each flip–flop. These devices may be
used in control, register, or toggle functions.
• Diode Protection on All Inputs
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Logic Swing Independent of Fanout
• Logic Edge–Clocked Flip–Flop Design —
Logic state is retained indefinitely with clock level either high or low;
information is transferred to the output only on the positive–going
edge of the clock pulse
• Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
• Pin–for–Pin Replacement for CD4027B
MAXIMUM RATINGS (Voltages Referenced to V
Symbol
V
DD
Vin, V
Iin, I
P
T
T
stg
T
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/C From 65C To 125C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high–impedance circuit. For proper operation, V
to the range V
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V
DC Supply Voltage Range –0.5 to +18.0 V
Input or Output Voltage Range
out
Input or Output Current
out
Power Dissipation,
D
Ambient Temperature Range –55 to +125 °C
A
Storage Temperature Range –65 to +150 °C
Lead Temperature
L
SS
or VDD). Unused outputs must be left open.
SS
Parameter Value Unit
(DC or Transient)
(DC or Transient) per Pin
per Package (Note 3.)
(8–Second Soldering)
(Vin or V
) VDD.
out
) (Note 2.)
SS
–0.5 to VDD + 0.5 V
±10 mA
500 mW
260 °C
and V
in
should be constrained
out
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MARKING
DIAGRAMS
16
PDIP–16
P SUFFIX
CASE 648
SOIC–16
D SUFFIX
CASE 751B
SOEIAJ–16
F SUFFIX
CASE 966
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
MC14027BCP
AWLYYWW
1
16
14027B
AWLYWW
1
16
MC14027B
ALYW
1
ORDERING INFORMATION
Device Package Shipping
MC14027BCP PDIP–16 2000/Box
MC14027BD SOIC–16 2400/Box
MC14027BDR2 SOIC–16 2500/Tape & Reel
MC14027BF SOEIAJ–16 See Note 1.
MC14027BFEL SOEIAJ–16 See Note 1.
1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.
Semiconductor Components Industries, LLC, 2000
August, 2000 – Rev. 4
1 Publication Order Number:
MC14027B/D

MC14027B
TRUTH TABLE
Inputs Outputs*
†
C
J K S R Q
1 X 0 0 0 1 0
X 0 0 0 1 1 0
0 X 0 0 0 0 1
X 1 0 0 1 0 1
1 1 0 0 Qo Qo Qo
X X 0 0 X Q
X X X 1 0 X 1 0
X X X 0 1 X 0 1
X X X 1 1 X 1 1
X = Don’t Care
†
= Level Change * = Next State
‡
= Present State
PIN ASSIGNMENT
‡
Q
n
n+1
n
Q
n+1
Q
No
n
Change
1
Q
A
2
Q
A
3
C
A
4
R
A
K
A
6
J
A
7
S
A
8
V
SS
16
15
14
13
125
11
10
9
BLOCK DIAGRAM
7
6
3
5
4
9
10
S
JQ
C
K
J
Q
R
S
Q
V
DD
Q
B
Q
B
C
B
R
B
K
B
J
B
S
B
1
2
15
13
C
11
K
Q
R
12
VDD = PIN 16
V
= PIN 8
SS
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14

MC14027B
ELECTRICAL CHARACTERISTICS (Voltages Referenced to V
DD
Characteristic
Output Voltage “0” Level
V
= VDD or 0
in
ОООООООО
Vin = 0 or V
ОООООООО
Input Voltage “0” Level
ОООООООО
(V
O
(V
ОООООООО
O
(V
O
(VO = 0.5 or 4.5 Vdc) “1” Level
ОООООООО
(V
O
(V
O
ОООООООО
DD
= 4.5 or 0.5 Vdc)
= 9.0 or 1.0 Vdc)
= 13.5 or 1.5 Vdc)
= 1.0 or 9.0 Vdc)
= 1.5 or 13.5 Vdc)
“1” Level
Output Drive Current
(V
= 2.5 Vdc) Source
OH
ОООООООО
(V
= 4.6 Vdc)
OH
(V
= 9.5 Vdc)
OH
ОООООООО
(V
= 13.5 Vdc)
OH
(VOL = 0.4 Vdc) Sink
ОООООООО
(V
= 0.5 Vdc)
OL
(V
= 1.5 Vdc)
OL
ОООООООО
Input Current
Input Capacitance
(V
= 0)
in
Quiescent Current
ОООООООО
(Per Package)
ОООООООО
Total Supply Current
(5.) (6.)
(Dynamic plus Quiescent,
ОООООООО
Per Package)
= 50 pF on all outputs, all
(C
L
ОООООООО
buffers switching)
Symbol
V
OL
ÎÎ
V
OH
ÎÎ
V
IL
ÎÎ
ÎÎ
V
IH
ÎÎ
ÎÎ
I
OH
ÎÎ
ÎÎ
I
OL
ÎÎ
ÎÎ
I
in
C
in
I
DD
ÎÎ
ÎÎ
I
T
ÎÎ
ÎÎ
Vdc
5.0
10
Î
15
5.0
10
Î
15
Î
5.0
10
Î
15
5.0
Î
10
15
Î
5.0
Î
5.0
10
Î
15
5.0
Î
10
15
Î
15
—
5.0
Î
10
15
Î
5.0
10
Î
15
Î
Min
—
—
Î
—
4.95
9.95
Î
14.95
Î
—
—
Î
—
3.5
Î
7.0
11
Î
– 3.0
Î
– 0.64
– 1.6
Î
– 4.2
0.64
Î
1.6
4.2
Î
—
—
—
Î
—
—
Î
ООООООООООООООО
ООООООООООООООО
SS
– 55C
)
Max
0.05
0.05
Î
0.05
Î
Î
1.5
3.0
Î
4.0
Î
Î
Î
Î
Î
Î
± 0.1
1.0
Î
2.0
4.0
Î
25C
Min
—
—
ÎÎ
—
—
—
—
4.95
9.95
ÎÎ
14.95
ÎÎ
—
—
ÎÎ
—
—
—
—
—
—
—
—
—
—
—
3.5
ÎÎ
7.0
11
ÎÎ
– 2.4
ÎÎ
– 0.51
– 1.3
ÎÎ
– 3.4
0.51
ÎÎ
1.3
3.4
ÎÎ
—
—
—
—
ÎÎ
—
—
ÎÎ
IT = (0.8 µA/kHz) f + I
IT = (1.6 µA/kHz) f + I
IT = (2.4 µA/kHz) f + I
(4.)
Typ
0
0
Î
0
5.0
10
Î
15
Î
2.25
4.50
Î
6.75
2.75
Î
5.50
8.25
Î
– 4.2
Î
– 0.88
– 2.25
Î
– 8.8
0.88
Î
2.25
8.8
Î
±0.00001
5.0
0.002
Î
0.004
0.006
Î
Max
0.05
0.05
ÎÎ
0.05
—
—
ÎÎ
—
ÎÎ
1.5
3.0
ÎÎ
4.0
—
ÎÎ
—
—
ÎÎ
—
ÎÎ
—
—
ÎÎ
—
—
ÎÎ
—
—
ÎÎ
± 0.1
7.5
1.0
ÎÎ
2.0
4.0
ÎÎ
DD
DD
DD
Min
—
—
Î
—
4.95
9.95
Î
14.95
Î
—
—
Î
—
3.5
Î
7.0
11
Î
– 1.7
Î
– 0.36
– 0.9
Î
– 2.4
0.36
Î
0.9
2.4
Î
—
—
—
Î
—
—
Î
125C
Max
0.05
0.05
Î
0.05
Î
Î
Î
Î
Î
Î
Î
Î
Î
± 1.0
Î
Î
4. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
5. The formulas given are for the typical characteristics only at 25C.
6. To calculate total supply current at loads other than 50 pF:
I
) = IT(50 pF) + (CL – 50) Vfk
T(CL
where: I
is in µA (per package), CL in pF, V = (VDD – VSS) in volts, f in kHz is input frequency, and k = 0.002.
T
—
—
—
1.5
3.0
4.0
—
—
—
—
—
—
—
—
—
—
—
30
60
120
Unit
Vdc
Î
Vdc
Î
Vdc
Î
Î
Vdc
Î
Î
mAdc
Î
Î
mAdc
Î
Î
µAdc
pF
µAdc
Î
Î
µAdc
Î
Î
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