ON Semiconductor MC14027B Technical data

MC14027B
Dual J-K Flip-Flop
The MC14027B dual J–K flip–flop has independent J, K, Clock (C), Set (S) and Reset (R) inputs for each flip–flop. These devices may be used in control, register, or toggle functions.
Diode Protection on All Inputs
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Logic Swing Independent of Fanout
Logic Edge–Clocked Flip–Flop Design —
Logic state is retained indefinitely with clock level either high or low; information is transferred to the output only on the positive–going edge of the clock pulse
Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
Pin–for–Pin Replacement for CD4027B
MAXIMUM RATINGS (Voltages Referenced to V
Symbol
V
DD
Vin, V
Iin, I
P
T
T
stg
T
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/C From 65C To 125C
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high–impedance circuit. For proper operation, V to the range V
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either V
DC Supply Voltage Range –0.5 to +18.0 V Input or Output Voltage Range
out
Input or Output Current
out
Power Dissipation,
D
Ambient Temperature Range –55 to +125 °C
A
Storage Temperature Range –65 to +150 °C Lead Temperature
L
SS
or VDD). Unused outputs must be left open.
SS
Parameter Value Unit
(DC or Transient)
(DC or Transient) per Pin
per Package (Note 3.)
(8–Second Soldering)
(Vin or V
) VDD.
out
) (Note 2.)
SS
–0.5 to VDD + 0.5 V
±10 mA
500 mW
260 °C
and V
in
should be constrained
out
http://onsemi.com
MARKING
DIAGRAMS
16
PDIP–16
P SUFFIX
CASE 648
SOIC–16
D SUFFIX
CASE 751B
SOEIAJ–16
F SUFFIX
CASE 966
A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week
MC14027BCP
AWLYYWW
1
16
14027B
AWLYWW
1
16
MC14027B
ALYW
1
ORDERING INFORMATION
Device Package Shipping
MC14027BCP PDIP–16 2000/Box MC14027BD SOIC–16 2400/Box MC14027BDR2 SOIC–16 2500/Tape & Reel MC14027BF SOEIAJ–16 See Note 1. MC14027BFEL SOEIAJ–16 See Note 1.
1. For ordering information on the EIAJ version of the SOIC packages, please contact your local ON Semiconductor representative.
Semiconductor Components Industries, LLC, 2000
August, 2000 – Rev. 4
1 Publication Order Number:
MC14027B/D
MC14027B
TRUTH TABLE
Inputs Outputs*
C
J K S R Q
1 X 0 0 0 1 0 X 0 0 0 1 1 0 0 X 0 0 0 0 1 X 1 0 0 1 0 1 1 1 0 0 Qo Qo Qo
X X 0 0 X Q X X X 1 0 X 1 0 X X X 0 1 X 0 1 X X X 1 1 X 1 1
X = Don’t Care
= Level Change * = Next State
= Present State
PIN ASSIGNMENT
Q
n
n+1
n
Q
n+1
Q
No
n
Change
1
Q
A
2
Q
A
3
C
A
4
R
A
K
A
6
J
A
7
S
A
8
V
SS
16
15
14
13
125
11
10
9
BLOCK DIAGRAM
7
6
3
5
4
9
10
S
JQ
C
K
J
Q
R
S
Q
V
DD
Q
B
Q
B
C
B
R
B
K
B
J
B
S
B
1
2
15
13
C
11
K
Q
R
12
VDD = PIN 16
V
= PIN 8
SS
http://onsemi.com
2
14
MC14027B
V
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
ELECTRICAL CHARACTERISTICS (Voltages Referenced to V
DD
Characteristic
Output Voltage “0” Level
V
= VDD or 0
in
ОООООООО
Vin = 0 or V
ОООООООО
Input Voltage “0” Level
ОООООООО
(V
O
(V
ОООООООО
O
(V
O
(VO = 0.5 or 4.5 Vdc) “1” Level
ОООООООО
(V
O
(V
O
ОООООООО
DD
= 4.5 or 0.5 Vdc) = 9.0 or 1.0 Vdc) = 13.5 or 1.5 Vdc)
= 1.0 or 9.0 Vdc) = 1.5 or 13.5 Vdc)
“1” Level
Output Drive Current
(V
= 2.5 Vdc) Source
OH
ОООООООО
(V
= 4.6 Vdc)
OH
(V
= 9.5 Vdc)
OH
ОООООООО
(V
= 13.5 Vdc)
OH
(VOL = 0.4 Vdc) Sink
ОООООООО
(V
= 0.5 Vdc)
OL
(V
= 1.5 Vdc)
OL
ОООООООО
Input Current Input Capacitance
(V
= 0)
in
Quiescent Current
ОООООООО
(Per Package)
ОООООООО
Total Supply Current
(5.) (6.)
(Dynamic plus Quiescent,
ОООООООО
Per Package)
= 50 pF on all outputs, all
(C
L
ОООООООО
buffers switching)
Symbol
V
OL
ÎÎ
V
OH
ÎÎ
V
IL
ÎÎ
ÎÎ
V
IH
ÎÎ
ÎÎ
I
OH
ÎÎ
ÎÎ
I
OL
ÎÎ
ÎÎ
I
in
C
in
I
DD
ÎÎ
ÎÎ
I
T
ÎÎ
ÎÎ
Vdc
5.0 10
Î
15
5.0 10
Î
15
Î
5.0 10
Î
15
5.0
Î
10 15
Î
5.0
Î
5.0 10
Î
15
5.0
Î
10 15
Î
15 —
5.0
Î
10 15
Î
5.0 10
Î
15
Î
Min
— —
Î
4.95
9.95
Î
14.95
Î
— —
Î
3.5
Î
7.0 11
Î
– 3.0
Î
– 0.64
– 1.6
Î
– 4.2
0.64
Î
1.6
4.2
Î
— —
Î
— —
Î
ООООООООООООООО
ООООООООООООООО
SS
– 55C
)
Max
0.05
0.05
Î
0.05
Î
Î
1.5
3.0
Î
4.0
Î
Î
Î
Î
Î
Î
± 0.1
1.0
Î
2.0
4.0
Î
25C
Min
— —
ÎÎ
— — —
4.95
9.95
ÎÎ
14.95
ÎÎ
— —
ÎÎ
— — —
— — — —
— — —
3.5
ÎÎ
7.0 11
ÎÎ
– 2.4
ÎÎ
– 0.51
– 1.3
ÎÎ
– 3.4
0.51
ÎÎ
1.3
3.4
ÎÎ
ÎÎ
— —
ÎÎ
IT = (0.8 µA/kHz) f + I IT = (1.6 µA/kHz) f + I IT = (2.4 µA/kHz) f + I
(4.)
Typ
0 0
Î
0
5.0 10
Î
15
Î
2.25
4.50
Î
6.75
2.75
Î
5.50
8.25
Î
– 4.2
Î
– 0.88 – 2.25
Î
– 8.8
0.88
Î
2.25
8.8
Î
±0.00001
5.0
0.002
Î
0.004
0.006
Î
Max
0.05
0.05
ÎÎ
0.05 —
ÎÎ
ÎÎ
1.5
3.0
ÎÎ
4.0 —
ÎÎ
— —
ÎÎ
ÎÎ
— —
ÎÎ
— —
ÎÎ
— —
ÎÎ
± 0.1
7.5
1.0
ÎÎ
2.0
4.0
ÎÎ
DD DD DD
Min
— —
Î
4.95
9.95
Î
14.95
Î
— —
Î
3.5
Î
7.0 11
Î
– 1.7
Î
– 0.36
– 0.9
Î
– 2.4
0.36
Î
0.9
2.4
Î
— —
Î
— —
Î
125C
Max
0.05
0.05
Î
0.05
Î
Î
Î
Î
Î
Î
Î
Î
Î
± 1.0
Î
Î
4. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
5. The formulas given are for the typical characteristics only at 25C.
6. To calculate total supply current at loads other than 50 pF: I
) = IT(50 pF) + (CL – 50) Vfk
T(CL
where: I
is in µA (per package), CL in pF, V = (VDD – VSS) in volts, f in kHz is input frequency, and k = 0.002.
T
— — —
1.5
3.0
4.0 —
— —
— — — —
— — —
30 60
120
Unit
Vdc
Î
Vdc
Î
Vdc
Î
Î
Vdc
Î
Î
mAdc
Î
Î
mAdc
Î
Î
µAdc
pF
µAdc
Î
Î
µAdc
Î
Î
http://onsemi.com
3
MC14027B
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
SWITCHING CHARACTERISTICS
(7.)
(C
= 50 pF, T
L
Characteristic
Output Rise and Fall Time
t
, t
TLH
ООООООООООООО
t
TLH
ООООООООООООО
t
TLH
= (1.5 ns/pF) CL + 25 ns
THL
, t
= (0.75 ns/pF) CL + 12.5 ns
THL
, t
= (0.55 ns/pF) CL + 12.5 ns
THL
Propagation Delay Times**
Clock to Q, Q
ООООООООООООО
ООООООООООООО
ООООООООООООО
t t t
PLH PLH PLH
, t
= (1.7 ns/pF) CL + 90 ns
PHL
, t
= (0.66 ns/pF) CL + 42 ns
PHL
, t
= (0.5 ns/pF) CL + 25 ns
PHL
= 25C)
A
Symbol
t
TLH
t
THL
ÎÎÎ
ÎÎÎ
t
PLH
t
PHL
ÎÎÎ
ÎÎÎ
ÎÎÎ
V
DD
Min
Typ
(8.)
Max
,
5.0
ÎÎ
10
ÎÎ
15
ÎÎ
ÎÎ
100
ÎÎ
50
ÎÎ
40
200
ÎÎ
100
ÎÎ
80
,
ÎÎ
5.0
ÎÎ
10 15
ÎÎ
ÎÎ
ÎÎ
— —
ÎÎ
ÎÎ
175
ÎÎ
75 50
ÎÎ
ÎÎ
350
ÎÎ
150 100
ÎÎ
Set to Q, Q
t
, t
PLH
ООООООООООООО
t
PLH
t
PLH
ООООООООООООО
= (1.7 ns/pF) CL + 90 ns
PHL
, t
= (0.66 ns/pF) CL + 42 ns
PHL
, t
= (0.5 ns/pF) CL + 25 ns
PHL
ÎÎÎ
ÎÎÎ
5.0
ÎÎ
10 15
ÎÎ
ÎÎ
— —
ÎÎ
175
ÎÎ
75 50
ÎÎ
350
ÎÎ
150 100
ÎÎ
Reset to Q, Q
t
, t
PLH
ООООООООООООО
t
PLH
t
PLH
ООООООООООООО
= (1.7 ns/pF) CL + 265 ns
PHL
, t
= (0.66 ns/pF) CL + 67 ns
PHL
, t
= (0.5 ns/pF) CL + 50 ns
PHL
Setup Times
ООООООООООООО
Hold Times
ООООООООООООО
Clock Pulse Width
ООООООООООООО
Clock Pulse Frequency
ООООООООООООО
ООООООООООООО
Clock Pulse Rise and Fall Time
ООООООООООООО
Removal Times
ООООООООООООО
Set
ООООООООООООО
Reset
ООООООООООООО
Set and Reset Pulse Width
ООООООООООООО
ООООООООООООО
ÎÎÎ
ÎÎÎ
t
su
ÎÎ
10 15
ÎÎ
5.0 10
5.0
ÎÎÎ
t
h
ÎÎÎ
tWH, t
WL
ÎÎÎ
15
ÎÎ
5.0 10
ÎÎ
15
5.0 10
ÎÎ
15
f
cl
ÎÎÎ
ÎÎÎ
t
, t
TLH
THL
ÎÎÎ
t
rem
ÎÎÎ
ÎÎÎ
5.0
ÎÎ
10 15
ÎÎ
5.0 10
ÎÎ
15
5
ÎÎ
10
ÎÎ
15
5
ÎÎÎÎÎÎ
t
WH
ÎÎÎ
ÎÎÎ
10 15
5.0
ÎÎ
10 15
ÎÎ
ÎÎ
— —
ÎÎ
140
50 35
ÎÎ
140
50
ÎÎ
35
330 110
ÎÎ
75 —
ÎÎ
— —
ÎÎ
— —
ÎÎ
90
ÎÎ
45
ÎÎ
35 50
25
ÎÎ
20
250
ÎÎ
100
70
ÎÎ
350
ÎÎ
100
75
ÎÎ
70 25 17
ÎÎ
70 25
ÎÎ
17
165
55
ÎÎ
38
3.0
ÎÎ
9.0 13
ÎÎ
— —
ÎÎ
10
ÎÎ
5
ÎÎ
3
– 30 – 15
ÎÎ
– 10
125
ÎÎ
50 35
ÎÎ
450
ÎÎ
200 150
ÎÎ
— — —
ÎÎ
— —
ÎÎ
— —
ÎÎ
1.5
ÎÎ
4.5
6.5
ÎÎ
15
5.0
ÎÎ
4.0
ÎÎ
ÎÎ
— —
ÎÎ
— —
ÎÎ
— —
ÎÎ
7. The formulas given are for the typical characteristics only at 25C.
8. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
Unit
ns
Î
Î
ns
Î
Î
Î
Î
Î
Î
Î
ns
Î
ns
Î
ns
Î
MHz
Î
Î
µs
Î
ns
Î
Î
Î
ns
Î
Î
http://onsemi.com
4
MC14027B
20 ns 20 ns
J
50%
10%
90%
20 ns 20 ns
K
t
su
50%
10%
90%
t
su
20 ns 20 ns
90%
C
t
WH
t
PLH
Q
90%
50%
1
f
cl
10%
t
WL
50%
10%
t
TLH
Inputs R and S low. For the measurement of t
, I/fcl, and P
WH
the Inputs J and K are kept high.
Figure 1. Dynamic Signal Waveforms
(J, K, Clock, and Output)
t
PHL
t
t
h
THL
V
DD
V
SS
V
DD
V
SS
V
DD
V
SS
V
OH
V
OL
D
20 ns 20 ns
SET OR
RESET
90%
t
50%
w
CLOCK
t
PLH
t
PHL
Q or Q
20 ns
50%
90%
10%
50%
V
DD
V
t
rem
10%
t
w
20 ns
SS
V
DD
V
SS
V
OH
V
OL
Figure 2. Dynamic Signal Waveforms
(Set, Reset, Clock, and Output)
LOGIC DIAGRAM
(1/2 of Device Shown)
S
J
C
C
K
R
C
CC
Q
C
C
C
C
C
C
Q
http://onsemi.com
5
–T–
–A–
916
B
18
F
C
S
–T–
H
G
D
16 PL
0.25 (0.010) T
K
M
–A–
16 9
–B–
18
G
K
C
SEATING
PLANE
D
16 PL
0.25 (0.010) A
M
S
B
T
S
MC14027B
PACKAGE DIMENSIONS
PDIP–16
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648–08
ISSUE R
L
SEATING PLANE
J
M
A
SOIC–16
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B–05
ISSUE J
8 PLP
M
0.25 (0.010) B
M
S
X 45
R
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
DIM MIN MAX MIN MAX
A 0.740 0.770 18.80 19.55 B 0.250 0.270 6.35 6.85 C 0.145 0.175 3.69 4.44 D 0.015 0.021 0.39 0.53 F 0.040 0.70 1.02 1.77 G 0.100 BSC 2.54 BSC
M
F
J
H 0.050 BSC 1.27 BSC J 0.008 0.015 0.21 0.38 K 0.110 0.130 2.80 3.30 L 0.295 0.305 7.50 7.74 M 0 10 0 10 S 0.020 0.040 0.51 1.01
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.
DIM MIN MAX MIN MAX
A 9.80 10.00 0.386 0.393 B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.054 0.068 D 0.35 0.49 0.014 0.019 F 0.40 1.25 0.016 0.049
G 1.27 BSC 0.050 BSC
J 0.19 0.25 0.008 0.009 K 0.10 0.25 0.004 0.009
M 0 7 0 7
P 5.80 6.20 0.229 0.244 R 0.25 0.50 0.010 0.019
MILLIMETERSINCHES
INCHESMILLIMETERS

http://onsemi.com
6
16 9
1
Z
D
e
b
0.13 (0.005)
M
8
H
E
E
A
A
1
0.10 (0.004)
MC14027B
PACKAGE DIMENSIONS
SOEIAJ–16
F SUFFIX
PLASTIC EIAJ SOIC PACKAGE
CASE 966–01
ISSUE O
L
E
M
L
DETAIL P
VIEW P
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE
MOLD FLASH OR PROTRUSIONS AND ARE
Q
1
c
MEASURED AT THE PARTING LINE. MOLD FLASH
OR PROTRUSIONS SHALL NOT EXCEED 0.15
(0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
MILLIMETERS
DIM MIN MAX MIN MAX
--- 2.05 --- 0.081
A A
0.05 0.20 0.002 0.008
1
0.35 0.50 0.014 0.020
b
0.18 0.27 0.007 0.011
c
9.90 10.50 0.390 0.413
D
5.10 5.45 0.201 0.215
E
1.27 BSC 0.050 BSC
e H
7.40 8.20 0.291 0.323
E
0.50 0.85 0.020 0.033
L L
1.10 1.50 0.043 0.059
E
0
M
Q
0.70 0.90 0.028 0.035
1
--- 0.78 --- 0.031
Z
INCHES
10
10
0
http://onsemi.com
7
MC14027B
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
NORTH AMERICA Literature Fulfillment:
Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada Email: ONlit@hibbertco.com
Fax Response Line: 303–675–2167 or 800–344–3810 Toll Free USA/Canada
N. American Technical Support: 800–282–9855 Toll Free USA/Canada EUROPE: LDC for ON Semiconductor – European Support
German Phone: (+1) 303–308–7140 (Mon–Fri 2:30pm to 7:00pm CET)
Email: ONlit–german@hibbertco.com
French Phone: (+1) 303–308–7141 (Mon–Fri 2:00pm to 7:00pm CET)
Email: ONlit–french@hibbertco.com
English Phone: (+1) 303–308–7142 (Mon–Fri 12:00pm to 5:00pm GMT)
Email: ONlit@hibbertco.com
EUROPEAN TOLL–FREE ACCESS*: 00–800–4422–3781
*Available from Germany, France, Italy, UK
CENTRAL/SOUTH AMERICA:
Spanish Phone: 303–308–7143 (Mon–Fri 8:00am to 5:00pm MST)
Email: ONlit–spanish@hibbertco.com
ASIA/PACIFIC: LDC for ON Semiconductor – Asia Support
Phone: 303–675–2121 (Tue–Fri 9:00am to 1:00pm, Hong Kong Time)
Toll Free from Hong Kong & Singapore: 001–800–4422–3781
Email: ONlit–asia@hibbertco.com
JAPAN: ON Semiconductor, Japan Customer Focus Center
4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031
Phone: 81–3–5740–2745 Email: r14525@onsemi.com
ON Semiconductor Website: http://onsemi.com
For additional information, please contact your local Sales Representative.
http://onsemi.com
8
MC14027B/D
Loading...